__fmt_id.set_2bytes_le_from(header.format_id);
__sample_bits.set_2bytes_le_from(header.sample_bits);
- if((__fmt_id.w != 1) || !((__sample_bits.w == 8) || (__sample_bits.w == 16))) {
+ if((__fmt_id.u16 != 1) || !((__sample_bits.u16 == 8) || (__sample_bits.u16 == 16))) {
return 0;
}
tmpval32.set_4bytes_le_from(header.fmt_chunk.size);
__channels.set_2bytes_le_from(header.channels);
- int samples = (int)(__chunk_size.d / (uint32_t)(__channels.w)), loaded_samples = 0;
+ int samples = (int)(__chunk_size.d / (uint32_t)(__channels.u16)), loaded_samples = 0;
- if(__sample_bits.w == 16) {
+ if(__sample_bits.u16 == 16) {
samples /= 2;
}
__sample_rate.set_4bytes_le_from(header.sample_rate);
// load samples
if(samples > 0) {
- #define TMP_LENGTH (0x10000 * (uint32_t)(__channels.w))
+ #define TMP_LENGTH (0x10000 * (uint32_t)(__channels.u16))
uint8_t *tmp_buffer = (uint8_t *)malloc(TMP_LENGTH);
play_fio->Fread(tmp_buffer, TMP_LENGTH, 1);
#define GET_SAMPLE { \
- for(int ch = 0; ch < __channels.sw; ch++) { \
- if(__sample_bits.w == 16) { \
+ for(int ch = 0; ch < __channels.s16; ch++) { \
+ if(__sample_bits.u16 == 16) { \
union { \
int16_t s16; \
struct { \
bool __t = false;
if(__DATAREC_SOUND) {
- if(!config.wave_shaper[drive_num] || __channels.w > 1) {
+ if(!config.wave_shaper[drive_num] || __channels.u16 > 1) {
__t = true;
}
} else {
// load samples
//#ifdef DATAREC_SOUND
if(__DATAREC_SOUND) {
- if(__channels.w > 1) {
+ if(__channels.u16 > 1) {
sound_buffer_length = samples * sizeof(int16_t);
sound_buffer = (int16_t *)malloc(sound_buffer_length);
}
int16_t sample_signal = sample[0];
//#ifdef DATAREC_SOUND
if(__DATAREC_SOUND) {
- if(__channels.w > 1) {
+ if(__channels.u16 > 1) {
//#ifdef DATAREC_SOUND_LEFT
if(__DATAREC_SOUND_LEFT) {
sample_signal = sample[1];
buffer = (uint8_t *)malloc(loaded_samples);
//#ifdef DATAREC_SOUND
if(__DATAREC_SOUND) {
- if(__channels.w > 1) {
+ if(__channels.u16 > 1) {
sound_buffer_length = loaded_samples * sizeof(int16_t);
sound_buffer = (int16_t *)malloc(sound_buffer_length);
}
__riff_chunk_size.d = length - 8;
__fmt_chunk_size.d = 16;
- __fmt_id.w = 1;
- __channels.w = 1;
+ __fmt_id.u16 = 1;
+ __channels.u16 = 1;
__sample_rate.d = sample_rate;
- __block_size.w = 1;
- __sample_bits.w = 8;
+ __block_size.u16 = 1;
+ __sample_bits.u16 = 8;
memcpy(wav_header.riff_chunk.id, "RIFF", 4);
wav_header.riff_chunk.size = __riff_chunk_size.get_4bytes_le_to();
{
return true;
}
-#if defined(_USE_QT)
- virtual void decl_state(void) { }
- virtual void enter_decl_state(int version) {
- state_entry = new csp_state_utils(version, this_device_id, (const _TCHAR *)this_device_name, p_logger);
- }
- virtual void enter_decl_state(int version, _TCHAR *name) {
- state_entry = new csp_state_utils(version, this_device_id, (const _TCHAR *)name, p_logger);
- }
- virtual void leave_decl_state(void) {}
-#else
- virtual void decl_state(void) {}
- void enter_decl_state(int version) {}
- void enter_decl_state(int version, _TCHAR *name) {}
- void leave_decl_state(void) {}
-#endif
// control
virtual void reset() {}
virtual void special_reset()
return true;
}
-#if 0
-#include "../statesub.h"
-
-void I8259::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < (int)__I8259_MAX_CHIPS; i++) {
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].imr), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].isr), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].irr), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].irr_tmp), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].prio), i);
-
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw1), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw2), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw3), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw4), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].ocw3), i);
-
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw2_r), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw3_r), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pic[i].icw4_r), i);
-
- DECL_STATE_ENTRY_INT32_MEMBER((pic[i].irr_tmp_id), i);
- }
-
- DECL_STATE_ENTRY_INT32(req_chip);
- DECL_STATE_ENTRY_INT32(req_level);
- DECL_STATE_ENTRY_UINT8(req_bit);
-
- leave_decl_state();
-}
-#endif
osd = emu->get_osd();
#if defined(_USE_QT)
p_logger = csp_logger;
- state_entry = NULL;
#endif
memset(this_device_name, 0x00, sizeof(this_device_name));
strncpy(this_device_name, "Base Device", 128 - 1);
void DEVICE::release()
{
- if(state_entry != NULL) delete state_entry;
- state_entry = NULL;
}
uint32_t DEVICE::read_io8(uint32_t addr)
return true;
}
-void I386_BASE::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- cpucore->decl_state(state_entry);
-
- leave_decl_state();
-}
-
-void I386_BASE::save_state(FILEIO* state_fio)
-{
- //state_fio->FputUint32(STATE_VERSION);
- //state_fio->FputInt32(this_device_id);
- cpucore->save_state(state_fio, state_entry);
-}
-
-bool I386_BASE::load_state(FILEIO* state_fio)
-{
- //if(state_fio->FgetUint32() != STATE_VERSION) {
- // return false;
- //}
- //if(state_fio->FgetInt32() != this_device_id) {
- // return false;
- //}
- if(!cpucore->load_state(state_fio, state_entry)) return false;
-
- // post process
- cpucore->set_context_pic(d_pic);
- cpucore->set_context_progmem(d_mem);
- cpucore->set_context_io(d_io);
-
- return true;
-}
-
void I386_OPS_BASE::cpu_table_i386(void)
{
- build_opcode_table(cpustate, OP_I386);
+ build_opcode_table(OP_I386);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_I386];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_I386];
}
void I386_OPS_BASE::cpu_table_i486(void)
{
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486);
- build_x87_opcode_table(cpustate);
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486);
+ build_x87_opcode_table();
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_I486];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_I486];
}
void I386_OPS_BASE::cpu_table_pentium(void)
{
// 64 dtlb small, 8 dtlb large, 32 itlb
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM);
- build_x87_opcode_table(cpustate);
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM);
+ build_x87_opcode_table();
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM];
}
void I386_OPS_BASE::cpu_table_mediagx(void)
{
// probably 32 unified
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_CYRIX);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_CYRIX);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_MEDIAGX];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_MEDIAGX];
}
void I386_OPS_BASE::cpu_table_pentium_pro(void)
{
// 64 dtlb small, 32 itlb
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
}
void I386_OPS_BASE::cpu_table_pentium_mmx(void)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_MMX);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_MMX);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
}
void I386_OPS_BASE::cpu_table_pentium2(void)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
}
void I386_OPS_BASE::cpu_table_pentium3(void)
{
// 64 dtlb small, 8 dtlb large, 32 itlb small, 2 itlb large
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
}
void I386_OPS_BASE::cpu_table_pentium4(void)
{
// 128 dtlb, 64 itlb
- build_x87_opcode_table(cpustate);
- build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE | OP_SSE2);
+ build_x87_opcode_table();
+ build_opcode_table(OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE | OP_SSE2);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
}
-//#include "./i386_ops_table.h"
-
-#include "../../statesub.h"
-
-void I386_OPS_BASE::decl_state_sreg(csp_state_utils *state_entry, int num)
-{
- DECL_STATE_ENTRY_UINT16_MEMBER((cpustate->sreg[num].selector), num);
- DECL_STATE_ENTRY_UINT16_MEMBER((cpustate->sreg[num].flags), num);
- DECL_STATE_ENTRY_UINT32_MEMBER((cpustate->sreg[num].base), num);
- DECL_STATE_ENTRY_UINT32_MEMBER((cpustate->sreg[num].limit), num);
- DECL_STATE_ENTRY_INT32_MEMBER((cpustate->sreg[num].d), num);
- DECL_STATE_ENTRY_BOOL_MEMBER((cpustate->sreg[num].valid), num);
-}
-
-#if 0
-void I386_OPS_BASE::decl_state_sys_table(csp_state_utils *state_entry, struct I386_SYS_TABLE *i386_sys_table_p)
-{
- DECL_STATE_ENTRY_UINT32((i386_sys_table_p->base));
- DECL_STATE_ENTRY_UINT16((i386_sys_table_p->limit));
-}
-
-void I386_OPS_BASE::decl_state_seg_desc(csp_state_utils *state_entry, struct I386_SEG_DESC *i386_seg_desc)
-{
- DECL_STATE_ENTRY_UINT16((i386_seg_desc->segment));
- DECL_STATE_ENTRY_UINT16((i386_seg_desc->flags));
- DECL_STATE_ENTRY_UINT32((i386_seg_desc->base));
- DECL_STATE_ENTRY_UINT32((i386_seg_desc->limit));
-}
-
-#define DECL_STATE_ENTRY_XMM(foo) { \
- DECL_STATE_ENTRY_DOUBLE((foo.f64[0])); \
- DECL_STATE_ENTRY_DOUBLE((foo.f64[1])); \
- }
-
-#define DECL_STATE_ENTRY_XMM_MEMBER(foo, num) { \
- DECL_STATE_ENTRY_DOUBLE_MEMBER((foo.f64[0]), num); \
- DECL_STATE_ENTRY_DOUBLE_MEMBER((foo.f64[1]), num); \
- }
-
-
-#define DECL_STATE_ENTRY_FLOATX80(foo) { \
- DECL_STATE_ENTRY_UINT16((foo.high)); \
- DECL_STATE_ENTRY_DOUBLE((foo.low)); \
- }
-
-#define DECL_STATE_ENTRY_FLOATX80_MEMBER(foo, num) { \
- DECL_STATE_ENTRY_UINT16_MEMBER((foo.high), num); \
- DECL_STATE_ENTRY_DOUBLE_MEMBER((foo.low), num); \
- }
-
-#define DECL_STATE_FLOAT128(foo) { \
- DECL_STATE_ENTRY_DOUBLE((foo.high)); \
- DECL_STATE_ENTRY_DOUBLE((foo.low)); \
- }
-
-#define DECL_STATE_ENTRY_FLOAT128_MEMBER(foo, num) { \
- DECL_STATE_ENTRY_DOUBLE_MEMBER((foo.high), num); \
- DECL_STATE_ENTRY_DOUBLE_MEMBER((foo.low), num); \
- }
-
-void I386_OPS_BASE::decl_state(csp_state_utils *state_entry)
-{
-
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->reg.d), 8); // GPR
- for(int i = 0; i < 6; i++) {
- decl_state_sreg(state_entry, i);
- }
- DECL_STATE_ENTRY_UINT32((cpustate->eip));
- DECL_STATE_ENTRY_UINT32((cpustate->pc));
- DECL_STATE_ENTRY_UINT32((cpustate->prev_eip));
- DECL_STATE_ENTRY_UINT32((cpustate->prev_pc));
- DECL_STATE_ENTRY_UINT32((cpustate->eflags));
- DECL_STATE_ENTRY_UINT32((cpustate->eflags_mask));
-
- DECL_STATE_ENTRY_UINT8((cpustate->CF));
- DECL_STATE_ENTRY_UINT8((cpustate->DF));
- DECL_STATE_ENTRY_UINT8((cpustate->SF));
- DECL_STATE_ENTRY_UINT8((cpustate->OF));
- DECL_STATE_ENTRY_UINT8((cpustate->ZF));
- DECL_STATE_ENTRY_UINT8((cpustate->PF));
- DECL_STATE_ENTRY_UINT8((cpustate->AF));
- DECL_STATE_ENTRY_UINT8((cpustate->IF));
- DECL_STATE_ENTRY_UINT8((cpustate->TF));
- DECL_STATE_ENTRY_UINT8((cpustate->IOP1));
- DECL_STATE_ENTRY_UINT8((cpustate->IOP2));
- DECL_STATE_ENTRY_UINT8((cpustate->NT));
- DECL_STATE_ENTRY_UINT8((cpustate->RF));
- DECL_STATE_ENTRY_UINT8((cpustate->VM));
- DECL_STATE_ENTRY_UINT8((cpustate->AC));
- DECL_STATE_ENTRY_UINT8((cpustate->VIF));
- DECL_STATE_ENTRY_UINT8((cpustate->VIP));
- DECL_STATE_ENTRY_UINT8((cpustate->ID));
-
- DECL_STATE_ENTRY_UINT8((cpustate->CPL));
-
- DECL_STATE_ENTRY_UINT8((cpustate->performed_intersegment_jump));
- DECL_STATE_ENTRY_UINT8((cpustate->delayed_interrupt_enable));
-
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->cr), 5); // Control registers
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->dr), 8); // Debug registers
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->tr), 8); // Test registers
-
- decl_state_sys_table(state_entry, &(cpustate->gdtr));
- decl_state_sys_table(state_entry, &(cpustate->idtr));
-
- decl_state_seg_desc(state_entry, &(cpustate->task));
- decl_state_seg_desc(state_entry, &(cpustate->ldtr));
-
- DECL_STATE_ENTRY_UINT8((cpustate->ext));
-
- DECL_STATE_ENTRY_INT32((cpustate->halted));
- DECL_STATE_ENTRY_INT32((cpustate->busreq));
- DECL_STATE_ENTRY_INT32((cpustate->shutdown));
-
- DECL_STATE_ENTRY_INT32((cpustate->operand_size));
- DECL_STATE_ENTRY_INT32((cpustate->xmm_operand_size));
- DECL_STATE_ENTRY_INT32((cpustate->address_size));
- DECL_STATE_ENTRY_INT32((cpustate->operand_prefix));
- DECL_STATE_ENTRY_INT32((cpustate->address_prefix));
-
- DECL_STATE_ENTRY_INT32((cpustate->segment_prefix));
- DECL_STATE_ENTRY_INT32((cpustate->segment_override));
-
- DECL_STATE_ENTRY_UINT64((cpustate->total_cycles));
- DECL_STATE_ENTRY_UINT64((cpustate->prev_total_cycles));
-
- DECL_STATE_ENTRY_INT32((cpustate->cycles));
- DECL_STATE_ENTRY_INT32((cpustate->extra_cycles));
- DECL_STATE_ENTRY_INT32((cpustate->base_cycles));
-
- DECL_STATE_ENTRY_UINT8((cpustate->opcode));
- DECL_STATE_ENTRY_UINT8((cpustate->irq_state));
-
- DECL_STATE_ENTRY_UINT32((cpustate->a20_mask));
-
- DECL_STATE_ENTRY_INT32((cpustate->cpuid_max_input_value_eax));
- DECL_STATE_ENTRY_UINT32((cpustate->cpuid_id0));
- DECL_STATE_ENTRY_UINT32((cpustate->cpuid_id1));
- DECL_STATE_ENTRY_UINT32((cpustate->cpuid_id2));
-
- DECL_STATE_ENTRY_UINT32((cpustate->cpu_version));
- DECL_STATE_ENTRY_UINT32((cpustate->feature_flags));
- DECL_STATE_ENTRY_UINT64((cpustate->tsc));
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->perfctr), 2);
-
- for(int i = 0; i < 8; i++) {
- DECL_STATE_ENTRY_FLOATX80_MEMBER(cpustate->x87_reg[i], i);
- }
-
- DECL_STATE_ENTRY_UINT16((cpustate->x87_cw));
- DECL_STATE_ENTRY_UINT16((cpustate->x87_sw));
- DECL_STATE_ENTRY_UINT16((cpustate->x87_tw));
- DECL_STATE_ENTRY_UINT64((cpustate->x87_data_ptr));
- DECL_STATE_ENTRY_UINT64((cpustate->x87_inst_ptr));
- DECL_STATE_ENTRY_UINT16((cpustate->x87_opcode));
-
- // ToDo? : opcode_table
- for(int i = 0; i < 8; i++) {
- DECL_STATE_ENTRY_XMM_MEMBER(cpustate->sse_reg[i], i);
- }
- DECL_STATE_ENTRY_UINT32((cpustate->mxcsr));
-
- DECL_STATE_ENTRY_2D_ARRAY(cpustate->lock_table, 2, 256);
-
- //ToDo: VTLB load/save.
- DECL_STATE_ENTRY_BOOL((cpustate->smm));
- DECL_STATE_ENTRY_BOOL((cpustate->smi));
- DECL_STATE_ENTRY_BOOL((cpustate->smi_latched));
- DECL_STATE_ENTRY_BOOL((cpustate->nmi_masked));
- DECL_STATE_ENTRY_BOOL((cpustate->nmi_latched));
-
- DECL_STATE_ENTRY_UINT32((cpustate->smbase));
-
- DECL_STATE_ENTRY_BOOL((cpustate->lock));
-#ifdef DEBUG_MISSING_OPCODE
- DECL_STATE_ENTRY_1D_ARRAY((cpustate->opcode_bytes), 16);
- DECL_STATE_ENTRY_UINT32((cpustate->opcode_pc));
- DECL_STATE_ENTRY_INT32((cpustate->opcode_bytes_length));
-#endif
-}
-#endif
bool I386_OPS_BASE::process_state(FILEIO *state_fio, bool loading)
{
virtual int cpu_disassemble_x86_32(_TCHAR *buffer, UINT64 eip, const UINT8 *oprom) { return 0; }
virtual int cpu_disassemble_x86_64(_TCHAR *buffer, UINT64 eip, const UINT8 *oprom) { return 0; }
- void decl_state_sreg(csp_state_utils *state_entry, int num);
- void decl_state_sys_table(csp_state_utils *state_entry, struct I386_SYS_TABLE *i386_sys_table_p);
- void decl_state_seg_desc(csp_state_utils *state_entry, struct I386_SEG_DESC *i386_seg_desc);
-
public:
// Init per vm..
void *cpu_init_i386(void);
double f64[2];
};
+struct vtlb_state;
class EMU;
class DEBUGGER;
class DEVICE;
state_fio->StateInt32(m_timer[i]);
}
for(int i = 0; i < (sizeof(m_latch) / sizeof(UINT16)); i++) {
- state_fio->StateUint16(m_timer[i]);
+ state_fio->StateUint16(m_latch[i]);
}
for(int i = 0; i < (sizeof(m_counter) / sizeof(UINT16)); i++) {
- state_fio->StateUint16(m_timer[i]);
+ state_fio->StateUint16(m_counter[i]);
}
return true;
}
{
state_fio->StateInt32(fdc[ch].track);
state_fio->StateInt32(fdc[ch].index);
- state_fio->StateInt32(fdc[ch].access);
- state_fio->StateInt32(fdc[ch].head_load);
+ state_fio->StateBool(fdc[ch].access);
+ state_fio->StateBool(fdc[ch].head_load);
state_fio->StateInt32(fdc[ch].cur_position);
state_fio->StateInt32(fdc[ch].bytes_before_2nd_rqm);
state_fio->StateInt32(fdc[ch].next_sync_position);
- state_fio->StateInt32(fdc[ch].prev_clock);
+ state_fio->StateUint32(fdc[ch].prev_clock);
return true;
}
for(int ch = 0; ch < 4; ch++) {
process_state_fdc(ch, state_fio, loading);
}
- for(int i = 0; i < __max_drive; i++) {
+ for(int i = 0; i < _max_drive; i++) {
if(!disk[i]->process_state(state_fio, loading)) {
return false;
}
#define STATE_VERSION 2
-#include "../statesub.h"
-
-void UPD1990A::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_CUR_TIME_T(cur_time);
- DECL_STATE_ENTRY_INT32(register_id_1sec);
- DECL_STATE_ENTRY_UINT8(cmd);
- DECL_STATE_ENTRY_UINT8(mode);
- DECL_STATE_ENTRY_UINT8(tpmode);
- DECL_STATE_ENTRY_UINT64(shift_data);
- DECL_STATE_ENTRY_BOOL(clk);
- DECL_STATE_ENTRY_BOOL(stb);
- DECL_STATE_ENTRY_BOOL(din);
- DECL_STATE_ENTRY_BOOL(hold);
- DECL_STATE_ENTRY_BOOL(tp);
- DECL_STATE_ENTRY_UINT32(dout);
- DECL_STATE_ENTRY_BOOL(dout_changed);
- DECL_STATE_ENTRY_INT32(register_id_tp);
- if(__HAS_UPD4990A) DECL_STATE_ENTRY_UINT8(shift_cmd);
-
- leave_decl_state();
-}
-void UPD1990A::save_state(FILEIO* state_fio)
+bool UPD1990A::process_state(FILEIO* state_fio, bool loading)
{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ if(!cur_time.process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ state_fio->StateInt32(register_id_1sec);
+ state_fio->StateUint8(cmd);
+ state_fio->StateUint8(mode);
+ state_fio->StateUint8(tpmode);
+ state_fio->StateUint64(shift_data);
+ state_fio->StateBool(clk);
+ state_fio->StateBool(stb);
+ state_fio->StateBool(din);
+ state_fio->StateBool(hold);
+ state_fio->StateBool(tp);
+ state_fio->StateUint32(dout);
+ state_fio->StateBool(dout_changed);
+ state_fio->StateInt32(register_id_tp);
+ if(__HAS_UPD4990A) {
+ state_fio->StateUint8(shift_cmd);
}
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// cur_time.save_state((void *)state_fio);
-// state_fio->FputInt32(register_id_1sec);
-// state_fio->FputUint8(cmd);
-// state_fio->FputUint8(mode);
-// state_fio->FputUint8(tpmode);
-// state_fio->FputUint64(shift_data);
-// state_fio->FputBool(clk);
-// state_fio->FputBool(stb);
-// state_fio->FputBool(din);
-// state_fio->FputBool(hold);
-// state_fio->FputBool(tp);
-// state_fio->FputUint32(dout);
-// state_fio->FputBool(dout_changed);
-// state_fio->FputInt32(register_id_tp);
-//#ifdef HAS_UPD4990A
-// if(__HAS_UPD4990A) state_fio->FputUint8(shift_cmd);
-//#endif
+ return true;
}
-
-bool UPD1990A::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// if(!cur_time.load_state((void *)state_fio)) {
-// return false;
-// }
-// register_id_1sec = state_fio->FgetInt32();
-// cmd = state_fio->FgetUint8();
-// mode = state_fio->FgetUint8();
-// tpmode = state_fio->FgetUint8();
-// shift_data = state_fio->FgetUint64();
-// clk = state_fio->FgetBool();
-// stb = state_fio->FgetBool();
-/// din = state_fio->FgetBool();
-// hold = state_fio->FgetBool();
-// tp = state_fio->FgetBool();
-// dout = state_fio->FgetUint32();
-// dout_changed = state_fio->FgetBool();
-// register_id_tp = state_fio->FgetInt32();
-//#ifdef HAS_UPD4990A
-// if(__HAS_UPD4990A) shift_cmd = state_fio->FgetUint8();
-//#endif
- return true;
-}
-
return dout;
}
void event_callback(int event_id, int err);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void set_context_dout(DEVICE* device, int id, uint32_t mask)
{
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void UPD4991A::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_CUR_TIME_T(cur_time);
- DECL_STATE_ENTRY_INT32(register_id);
- DECL_STATE_ENTRY_2D_ARRAY(regs, 3, 13);
- DECL_STATE_ENTRY_UINT8(ctrl1);
- DECL_STATE_ENTRY_UINT8(ctrl2);
- DECL_STATE_ENTRY_UINT8(mode);
-
- leave_decl_state();
-}
-
-void UPD4991A::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// cur_time.save_state((void *)state_fio);
-// state_fio->FputInt32(register_id);
-// state_fio->Fwrite(regs, sizeof(regs), 1);
-// state_fio->FputUint8(ctrl1);
-// state_fio->FputUint8(ctrl2);
-// state_fio->FputUint8(mode);
-}
-
-bool UPD4991A::load_state(FILEIO* state_fio)
+bool UPD4991A::process_state(FILEIO* state_fio, bool loading)
{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// if(!cur_time.load_state((void *)state_fio)) {
-// return false;
-// }
-// register_id = state_fio->FgetInt32();
-// state_fio->Fread(regs, sizeof(regs), 1);
-// ctrl1 = state_fio->FgetUint8();
-// ctrl2 = state_fio->FgetUint8();
-// mode = state_fio->FgetUint8();
- return true;
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ if(!cur_time.process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ state_fio->StateInt32(register_id);
+ state_fio->StateBuffer(regs, sizeof(regs), 1);
+ state_fio->StateUint8(ctrl1);
+ state_fio->StateUint8(ctrl2);
+ state_fio->StateUint8(mode);
+ return true;
}
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
void event_callback(int event_id, int err);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
};
#endif
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void UPD71071::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < 4; i++) {
- DECL_STATE_ENTRY_UINT32_MEMBER((dma[i].areg), i);
- DECL_STATE_ENTRY_UINT32_MEMBER((dma[i].bareg), i);
- DECL_STATE_ENTRY_UINT16_MEMBER((dma[i].creg), i);
- DECL_STATE_ENTRY_UINT16_MEMBER((dma[i].bcreg), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((dma[i].mode), i);
- }
- DECL_STATE_ENTRY_UINT8(b16);
- DECL_STATE_ENTRY_UINT8(selch);
- DECL_STATE_ENTRY_UINT8(base);
- DECL_STATE_ENTRY_UINT16(cmd);
- DECL_STATE_ENTRY_UINT16(tmp);
- DECL_STATE_ENTRY_UINT8(req);
- DECL_STATE_ENTRY_UINT8(sreq);
- DECL_STATE_ENTRY_UINT8(mask);
- DECL_STATE_ENTRY_UINT8(tc);
-
- leave_decl_state();
-}
-
-void UPD71071::save_state(FILEIO* state_fio)
+bool UPD71071::process_state(FILEIO* state_fio, bool loading)
{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
}
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// for(int i = 0; i < 4; i++) {
-// state_fio->FputUint32(dma[i].areg);
-// state_fio->FputUint32(dma[i].bareg);
-// state_fio->FputUint16(dma[i].creg);
-// state_fio->FputUint16(dma[i].bcreg);
-// state_fio->FputUint8(dma[i].mode);
-// }
-// state_fio->FputUint8(b16);
-// state_fio->FputUint8(selch);
-// state_fio->FputUint8(base);
-// state_fio->FputUint16(cmd);
-// state_fio->FputUint16(tmp);
-// state_fio->FputUint8(req);
-// state_fio->FputUint8(sreq);
-// state_fio->FputUint8(mask);
-// state_fio->FputUint8(tc);
-}
-
-bool UPD71071::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(dma[i].areg);
+ state_fio->StateUint32(dma[i].bareg);
+ state_fio->StateUint16(dma[i].creg);
+ state_fio->StateUint16(dma[i].bcreg);
+ state_fio->StateUint8(dma[i].mode);
}
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// for(int i = 0; i < 4; i++) {
-// dma[i].areg = state_fio->FgetUint32();
-// dma[i].bareg = state_fio->FgetUint32();
-// dma[i].creg = state_fio->FgetUint16();
-// dma[i].bcreg = state_fio->FgetUint16();
-// dma[i].mode = state_fio->FgetUint8();
-// }
-// b16 = state_fio->FgetUint8();
-// selch = state_fio->FgetUint8();
-// base = state_fio->FgetUint8();
-// cmd = state_fio->FgetUint16();
-// tmp = state_fio->FgetUint16();
-// req = state_fio->FgetUint8();
-// sreq = state_fio->FgetUint8();
-// mask = state_fio->FgetUint8();
-// tc = state_fio->FgetUint8();
+ state_fio->StateUint8(b16);
+ state_fio->StateUint8(selch);
+ state_fio->StateUint8(base);
+ state_fio->StateUint16(cmd);
+ state_fio->StateUint16(tmp);
+ state_fio->StateUint8(req);
+ state_fio->StateUint8(sreq);
+ state_fio->StateUint8(mask);
+ state_fio->StateUint8(tc);
return true;
}
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
void do_dma();
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void set_context_memory(DEVICE* device)
{
#define STATE_VERSION 2
-#include "../statesub.h"
-
-void UPD7220::decl_state()
+bool UPD7220::process_state(FILEIO* state_fio, bool loading)
{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_INT32(cmdreg);
- DECL_STATE_ENTRY_UINT8(statreg);
- DECL_STATE_ENTRY_1D_ARRAY(sync, sizeof(sync));
- DECL_STATE_ENTRY_INT32(vtotal);
- DECL_STATE_ENTRY_INT32(vfp);
- DECL_STATE_ENTRY_INT32(vs);
- DECL_STATE_ENTRY_INT32(vbp);
- DECL_STATE_ENTRY_INT32(v1);
- DECL_STATE_ENTRY_INT32(v2);
- DECL_STATE_ENTRY_INT32(v3);
- DECL_STATE_ENTRY_INT32(v4);
- DECL_STATE_ENTRY_INT32(hfp);
- DECL_STATE_ENTRY_INT32(hs);
- DECL_STATE_ENTRY_INT32(hbp);
- DECL_STATE_ENTRY_INT32(h1);
- DECL_STATE_ENTRY_INT32(h2);
- DECL_STATE_ENTRY_INT32(h3);
- DECL_STATE_ENTRY_INT32(h4);
- DECL_STATE_ENTRY_BOOL(sync_changed);
- DECL_STATE_ENTRY_BOOL(master);
- DECL_STATE_ENTRY_UINT8(zoom);
- DECL_STATE_ENTRY_UINT8(zr);
- DECL_STATE_ENTRY_UINT8(zw);
- DECL_STATE_ENTRY_1D_ARRAY(ra, sizeof(ra));
- DECL_STATE_ENTRY_1D_ARRAY(cs, sizeof(cs));
- DECL_STATE_ENTRY_UINT8(pitch);
- DECL_STATE_ENTRY_UINT32(lad);
- DECL_STATE_ENTRY_1D_ARRAY(vect, sizeof(vect));
- DECL_STATE_ENTRY_INT32(ead);
- DECL_STATE_ENTRY_INT32(dad);
- DECL_STATE_ENTRY_UINT8(maskl);
- DECL_STATE_ENTRY_UINT8(maskh);
- DECL_STATE_ENTRY_UINT8(mod);
- DECL_STATE_ENTRY_BOOL(hsync);
- DECL_STATE_ENTRY_BOOL(hblank);
- DECL_STATE_ENTRY_BOOL(vsync);
- DECL_STATE_ENTRY_BOOL(vblank);
- DECL_STATE_ENTRY_BOOL(start);
- DECL_STATE_ENTRY_INT32(blink_cursor);
- DECL_STATE_ENTRY_INT32(blink_attr);
- DECL_STATE_ENTRY_INT32(blink_rate);
- DECL_STATE_ENTRY_BOOL(low_high);
- DECL_STATE_ENTRY_BOOL(cmd_write_done);
- DECL_STATE_ENTRY_INT32(cpu_clocks);
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ state_fio->StateInt32(cmdreg);
+ state_fio->StateUint8(statreg);
+ state_fio->StateBuffer(sync, sizeof(sync), 1);
+ state_fio->StateInt32(vtotal);
+ state_fio->StateInt32(vfp);
+ state_fio->StateInt32(vs);
+ state_fio->StateInt32(vbp);
+ state_fio->StateInt32(v1);
+ state_fio->StateInt32(v2);
+ state_fio->StateInt32(v3);
+ state_fio->StateInt32(v4);
+ state_fio->StateInt32(hfp);
+ state_fio->StateInt32(hs);
+ state_fio->StateInt32(hbp);
+ state_fio->StateInt32(h1);
+ state_fio->StateInt32(h2);
+ state_fio->StateInt32(h3);
+ state_fio->StateInt32(h4);
+ state_fio->StateBool(sync_changed);
+ state_fio->StateBool(master);
+ state_fio->StateUint8(zoom);
+ state_fio->StateUint8(zr);
+ state_fio->StateUint8(zw);
+ state_fio->StateBuffer(ra, sizeof(ra), 1);
+ state_fio->StateBuffer(cs, sizeof(cs), 1);
+ state_fio->StateUint8(pitch);
+ state_fio->StateUint32(lad);
+ state_fio->StateBuffer(vect, sizeof(vect), 1);
+ state_fio->StateInt32(ead);
+ state_fio->StateInt32(dad);
+ state_fio->StateUint8(maskl);
+ state_fio->StateUint8(maskh);
+ state_fio->StateUint8(mod);
+ state_fio->StateBool(hsync);
+ state_fio->StateBool(hblank);
+ state_fio->StateBool(vsync);
+ state_fio->StateBool(vblank);
+ state_fio->StateBool(start);
+ state_fio->StateInt32(blink_cursor);
+ state_fio->StateInt32(blink_attr);
+ state_fio->StateInt32(blink_rate);
+ state_fio->StateBool(low_high);
+ state_fio->StateBool(cmd_write_done);
+ state_fio->StateInt32(cpu_clocks);
#ifdef UPD7220_HORIZ_FREQ
- DECL_STATE_ENTRY_INT32(horiz_freq);
- DECL_STATE_ENTRY_INT32(next_horiz_freq);
+ state_fio->StateInt32(horiz_freq);
+ state_fio->StateInt32(next_horiz_freq);
#endif
- DECL_STATE_ENTRY_DOUBLE(frames_per_sec);
- DECL_STATE_ENTRY_INT32(lines_per_frame);
- DECL_STATE_ENTRY_1D_ARRAY(params, sizeof(params));
- DECL_STATE_ENTRY_INT32(params_count);
- DECL_STATE_ENTRY_FIFO(fo);
-
- DECL_STATE_ENTRY_1D_ARRAY(rt, sizeof(rt) / sizeof(int));
- DECL_STATE_ENTRY_INT32(dx);
- DECL_STATE_ENTRY_INT32(dy);
- DECL_STATE_ENTRY_INT32(dir);
- DECL_STATE_ENTRY_INT32(dif);
- DECL_STATE_ENTRY_INT32(sl);
- DECL_STATE_ENTRY_INT32(dc);
- DECL_STATE_ENTRY_INT32(d);
- DECL_STATE_ENTRY_INT32(d2);
- DECL_STATE_ENTRY_INT32(d1);
- DECL_STATE_ENTRY_INT32(dm);
- DECL_STATE_ENTRY_UINT16(pattern);
-
- leave_decl_state();
-}
-
-void UPD7220::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->FputInt32(cmdreg);
-// state_fio->FputUint8(statreg);
-// state_fio->Fwrite(sync, sizeof(sync), 1);
-// state_fio->FputInt32(vtotal);
-// state_fio->FputInt32(vfp);
-// state_fio->FputInt32(vs);
-// state_fio->FputInt32(vbp);
-// state_fio->FputInt32(v1);
-// state_fio->FputInt32(v2);
-// state_fio->FputInt32(v3);
-// state_fio->FputInt32(v4);
-// state_fio->FputInt32(hfp);
-// state_fio->FputInt32(hs);
-// state_fio->FputInt32(hbp);
-// state_fio->FputInt32(h1);
-// state_fio->FputInt32(h2);
-// state_fio->FputInt32(h3);
-// state_fio->FputInt32(h4);
-// state_fio->FputBool(sync_changed);
-// state_fio->FputBool(master);
-// state_fio->FputUint8(zoom);
-// state_fio->FputUint8(zr);
-// state_fio->FputUint8(zw);
-// state_fio->Fwrite(ra, sizeof(ra), 1);
-// state_fio->Fwrite(cs, sizeof(cs), 1);
-// state_fio->FputUint8(pitch);
-// state_fio->FputUint32(lad);
-// state_fio->Fwrite(vect, sizeof(vect), 1);
-// state_fio->FputInt32(ead);
-// state_fio->FputInt32(dad);
-// state_fio->FputUint8(maskl);
-// state_fio->FputUint8(maskh);
-// state_fio->FputUint8(mod);
-// state_fio->FputBool(hsync);
-// state_fio->FputBool(hblank);
-// state_fio->FputBool(vsync);
-// state_fio->FputBool(vblank);
-// state_fio->FputBool(start);
-// state_fio->FputInt32(blink_cursor);
-// state_fio->FputInt32(blink_attr);
-// state_fio->FputInt32(blink_rate);
-// state_fio->FputBool(low_high);
-// state_fio->FputBool(cmd_write_done);
-// state_fio->FputInt32(cpu_clocks);
-//#ifdef UPD7220_HORIZ_FREQ
-// state_fio->FputInt32(horiz_freq);
-// state_fio->FputInt32(next_horiz_freq);
-//#endif
-// state_fio->FputDouble(frames_per_sec);
-// state_fio->FputInt32(lines_per_frame);
-// state_fio->Fwrite(params, sizeof(params), 1);
-// state_fio->FputInt32(params_count);
-// fo->save_state((void *)state_fio);
-// state_fio->Fwrite(rt, sizeof(rt), 1);
-// state_fio->FputInt32(dx);
-// state_fio->FputInt32(dy);
-// state_fio->FputInt32(dir);
-// state_fio->FputInt32(dif);
-// state_fio->FputInt32(sl);
-// state_fio->FputInt32(dc);
-// state_fio->FputInt32(d);
-// state_fio->FputInt32(d2);
-// state_fio->FputInt32(d1);
-// state_fio->FputInt32(dm);
-// state_fio->FputUint16(pattern);
-}
-
-bool UPD7220::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
+ state_fio->StateDouble(frames_per_sec);
+ state_fio->StateInt32(lines_per_frame);
+ state_fio->StateBuffer(params, sizeof(params), 1);
+ state_fio->StateInt32(params_count);
+ if(!fo->process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ //state_fio->StateBuffer(rt, sizeof(rt), 1);
+ for(int i = 0; i < (sizeof(rt) / sizeof(int)) ; i++) {
+ state_fio->StateInt32(rt[i]);
}
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// cmdreg = state_fio->FgetInt32();
-// statreg = state_fio->FgetUint8();
-// state_fio->Fread(sync, sizeof(sync), 1);
-// vtotal = state_fio->FgetInt32();
-// vfp = state_fio->FgetInt32();
-// vs = state_fio->FgetInt32();
-// vbp = state_fio->FgetInt32();
-// v1 = state_fio->FgetInt32();
-// v2 = state_fio->FgetInt32();
-// v3 = state_fio->FgetInt32();
-// v4 = state_fio->FgetInt32();
-// hfp = state_fio->FgetInt32();
-// hs = state_fio->FgetInt32();
-// hbp = state_fio->FgetInt32();
-// h1 = state_fio->FgetInt32();
-// h2 = state_fio->FgetInt32();
-// h3 = state_fio->FgetInt32();
-// h4 = state_fio->FgetInt32();
-// sync_changed = state_fio->FgetBool();
-// master = state_fio->FgetBool();
-// zoom = state_fio->FgetUint8();
-// zr = state_fio->FgetUint8();
-// zw = state_fio->FgetUint8();
-// state_fio->Fread(ra, sizeof(ra), 1);
-// state_fio->Fread(cs, sizeof(cs), 1);
-// pitch = state_fio->FgetUint8();
-// lad = state_fio->FgetUint32();
-// state_fio->Fread(vect, sizeof(vect), 1);
-// ead = state_fio->FgetInt32();
-// dad = state_fio->FgetInt32();
-// maskl = state_fio->FgetUint8();
-// maskh = state_fio->FgetUint8();
-// mod = state_fio->FgetUint8();
-// hsync = state_fio->FgetBool();
-// hblank = state_fio->FgetBool();
-// vsync = state_fio->FgetBool();
-// vblank = state_fio->FgetBool();
-// start = state_fio->FgetBool();
-// blink_cursor = state_fio->FgetInt32();
-// blink_attr = state_fio->FgetInt32();
-// blink_rate = state_fio->FgetInt32();
-// low_high = state_fio->FgetBool();
-// cmd_write_done = state_fio->FgetBool();
-// cpu_clocks = state_fio->FgetInt32();
-//#ifdef UPD7220_HORIZ_FREQ
-// horiz_freq = state_fio->FgetInt32();
-// next_horiz_freq = state_fio->FgetInt32();
-//#endif
-// frames_per_sec = state_fio->FgetDouble();
-// lines_per_frame = state_fio->FgetInt32();
-// state_fio->Fread(params, sizeof(params), 1);
-// params_count = state_fio->FgetInt32();
-// if(!fo->load_state((void *)state_fio)) {
-// return false;
-// }
-// state_fio->Fread(rt, sizeof(rt), 1);
-// dx = state_fio->FgetInt32();
-// dy = state_fio->FgetInt32();
-// dir = state_fio->FgetInt32();
-// dif = state_fio->FgetInt32();
-// sl = state_fio->FgetInt32();
-// dc = state_fio->FgetInt32();
-// d = state_fio->FgetInt32();
-// d2 = state_fio->FgetInt32();
-// d1 = state_fio->FgetInt32();
-// dm = state_fio->FgetInt32();
-// pattern = state_fio->FgetUint16();
-
- // post process
- if(master) {
- // force update timing
- vtotal = 0;
+ state_fio->StateInt32(dx);
+ state_fio->StateInt32(dy);
+ state_fio->StateInt32(dir);
+ state_fio->StateInt32(dif);
+ state_fio->StateInt32(sl);
+ state_fio->StateInt32(dc);
+ state_fio->StateInt32(d);
+ state_fio->StateInt32(d2);
+ state_fio->StateInt32(d1);
+ state_fio->StateInt32(dm);
+ state_fio->StateUint16(pattern);
+
+ // post process
+ if(loading && master) {
+ // force update timing
+ vtotal = 0;
#ifdef UPD7220_HORIZ_FREQ
horiz_freq = 0;
#endif
void event_pre_frame();
virtual void write_io8(uint32_t addr, uint32_t data);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
#ifdef UPD7220_HORIZ_FREQ
void set_horiz_freq(int freq)
#define STATE_VERSION 3
-#include "../statesub.h"
-
-void UPD765A::decl_state_fdc(int ch)
-{
- DECL_STATE_ENTRY_UINT8_MEMBER((fdc[ch].track), ch);
- DECL_STATE_ENTRY_UINT8_MEMBER((fdc[ch].cur_track), ch);
- DECL_STATE_ENTRY_UINT8_MEMBER((fdc[ch].result), ch);
-
- DECL_STATE_ENTRY_BOOL_MEMBER((fdc[ch].access), ch);
- DECL_STATE_ENTRY_BOOL_MEMBER((fdc[ch].head_load), ch);
-
- DECL_STATE_ENTRY_INT32_MEMBER((fdc[ch].cur_position), ch);
- DECL_STATE_ENTRY_INT32_MEMBER((fdc[ch].next_trans_position), ch);
-
- DECL_STATE_ENTRY_UINT32_MEMBER((fdc[ch].prev_clock), ch);
-
-}
-
-void UPD765A::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < 4; i++) {
- decl_state_fdc(i);
- }
-
- DECL_STATE_ENTRY_UINT8(hdu);
- DECL_STATE_ENTRY_UINT8(hdue);
- DECL_STATE_ENTRY_1D_ARRAY(id, sizeof(id));
-
- DECL_STATE_ENTRY_UINT8(eot);
- DECL_STATE_ENTRY_UINT8(gpl);
- DECL_STATE_ENTRY_UINT8(dtl);
- DECL_STATE_ENTRY_INT32(phase);
- DECL_STATE_ENTRY_INT32(prevphase);
- DECL_STATE_ENTRY_UINT8(status);
- DECL_STATE_ENTRY_UINT8(seekstat);
- DECL_STATE_ENTRY_UINT8(command);
- DECL_STATE_ENTRY_UINT32(result);
- DECL_STATE_ENTRY_INT32(step_rate_time);
- DECL_STATE_ENTRY_INT32(head_unload_time);
- DECL_STATE_ENTRY_BOOL(no_dma_mode);
- DECL_STATE_ENTRY_BOOL(motor_on);
-//#ifdef UPD765A_DMA_MODE
- if(_upd765a_dma_mode) DECL_STATE_ENTRY_BOOL(dma_data_lost);
-//#endif
- DECL_STATE_ENTRY_BOOL(irq_masked);
- DECL_STATE_ENTRY_BOOL(drq_masked);
-
- DECL_STATE_ENTRY_INT32(tmp_bufsize);
- DECL_STATE_ENTRY_1D_ARRAY(buffer, sizeof(buffer));
-
- DECL_STATE_ENTRY_INT32(count);
- DECL_STATE_ENTRY_INT32(event_phase);
- DECL_STATE_ENTRY_INT32(phase_id);
- DECL_STATE_ENTRY_INT32(drq_id);
- DECL_STATE_ENTRY_INT32(lost_id);
- DECL_STATE_ENTRY_INT32(result7_id);
- DECL_STATE_ENTRY_1D_ARRAY(seek_step_id, sizeof(seek_step_id) / sizeof(int));
- DECL_STATE_ENTRY_1D_ARRAY(seek_end_id, sizeof(seek_end_id) / sizeof(int));
- DECL_STATE_ENTRY_1D_ARRAY(head_unload_id, sizeof(head_unload_id) / sizeof(int));
- DECL_STATE_ENTRY_BOOL(force_ready);
- DECL_STATE_ENTRY_BOOL(reset_signal);
- DECL_STATE_ENTRY_BOOL(prev_index);
- DECL_STATE_ENTRY_UINT32(prev_drq_clock);
-
- for(int i = 0; i < 4; i++) {
- disk[i]->decl_state(p_logger);
- }
- leave_decl_state();
-}
-void UPD765A::save_state(FILEIO* state_fio)
+void UPD765A::process_state_fdc(int ch, FILEIO* state_fio, bool loading)
{
- tmp_bufsize = (int)(bufptr - buffer);
-
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
+ state_fio->StateUint8(fdc[ch].track);
+ state_fio->StateUint8(fdc[ch].cur_track);
+ state_fio->StateUint8(fdc[ch].result);
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->Fwrite(fdc, sizeof(fdc), 1);
- for(int i = 0; i < 4; i++) {
- disk[i]->save_state(state_fio);
- }
-// state_fio->FputUint8(hdu);
-// state_fio->FputUint8(hdue);
-// state_fio->Fwrite(id, sizeof(id), 1);
-// state_fio->FputUint8(eot);
-// state_fio->FputUint8(gpl);
-// state_fio->FputUint8(dtl);
-// state_fio->FputInt32(phase);
-// state_fio->FputInt32(prevphase);
-// state_fio->FputUint8(status);
-// state_fio->FputUint8(seekstat);
-// state_fio->FputUint8(command);
-// state_fio->FputUint32(result);
-// state_fio->FputInt32(step_rate_time);
-// state_fio->FputInt32(head_unload_time);
-// state_fio->FputBool(no_dma_mode);
-// state_fio->FputBool(motor_on);
-//#ifdef UPD765A_DMA_MODE
-// if(_upd765a_dma_mode) state_fio->FputBool(dma_data_lost);
-//#endif
-// state_fio->FputBool(irq_masked);
-// state_fio->FputBool(drq_masked);
-// state_fio->FputInt32((int)(bufptr - buffer));
-// state_fio->Fwrite(buffer, sizeof(buffer), 1);
-// state_fio->FputInt32(count);
-// state_fio->FputInt32(event_phase);
-// state_fio->FputInt32(phase_id);
-// state_fio->FputInt32(drq_id);
-// state_fio->FputInt32(lost_id);
-// state_fio->FputInt32(result7_id);
-// state_fio->Fwrite(seek_step_id, sizeof(seek_step_id), 1);
-// state_fio->Fwrite(seek_end_id, sizeof(seek_end_id), 1);
-// state_fio->Fwrite(head_unload_id, sizeof(head_unload_id), 1);
-// state_fio->FputBool(force_ready);
-// state_fio->FputBool(reset_signal);
-// state_fio->FputBool(prev_index);
-// state_fio->FputUint32(prev_drq_clock);
-}
-
-bool UPD765A::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// state_fio->Fread(fdc, sizeof(fdc), 1);
- for(int i = 0; i < 4; i++) {
- if(!disk[i]->load_state(state_fio)) {
- return false;
- }
- }
-// hdu = state_fio->FgetUint8();
-// hdue = state_fio->FgetUint8();
-// state_fio->Fread(id, sizeof(id), 1);
-// eot = state_fio->FgetUint8();
-// gpl = state_fio->FgetUint8();
-// dtl = state_fio->FgetUint8();
-// phase = state_fio->FgetInt32();
-// prevphase = state_fio->FgetInt32();
-// status = state_fio->FgetUint8();
-// seekstat = state_fio->FgetUint8();
-// command = state_fio->FgetUint8();
-// result = state_fio->FgetUint32();
-// step_rate_time = state_fio->FgetInt32();
-// head_unload_time = state_fio->FgetInt32();
-// no_dma_mode = state_fio->FgetBool();
-// motor_on = state_fio->FgetBool();
-//#ifdef UPD765A_DMA_MODE
-// if(_upd765a_dma_mode) dma_data_lost = state_fio->FgetBool();
-//#endif
-// irq_masked = state_fio->FgetBool();
-// drq_masked = state_fio->FgetBool();
-// bufptr = buffer + state_fio->FgetInt32();
-// state_fio->Fread(buffer, sizeof(buffer), 1);
-// count = state_fio->FgetInt32();
-// event_phase = state_fio->FgetInt32();
-// phase_id = state_fio->FgetInt32();
-// drq_id = state_fio->FgetInt32();
-// lost_id = state_fio->FgetInt32();
-// result7_id = state_fio->FgetInt32();
-// state_fio->Fread(seek_step_id, sizeof(seek_step_id), 1);
-// state_fio->Fread(seek_end_id, sizeof(seek_end_id), 1);
-// state_fio->Fread(head_unload_id, sizeof(head_unload_id), 1);
-// force_ready = state_fio->FgetBool();
-// reset_signal = state_fio->FgetBool();
-// prev_index = state_fio->FgetBool();
-// prev_drq_clock = state_fio->FgetUint32();
-
- if(tmp_bufsize < 0) tmp_bufsize = 0;
- if(tmp_bufsize > sizeof(buffer)) tmp_bufsize = sizeof(buffer);
- bufptr = buffer + tmp_bufsize;
-
- _fdc_debug_log = config.special_debug_fdc;
- return true;
+ state_fio->StateBool(fdc[ch].access);
+ state_fio->StateBool(fdc[ch].head_load);
+
+ state_fio->StateInt32(fdc[ch].cur_position);
+ state_fio->StateInt32(fdc[ch].next_trans_position);
+
+ state_fio->StateUint32(fdc[ch].prev_clock);
+}
+
+bool UPD765A::process_state(FILEIO* state_fio, bool loading)
+{
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+// state_fio->StateBuffer(fdc, sizeof(fdc), 1);
+ for(int ch = 0; ch < 4; ch++) {
+ process_state_fdc(ch, state_fio, loading);
+ }
+ for(int i = 0; i < 4; i++) {
+ if(!disk[i]->process_state(state_fio, loading)) {
+ return false;
+ }
+ }
+ state_fio->StateUint8(hdu);
+ state_fio->StateUint8(hdue);
+ state_fio->StateBuffer(id, sizeof(id), 1);
+ state_fio->StateUint8(eot);
+ state_fio->StateUint8(gpl);
+ state_fio->StateUint8(dtl);
+ state_fio->StateInt32(phase);
+ state_fio->StateInt32(prevphase);
+ state_fio->StateUint8(status);
+ state_fio->StateUint8(seekstat);
+ state_fio->StateUint8(command);
+ state_fio->StateUint32(result);
+ state_fio->StateInt32(step_rate_time);
+ state_fio->StateInt32(head_unload_time);
+ state_fio->StateBool(no_dma_mode);
+ state_fio->StateBool(motor_on);
+ if(_upd765a_dma_mode) {
+ state_fio->StateBool(dma_data_lost);
+ }
+ state_fio->StateBool(irq_masked);
+ state_fio->StateBool(drq_masked);
+ if(loading) {
+ bufptr = buffer + state_fio->FgetInt32_LE();
+ } else {
+ state_fio->FputInt32_LE((int)(bufptr - buffer));
+ }
+ state_fio->StateBuffer(buffer, sizeof(buffer), 1);
+ state_fio->StateInt32(count);
+ state_fio->StateInt32(event_phase);
+ state_fio->StateInt32(phase_id);
+ state_fio->StateInt32(drq_id);
+ state_fio->StateInt32(lost_id);
+ state_fio->StateInt32(result7_id);
+ //state_fio->StateBuffer(seek_step_id, sizeof(seek_step_id), 1);
+ //state_fio->StateBuffer(seek_end_id, sizeof(seek_end_id), 1);
+ //state_fio->StateBuffer(head_unload_id, sizeof(head_unload_id), 1);
+ for(int i = 0; i < (sizeof(seek_step_id) / sizeof(int)); i++) {
+ state_fio->StateInt32(seek_step_id[i]);
+ }
+ for(int i = 0; i < (sizeof(seek_end_id) / sizeof(int)); i++) {
+ state_fio->StateInt32(seek_end_id[i]);
+ }
+ for(int i = 0; i < (sizeof(head_unload_id) / sizeof(int)); i++) {
+ state_fio->StateInt32(head_unload_id[i]);
+ }
+ state_fio->StateBool(force_ready);
+ state_fio->StateBool(reset_signal);
+ state_fio->StateBool(prev_index);
+ state_fio->StateUint32(prev_drq_clock);
+ return true;
}
void cmd_invalid();
void update_head_flag(int drv, bool head_load);
- void decl_state_fdc(int ch);
+ void process_state_fdc(int ch, FILEIO* state_fio, bool loading);
public:
UPD765A(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
//#ifdef USE_DEBUGGER
void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
//#endif
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique function
void set_context_irq(DEVICE* device, int id, uint32_t mask)
volume_r = decibel_to_volume(decibel_r);
}
-#define STATE_VERSION 1
+#define STATE_VERSION 2
-#include "../statesub.h"
-
-void UPD7752::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_BOOL(mute);
- DECL_STATE_ENTRY_INT32(ThreadLoopStop);
- DECL_STATE_ENTRY_UINT8(io_E0H);
- DECL_STATE_ENTRY_UINT8(io_E2H);
- DECL_STATE_ENTRY_UINT8(io_E3H);
- DECL_STATE_ENTRY_INT32(VStat);
- DECL_STATE_ENTRY_1D_ARRAY(ParaBuf, sizeof(ParaBuf));
- DECL_STATE_ENTRY_UINT8(Pnum);
- DECL_STATE_ENTRY_INT32(Fnum);
- DECL_STATE_ENTRY_INT32(PReady);
-
- DECL_STATE_ENTRY_INT32(fin);
- DECL_STATE_ENTRY_INT32(fout);
-
- //state_fio->Fwrite(&Coef, sizeof(D7752Coef), 1);
- DECL_STATE_ENTRY_1D_ARRAY(Coef.f, 5);
- DECL_STATE_ENTRY_1D_ARRAY(Coef.b, 5);
- DECL_STATE_ENTRY_INT32(Coef.amp);
- DECL_STATE_ENTRY_INT32(Coef.pitch);
-
- DECL_STATE_ENTRY_2D_ARRAY(Y, 5, 2);
- DECL_STATE_ENTRY_INT32(PitchCount);
- DECL_STATE_ENTRY_INT32(FrameSize);
-
- leave_decl_state();
-
-}
-#include "../state_data.h"
-
-void UPD7752::save_state(FILEIO* state_fio)
-{
- uint32_t crc_value = 0xffffffff;
- if(state_entry != NULL) {
- state_entry->save_state(state_fio, &crc_value);
- }
- csp_state_data_saver saver(state_fio);
- bool stat;
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->FputBool(mute);
-// state_fio->FputInt32(ThreadLoopStop);
-// state_fio->FputUint8(io_E0H);
-// state_fio->FputUint8(io_E2H);
-// state_fio->FputUint8(io_E3H);
-// state_fio->FputInt32(VStat);
-// state_fio->Fwrite(ParaBuf, sizeof(ParaBuf), 1);
-// state_fio->FputUint8(Pnum);
-// state_fio->FputInt32(Fnum);
-// state_fio->FputInt32(PReady);
- saver.put_int32(Fbuf != NULL ? FbufLength : 0, &crc_value, &stat);
- //state_fio->FputInt32(Fbuf != NULL ? FbufLength : 0);
- if(Fbuf != NULL && FbufLength > 0) {
- for(int i = 0; i < (FbufLength / sizeof(int)) ; i++) {
- saver.put_int32(Fbuf[i], &crc_value, &stat);
- }
- }
-// state_fio->FputInt32(fin);
-// state_fio->FputInt32(fout);
-// state_fio->Fwrite(&Coef, sizeof(D7752Coef), 1);
-// state_fio->Fwrite(Y, sizeof(Y), 1);
-// state_fio->FputInt32(PitchCount);
-// state_fio->FputInt32(FrameSize);
- saver.post_proc_saving(&crc_value, &stat);
-}
-
-bool UPD7752::load_state(FILEIO* state_fio)
+bool UPD7752::process_state(FILEIO* state_fio, bool loading)
{
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
// pre process
- if(Fbuf) {
- free(Fbuf);
- Fbuf = NULL;
- }
- if (voicebuf) {
- free(voicebuf);
- voicebuf = NULL;
+ if(loading) {
+ if(Fbuf) {
+ free(Fbuf);
+ Fbuf = NULL;
+ }
+ if (voicebuf) {
+ free(voicebuf);
+ voicebuf = NULL;
+ }
}
-
- uint32_t crc_value = 0xffffffff;
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio, &crc_value);
+ state_fio->StateBool(mute);
+ state_fio->StateInt32(ThreadLoopStop);
+ state_fio->StateUint8(io_E0H);
+ state_fio->StateUint8(io_E2H);
+ state_fio->StateUint8(io_E3H);
+ state_fio->StateInt32(VStat);
+ state_fio->StateBuffer(ParaBuf, sizeof(ParaBuf), 1);
+ state_fio->StateUint8(Pnum);
+ state_fio->StateInt32(Fnum);
+ state_fio->StateInt32(PReady);
+ if(loading) {
+ FbufLength = state_fio->FgetInt32_LE();
+ if(FbufLength > 0) {
+ Fbuf = (D7752_SAMPLE *)malloc(FbufLength);
+ state_fio->Fread(Fbuf, FbufLength, 1);
+ }
+ } else {
+ state_fio->FputInt32_LE(Fbuf != NULL ? FbufLength : 0);
+ if(Fbuf != NULL && FbufLength > 0) {
+ state_fio->Fwrite(Fbuf, FbufLength, 1);
+ }
}
- if(!mb) return false;
- csp_state_data_saver saver(state_fio);
- bool stat;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// mute = state_fio->FgetBool();
-// ThreadLoopStop = state_fio->FgetInt32();
-// io_E0H = state_fio->FgetUint8();
-// io_E2H = state_fio->FgetUint8();
-// io_E3H = state_fio->FgetUint8();
-// VStat = state_fio->FgetInt32();
-// state_fio->Fread(ParaBuf, sizeof(ParaBuf), 1);
-// Pnum = state_fio->FgetUint8();
-// Fnum = state_fio->FgetInt32();
-// PReady = state_fio->FgetInt32();
-
- FbufLength = saver.get_int32(&crc_value, &stat);
- if(!stat) return false;
-
- if(FbufLength > 0) {
- Fbuf = (D7752_SAMPLE *)malloc(FbufLength);
- if(Fbuf == NULL) return false;
- //state_fio->Fread(Fbuf, FbufLength, 1);
- for(int i = 0; i < (FbufLength / sizeof(int)); i++) {
- Fbuf[i] = saver.get_int32(&crc_value, &stat);
- if(!stat) return false;
+ state_fio->StateInt32(fin);
+ state_fio->StateInt32(fout);
+ //state_fio->StateBuffer(&Coef, sizeof(D7752Coef), 1);
+ {
+ // D7752_FIXED == int
+ for(int i = 0; i < 5; i++) {
+ state_fio->StateInt32(Coef.f[i]);
+ }
+ for(int i = 0; i < 5; i++) {
+ state_fio->StateInt32(Coef.b[i]);
}
+ state_fio->StateInt32(Coef.amp);
+ state_fio->StateInt32(Coef.pitch);
}
- if(!(saver.post_proc_loading(&crc_value, &stat))) {
- return false;
+ //state_fio->StateBuffer(Y, sizeof(Y), 1);
+ for(int i = 0; i < 5; i++) {
+ for(int j = 0; j < 2; j++) {
+ state_fio->StateInt32(Y[i][j]);
+ }
}
- //fin = state_fio->FgetInt32();
- //fout = state_fio->FgetInt32();
- //state_fio->Fread(&Coef, sizeof(D7752Coef), 1);
- //state_fio->Fread(Y, sizeof(Y), 1);
- //PitchCount = state_fio->FgetInt32();
- //FrameSize = state_fio->FgetInt32();
- return true;
+ state_fio->StateInt32(PitchCount);
+ state_fio->StateInt32(FrameSize);
+ return true;
}
-
+
uint32_t read_io8(uint32_t addr);
void mix(int32_t* buffer, int cnt);
void set_volume(int ch, int decibel_l, int decibel_r);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique function
void initialize_sound(int rate)
}
// run 1 opecode
-#ifdef USE_DEBUGGER
- d_debugger->add_cpu_trace(PC);
-#endif
+//#ifdef USE_DEBUGGER
+ if(__USE_DEBUGGER) {
+ d_debugger->add_cpu_trace(PC);
+ }
+//#endif
period = 0;
prevPC = PC;
OP();
#define STATE_VERSION 4
-#include "../statesub.h"
-
-void UPD7801::decl_state()
+bool UPD7801::process_state(FILEIO* state_fio, bool loading)
{
- enter_decl_state(STATE_VERSION);
-
-#ifdef USE_DEBUGGER
- DECL_STATE_ENTRY_UINT64(total_count);
-#endif
- DECL_STATE_ENTRY_INT32(count);
- DECL_STATE_ENTRY_INT32(period);
- DECL_STATE_ENTRY_INT32(scount);
- DECL_STATE_ENTRY_INT32(tcount);
- DECL_STATE_ENTRY_BOOL(wait);
- for(int i = 0; i < (sizeof(regs) / sizeof(pair_t)); i++) {
- DECL_STATE_ENTRY_PAIR_MEMBER((regs[i]), i);
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ if(__USE_DEBUGGER) {
+ state_fio->StateUint64(total_count);
}
- DECL_STATE_ENTRY_UINT16(SP);
- DECL_STATE_ENTRY_UINT16(PC);
- DECL_STATE_ENTRY_UINT16(prevPC);
- DECL_STATE_ENTRY_UINT8(PSW);
- DECL_STATE_ENTRY_UINT8(IRR);
- DECL_STATE_ENTRY_UINT8(IFF);
- DECL_STATE_ENTRY_UINT8(SIRQ);
- DECL_STATE_ENTRY_UINT8(HALT);
- DECL_STATE_ENTRY_UINT8(MK);
- DECL_STATE_ENTRY_UINT8(MB);
- DECL_STATE_ENTRY_UINT8(MC);
- DECL_STATE_ENTRY_UINT8(TM0);
- DECL_STATE_ENTRY_UINT8(TM1);
- DECL_STATE_ENTRY_UINT8(SR);
- DECL_STATE_ENTRY_UINT8(SAK);
- DECL_STATE_ENTRY_UINT8(TO);
- DECL_STATE_ENTRY_UINT8(HLDA);
- DECL_STATE_ENTRY_UINT8(PORTC);
- DECL_STATE_ENTRY_BOOL(SI);
- DECL_STATE_ENTRY_BOOL(SCK);
- DECL_STATE_ENTRY_INT32(sio_count);
-
- leave_decl_state();
-}
-
-void UPD7801::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
+ state_fio->StateInt32(count);
+ state_fio->StateInt32(period);
+ state_fio->StateInt32(scount);
+ state_fio->StateInt32(tcount);
+ state_fio->StateBool(wait);
+ //state_fio->StateBuffer(regs, sizeof(regs), 1);
+ for(int i = 0; i < (sizeof(regs) / sizeof(uint32_t)); i++) {
+ state_fio->StateUint32(regs[i].d);
}
+ state_fio->StateUint16(SP);
+ state_fio->StateUint16(PC);
+ state_fio->StateUint16(prevPC);
+ state_fio->StateUint8(PSW);
+ state_fio->StateUint8(IRR);
+ state_fio->StateUint8(IFF);
+ state_fio->StateUint8(SIRQ);
+ state_fio->StateUint8(HALT);
+ state_fio->StateUint8(MK);
+ state_fio->StateUint8(MB);
+ state_fio->StateUint8(MC);
+ state_fio->StateUint8(TM0);
+ state_fio->StateUint8(TM1);
+ state_fio->StateUint8(SR);
+ state_fio->StateUint8(SAK);
+ state_fio->StateUint8(TO);
+ state_fio->StateUint8(HLDA);
+ state_fio->StateUint8(PORTC);
+ state_fio->StateBool(SI);
+ state_fio->StateBool(SCK);
+ state_fio->StateInt32(sio_count);
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-//#ifdef USE_DEBUGGER
-// state_fio->FputUint64(total_count);
-//#endif
-// state_fio->FputInt32(count);
-// state_fio->FputInt32(period);
-// state_fio->FputInt32(scount);
-// state_fio->FputInt32(tcount);
-// state_fio->FputBool(wait);
-// state_fio->Fwrite(regs, sizeof(regs), 1);
-// state_fio->FputUint16(SP);
-// state_fio->FputUint16(PC);
-// state_fio->FputUint16(prevPC);
-// state_fio->FputUint8(PSW);
-// state_fio->FputUint8(IRR);
-// state_fio->FputUint8(IFF);
-// state_fio->FputUint8(SIRQ);
-// state_fio->FputUint8(HALT);
-// state_fio->FputUint8(MK);
-// state_fio->FputUint8(MB);
-// state_fio->FputUint8(MC);
-// state_fio->FputUint8(TM0);
-// state_fio->FputUint8(TM1);
-// state_fio->FputUint8(SR);
-// state_fio->FputUint8(SAK);
-// state_fio->FputUint8(TO);
-// state_fio->FputUint8(HLDA);
-// state_fio->FputUint8(PORTC);
-// state_fio->FputBool(SI);
-// state_fio->FputBool(SCK);
-// state_fio->FputInt32(sio_count);
-}
-
-bool UPD7801::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
+ // post process
+ if(__USE_DEBUGGER) {
+ if(loading) {
+ prev_total_count = total_count;
+ }
}
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-//#ifdef USE_DEBUGGER
-// total_count = prev_total_count = state_fio->FgetUint64();
-//#endif
-// count = state_fio->FgetInt32();
-// period = state_fio->FgetInt32();
-// scount = state_fio->FgetInt32();
-// tcount = state_fio->FgetInt32();
-// wait = state_fio->FgetBool();
-// state_fio->Fread(regs, sizeof(regs), 1);
-// SP = state_fio->FgetUint16();
-// PC = state_fio->FgetUint16();
-// prevPC = state_fio->FgetUint16();
-// PSW = state_fio->FgetUint8();
-// IRR = state_fio->FgetUint8();
-// IFF = state_fio->FgetUint8();
-// SIRQ = state_fio->FgetUint8();
-// HALT = state_fio->FgetUint8();
-// MK = state_fio->FgetUint8();
-// MB = state_fio->FgetUint8();
-// MC = state_fio->FgetUint8();
-// TM0 = state_fio->FgetUint8();
-// TM1 = state_fio->FgetUint8();
-// SR = state_fio->FgetUint8();
-// SAK = state_fio->FgetUint8();
-// TO = state_fio->FgetUint8();
-// HLDA = state_fio->FgetUint8();
-// PORTC = state_fio->FgetUint8();
-// SI = state_fio->FgetBool();
-// SCK = state_fio->FgetBool();
-// sio_count = state_fio->FgetInt32();
- prev_total_count = total_count;
- return true;
+ return true;
}
-
void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
//#endif
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void set_context_mem(DEVICE* device)
#define STATE_VERSION 4
-#include "../statesub.h"
-
-void UPD7810::decl_state_cpustate()
+void UPD7810::process_state_cpustate(FILEIO* state_fio, bool loading)
{
upd7810_state *cpustate = (upd7810_state *)opaque;
- DECL_STATE_ENTRY_PAIR((cpustate->ppc)); /* previous program counter */
- DECL_STATE_ENTRY_PAIR((cpustate->pc)); /* program counter */
- DECL_STATE_ENTRY_PAIR((cpustate->sp)); /* stack pointer */
- DECL_STATE_ENTRY_UINT8((cpustate->op)); /* opcode */
- DECL_STATE_ENTRY_UINT8((cpustate->op2)); /* opcode part 2 */
- DECL_STATE_ENTRY_UINT8((cpustate->iff)); /* interrupt enable flip flop */
- DECL_STATE_ENTRY_UINT8((cpustate->softi));
- DECL_STATE_ENTRY_UINT8((cpustate->psw)); /* processor status word */
- DECL_STATE_ENTRY_PAIR((cpustate->ea)); /* extended accumulator */
- DECL_STATE_ENTRY_PAIR((cpustate->va)); /* accumulator + vector register */
- DECL_STATE_ENTRY_PAIR((cpustate->bc)); /* 8bit B and C registers / 16bit BC register */
- DECL_STATE_ENTRY_PAIR((cpustate->de)); /* 8bit D and E registers / 16bit DE register */
- DECL_STATE_ENTRY_PAIR((cpustate->hl)); /* 8bit H and L registers / 16bit HL register */
- DECL_STATE_ENTRY_PAIR((cpustate->ea2)); /* alternate register set */
- DECL_STATE_ENTRY_PAIR((cpustate->va2));
- DECL_STATE_ENTRY_PAIR((cpustate->bc2));
- DECL_STATE_ENTRY_PAIR((cpustate->de2));
- DECL_STATE_ENTRY_PAIR((cpustate->hl2));
- DECL_STATE_ENTRY_PAIR((cpustate->cnt)); /* 8 bit timer counter */
- DECL_STATE_ENTRY_PAIR((cpustate->tm)); /* 8 bit timer 0/1 comparator inputs */
- DECL_STATE_ENTRY_PAIR((cpustate->ecnt)); /* timer counter register / capture register */
- DECL_STATE_ENTRY_PAIR((cpustate->etm)); /* timer 0/1 comparator inputs */
- DECL_STATE_ENTRY_UINT8((cpustate->ma)); /* port A input or output mask */
- DECL_STATE_ENTRY_UINT8((cpustate->mb)); /* port B input or output mask */
- DECL_STATE_ENTRY_UINT8((cpustate->mcc)); /* port C control/port select */
- DECL_STATE_ENTRY_UINT8((cpustate->mc)); /* port C input or output mask */
- DECL_STATE_ENTRY_UINT8((cpustate->mm)); /* memory mapping */
- DECL_STATE_ENTRY_UINT8((cpustate->mf)); /* port F input or output mask */
- DECL_STATE_ENTRY_UINT8((cpustate->tmm)); /* timer 0 and timer 1 operating parameters */
- DECL_STATE_ENTRY_UINT8((cpustate->etmm)); /* 16-bit multifunction timer/event counter */
- DECL_STATE_ENTRY_UINT8((cpustate->eom)); /* 16-bit timer/event counter output control */
- DECL_STATE_ENTRY_UINT8((cpustate->sml)); /* serial interface parameters low */
- DECL_STATE_ENTRY_UINT8((cpustate->smh)); /* -"- high */
- DECL_STATE_ENTRY_UINT8((cpustate->anm)); /* analog to digital converter operating parameters */
- DECL_STATE_ENTRY_UINT8((cpustate->mkl)); /* interrupt mask low */
- DECL_STATE_ENTRY_UINT8((cpustate->mkh)); /* -"- high */
- DECL_STATE_ENTRY_UINT8((cpustate->zcm)); /* bias circuitry for ac zero-cross detection */
- DECL_STATE_ENTRY_UINT8((cpustate->pa_in)); /* port A,B,C,D,F inputs */
- DECL_STATE_ENTRY_UINT8((cpustate->pb_in));
- DECL_STATE_ENTRY_UINT8((cpustate->pc_in));
- DECL_STATE_ENTRY_UINT8((cpustate->pd_in));
- DECL_STATE_ENTRY_UINT8((cpustate->pf_in));
- DECL_STATE_ENTRY_UINT8((cpustate->pa_out)); /* port A,B,C,D,F outputs */
- DECL_STATE_ENTRY_UINT8((cpustate->pb_out));
- DECL_STATE_ENTRY_UINT8((cpustate->pc_out));
- DECL_STATE_ENTRY_UINT8((cpustate->pd_out));
- DECL_STATE_ENTRY_UINT8((cpustate->pf_out));
- DECL_STATE_ENTRY_UINT8((cpustate->cr0)); /* analog digital conversion register 0 */
- DECL_STATE_ENTRY_UINT8((cpustate->cr1)); /* analog digital conversion register 1 */
- DECL_STATE_ENTRY_UINT8((cpustate->cr2)); /* analog digital conversion register 2 */
- DECL_STATE_ENTRY_UINT8((cpustate->cr3)); /* analog digital conversion register 3 */
- DECL_STATE_ENTRY_UINT8((cpustate->txb)); /* transmitter buffer */
- DECL_STATE_ENTRY_UINT8((cpustate->rxb)); /* receiver buffer */
- DECL_STATE_ENTRY_UINT8((cpustate->txd)); /* port C control line states */
- DECL_STATE_ENTRY_UINT8((cpustate->rxd));
- DECL_STATE_ENTRY_UINT8((cpustate->sck));
- DECL_STATE_ENTRY_UINT8((cpustate->ti));
- DECL_STATE_ENTRY_UINT8((cpustate->to));
- DECL_STATE_ENTRY_UINT8((cpustate->ci));
- DECL_STATE_ENTRY_UINT8((cpustate->co0));
- DECL_STATE_ENTRY_UINT8((cpustate->co1));
- DECL_STATE_ENTRY_UINT16((cpustate->irr)); /* interrupt request register */
- DECL_STATE_ENTRY_UINT16((cpustate->itf)); /* interrupt test flag register */
- DECL_STATE_ENTRY_INT32((cpustate->int1)); /* keep track of current int1 state. Needed for 7801 irq checking. */
- DECL_STATE_ENTRY_INT32((cpustate->int2)); /* keep track to current int2 state. Needed for 7801 irq checking. */
+ state_fio->StateUint32(cpustate->ppc.d); /* previous program counter */
+ state_fio->StateUint32(cpustate->pc.d); /* program counter */
+ state_fio->StateUint32(cpustate->sp.d); /* stack pointer */
+ state_fio->StateUint8(cpustate->op); /* opcode */
+ state_fio->StateUint8(cpustate->op2); /* opcode part 2 */
+ state_fio->StateUint8(cpustate->iff); /* interrupt enable flip flop */
+ state_fio->StateUint8(cpustate->softi);
+ state_fio->StateUint8(cpustate->psw)); /* processor status word */
+ state_fio->StateUint32(cpustate->ea.d); /* extended accumulator */
+ state_fio->StateUint32(cpustate->va.d); /* accumulator + vector register */
+ state_fio->StateUint32(cpustate->bc.d); /* 8bit B and C registers / 16bit BC register */
+ state_fio->StateUint32(cpustate->de.d); /* 8bit D and E registers / 16bit DE register */
+ state_fio->StateUint32(cpustate->hl.d); /* 8bit H and L registers / 16bit HL register */
+ state_fio->StateUint32(cpustate->ea2.d); /* alternate register set */
+ state_fio->StateUint32(cpustate->va2.d);
+ state_fio->StateUint32(cpustate->bc2.d);
+ state_fio->StateUint32(cpustate->de2.d);
+ state_fio->StateUint32(cpustate->hl2.d);
+ state_fio->StateUint32(cpustate->cnt.d); /* 8 bit timer counter */
+ state_fio->StateUint32(cpustate->tm.d); /* 8 bit timer 0/1 comparator inputs */
+ state_fio->StateUint32(cpustate->ecnt.d); /* timer counter register / capture register */
+ state_fio->StateUint32(cpustate->etm.d); /* timer 0/1 comparator inputs */
+ state_fio->StateUint8(cpustate->ma); /* port A input or output mask */
+ state_fio->StateUint8(cpustate->mb); /* port B input or output mask */
+ state_fio->StateUint8(cpustate->mcc); /* port C control/port select */
+ state_fio->StateUint8(cpustate->mc); /* port C input or output mask */
+ state_fio->StateUint8(cpustate->mm); /* memory mapping */
+ state_fio->StateUint8(cpustate->mf); /* port F input or output mask */
+ state_fio->StateUint8(cpustate->tmm); /* timer 0 and timer 1 operating parameters */
+ state_fio->StateUint8(cpustate->etmm); /* 16-bit multifunction timer/event counter */
+ state_fio->StateUint8(cpustate->eom); /* 16-bit timer/event counter output control */
+ state_fio->StateUint8(cpustate->sml); /* serial interface parameters low */
+ state_fio->StateUint8(cpustate->smh); /* -"- high */
+ state_fio->StateUint8(cpustate->anm); /* analog to digital converter operating parameters */
+ state_fio->StateUint8(cpustate->mkl); /* interrupt mask low */
+ state_fio->StateUint8(cpustate->mkh); /* -"- high */
+ state_fio->StateUint8(cpustate->zcm); /* bias circuitry for ac zero-cross detection */
+ state_fio->StateUint8(cpustate->pa_in); /* port A,B,C,D,F inputs */
+ state_fio->StateUint8(cpustate->pb_in);
+ state_fio->StateUint8(cpustate->pc_in);
+ state_fio->StateUint8(cpustate->pd_in);
+ state_fio->StateUint8(cpustate->pf_in);
+ state_fio->StateUint8(cpustate->pa_out); /* port A,B,C,D,F outputs */
+ state_fio->StateUint8(cpustate->pb_out);
+ state_fio->StateUint8(cpustate->pc_out);
+ state_fio->StateUint8(cpustate->pd_out);
+ state_fio->StateUint8(cpustate->pf_out);
+ state_fio->StateUint8(cpustate->cr0); /* analog digital conversion register 0 */
+ state_fio->StateUint8(cpustate->cr1); /* analog digital conversion register 1 */
+ state_fio->StateUint8(cpustate->cr2); /* analog digital conversion register 2 */
+ state_fio->StateUint8(cpustate->cr3); /* analog digital conversion register 3 */
+ state_fio->StateUint8(cpustate->txb); /* transmitter buffer */
+ state_fio->StateUint8(cpustate->rxb); /* receiver buffer */
+ state_fio->StateUint8(cpustate->txd); /* port C control line states */
+ state_fio->StateUint8(cpustate->rxd);
+ state_fio->StateUint8(cpustate->sck);
+ state_fio->StateUint8(cpustate->ti);
+ state_fio->StateUint8(cpustate->to);
+ state_fio->StateUint8(cpustate->ci));
+ state_fio->StateUint8(cpustate->co0);
+ state_fio->StateUint8(cpustate->co1);
+ state_fio->StateUint16(cpustate->irr); /* interrupt request register */
+ state_fio->StateUint16(cpustate->itf); /* interrupt test flag register */
+ state_fio->StateInt32(cpustate->int1); /* keep track of current int1 state. Needed for 7801 irq checking. */
+ state_fio->StateInt32(cpustate->int2); /* keep track to current int2 state. Needed for 7801 irq checking. */
/* internal helper variables */
- DECL_STATE_ENTRY_UINT16((cpustate->txs)); /* transmitter shift register */
- DECL_STATE_ENTRY_UINT16((cpustate->rxs)); /* receiver shift register */
- DECL_STATE_ENTRY_UINT8((cpustate->txcnt)); /* transmitter shift register bit count */
- DECL_STATE_ENTRY_UINT8((cpustate->rxcnt)); /* receiver shift register bit count */
- DECL_STATE_ENTRY_UINT8((cpustate->txbuf)); /* transmitter buffer was written */
- DECL_STATE_ENTRY_INT32((cpustate->ovc0)); /* overflow counter for timer 0 ((for clock div 12/384) */
- DECL_STATE_ENTRY_INT32((cpustate->ovc1)); /* overflow counter for timer 0 (for clock div 12/384) */
- DECL_STATE_ENTRY_INT32((cpustate->ovce)); /* overflow counter for ecnt */
- DECL_STATE_ENTRY_INT32((cpustate->ovcf)); /* overflow counter for fixed clock div 3 mode */
- DECL_STATE_ENTRY_INT32((cpustate->ovcs)); /* overflow counter for serial I/O */
- DECL_STATE_ENTRY_INT32((cpustate->ovcsio));
- DECL_STATE_ENTRY_UINT8((cpustate->edges)); /* rising/falling edge flag for serial I/O */
-// const struct opcode_s *opXX; /* opcode table */
-// const struct opcode_s *op48;
-// const struct opcode_s *op4C;
-// const struct opcode_s *op4D;
-// const struct opcode_s *op60;
-// const struct opcode_s *op64;
-// const struct opcode_s *op70;
-// const struct opcode_s *op74;
-// void (*handle_timers)(upd7810_state *cpustate, int cycles);
-// UPD7810_CONFIG config;
-// device_irq_acknowledge_callback irq_callback;
-// legacy_cpu_device *device;
-// DEVICE *program;
-// DEVICE *io;
-// void *outputs_to;
-// void *outputs_txd;
-//#ifdef USE_DEBUGGER
-// EMU *emu;
-// DEBUGGER *debugger;
-// DEVICE *program_stored;
-// DEVICE *io_stored;
-//#endif
- DECL_STATE_ENTRY_INT32((cpustate->icount));
-
-}
-
-void UPD7810::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- decl_state_cpustate();
-#ifdef USE_DEBUGGER
- DECL_STATE_ENTRY_UINT64(total_icount);
-#endif
- DECL_STATE_ENTRY_INT32(icount);
- DECL_STATE_ENTRY_BOOL(busreq);
+ state_fio->StateUint16(cpustate->txs); /* transmitter shift register */
+ state_fio->StateUint16(cpustate->rxs); /* receiver shift register */
+ state_fio->StateUint8(cpustate->txcnt); /* transmitter shift register bit count */
+ state_fio->StateUint8(cpustate->rxcnt); /* receiver shift register bit count */
+ state_fio->StateUint8(cpustate->txbuf); /* transmitter buffer was written */
+ state_fio->StateInt32(cpustate->ovc0); /* overflow counter for timer 0 ((for clock div 12/384) */
+ state_fio->StateInt32(cpustate->ovc1); /* overflow counter for timer 0 (for clock div 12/384) */
+ state_fio->StateInt32(cpustate->ovce); /* overflow counter for ecnt */
+ state_fio->StateInt32(cpustate->ovcf); /* overflow counter for fixed clock div 3 mode */
+ state_fio->StateInt32(cpustate->ovcs); /* overflow counter for serial I/O */
+ state_fio->StateInt32(cpustate->ovcsio);
+ state_fio->StateUint8(cpustate->edges); /* rising/falling edge flag for serial I/O */
+ state_fio->StateInt32(cpustate->icount);
- leave_decl_state();
}
-void UPD7810::save_state(FILEIO* state_fio)
+bool UPD7810::process_state(FILEIO* state_fio, bool loading)
{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->Fwrite(opaque, sizeof(upd7810_state), 1);
-//#ifdef USE_DEBUGGER
-// state_fio->FputUint64(total_icount);
-//#endif
-// state_fio->FputInt32(icount);
-// state_fio->FputBool(busreq);
-}
-
-bool UPD7810::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// state_fio->Fread(opaque, sizeof(upd7810_state), 1);
+ upd7810_state *cpustate = (upd7810_state *)opaque;
+ const struct opcode_s *opXX = cpustate->opXX;
+ const struct opcode_s *op48 = cpustate->op48;
+ const struct opcode_s *op4C = cpustate->op4C;
+ const struct opcode_s *op4D = cpustate->op4D;
+ const struct opcode_s *op60 = cpustate->op60;
+ const struct opcode_s *op64 = cpustate->op64;
+ const struct opcode_s *op70 = cpustate->op70;
+ const struct opcode_s *op74 = cpustate->op74;
+ void(*handle_timers)(upd7810_state *cpustate, int cycles) = cpustate->handle_timers;
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ //state_fio->StateBuffer(opaque, sizeof(upd7810_state), 1);
+ process_state_cpustate(state_fio, loading);
#ifdef USE_DEBUGGER
- //total_icount = prev_total_icount = state_fio->FgetUint64();
- prev_total_icount = total_icount;
+ state_fio->StateUint64(total_icount);
#endif
- //icount = state_fio->FgetInt32();
- //busreq = state_fio->FgetBool();
-
- // post process
- upd7810_state *cpustate = (upd7810_state *)opaque;
- cpustate->program = d_mem;
- cpustate->io = d_io;
- cpustate->outputs_to = (void*)&outputs_to;
- cpustate->outputs_txd = (void*)&outputs_txd;
+ state_fio->StateInt32(icount);
+ state_fio->StateBool(busreq);
+
+ // post process
+ if(loading) {
+ cpustate->opXX = opXX;
+ cpustate->op48 = op48;
+ cpustate->op4C = op4C;
+ cpustate->op4D = op4D;
+ cpustate->op60 = op60;
+ cpustate->op64 = op64;
+ cpustate->op70 = op70;
+ cpustate->op74 = op74;
+ cpustate->handle_timers = handle_timers;
+
+ cpustate->program = d_mem;
+ cpustate->io = d_io;
+ cpustate->outputs_to = (void*)&outputs_to;
+ cpustate->outputs_txd = (void*)&outputs_txd;
#ifdef USE_DEBUGGER
- cpustate->emu = emu;
- cpustate->debugger = d_debugger;
- cpustate->program_stored = d_mem;
- cpustate->io_stored = d_io;
+ cpustate->emu = emu;
+ cpustate->debugger = d_debugger;
+ cpustate->program_stored = d_mem;
+ cpustate->io_stored = d_io;
+ prev_total_icount = total_icount;
#endif
- return true;
+ }
+ return true;
}
int run_one_opecode();
- void decl_state_cpustate();
+ void process_state_cpustate(FILEIO* state_fio, bool loading);
public:
UPD7810(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
#endif
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void set_context_mem(DEVICE* device)
#define STATE_VERSION 2
-#include "../statesub.h"
-
-void v99x8_device::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_INT32(m_offset_x);
- DECL_STATE_ENTRY_INT32(m_offset_y);
- DECL_STATE_ENTRY_INT32(m_visible_y);
- DECL_STATE_ENTRY_INT32(m_mode);
- DECL_STATE_ENTRY_INT32(m_pal_write_first);
- DECL_STATE_ENTRY_INT32(m_cmd_write_first);
- DECL_STATE_ENTRY_UINT8(m_pal_write);
- DECL_STATE_ENTRY_UINT8(m_cmd_write);
- DECL_STATE_ENTRY_1D_ARRAY(m_pal_reg, 32);
- DECL_STATE_ENTRY_1D_ARRAY(m_stat_reg, 10);
- DECL_STATE_ENTRY_1D_ARRAY(m_cont_reg, 46);
- DECL_STATE_ENTRY_UINT8(m_read_ahead);
-
- DECL_STATE_ENTRY_UINT8(m_int_state);
- DECL_STATE_ENTRY_INT32(m_scanline);
- DECL_STATE_ENTRY_INT32(m_blink);
- DECL_STATE_ENTRY_UINT8(m_blink_count);
- DECL_STATE_ENTRY_UINT8(m_mx_delta);
- DECL_STATE_ENTRY_UINT8(m_my_delta);
- DECL_STATE_ENTRY_UINT8(m_button_state);
- DECL_STATE_ENTRY_1D_ARRAY(m_pal_ind16, 16);
- DECL_STATE_ENTRY_1D_ARRAY(m_pal_ind256, 256);
- {
- DECL_STATE_ENTRY_INT32((m_mmc.SX));
- DECL_STATE_ENTRY_INT32((m_mmc.SY));
- DECL_STATE_ENTRY_INT32((m_mmc.DX));
- DECL_STATE_ENTRY_INT32((m_mmc.DY));
- DECL_STATE_ENTRY_INT32((m_mmc.TX));
- DECL_STATE_ENTRY_INT32((m_mmc.TY));
- DECL_STATE_ENTRY_INT32((m_mmc.NX));
- DECL_STATE_ENTRY_INT32((m_mmc.NY));
- DECL_STATE_ENTRY_INT32((m_mmc.MX));
- DECL_STATE_ENTRY_INT32((m_mmc.ASX));
- DECL_STATE_ENTRY_INT32((m_mmc.ADX));
- DECL_STATE_ENTRY_INT32((m_mmc.ANX));
- DECL_STATE_ENTRY_UINT8((m_mmc.CL));
- DECL_STATE_ENTRY_UINT8((m_mmc.LO));
- DECL_STATE_ENTRY_UINT8((m_mmc.CM));
- DECL_STATE_ENTRY_UINT8((m_mmc.MXS));
- DECL_STATE_ENTRY_UINT8((m_mmc.MXD));
- }
- DECL_STATE_ENTRY_INT32(m_vdp_ops_count);
- DECL_STATE_ENTRY_UINT8(m_pal_ntsc);
- DECL_STATE_ENTRY_INT32(m_scanline_start);
- DECL_STATE_ENTRY_INT32(m_vblank_start);
- DECL_STATE_ENTRY_INT32(m_scanline_max);
- DECL_STATE_ENTRY_INT32(m_height);
-
- DECL_STATE_ENTRY_INT32(m_v9958_sp_mode);
- DECL_STATE_ENTRY_UINT16(m_address_latch);
-
- DECL_STATE_ENTRY_1D_ARRAY(vram, sizeof(vram));
-
- leave_decl_state();
-}
-
-void v99x8_device::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// save_load_state(state_fio, true);
-}
-
-bool v99x8_device::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-//
-// save_load_state(state_fio, false);
-
- return true;
+bool v99x8_device::process_state(FILEIO* state_fio, bool loading)
+{
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ save_load_state(state_fio, !loading);
+ return true;
}
void v99x8_device::save_load_state(FILEIO* state_fio, bool is_save)
uint32_t read_io8(uint32_t addr);
void event_vline(int v, int clock);
void write_signal(int id, uint32_t data, uint32_t mask);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
const _TCHAR *get_device_name()
{
return _T("v99x8");
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void V99X8::decl_state_v99x8()
-{
- DECL_STATE_ENTRY_1D_ARRAY((v99x8.ctrl), V99X8_NREG);
- DECL_STATE_ENTRY_1D_ARRAY((v99x8.status), V99X8_NSTAT);
-
- DECL_STATE_ENTRY_INT32((v99x8.scr));
- {
- DECL_STATE_ENTRY_BOOL((v99x8.mode.f_tms));
- DECL_STATE_ENTRY_BOOL((v99x8.mode.f_interleave));
- DECL_STATE_ENTRY_INT32((v99x8.mode.xsize));
- DECL_STATE_ENTRY_INT32((v99x8.mode.xshift));
- }
-
- DECL_STATE_ENTRY_UINT8((v99x8.col_fg));
- DECL_STATE_ENTRY_UINT8((v99x8.col_bg));
- //DECL_STATE_ENTRY_UINT32((v99x8.tbl_pg));
- //DECL_STATE_ENTRY_UINT32((v99x8.tbl_pn));
- //DECL_STATE_ENTRY_UINT32((v99x8.tbl_cl));
-
- DECL_STATE_ENTRY_INT32((v99x8.pages));
- //DECL_STATE_ENTRY_UINT32((v99x8.vram));
-
- DECL_STATE_ENTRY_INT32((v99x8.scanline));
- DECL_STATE_ENTRY_INT32((v99x8.n_scanlines));
-}
-
-void V99X8::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- decl_state_v99x8();
+bool V99X8::process_state(FILEIO* state_fio, bool loading)
+{
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
#ifdef USE_CMDTIME
- DECL_STATE_ENTRY_INT32(cmdtime_t);
- DECL_STATE_ENTRY_INT32(cmdtime_m);
+ state_fio->StateInt32(cmdtime_t);
+ state_fio->StateInt32(cmdtime_m);
#endif
- DECL_STATE_ENTRY_INT32(latch1);
- DECL_STATE_ENTRY_INT32(latch2);
- DECL_STATE_ENTRY_INT32(vram_addr);
- DECL_STATE_ENTRY_INT32(vram_page);
- DECL_STATE_ENTRY_BOOL(f_out3);
- DECL_STATE_ENTRY_BOOL(f_mode);
- DECL_STATE_ENTRY_BOOL(flag_frame);
- {
- //state_fio->Fwrite(&vcom, sizeof(vcom), 1);
- DECL_STATE_ENTRY_INT32((vcom.xbytes));
- DECL_STATE_ENTRY_INT32((vcom.xmask));
- DECL_STATE_ENTRY_INT32((vcom.xshift));
- DECL_STATE_ENTRY_INT32((vcom.ymask));
- DECL_STATE_ENTRY_INT32((vcom.yshift));
+ state_fio->StateInt32(latch1);
+ state_fio->StateInt32(latch2);
+ state_fio->StateInt32(vram_addr);
+ state_fio->StateInt32(vram_page);
+ state_fio->StateBool(f_out3);
+ state_fio->StateBool(f_mode);
+ state_fio->StateBool(flag_frame);
+ //state_fio->StateBuffer(&vcom, sizeof(vcom), 1);
+ {
+ state_fio->StateInt32(vcom.xbytes);
+ state_fio->StateInt32(vcom.xmask);
+ state_fio->StateInt32(vcom.ymask);
+ state_fio->StateInt32(vcom.xshift);
+ state_fio->StateInt32(vcom.yshift);
- DECL_STATE_ENTRY_INT32((vcom.sx));
- DECL_STATE_ENTRY_INT32((vcom.sy));
- DECL_STATE_ENTRY_INT32((vcom.dx));
- DECL_STATE_ENTRY_INT32((vcom.dy));
- DECL_STATE_ENTRY_INT32((vcom.nx));
- DECL_STATE_ENTRY_INT32((vcom.ny));
-
- DECL_STATE_ENTRY_INT32((vcom.lop));
-
- //DECL_STATE_ENTRY_INT32((int)(vcom.src - vram));
- //DECL_STATE_ENTRY_INT32((int)(vcom.dst - vram));
- }
- {
- //state_fio->Fwrite(&r44, sizeof(r44), 1);
- DECL_STATE_ENTRY_INT32((r44.sx));
- DECL_STATE_ENTRY_INT32((r44.sy));
- DECL_STATE_ENTRY_INT32((r44.ex));
- DECL_STATE_ENTRY_INT32((r44.ey));
-
- DECL_STATE_ENTRY_INT32((r44.x));
- DECL_STATE_ENTRY_INT32((r44.y));
- DECL_STATE_ENTRY_INT32((r44.xsize));
- }
- {
- //state_fio->Fwrite(&pixmask, sizeof(pixmask), 1);
- DECL_STATE_ENTRY_INT32((picmask.npix));
- DECL_STATE_ENTRY_INT32((picmask.xmask));
- DECL_STATE_ENTRY_INT32((picmask.mask));
- DECL_STATE_ENTRY_1D_ARRAY((picmask.pmask), 4);
- DECL_STATE_ENTRY_1D_ARRAY((picmask.lshift), 4);
- DECL_STATE_ENTRY_1D_ARRAY((picmask.rshift), 4);
- }
- {
- //state_fio->Fwrite(&v99x8_refresh, sizeof(v99x8_refresh), 1);
- DECL_STATE_ENTRY_INT32((v99x8_refresh.width));
- DECL_STATE_ENTRY_INT32((v99x8_refresh.height));
- DECL_STATE_ENTRY_INT32((v99x8_refresh.bpp));
- }
- for(int i = 0; i < (16 + 1); i++) {
- //state_fio->Fwrite(pal, sizeof(pal), 1);
- DECL_STATE_ENTRY_BOOL_MEMBER((pal[i].flag), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pal[i].b), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pal[i].r), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((pal[i].g), i);
- DECL_STATE_ENTRY_UINT32_MEMBER((pal[i].color), i);
- }
- //state_fio->Fwrite(pal_8, sizeof(pal_8), 1);
- //state_fio->Fwrite(pal_m, sizeof(pal_m), 1);
- DECL_STATE_ENTRY_1D_ARRAY(pal_8, sizeof(pal_8) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(pal_m, sizeof(pal_m) / sizeof(uint32_t));
- DECL_STATE_ENTRY_INT32(col_bg);
-
- DECL_STATE_ENTRY_1D_ARRAY(tbl_yjk_b, sizeof(tbl_yjk_b));
- DECL_STATE_ENTRY_1D_ARRAY(tbl_yjk_rg, sizeof(tbl_yjk_rg));
- DECL_STATE_ENTRY_1D_ARRAY(blackbuf, sizeof(blackbuf));
-
- DECL_STATE_ENTRY_1D_ARRAY(sbuf, sizeof(sbuf));
- DECL_STATE_ENTRY_1D_ARRAY(vram, sizeof(vram));
- DECL_STATE_ENTRY_BOOL(intstat);
-
- leave_decl_state();
-}
-
-#include "../state_data.h"
-
-void V99X8::save_state(FILEIO* state_fio)
-{
- uint32_t crc_value = 0xffffffff;
- if(state_entry != NULL) {
- state_entry->save_state(state_fio, &crc_value);
+ state_fio->StateInt32(vcom.sx);
+ state_fio->StateInt32(vcom.sy);
+ state_fio->StateInt32(vcom.dx);
+ state_fio->StateInt32(vcom.dy);
+ state_fio->StateInt32(vcom.nx);
+ state_fio->StateInt32(vcom.ny);
+ }
+ if(loading) {
+ vcom.src = vram + state_fio->FgetInt32_LE();
+ vcom.dst = vram + state_fio->FgetInt32_LE();
+ } else {
+ state_fio->FputInt32_LE((int)(vcom.src - vram));
+ state_fio->FputInt32_LE((int)(vcom.dst - vram));
+ }
+ //state_fio->StateBuffer(&r44, sizeof(r44), 1);
+ {
+ state_fio->StateInt32(r44.sx);
+ state_fio->StateInt32(r44.sy);
+ state_fio->StateInt32(r44.ex);
+ state_fio->StateInt32(r44.ey);
+ state_fio->StateInt32(r44.x);
+ state_fio->StateInt32(r44.y);
+ state_fio->StateInt32(r44.xsize);
+ }
+ //state_fio->StateBuffer(&pixmask, sizeof(pixmask), 1);
+ {
+ state_fio->StateInt32(pixmask.npix);
+ state_fio->StateInt32(pixmask.xmask);
+ state_fio->StateInt32(pixmask.mask);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateInt32(pixmask.pmask[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateInt32(pixmask.lshift[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateInt32(pixmask.rshift[i]);
+ }
}
- csp_state_data_saver saver(state_fio);
- bool stat;
- saver.put_int32((int)(vcom.src - vram), &crc_value, &stat);
- saver.put_int32((int)(vcom.dst - vram), &crc_value, &stat);
-
- saver.post_proc_saving(&crc_value, &stat);
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->Fwrite(&v99x8, sizeof(v99x8), 1);
-//#ifdef USE_CMDTIME
-// state_fio->FputInt32(cmdtime_t);
-// state_fio->FputInt32(cmdtime_m);
-//#endif
-// state_fio->FputInt32(latch1);
-// state_fio->FputInt32(latch2);
-// state_fio->FputInt32(vram_addr);
-// state_fio->FputInt32(vram_page);
-// state_fio->FputBool(f_out3);
-// state_fio->FputBool(f_mode);
-// state_fio->FputBool(flag_frame);
-// state_fio->Fwrite(&vcom, sizeof(vcom), 1);
-// state_fio->FputInt32((int)(vcom.src - vram));
-// state_fio->FputInt32((int)(vcom.dst - vram));
-// state_fio->Fwrite(&r44, sizeof(r44), 1);
-// state_fio->Fwrite(&pixmask, sizeof(pixmask), 1);
-// state_fio->Fwrite(&v99x8_refresh, sizeof(v99x8_refresh), 1);
-// state_fio->Fwrite(pal, sizeof(pal), 1);
-// state_fio->Fwrite(pal_8, sizeof(pal_8), 1);
-// state_fio->Fwrite(pal_m, sizeof(pal_m), 1);
-// state_fio->FputInt32(col_bg);
-// state_fio->Fwrite(tbl_yjk_b, sizeof(tbl_yjk_b), 1);
-// state_fio->Fwrite(tbl_yjk_rg, sizeof(tbl_yjk_rg), 1);
-// state_fio->Fwrite(blackbuf, sizeof(blackbuf), 1);
-// state_fio->Fwrite(sbuf, sizeof(sbuf), 1);
-// state_fio->Fwrite(vram, sizeof(vram), 1);
-// state_fio->FputBool(intstat);
-}
-
-bool V99X8::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// state_fio->Fread(&v99x8, sizeof(v99x8), 1);
-//#ifdef USE_CMDTIME
-// cmdtime_t = state_fio->FgetInt32();
-// cmdtime_m = state_fio->FgetInt32();
-//#endif
-// latch1 = state_fio->FgetInt32();
-// latch2 = state_fio->FgetInt32();
-// vram_addr = state_fio->FgetInt32();
-// vram_page = state_fio->FgetInt32();
-// f_out3 = state_fio->FgetBool();
-// f_mode = state_fio->FgetBool();
-// flag_frame = state_fio->FgetBool();
-// state_fio->Fread(&vcom, sizeof(vcom), 1);
- csp_state_data_saver saver(state_fio);
- bool stat;
- uint32_t crc_value = 0xffffffff;
- //int length_tmp = state_fio->FgetInt32_BE();
- vcom.src = vram + saver.get_int32(&crc_value, &stat);
- if(!stat) return false;
- vcom.dst = vram + saver.get_int32(&crc_value, &stat);
- if(!stat) return false;
-// vcom.src = vram + state_fio->FgetInt32();
-// vcom.dst = vram + state_fio->FgetInt32();
- if(!(saver.post_proc_loading(&crc_value, &stat))) return false;
-
-// state_fio->Fread(&r44, sizeof(r44), 1);
-// state_fio->Fread(&pixmask, sizeof(pixmask), 1);
-// state_fio->Fread(&v99x8_refresh, sizeof(v99x8_refresh), 1);
-// state_fio->Fread(pal, sizeof(pal), 1);
-// state_fio->Fread(pal_8, sizeof(pal_8), 1);
-// state_fio->Fread(pal_m, sizeof(pal_m), 1);
-// col_bg = state_fio->FgetInt32();
-// state_fio->Fread(tbl_yjk_b, sizeof(tbl_yjk_b), 1);
-// state_fio->Fread(tbl_yjk_rg, sizeof(tbl_yjk_rg), 1);
-// state_fio->Fread(blackbuf, sizeof(blackbuf), 1);
-// state_fio->Fread(sbuf, sizeof(sbuf), 1);
-// state_fio->Fread(vram, sizeof(vram), 1);
-// intstat = state_fio->FgetBool();
+ //state_fio->StateBuffer(&v99x8_refresh, sizeof(v99x8_refresh), 1);
+ {
+ state_fio->StateInt32(v99x8_refresh.width);
+ state_fio->StateInt32(v99x8_refresh.height);
+ state_fio->StateInt32(v99x8_refresh.bpp);
+ }
+ //state_fio->StateBuffer(pal, sizeof(pal), 1);
+ //state_fio->StateBuffer(pal_8, sizeof(pal_8), 1);
+ //state_fio->StateBuffer(pal_m, sizeof(pal_m), 1);
+ {
+ for(int i = 0; i < (16 + 1); i++) {
+ state_fio->StateBool(pal[i].flag);
+ state_fio->StateUint8(pal[i].r);
+ state_fio->StateUint8(pal[i].g);
+ state_fio->StateUint8(pal[i].b);
+ state_fio->StateUint32(pal[i].color);
+ }
+ for(int i = 0; i < 256; i++) {
+ state_fio->StateUint32(pal_8[i]);
+ }
+ for(int i = 0; i < 256; i++) {
+ state_fio->StateUint32(pal_m[i]);
+ }
+ }
+ state_fio->StateInt32(col_bg);
+ state_fio->StateBuffer(tbl_yjk_b, sizeof(tbl_yjk_b), 1);
+ state_fio->StateBuffer(tbl_yjk_rg, sizeof(tbl_yjk_rg), 1);
+ state_fio->StateBuffer(blackbuf, sizeof(blackbuf), 1);
+ state_fio->StateBuffer(sbuf, sizeof(sbuf), 1);
+ state_fio->StateBuffer(this->vram, sizeof(this->vram), 1);
+ state_fio->StateBool(intstat);
+ // Q: Do not save "v99x8_t v99x8"? 20181014 K.O
- // post process
- v99x8.vram = vram;
- f_scr = true;
- return true;
+ // post process
+ if(loading) {
+ v99x8.vram = vram;
+ f_scr = true;
+ }
+ return true;
}
-
void v99x8_refresh_scc(int y, int h);
void v99x8_refresh_scx(int y, int h);
- void decl_state_v99x8();
public:
V99X8(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
void event_vline(int v, int clock);
- void decl_staet();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void set_context_irq(DEVICE* device, int id, uint32_t mask)
{
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void W3100A::decl_state()
+bool W3100A::process_state(FILEIO* state_fio, bool loading)
{
- enter_decl_state(STATE_VERSION);
-
- DECL_STATE_ENTRY_UINT8(idm_or);
- DECL_STATE_ENTRY_UINT8(idm_ar0);
- DECL_STATE_ENTRY_UINT8(idm_ar1);
- DECL_STATE_ENTRY_1D_ARRAY(regs, sizeof(regs));
- DECL_STATE_ENTRY_1D_ARRAY(is_tcp, sizeof(is_tcp) / sizeof(bool));
-
- DECL_STATE_ENTRY_1D_ARRAY(rx_bufsz, sizeof(rx_bufsz) / sizeof(uint16_t));
- DECL_STATE_ENTRY_1D_ARRAY(tx_bufsz, sizeof(tx_bufsz) / sizeof(uint16_t));
- DECL_STATE_ENTRY_1D_ARRAY(cx_rw_pr, sizeof(cx_rw_pr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(cx_rr_pr, sizeof(cx_rr_pr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(cx_ta_pr, sizeof(cx_ta_pr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(cx_tw_pr, sizeof(cx_tw_pr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(cx_tr_pr, sizeof(cx_tr_pr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(send_dst_ptr, sizeof(send_dst_ptr) / sizeof(uint32_t));
- DECL_STATE_ENTRY_1D_ARRAY(recv_dst_ptr, sizeof(recv_dst_ptr) / sizeof(uint32_t));
-
- leave_decl_state();
-}
-
-void W3100A::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ state_fio->StateUint8(idm_or);
+ state_fio->StateUint8(idm_ar0);
+ state_fio->StateUint8(idm_ar1);
+ state_fio->StateBuffer(regs, sizeof(regs), 1);
+ //state_fio->StateBuffer(is_tcp, sizeof(is_tcp), 1);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateBool(is_tcp[i]);
}
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->FputUint8(idm_or);
-// state_fio->FputUint8(idm_ar0);
-// state_fio->FputUint8(idm_ar1);
-// state_fio->Fwrite(regs, sizeof(regs), 1);
-// state_fio->Fwrite(is_tcp, sizeof(is_tcp), 1);
-// state_fio->Fwrite(rx_bufsz, sizeof(rx_bufsz), 1);
-// state_fio->Fwrite(tx_bufsz, sizeof(tx_bufsz), 1);
-// state_fio->Fwrite(cx_rw_pr, sizeof(cx_rw_pr), 1);
-// state_fio->Fwrite(cx_rr_pr, sizeof(cx_rr_pr), 1);
-// state_fio->Fwrite(cx_ta_pr, sizeof(cx_ta_pr), 1);
-// state_fio->Fwrite(cx_tw_pr, sizeof(cx_tw_pr), 1);
-// state_fio->Fwrite(cx_tr_pr, sizeof(cx_tr_pr), 1);
-// state_fio->Fwrite(send_dst_ptr, sizeof(send_dst_ptr), 1);
-// state_fio->Fwrite(recv_dst_ptr, sizeof(recv_dst_ptr), 1);
-}
-
-bool W3100A::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
+ //state_fio->StateBuffer(rx_bufsz, sizeof(rx_bufsz), 1);
+ //state_fio->StateBuffer(tx_bufsz, sizeof(tx_bufsz), 1);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint16(rx_bufsz[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint16(tx_bufsz[i]);
+ }
+ //state_fio->StateBuffer(cx_rw_pr, sizeof(cx_rw_pr), 1);
+ //state_fio->StateBuffer(cx_rr_pr, sizeof(cx_rr_pr), 1);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(cx_rw_pr[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(cx_rr_pr[i]);
+ }
+ //state_fio->StateBuffer(cx_ta_pr, sizeof(cx_ta_pr), 1);
+ //state_fio->StateBuffer(cx_tw_pr, sizeof(cx_tw_pr), 1);
+ //state_fio->StateBuffer(cx_tr_pr, sizeof(cx_tr_pr), 1);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(cx_ta_pr[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(cx_tw_pr[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(cx_tr_pr[i]);
+ }
+ //state_fio->StateBuffer(send_dst_ptr, sizeof(send_dst_ptr), 1);
+ //state_fio->StateBuffer(recv_dst_ptr, sizeof(recv_dst_ptr), 1);
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(send_dst_ptr[i]);
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint32(recv_dst_ptr[i]);
}
- if(!mb) return false;
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// idm_or = state_fio->FgetUint8();
-// idm_ar0 = state_fio->FgetUint8();
-// idm_ar1 = state_fio->FgetUint8();
-// state_fio->Fread(regs, sizeof(regs), 1);
-// state_fio->Fread(is_tcp, sizeof(is_tcp), 1);
-// state_fio->Fread(rx_bufsz, sizeof(rx_bufsz), 1);
-// state_fio->Fread(tx_bufsz, sizeof(tx_bufsz), 1);
-// state_fio->Fread(cx_rw_pr, sizeof(cx_rw_pr), 1);
-// state_fio->Fread(cx_rr_pr, sizeof(cx_rr_pr), 1);
-// state_fio->Fread(cx_ta_pr, sizeof(cx_ta_pr), 1);
-// state_fio->Fread(cx_tw_pr, sizeof(cx_tw_pr), 1);
-// state_fio->Fread(cx_tr_pr, sizeof(cx_tr_pr), 1);
-// state_fio->Fread(send_dst_ptr, sizeof(send_dst_ptr), 1);
-// state_fio->Fread(recv_dst_ptr, sizeof(recv_dst_ptr), 1);
- return true;
+ return true;
}
-
void initialize();
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void notify_connected(int ch);
void notify_disconnected(int ch);
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void Z80CTC::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < 4; i++) {
- DECL_STATE_ENTRY_UINT8_MEMBER((counter[i].control), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].slope), i);
- DECL_STATE_ENTRY_UINT16_MEMBER((counter[i].count), i);
- DECL_STATE_ENTRY_UINT16_MEMBER((counter[i].constant), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((counter[i].vector), i);
- DECL_STATE_ENTRY_INT32_MEMBER((counter[i].clocks), i);
- DECL_STATE_ENTRY_INT32_MEMBER((counter[i].prescaler), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].freeze), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].start), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].latch), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].prev_in), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].first_constant), i);
- DECL_STATE_ENTRY_UINT64_MEMBER((counter[i].freq), i);
- DECL_STATE_ENTRY_INT32_MEMBER((counter[i].clock_id), i);
- DECL_STATE_ENTRY_INT32_MEMBER((counter[i].sysclock_id), i);
- DECL_STATE_ENTRY_UINT32_MEMBER((counter[i].input), i);
- DECL_STATE_ENTRY_UINT32_MEMBER((counter[i].period), i);
- DECL_STATE_ENTRY_UINT32_MEMBER((counter[i].prev), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].req_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((counter[i].in_service), i);
- }
- DECL_STATE_ENTRY_UINT64(cpu_clocks);
- DECL_STATE_ENTRY_BOOL(iei);
- DECL_STATE_ENTRY_BOOL(oei);
- DECL_STATE_ENTRY_UINT32(intr_bit);
-
- leave_decl_state();
-}
-
-void Z80CTC::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// for(int i = 0; i < 4; i++) {
-// state_fio->FputUint8(counter[i].control);
-// state_fio->FputBool(counter[i].slope);
-// state_fio->FputUint16(counter[i].count);
-// state_fio->FputUint16(counter[i].constant);
-// state_fio->FputUint8(counter[i].vector);
-// state_fio->FputInt32(counter[i].clocks);
-// state_fio->FputInt32(counter[i].prescaler);
-// state_fio->FputBool(counter[i].freeze);
-// state_fio->FputBool(counter[i].start);
-// state_fio->FputBool(counter[i].latch);
-// state_fio->FputBool(counter[i].prev_in);
-// state_fio->FputBool(counter[i].first_constant);
-// state_fio->FputUint64(counter[i].freq);
-// state_fio->FputInt32(counter[i].clock_id);
-// state_fio->FputInt32(counter[i].sysclock_id);
-// state_fio->FputUint32(counter[i].input);
-// state_fio->FputUint32(counter[i].period);
-// state_fio->FputUint32(counter[i].prev);
-// state_fio->FputBool(counter[i].req_intr);
-// state_fio->FputBool(counter[i].in_service);
-// }
-// state_fio->FputUint64(cpu_clocks);
-// state_fio->FputBool(iei);
-// state_fio->FputBool(oei);
-// state_fio->FputUint32(intr_bit);
-}
-
-bool Z80CTC::load_state(FILEIO* state_fio)
+bool Z80CTC::process_state(FILEIO* state_fio, bool loading)
{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// for(int i = 0; i < 4; i++) {
-// counter[i].control = state_fio->FgetUint8();
-// counter[i].slope = state_fio->FgetBool();
-// counter[i].count = state_fio->FgetUint16();
-// counter[i].constant = state_fio->FgetUint16();
-// counter[i].vector = state_fio->FgetUint8();
-// counter[i].clocks = state_fio->FgetInt32();
-// counter[i].prescaler = state_fio->FgetInt32();
-// counter[i].freeze = state_fio->FgetBool();
-// counter[i].start = state_fio->FgetBool();
-// counter[i].latch = state_fio->FgetBool();
-// counter[i].prev_in = state_fio->FgetBool();
-// counter[i].first_constant = state_fio->FgetBool();
-// counter[i].freq = state_fio->FgetUint64();
-// counter[i].clock_id = state_fio->FgetInt32();
-// counter[i].sysclock_id = state_fio->FgetInt32();
-// counter[i].input = state_fio->FgetUint32();
-// counter[i].period = state_fio->FgetUint32();
-// counter[i].prev = state_fio->FgetUint32();
-// counter[i].req_intr = state_fio->FgetBool();
-// counter[i].in_service = state_fio->FgetBool();
-// }
-// cpu_clocks = state_fio->FgetUint64();
-// iei = state_fio->FgetBool();
-// oei = state_fio->FgetBool();
-// intr_bit = state_fio->FgetUint32();
- return true;
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ for(int i = 0; i < 4; i++) {
+ state_fio->StateUint8(counter[i].control);
+ state_fio->StateBool(counter[i].slope);
+ state_fio->StateUint16(counter[i].count);
+ state_fio->StateUint16(counter[i].constant);
+ state_fio->StateUint8(counter[i].vector);
+ state_fio->StateInt32(counter[i].clocks);
+ state_fio->StateInt32(counter[i].prescaler);
+ state_fio->StateBool(counter[i].freeze);
+ state_fio->StateBool(counter[i].start);
+ state_fio->StateBool(counter[i].latch);
+ state_fio->StateBool(counter[i].prev_in);
+ state_fio->StateBool(counter[i].first_constant);
+ state_fio->StateUint64(counter[i].freq);
+ state_fio->StateInt32(counter[i].clock_id);
+ state_fio->StateInt32(counter[i].sysclock_id);
+ state_fio->StateUint32(counter[i].input);
+ state_fio->StateUint32(counter[i].period);
+ state_fio->StateUint32(counter[i].prev);
+ state_fio->StateBool(counter[i].req_intr);
+ state_fio->StateBool(counter[i].in_service);
+ }
+ state_fio->StateUint64(cpu_clocks);
+ state_fio->StateBool(iei);
+ state_fio->StateBool(oei);
+ state_fio->StateUint32(intr_bit);
+ return true;
}
-
{
cpu_clocks = new_clocks;
}
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// interrupt common functions
void set_context_intr(DEVICE* device, uint32_t bit)
{
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void Z80DMA::decl_state()
+bool Z80DMA::process_state(FILEIO* state_fio, bool loading)
{
- enter_decl_state(STATE_VERSION);
-
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ //state_fio->StateBuffer(®s, sizeof(regs), 1);
{
- //state_fio->Fwrite(®s, sizeof(regs), 1);
- DECL_STATE_ENTRY_2D_ARRAY((regs.m), 7, 8);
- DECL_STATE_ENTRY_1D_ARRAY((regs.t), 6 * 8 + 1 + 1);
- }
- DECL_STATE_ENTRY_UINT8(status);
-
- DECL_STATE_ENTRY_1D_ARRAY(wr_tmp, sizeof(wr_tmp) / sizeof(uint16_t));
- DECL_STATE_ENTRY_INT32(wr_num);
- DECL_STATE_ENTRY_INT32(wr_ptr);
-
- DECL_STATE_ENTRY_1D_ARRAY(rr_tmp, sizeof(rr_tmp) / sizeof(uint16_t));
- DECL_STATE_ENTRY_INT32(rr_num);
- DECL_STATE_ENTRY_INT32(rr_ptr);
-
- DECL_STATE_ENTRY_BOOL(enabled);
- DECL_STATE_ENTRY_UINT32(ready);
- DECL_STATE_ENTRY_BOOL(force_ready);
- DECL_STATE_ENTRY_UINT16(addr_a);
- DECL_STATE_ENTRY_UINT16(addr_b);
- DECL_STATE_ENTRY_INT32(upcount);
- DECL_STATE_ENTRY_INT32(blocklen);
- DECL_STATE_ENTRY_BOOL(dma_stop);
- DECL_STATE_ENTRY_BOOL(bus_master);
- DECL_STATE_ENTRY_BOOL(req_intr);
- DECL_STATE_ENTRY_BOOL(in_service);
- DECL_STATE_ENTRY_UINT8(vector);
- DECL_STATE_ENTRY_BOOL(iei);
- DECL_STATE_ENTRY_BOOL(oei);
- DECL_STATE_ENTRY_UINT32(intr_bit);
-
- leave_decl_state();
-}
-
-void Z80DMA::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
+ for(int i = 0; i < 7; i++) {
+ for(int j = 0; j < 8; j++) {
+ state_fio->StateUint16(regs.m[i][j]);
+ }
+ }
+ for(int i = 0; i < (6 * 8 + 1 + 1); i++) {
+ state_fio->StateUint16(regs.t[i]);
+ }
}
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// state_fio->Fwrite(®s, sizeof(regs), 1);
-// state_fio->FputUint8(status);
-// state_fio->Fwrite(wr_tmp, sizeof(wr_tmp), 1);
-// state_fio->FputInt32(wr_num);
-// state_fio->FputInt32(wr_ptr);
-// state_fio->Fwrite(rr_tmp, sizeof(rr_tmp), 1);
-// state_fio->FputInt32(rr_num);
-// state_fio->FputInt32(rr_ptr);
-// state_fio->FputBool(enabled);
-// state_fio->FputUint32(ready);
-// state_fio->FputBool(force_ready);
-// state_fio->FputUint16(addr_a);
-// state_fio->FputUint16(addr_b);
-// state_fio->FputInt32(upcount);
-// state_fio->FputInt32(blocklen);
-// state_fio->FputBool(dma_stop);
-// state_fio->FputBool(bus_master);
-// state_fio->FputBool(req_intr);
-// state_fio->FputBool(in_service);
-// state_fio->FputUint8(vector);
-// state_fio->FputBool(iei);
-// state_fio->FputBool(oei);
-// state_fio->FputUint32(intr_bit);
+ state_fio->StateUint8(status);
+ //state_fio->StateBuffer(wr_tmp, sizeof(wr_tmp), 1);
+ for(int i = 0; i < (sizeof(wr_tmp) / sizeof(uint16_t)); i++) {
+ state_fio->StateUint16(wr_tmp[i]);
+ }
+ state_fio->StateInt32(wr_num);
+ state_fio->StateInt32(wr_ptr);
+ //state_fio->StateBuffer(rr_tmp, sizeof(rr_tmp), 1);
+ for(int i = 0; i < (sizeof(rr_tmp) / sizeof(uint16_t)); i++) {
+ state_fio->StateUint16(rr_tmp[i]);
+ }
+ state_fio->StateInt32(rr_num);
+ state_fio->StateInt32(rr_ptr);
+ state_fio->StateBool(enabled);
+ state_fio->StateUint32(ready);
+ state_fio->StateBool(force_ready);
+ state_fio->StateUint16(addr_a);
+ state_fio->StateUint16(addr_b);
+ state_fio->StateInt32(upcount);
+ state_fio->StateInt32(blocklen);
+ state_fio->StateBool(dma_stop);
+ state_fio->StateBool(bus_master);
+ state_fio->StateBool(req_intr);
+ state_fio->StateBool(in_service);
+ state_fio->StateUint8(vector);
+ state_fio->StateBool(iei);
+ state_fio->StateBool(oei);
+ state_fio->StateUint32(intr_bit);
+ return true;
}
-
-bool Z80DMA::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// state_fio->Fread(®s, sizeof(regs), 1);
-// status = state_fio->FgetUint8();
-// state_fio->Fread(wr_tmp, sizeof(wr_tmp), 1);
-// wr_num = state_fio->FgetInt32();
-// wr_ptr = state_fio->FgetInt32();
-// state_fio->Fread(rr_tmp, sizeof(rr_tmp), 1);
-// rr_num = state_fio->FgetInt32();
-// rr_ptr = state_fio->FgetInt32();
-// enabled = state_fio->FgetBool();
-// ready = state_fio->FgetUint32();
-// force_ready = state_fio->FgetBool();
-// addr_a = state_fio->FgetUint16();
-// addr_b = state_fio->FgetUint16();
-// upcount = state_fio->FgetInt32();
-// blocklen = state_fio->FgetInt32();
-// dma_stop = state_fio->FgetBool();
-// bus_master = state_fio->FgetBool();
-// req_intr = state_fio->FgetBool();
-// in_service = state_fio->FgetBool();
-// vector = state_fio->FgetUint8();
-// iei = state_fio->FgetBool();
-// oei = state_fio->FgetBool();
-// intr_bit = state_fio->FgetUint32();
- return true;
-}
-
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
void do_dma();
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// interrupt common functions
void set_context_intr(DEVICE* device, uint32_t bit)
{
#define STATE_VERSION 1
-#include "../statesub.h"
-
-void Z80PIO::decl_state()
-{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < 2; i++) {
- DECL_STATE_ENTRY_UINT32_MEMBER((port[i].wreg), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].rreg), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].mode), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].ctrl1), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].ctrl2), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].dir), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].mask), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].vector), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].set_dir), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].set_mask), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].hand_shake), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].ready_signal), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].input_empty), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].output_ready), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].enb_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].enb_intr_tmp), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].req_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].in_service), i);
- }
- DECL_STATE_ENTRY_BOOL(iei);
- DECL_STATE_ENTRY_BOOL(oei);
- DECL_STATE_ENTRY_UINT32(intr_bit);
-
- leave_decl_state();
-}
-
-void Z80PIO::save_state(FILEIO* state_fio)
+bool Z80PIO::process_state(FILEIO* state_fio, bool loading)
{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// for(int i = 0; i < 2; i++) {
-// state_fio->FputUint32(port[i].wreg);
-// state_fio->FputUint8(port[i].rreg);
-// state_fio->FputUint8(port[i].mode);
-// state_fio->FputUint8(port[i].ctrl1);
-// state_fio->FputUint8(port[i].ctrl2);
-// state_fio->FputUint8(port[i].dir);
-// state_fio->FputUint8(port[i].mask);
-// state_fio->FputUint8(port[i].vector);
-// state_fio->FputBool(port[i].set_dir);
-// state_fio->FputBool(port[i].set_mask);
-// state_fio->FputBool(port[i].hand_shake);
-// state_fio->FputInt32(port[i].ready_signal);
-// state_fio->FputBool(port[i].input_empty);
-// state_fio->FputBool(port[i].output_ready);
-// state_fio->FputBool(port[i].enb_intr);
-// state_fio->FputBool(port[i].enb_intr_tmp);
-// state_fio->FputBool(port[i].req_intr);
-// state_fio->FputBool(port[i].in_service);
-// }
-// state_fio->FputBool(iei);
-// state_fio->FputBool(oei);
-// state_fio->FputUint32(intr_bit);
-}
-
-bool Z80PIO::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// for(int i = 0; i < 2; i++) {
-// port[i].wreg = state_fio->FgetUint32();
-// port[i].rreg = state_fio->FgetUint8();
-// port[i].mode = state_fio->FgetUint8();
-// port[i].ctrl1 = state_fio->FgetUint8();
-// port[i].ctrl2 = state_fio->FgetUint8();
-// port[i].dir = state_fio->FgetUint8();
-// port[i].mask = state_fio->FgetUint8();
-// port[i].vector = state_fio->FgetUint8();
-// port[i].set_dir = state_fio->FgetBool();
-// port[i].set_mask = state_fio->FgetBool();
-// port[i].hand_shake = state_fio->FgetBool();
-// port[i].ready_signal = state_fio->FgetInt32();
-// port[i].input_empty = state_fio->FgetBool();
-// port[i].output_ready = state_fio->FgetBool();
-// port[i].enb_intr = state_fio->FgetBool();
-// port[i].enb_intr_tmp = state_fio->FgetBool();
-// port[i].req_intr = state_fio->FgetBool();
-// port[i].in_service = state_fio->FgetBool();
-// }
-// iei = state_fio->FgetBool();
-// oei = state_fio->FgetBool();
-// intr_bit = state_fio->FgetUint32();
- return true;
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ for(int i = 0; i < 2; i++) {
+ state_fio->StateUint32(port[i].wreg);
+ state_fio->StateUint8(port[i].rreg);
+ state_fio->StateUint8(port[i].mode);
+ state_fio->StateUint8(port[i].ctrl1);
+ state_fio->StateUint8(port[i].ctrl2);
+ state_fio->StateUint8(port[i].dir);
+ state_fio->StateUint8(port[i].mask);
+ state_fio->StateUint8(port[i].vector);
+ state_fio->StateBool(port[i].set_dir);
+ state_fio->StateBool(port[i].set_mask);
+ state_fio->StateBool(port[i].hand_shake);
+ state_fio->StateInt32(port[i].ready_signal);
+ state_fio->StateBool(port[i].input_empty);
+ state_fio->StateBool(port[i].output_ready);
+ state_fio->StateBool(port[i].enb_intr);
+ state_fio->StateBool(port[i].enb_intr_tmp);
+ state_fio->StateBool(port[i].req_intr);
+ state_fio->StateBool(port[i].in_service);
+ }
+ state_fio->StateBool(iei);
+ state_fio->StateBool(oei);
+ state_fio->StateUint32(intr_bit);
+ return true;
}
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// interrupt common functions
void set_context_intr(DEVICE* device, uint32_t bit)
{
#define STATE_VERSION 3
-#include "../statesub.h"
-
-void Z80SIO::decl_state()
+bool Z80SIO::process_state(FILEIO* state_fio, bool loading)
{
- enter_decl_state(STATE_VERSION);
-
- for(int i = 0; i < 2; i++) {
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].pointer), i);
- DECL_STATE_ENTRY_1D_ARRAY((port[i].wr), sizeof(port[i].wr));
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].vector), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].affect), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].nextrecv_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].first_data), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].over_flow), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].under_run), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].abort), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].sync), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].sync_bit), i);
-//#ifdef HAS_UPD7201
+ if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+ return false;
+ }
+ if(!state_fio->StateCheckInt32(this_device_id)) {
+ return false;
+ }
+ for(int i = 0; i < 2; i++) {
+ state_fio->StateInt32(port[i].pointer);
+ state_fio->StateBuffer(port[i].wr, sizeof(port[i].wr), 1);
+ state_fio->StateUint8(port[i].vector);
+ state_fio->StateUint8(port[i].affect);
+ state_fio->StateBool(port[i].nextrecv_intr);
+ state_fio->StateBool(port[i].first_data);
+ state_fio->StateBool(port[i].over_flow);
+ state_fio->StateBool(port[i].under_run);
+ state_fio->StateBool(port[i].abort);
+ state_fio->StateBool(port[i].sync);
+ state_fio->StateUint8(port[i].sync_bit);
if(__HAS_UPD7201) {
- DECL_STATE_ENTRY_UINT16_MEMBER((port[i].tx_count), i);
- DECL_STATE_ENTRY_UINT8_MEMBER((port[i].tx_count_hi), i);
- }
-//#endif
- DECL_STATE_ENTRY_DOUBLE_MEMBER((port[i].tx_clock), i);
- DECL_STATE_ENTRY_DOUBLE_MEMBER((port[i].tx_interval), i);
- DECL_STATE_ENTRY_DOUBLE_MEMBER((port[i].rx_clock), i);
- DECL_STATE_ENTRY_DOUBLE_MEMBER((port[i].rx_interval), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].tx_data_bits), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].tx_bits_x2), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].tx_bits_x2_remain), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].rx_bits_x2), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].rx_bits_x2_remain), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].prev_tx_clock_signal), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].prev_rx_clock_signal), i);
- DECL_STATE_ENTRY_FIFO_MEMBER((port[i].send), i);
- DECL_STATE_ENTRY_FIFO_MEMBER((port[i].recv), i);
- DECL_STATE_ENTRY_FIFO_MEMBER((port[i].rtmp), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].shift_reg), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].send_id), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].recv_id), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].err_intr), i);
- DECL_STATE_ENTRY_INT32_MEMBER((port[i].recv_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].stat_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].send_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].req_intr), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].in_service), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].dcd), i);
- DECL_STATE_ENTRY_BOOL_MEMBER((port[i].cts), i);
- }
- DECL_STATE_ENTRY_BOOL(iei);
- DECL_STATE_ENTRY_BOOL(oei);
- DECL_STATE_ENTRY_UINT32(intr_bit);
-
- leave_decl_state();
+ state_fio->StateUint16(port[i].tx_count);
+ state_fio->StateUint8(port[i].tx_count_hi);
+ }
+ state_fio->StateDouble(port[i].tx_clock);
+ state_fio->StateDouble(port[i].tx_interval);
+ state_fio->StateDouble(port[i].rx_clock);
+ state_fio->StateDouble(port[i].rx_interval);
+ state_fio->StateInt32(port[i].tx_data_bits);
+ state_fio->StateInt32(port[i].tx_bits_x2);
+ state_fio->StateInt32(port[i].tx_bits_x2_remain);
+ state_fio->StateInt32(port[i].rx_bits_x2);
+ state_fio->StateInt32(port[i].rx_bits_x2_remain);
+ state_fio->StateBool(port[i].prev_tx_clock_signal);
+ state_fio->StateBool(port[i].prev_rx_clock_signal);
+ if(!port[i].send->process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ if(!port[i].recv->process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ if(!port[i].rtmp->process_state((void *)state_fio, loading)) {
+ return false;
+ }
+ state_fio->StateInt32(port[i].shift_reg);
+ state_fio->StateInt32(port[i].send_id);
+ state_fio->StateInt32(port[i].recv_id);
+ state_fio->StateBool(port[i].err_intr);
+ state_fio->StateInt32(port[i].recv_intr);
+ state_fio->StateBool(port[i].stat_intr);
+ state_fio->StateBool(port[i].send_intr);
+ state_fio->StateBool(port[i].req_intr);
+ state_fio->StateBool(port[i].in_service);
+ state_fio->StateBool(port[i].dcd);
+ state_fio->StateBool(port[i].cts);
+ }
+ state_fio->StateBool(iei);
+ state_fio->StateBool(oei);
+ state_fio->StateUint32(intr_bit);
+ return true;
}
-void Z80SIO::save_state(FILEIO* state_fio)
-{
- if(state_entry != NULL) {
- state_entry->save_state(state_fio);
- }
-
-// state_fio->FputUint32(STATE_VERSION);
-// state_fio->FputInt32(this_device_id);
-
-// for(int i = 0; i < 2; i++) {
-// state_fio->FputInt32(port[i].pointer);
-// state_fio->Fwrite(port[i].wr, sizeof(port[i].wr), 1);
-// state_fio->FputUint8(port[i].vector);
-// state_fio->FputUint8(port[i].affect);
-// state_fio->FputBool(port[i].nextrecv_intr);
-// state_fio->FputBool(port[i].first_data);
-// state_fio->FputBool(port[i].over_flow);
-// state_fio->FputBool(port[i].under_run);
-// state_fio->FputBool(port[i].abort);
-// state_fio->FputBool(port[i].sync);
-// state_fio->FputUint8(port[i].sync_bit);
-////#ifdef HAS_UPD7201
-// if(__HAS_UPD7201) {
-// state_fio->FputUint16(port[i].tx_count);
-// state_fio->FputUint8(port[i].tx_count_hi);
-// }
-////#endif
-// state_fio->FputDouble(port[i].tx_clock);
-// state_fio->FputDouble(port[i].tx_interval);
-// state_fio->FputDouble(port[i].rx_clock);
-// state_fio->FputDouble(port[i].rx_interval);
-// state_fio->FputInt32(port[i].tx_data_bits);
-// state_fio->FputInt32(port[i].tx_bits_x2);
-// state_fio->FputInt32(port[i].tx_bits_x2_remain);
-// state_fio->FputInt32(port[i].rx_bits_x2);
-// state_fio->FputInt32(port[i].rx_bits_x2_remain);
-// state_fio->FputBool(port[i].prev_tx_clock_signal);
-// state_fio->FputBool(port[i].prev_rx_clock_signal);
-// port[i].send->save_state((void *)state_fio);
-// port[i].recv->save_state((void *)state_fio);
-// port[i].rtmp->save_state((void *)state_fio);
-// state_fio->FputInt32(port[i].shift_reg);
-// state_fio->FputInt32(port[i].send_id);
-// state_fio->FputInt32(port[i].recv_id);
-// state_fio->FputBool(port[i].err_intr);
-// state_fio->FputInt32(port[i].recv_intr);
-// state_fio->FputBool(port[i].stat_intr);
-// state_fio->FputBool(port[i].send_intr);
-// state_fio->FputBool(port[i].req_intr);
-// state_fio->FputBool(port[i].in_service);
-// state_fio->FputBool(port[i].dcd);
-// state_fio->FputBool(port[i].cts);
-// }
-// state_fio->FputBool(iei);
-// state_fio->FputBool(oei);
-// state_fio->FputUint32(intr_bit);
-}
-
-bool Z80SIO::load_state(FILEIO* state_fio)
-{
- bool mb = false;
- if(state_entry != NULL) {
- mb = state_entry->load_state(state_fio);
- }
- if(!mb) return false;
-
-// if(state_fio->FgetUint32() != STATE_VERSION) {
-// return false;
-// }
-// if(state_fio->FgetInt32() != this_device_id) {
-// return false;
-// }
-// for(int i = 0; i < 2; i++) {
-// port[i].pointer = state_fio->FgetInt32();
-// state_fio->Fread(port[i].wr, sizeof(port[i].wr), 1);
-// port[i].vector = state_fio->FgetUint8();
-// port[i].affect = state_fio->FgetUint8();
-// port[i].nextrecv_intr = state_fio->FgetBool();
-// port[i].first_data = state_fio->FgetBool();
-// port[i].over_flow = state_fio->FgetBool();
-// port[i].under_run = state_fio->FgetBool();
-// port[i].abort = state_fio->FgetBool();
-// port[i].sync = state_fio->FgetBool();
-// port[i].sync_bit = state_fio->FgetUint8();
-////#ifdef HAS_UPD7201
-// if(__HAS_UPD7201) {
-// port[i].tx_count = state_fio->FgetUint16();
-// port[i].tx_count_hi = state_fio->FgetUint8();
-// }
-////#endif
-// port[i].tx_clock = state_fio->FgetDouble();
-// port[i].tx_interval = state_fio->FgetDouble();
-// port[i].rx_clock = state_fio->FgetDouble();
-// port[i].rx_interval = state_fio->FgetDouble();
-// port[i].tx_data_bits = state_fio->FgetInt32();
-// port[i].tx_bits_x2 = state_fio->FgetInt32();
-// port[i].tx_bits_x2_remain = state_fio->FgetInt32();
-// port[i].rx_bits_x2 = state_fio->FgetInt32();
-// port[i].rx_bits_x2_remain = state_fio->FgetInt32();
-// port[i].prev_tx_clock_signal = state_fio->FgetBool();
-// port[i].prev_rx_clock_signal = state_fio->FgetBool();
-// if(!port[i].send->load_state((void *)state_fio)) {
-// return false;
-// }
-// if(!port[i].recv->load_state((void *)state_fio)) {
-// return false;
-// }
-// if(!port[i].rtmp->load_state((void *)state_fio)) {
-// return false;
-// }
-// port[i].shift_reg = state_fio->FgetInt32();
-// port[i].send_id = state_fio->FgetInt32();
-// port[i].recv_id = state_fio->FgetInt32();
-// port[i].err_intr = state_fio->FgetBool();
-// port[i].recv_intr = state_fio->FgetInt32();
-// port[i].stat_intr = state_fio->FgetBool();
-// port[i].send_intr = state_fio->FgetBool();
-// port[i].req_intr = state_fio->FgetBool();
-// port[i].in_service = state_fio->FgetBool();
-// port[i].dcd = state_fio->FgetBool();
-// port[i].cts = state_fio->FgetBool();
-// }
-// iei = state_fio->FgetBool();
-// oei = state_fio->FgetBool();
-// intr_bit = state_fio->FgetUint32();
- return true;
-}
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
void event_callback(int event_id, int err);
- void decl_state();
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// interrupt common functions
void set_context_intr(DEVICE* device, uint32_t bit)
{
OSDN Git Service
