OSDN Git Service

[VM][FMTOWNS][DMAC][CDROM][SCSI] FM-Towns's DMAC don't push CPU wait.
authorK.Ohta <whatisthis.sowhat@gmail.com>
Sun, 9 Apr 2023 08:32:10 +0000 (17:32 +0900)
committerK.Ohta <whatisthis.sowhat@gmail.com>
Sun, 9 Apr 2023 08:32:10 +0000 (17:32 +0900)
source/src/vm/fmtowns/cdrom/cdrom.cpp
source/src/vm/fmtowns/dmac.cpp
source/src/vm/fmtowns/fmtowns.cpp
source/src/vm/fmtowns/scsi.cpp
source/src/vm/fmtowns/scsi.h
source/src/vm/upd71071.cpp

index b38282c..409e372 100644 (file)
@@ -638,7 +638,7 @@ void TOWNS_CDROM::execute_command(uint8_t command)
                        );
                        double usec = get_seek_time(0); // At first, seek to track 0.
                        if(usec < 10.0) usec = 10.0;
-                       usec *= 2.0;
+                       //usec *= 2.0;
                        //mcu_ready = true; // From TSUGARU; MCU ready immediately. 20220128 K.O
                        // 20200626 K.O
                        // At first, SEEK to LBA0.
@@ -1501,7 +1501,7 @@ void TOWNS_CDROM::event_callback(int event_id, int err)
 //                     }
                        double usec = get_seek_time(next_seek_lba);
                        if(usec < 10.0) usec = 10.0;
-                       usec *= 2.0;
+                       //usec *= 2.0;
                        cdrom_debug_log(_T("RESTORE to SECTOR 0: NEXT is %d after %f"), next_seek_lba, usec);
                        register_event(this,
                                                   EVENT_CDROM_SEEK,
index 4c646d1..7a57fe6 100644 (file)
@@ -159,7 +159,7 @@ uint32_t TOWNS_DMAC::read_io8(uint32_t addr)
 void TOWNS_DMAC::do_dma_inc_dec_ptr_8bit(int c)
 {
        // Note: FM-Towns may extend to 32bit.
-#if 0
+#if 1
        uint32_t incdec = ((dma[c].mode & 0x20) == 0) ? 1 : UINT32_MAX;
        uint32_t addr = dma[c].areg &   0x00ffffff;
        uint32_t high_a = dma[c].areg & 0xff000000;
@@ -192,7 +192,7 @@ void TOWNS_DMAC::do_dma_inc_dec_ptr_8bit(int c)
 void TOWNS_DMAC::do_dma_inc_dec_ptr_16bit(int c)
 {
        // Note: FM-Towns may extend to 32bit.
-#if 0
+#if 1
        uint32_t incdec = ((dma[c].mode & 0x20) == 0) ? 2 : (UINT32_MAX - 1);
        uint32_t addr = dma[c].areg &   0x00ffffff;
        uint32_t high_a = dma[c].areg & 0xff000000;
index b5269c6..5f8eaf1 100644 (file)
@@ -347,7 +347,8 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        dma->set_context_debugger(new DEBUGGER(this, emu));
        extra_dma->set_context_debugger(new DEBUGGER(this, emu));
 #endif
-       //dma->set_context_cpu(cpu);
+       // Note: DMAC may set wait value to CPU. 20230409 K.O
+       dma->set_context_cpu(NULL);
        dma->set_context_memory(memory);
        dma->set_context_ch0(fdc);
        dma->set_context_ch1(scsi_host);
@@ -356,7 +357,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        dma->set_context_tc1(scsi, SIG_SCSI_EOT, 0xffffffff);
        dma->set_context_tc3(cdrom, SIG_TOWNS_CDROM_DMAINT, 0xffffffff);
 
-       //dma->set_context_ack1(scsi_host, SIG_SCSI_ACK, 0xffffffff);
+       dma->set_context_ack1(scsi_host, SIG_SCSI_ACK, 0xffffffff);
        dma->set_context_ack3(cdrom, SIG_TOWNS_CDROM_DMAACK, 0xffffffff);
        dma->set_context_ube1(scsi_host, SIG_SCSI_16BIT_BUS, 0x02);
        dma->set_context_child_dma(extra_dma);
index b92a420..8365055 100644 (file)
@@ -64,18 +64,18 @@ void SCSI::write_io8w(uint32_t addr, uint32_t data, int *wait)
                #ifdef _SCSI_DEBUG_LOG
                        this->out_debug_log(_T("[SCSI] out %04X %02X\n"), addr, data);
                #endif
-               ctrl_reg = data;
-               if((data & CTRL_DMAE) != 0) dma_enabled = true;
                if((machine_id >= 0x0300) & ((machine_id & 0xff00) != 0x0400)) { // After UX
                        ex_int_enable = ((data & 0x20) != 0) ? true : false;
                        // Set host to 16bit bus width. BIT3 ,= '1'.
                }
                if(ctrl_reg  & CTRL_WEN) {
                        d_host->write_signal(SIG_SCSI_RST, data, CTRL_RST);
-                       d_host->write_signal(SIG_SCSI_SEL, data, CTRL_SEL);
                        d_host->write_signal(SIG_SCSI_ATN, data, CTRL_ATN);
+                       d_host->write_signal(SIG_SCSI_SEL, data, CTRL_SEL);
                        d_host->write_signal(SIG_SCSI_HOST_DMAE, data, CTRL_DMAE);
                }
+               ctrl_reg = data;
+               if((data & CTRL_DMAE) != 0) dma_enabled = true;
                break;
        }
 }
@@ -133,7 +133,7 @@ uint32_t SCSI::read_io8w(uint32_t addr, int* wait)
 //     out_debug_log(_T("[SCSI] READ I/O %04X %02X\n"), addr, value);
        return value;
 }
-#if 1
+#if 0
 void SCSI::write_io16w(uint32_t addr, uint32_t data, int *wait)
 {
        write_io8w(addr & 0xfffe, data, wait);
index 8997bef..f8cce8f 100644 (file)
@@ -46,7 +46,7 @@ public:
        void reset();
        void __FASTCALL write_io8w(uint32_t addr, uint32_t data, int *wait);
        uint32_t __FASTCALL read_io8w(uint32_t addr, int *wait);
-       #if 1
+       #if 0
        void __FASTCALL write_io16w(uint32_t addr, uint32_t data, int *wait);
        uint32_t __FASTCALL read_io16w(uint32_t addr, int *wait);
        #endif
index 76c35d8..389125b 100644 (file)
@@ -599,10 +599,12 @@ bool UPD71071::do_dma_epilogue(int c)
 #else
 //     if(dma[c].end) return true; // OK?
        if((dma[c].creg == 0) || ((dma[c].endreq) && !(dma[c].end) && ((dma[c].mode & 0xc0) != 0x40))) {  // OK?
-               if(dma[c].endreq) dma[c].end = true;
                bool is_tc = false;
                dma[c].creg--;
-               if(dma[c].end) is_tc = true;
+               if((dma[c].endreq) || (dma[c].end)) {
+                       dma[c].end = true;
+                       is_tc = true;
+               }
                // TC
                if(dma[c].bcreg < dma[c].creg) {
                        is_tc = true;
@@ -637,10 +639,16 @@ bool UPD71071::do_dma_epilogue(int c)
        //       -- 20200316 K.O
        if((dma[c].mode & 0xc0) == 0x40){
                // single mode
-//             req &= ~bit;
-//             sreq &= ~bit;
+               //req &= ~bit;
+               //sreq &= ~bit;
                running = false;
                return true;
+       } else if((dma[c].mode & 0xc0) == 0x00){
+               // single mode
+//             req &= ~bit;
+//             sreq &= ~bit;
+//             running = false;
+               return false;
        }
 #endif
        return false;