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[eos/others.git] / utilsrc / srcX86MAC64 / Admin / gdb-7.7.1 / sim / testsuite / sim / bfin / c_dsp32alu_rrppmm_sft.s
1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rrppmm_sft/c_dsp32alu_rrppmm_sft.dsp
2 // Spec Reference: dsp32alu (dreg, dreg) = +/+, -/- (dreg, dreg) >>, <<
3 # mach: bfin
4
5 .include "testutils.inc"
6         start
7
8         R0 = 0;
9         ASTAT = R0;
10
11         imm32 r0, 0x95679911;
12         imm32 r1, 0x2789ab1d;
13         imm32 r2, 0x34945515;
14         imm32 r3, 0x46967717;
15         imm32 r4, 0x5597891b;
16         imm32 r5, 0x6989ab1d;
17         imm32 r6, 0x94445515;
18         imm32 r7, 0x96667777;
19         R0 = R0 +|+ R0, R7 = R0 -|- R0 (ASR);
20         R1 = R0 +|+ R1, R6 = R0 -|- R1 (ASL);
21         R2 = R0 +|+ R2, R5 = R0 -|- R2 (ASR);
22         R3 = R0 +|+ R3, R4 = R0 -|- R3 (ASR);
23         R4 = R0 +|+ R4, R3 = R0 -|- R4 (ASL);
24         R5 = R0 +|+ R5, R2 = R0 -|- R5 (ASR);
25         R6 = R0 +|+ R6, R1 = R0 -|- R6 (ASL);
26         R7 = R0 +|+ R7, R0 = R0 -|- R7 (ASR);
27         CHECKREG r0, 0xcAB3cC88;
28         CHECKREG r1, 0x73567A52;
29         CHECKREG r2, 0xf27FfB89;
30         CHECKREG r3, 0xdBFE1028;
31         CHECKREG r4, 0x799E541C;
32         CHECKREG r5, 0xa2E89D87;
33         CHECKREG r6, 0xE246e9F2;
34         CHECKREG r7, 0xcAB3cC88;
35
36         imm32 r0, 0x11678911;
37         imm32 r1, 0xa719ab1d;
38         imm32 r2, 0x3a415515;
39         imm32 r3, 0x46a67717;
40         imm32 r4, 0x556a891b;
41         imm32 r5, 0x6789ab1d;
42         imm32 r6, 0x74445a15;
43         imm32 r7, 0x866677a7;
44         R0 = R1 +|+ R0, R7 = R1 -|- R0 (ASR);
45         R1 = R1 +|+ R1, R6 = R1 -|- R1 (ASR);
46         R2 = R1 +|+ R2, R5 = R1 -|- R2 (ASL);
47         R3 = R1 +|+ R3, R4 = R1 -|- R3 (ASR);
48         R4 = R1 +|+ R4, R3 = R1 -|- R4 (ASR);
49         R5 = R1 +|+ R5, R2 = R1 -|- R5 (ASR);
50         R6 = R1 +|+ R6, R1 = R1 -|- R6 (ASL);
51         R7 = R1 +|+ R7, R0 = R1 -|- R7 (ASR);
52         CHECKREG r0, 0x41AC229A;
53         CHECKREG r1, 0x4E32563A;
54         CHECKREG r2, 0xe6B4fF86;
55         CHECKREG r3, 0xfB70088D;
56         CHECKREG r4, 0xaBA9a290;
57         CHECKREG r5, 0xc064aB96;
58         CHECKREG r6, 0x4E32563A;
59         CHECKREG r7, 0x0C8533A0;
60
61         imm32 r0, 0xb567891b;
62         imm32 r1, 0x2b89abbd;
63         imm32 r2, 0x34b45b15;
64         imm32 r3, 0x466bb717;
65         imm32 r4, 0x556bb91b;
66         imm32 r5, 0x67b9ab1d;
67         imm32 r6, 0x7b4455b5;
68         imm32 r7, 0xb666777b;
69         R0 = R2 +|+ R0, R7 = R2 -|- R0 (ASR);
70         R1 = R2 +|+ R1, R6 = R2 -|- R1 (ASR);
71         R2 = R2 +|+ R2, R5 = R2 -|- R2 (ASR);
72         R3 = R2 +|+ R3, R4 = R2 -|- R3 (ASL);
73         R4 = R2 +|+ R4, R3 = R2 -|- R4 (ASR);
74         R5 = R2 +|+ R5, R2 = R2 -|- R5 (ASR);
75         R6 = R2 +|+ R6, R1 = R2 -|- R6 (ASL);
76         R7 = R2 +|+ R7, R0 = R2 -|- R7 (ASR);
77         CHECKREG r0, 0xED5Ae246;
78         CHECKREG r1, 0x2B8AaBBC;
79         CHECKREG r2, 0x1A5A2D8A;
80         CHECKREG r3, 0x2C11098C;
81         CHECKREG r4, 0x08A35188;
82         CHECKREG r5, 0x1A5A2D8A;
83         CHECKREG r6, 0x3DDE0A6C;
84         CHECKREG r7, 0x2D004B43;
85
86         imm32 r0, 0xbc678c11;
87         imm32 r1, 0x27c9cb1d;
88         imm32 r2, 0x344c5515;
89         imm32 r3, 0x46c6c717;
90         imm32 r4, 0x55678c1b;
91         imm32 r5, 0x6c89abcd;
92         imm32 r6, 0x7444551c;
93         imm32 r7, 0x8c667777;
94         R0 = R3 +|+ R0, R7 = R3 -|- R0 (ASL);
95         R1 = R3 +|+ R1, R6 = R3 -|- R1 (ASR);
96         R2 = R3 +|+ R2, R5 = R3 -|- R2 (ASR);
97         R3 = R3 +|+ R3, R4 = R3 -|- R3 (ASR);
98         R4 = R3 +|+ R4, R3 = R3 -|- R4 (ASL);
99         R5 = R3 +|+ R5, R2 = R3 -|- R5 (ASR);
100         R6 = R3 +|+ R6, R1 = R3 -|- R6 (ASR);
101         R7 = R3 +|+ R7, R0 = R3 -|- R7 (ASL);
102         CHECKREG r0, 0xF19C3044;
103         CHECKREG r1, 0xbF07C818;
104         CHECKREG r2, 0xC227eA96;
105         CHECKREG r3, 0x8D8C8E2E;
106         CHECKREG r4, 0x8D8C8E2E;
107         CHECKREG r5, 0xCB64a397;
108         CHECKREG r6, 0xCE85C615;
109         CHECKREG r7, 0x44940874;
110
111         imm32 r0, 0xd56789d1;
112         imm32 r1, 0x2d89abdd;
113         imm32 r2, 0x34d455d5;
114         imm32 r3, 0x4d667717;
115         imm32 r4, 0x5dd7891b;
116         imm32 r5, 0x6789ab1d;
117         imm32 r6, 0xd44d5515;
118         imm32 r7, 0xd666d777;
119         R0 = R4 +|+ R0, R7 = R4 -|- R0 (ASR);
120         R1 = R4 +|+ R1, R6 = R4 -|- R1 (ASR);
121         R2 = R4 +|+ R2, R5 = R4 -|- R2 (ASR);
122         R3 = R4 +|+ R3, R4 = R4 -|- R3 (ASL);
123         R4 = R4 +|+ R4, R3 = R4 -|- R4 (ASR);
124         R5 = R4 +|+ R5, R2 = R4 -|- R5 (ASL);
125         R6 = R4 +|+ R6, R1 = R4 -|- R6 (ASR);
126         R7 = R4 +|+ R7, R0 = R4 -|- R7 (ASR);
127         CHECKREG r0, 0xeE551231;
128         CHECKREG r1, 0x045D1AB4;
129         CHECKREG r2, 0x18C214CA;
130         CHECKREG r3, 0x00000000;
131         CHECKREG r4, 0x20E22408;
132         CHECKREG r5, 0x6AC67B56;
133         CHECKREG r6, 0x1C840953;
134         CHECKREG r7, 0x328D11D6;
135
136         imm32 r0, 0xc567a911;
137         imm32 r1, 0x278aab1d;
138         imm32 r2, 0x3c445515;
139         imm32 r3, 0x46a67717;
140         imm32 r4, 0x55c7891b;
141         imm32 r5, 0x6a8cab1d;
142         imm32 r6, 0x7444c515;
143         imm32 r7, 0xa6667c77;
144         R0 = R5 +|+ R0, R7 = R5 -|- R0 (ASR);
145         R1 = R5 +|+ R1, R6 = R5 -|- R1 (ASL);
146         R2 = R5 +|+ R2, R5 = R5 -|- R2 (ASR);
147         R3 = R5 +|+ R3, R4 = R5 -|- R3 (ASR);
148         R4 = R5 +|+ R4, R3 = R5 -|- R4 (ASR);
149         R5 = R5 +|+ R5, R2 = R5 -|- R5 (ASL);
150         R6 = R5 +|+ R6, R1 = R5 -|- R6 (ASR);
151         R7 = R5 +|+ R7, R0 = R5 -|- R7 (ASR);
152         CHECKREG r0, 0x04FFD585;
153         CHECKREG r1, 0x6B46D608;
154         CHECKREG r2, 0x00000000;
155         CHECKREG r3, 0x17720887;
156         CHECKREG r4, 0xFFB1a27D;
157         CHECKREG r5, 0x5C90AC10;
158         CHECKREG r6, 0xF14AD608;
159         CHECKREG r7, 0x5791D68B;
160
161         imm32 r0, 0xd5678911;
162         imm32 r1, 0x2ddddd1d;
163         imm32 r2, 0x34ddd515;
164         imm32 r3, 0x46d67717;
165         imm32 r4, 0x5d6d891b;
166         imm32 r5, 0x6789db1d;
167         imm32 r6, 0x74445d15;
168         imm32 r7, 0xd66677d7;
169         R0 = R6 +|+ R0, R7 = R6 -|- R0 (ASR);
170         R1 = R6 +|+ R1, R6 = R6 -|- R1 (ASR);
171         R2 = R6 +|+ R2, R5 = R6 -|- R2 (ASR);
172         R3 = R6 +|+ R3, R4 = R6 -|- R3 (ASL);
173         R4 = R6 +|+ R4, R3 = R6 -|- R4 (ASR);
174         R5 = R6 +|+ R5, R2 = R6 -|- R5 (ASR);
175         R6 = R6 +|+ R6, R1 = R6 -|- R6 (ASL);
176         R7 = R6 +|+ R7, R0 = R6 -|- R7 (ASR);
177         CHECKREG r0, 0x9EAFcAF7;
178         CHECKREG r1, 0x00000000;
179         CHECKREG r2, 0x16040544;
180         CHECKREG r3, 0x353C5719;
181         CHECKREG r4, 0xEDF6E8E3;
182         CHECKREG r5, 0x0D2F3AB7;
183         CHECKREG r6, 0x8CCCFFF0;
184         CHECKREG r7, 0xeE1D34F9;
185
186         imm32 r0, 0xf567a911;
187         imm32 r1, 0x2f8aab1d;
188         imm32 r2, 0x34a45515;
189         imm32 r3, 0x4a6f7717;
190         imm32 r4, 0x5567f91b;
191         imm32 r5, 0xa789af1d;
192         imm32 r6, 0x74445515;
193         imm32 r7, 0x866677f7;
194         R0 = R7 +|+ R0, R7 = R7 -|- R0 (ASR);
195         R1 = R7 +|+ R1, R6 = R7 -|- R1 (ASL);
196         R2 = R7 +|+ R2, R5 = R7 -|- R2 (ASR);
197         R3 = R7 +|+ R3, R4 = R7 -|- R3 (ASR);
198         R4 = R7 +|+ R4, R3 = R7 -|- R4 (ASL);
199         R5 = R7 +|+ R5, R2 = R7 -|- R5 (ASL);
200         R6 = R7 +|+ R6, R1 = R7 -|- R6 (ASR);
201         R7 = R7 +|+ R7, R0 = R7 -|- R7 (ASL);
202         CHECKREG r0, 0x00000000;
203         CHECKREG r1, 0xCB4Af763;
204         CHECKREG r2, 0xFD24bC88;
205         CHECKREG r3, 0x12EEdE8A;
206         CHECKREG r4, 0x0F0EbF42;
207         CHECKREG r5, 0x24D8e144;
208         CHECKREG r6, 0xFD34700F;
209         CHECKREG r7, 0x21FC9DCC;
210
211         imm32 r0, 0xe5678911;
212         imm32 r1, 0x2e89ab1d;
213         imm32 r2, 0x34e45515;
214         imm32 r3, 0x46667717;
215         imm32 r4, 0x556e891b;
216         imm32 r5, 0x6789ab1d;
217         imm32 r6, 0x7444e515;
218         imm32 r7, 0x86667e77;
219         R4 = R2 +|+ R5, R3 = R2 -|- R5 (ASR);
220         R0 = R5 +|+ R3, R5 = R5 -|- R3 (ASL);
221         R2 = R6 +|+ R2, R0 = R6 -|- R2 (ASL);
222         R3 = R4 +|+ R0, R2 = R4 -|- R0 (ASR);
223         R7 = R7 +|+ R6, R6 = R7 -|- R6 (ASL);
224         R6 = R1 +|+ R7, R1 = R1 -|- R7 (ASL);
225         R5 = R0 +|+ R4, R7 = R0 -|- R4 (ASR);
226         R1 = R3 +|+ R1, R4 = R3 -|- R1 (ASR);
227         CHECKREG r0, 0x7EC02000;
228         CHECKREG r1, 0x6C72EC0B;
229         CHECKREG r2, 0xe7BBF00C;
230         CHECKREG r3, 0x667B100C;
231         CHECKREG r4, 0xfA082401;
232         CHECKREG r5, 0x667B100C;
233         CHECKREG r6, 0x47BAE46A;
234         CHECKREG r7, 0x18450FF3;
235
236         imm32 r0, 0xd5678911;
237         imm32 r1, 0xff89ab1d;
238         imm32 r2, 0x34f45515;
239         imm32 r3, 0x46667717;
240         imm32 r4, 0x556f891b;
241         imm32 r5, 0x6789fb1d;
242         imm32 r6, 0x74445f15;
243         imm32 r7, 0x866677f7;
244         R4 = R3 +|+ R3, R5 = R3 -|- R3 (ASR);
245         R1 = R6 +|+ R1, R6 = R6 -|- R1 (ASL);
246         R6 = R1 +|+ R4, R4 = R1 -|- R4 (ASL);
247         R7 = R4 +|+ R2, R0 = R4 -|- R2 (ASR);
248         R2 = R2 +|+ R6, R1 = R2 -|- R6 (ASR);
249         R3 = R5 +|+ R5, R7 = R5 -|- R5 (ASL);
250         R5 = R7 +|+ R7, R3 = R7 -|- R7 (ASL);
251         R0 = R0 +|+ R0, R2 = R0 -|- R0 (ASR);
252         CHECKREG r0, 0x06BAF2C2;
253         CHECKREG r1, 0xEC7A1F0F;
254         CHECKREG r2, 0x00000000;
255         CHECKREG r3, 0x00000000;
256         CHECKREG r4, 0x42683A9A;
257         CHECKREG r5, 0x00000000;
258         CHECKREG r6, 0x5C0016F6;
259         CHECKREG r7, 0x00000000;
260
261         pass