1 # Check that VS in ASTAT is set with add/sub insns (and not just V)
4 .include "testutils.inc"
8 dmm32 ASTAT, (0x2810c010 | _AV1S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY | _AN);
12 R3.H = R0.L - R4.H (NS);
13 checkreg R3, 0x6d807c58;
14 checkreg ASTAT, (0x2810c010 | _VS | _V | _AV1S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY);
16 dmm32 ASTAT, (0x64c00680 | _AQ | _AC0_COPY);
19 R5.L = R5.L + R1.H (NS);
20 checkreg R5, 0x1ba48861;
21 checkreg ASTAT, (0x64c00680 | _VS | _V | _AQ | _V_COPY | _AN);
23 dmm32 ASTAT, (0x68b04200 | _AV1S | _AV0 | _AC0 | _AQ | _AN);
27 R7.H = R6.L + R3.L (S);
28 checkreg R7, 0x8000dfb7;
29 checkreg ASTAT, (0x68b04200 | _VS | _V | _AV1S | _AV0 | _AC0 | _AQ | _V_COPY | _AC0_COPY | _AN);
31 dmm32 ASTAT, (0x78208e90 | _CC | _AN);
34 R3.H = R5.L - R3.H (NS);
35 checkreg R3, 0x5d433bc7;
36 checkreg ASTAT, (0x78208e90 | _VS | _V | _AC0 | _CC | _V_COPY | _AC0_COPY);
38 dmm32 ASTAT, (0x00904680 | _AV1S | _AV1 | _AV0 | _AC1 | _AQ | _AZ);
42 R4.L = R2.L - R6.H (NS);
43 checkreg R4, 0x69777f85;
44 checkreg ASTAT, (0x00904680 | _VS | _V | _AV1S | _AV1 | _AV0 | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY);
46 dmm32 ASTAT, (0x78d08210 | _V | _AV1S | _AC1 | _AC0 | _V_COPY | _AC0_COPY | _AN | _AZ);
49 R0.L = R1.L + R0.H (NS);
50 checkreg R0, 0x431783ed;
51 checkreg ASTAT, (0x78d08210 | _VS | _V | _AV1S | _AC1 | _V_COPY | _AN);
53 dmm32 ASTAT, (0x58d00e10 | _AV1 | _AQ | _CC);
57 R1.H = R0.L + R2.H (NS);
58 checkreg R1, 0xedbe0b05;
59 checkreg ASTAT, (0x58d00e10 | _VS | _V | _AV1 | _AQ | _CC | _V_COPY | _AN);
61 dmm32 ASTAT, (0x30c08000 | _AC0 | _AQ | _AC0_COPY);
64 R4.H = R5.L + R4.L (NS);
65 checkreg R4, 0xbea843cb;
66 checkreg ASTAT, (0x30c08000 | _VS | _V | _AQ | _V_COPY | _AN);
68 dmm32 ASTAT, (0x74108400 | _V | _AV1 | _AC1 | _AC0 | _AC0_COPY);
72 R1.L = R0.L - R3.H (NS);
73 checkreg R1, 0x13cf1fa9;
74 checkreg ASTAT, (0x74108400 | _VS | _V | _AV1 | _AC1 | _AC0 | _V_COPY | _AC0_COPY);
76 dmm32 ASTAT, (0x7420ce10 | _AV1S | _AV1 | _AV0S | _AC1 | _AQ | _AC0_COPY | _AN | _AZ);
79 R6.H = R4.L - R4.H (NS);
80 checkreg R6, 0x3c8520d2;
81 checkreg ASTAT, (0x7420ce10 | _VS | _V | _AV1S | _AV1 | _AV0S | _AC1 | _AC0 | _AQ | _V_COPY | _AC0_COPY);
83 dmm32 ASTAT, (0x74704010 | _V | _AV0S | _AC1 | _AC0 | _AQ | _CC | _V_COPY);
86 R5.H = R5.L - R3.H (NS);
87 checkreg R5, 0x5514c47e;
88 checkreg ASTAT, (0x74704010 | _VS | _V | _AV0S | _AC1 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY);
90 dmm32 ASTAT, (0x0ce08490 | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AZ);
93 R4.L = R1.L - R4.H (NS);
94 checkreg R4, 0x259e7b12;
95 checkreg ASTAT, (0x0ce08490 | _VS | _V | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _V_COPY | _AC0_COPY);
97 dmm32 ASTAT, (0x54b08810 | _V | _AV1S | _AV0S | _AC0_COPY | _AN);
100 R3.L = R6.L + R6.L (NS);
101 checkreg R3, 0x7a76466a;
102 checkreg ASTAT, (0x54b08810 | _VS | _V | _AV1S | _AV0S | _AC0 | _V_COPY | _AC0_COPY);
104 dmm32 ASTAT, (0x70f0c080 | _AV1S | _AV0S | _AC0);
105 imm32 R4, 0x55fab7e4;
106 imm32 R5, 0x7dbd9b06;
107 R5.H = R5.L - R4.H (S);
108 checkreg R5, 0x80009b06;
109 checkreg ASTAT, (0x70f0c080 | _VS | _V | _AV1S | _AV0S | _AC0 | _V_COPY | _AC0_COPY | _AN);
111 dmm32 ASTAT, (0x5ce04680 | _AV0 | _AC0 | _V_COPY | _AC0_COPY | _AN);
112 imm32 R0, 0x19cacbdb;
113 imm32 R2, 0x151cb293;
114 imm32 R4, 0x571c351a;
115 R0.H = R4.L - R2.L (S);
116 checkreg R0, 0x7fffcbdb;
117 checkreg ASTAT, (0x5ce04680 | _VS | _V | _AV0 | _V_COPY);
119 dmm32 ASTAT, (0x0c604a00 | _AV1S | _AV0S | _V_COPY | _AC0_COPY | _AZ);
120 imm32 R3, 0x5432c45d;
121 imm32 R6, 0x62519952;
122 R3.L = R6.L + R6.L (S);
123 checkreg R3, 0x54328000;
124 checkreg ASTAT, (0x0c604a00 | _VS | _V | _AV1S | _AV0S | _AC0 | _V_COPY | _AC0_COPY | _AN);
126 dmm32 ASTAT, (0x58708c90 | _AV0 | _AC1 | _AQ | _CC | _AC0_COPY | _AN | _AZ);
127 imm32 R0, 0x1f3f3c0e;
128 imm32 R4, 0x5fae58d2;
129 R0.H = R0.L + R4.L (NS);
130 checkreg R0, 0x94e03c0e;
131 checkreg ASTAT, (0x58708c90 | _VS | _V | _AV0 | _AC1 | _AQ | _CC | _V_COPY | _AN);
133 dmm32 ASTAT, (0x34b00a00 | _V | _AV1S | _AC1 | _CC | _V_COPY | _AZ);
134 imm32 R3, 0x6ea226dc;
135 imm32 R4, 0x045c6d64;
136 imm32 R7, 0x7e599a25;
137 R7.L = R3.L + R4.L (NS);
138 checkreg R7, 0x7e599440;
139 checkreg ASTAT, (0x34b00a00 | _VS | _V | _AV1S | _AC1 | _CC | _V_COPY | _AN);
141 dmm32 ASTAT, (0x40a0c010 | _AV1S | _AC0);
142 imm32 R2, 0x641501ef;
143 imm32 R7, 0x3acb49aa;
144 R2.H = R7.L + R7.H (NS);
145 checkreg R2, 0x847501ef;
146 checkreg ASTAT, (0x40a0c010 | _VS | _V | _AV1S | _V_COPY | _AN);
148 dmm32 ASTAT, (0x78f04090 | _AV1S | _AC1 | _AQ | _CC | _AZ);
149 imm32 R2, 0x65681fdf;
150 imm32 R3, 0x5fffe0d3;
151 imm32 R5, 0x37df99cd;
152 R2.H = R5.L - R3.H (NS);
153 checkreg R2, 0x39ce1fdf;
154 checkreg ASTAT, (0x78f04090 | _VS | _V | _AV1S | _AC1 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY);
156 dmm32 ASTAT, (0x0cc04e10 | _AV1S | _AQ | _CC);
157 imm32 R3, 0x571977df;
158 imm32 R4, 0x029671d0;
159 R3.L = R4.L + R3.H (NS);
160 checkreg R3, 0x5719c8e9;
161 checkreg ASTAT, (0x0cc04e10 | _VS | _V | _AV1S | _AQ | _CC | _V_COPY | _AN);
163 dmm32 ASTAT, (0x00104880 | _AV0S | _AC1 | _AC0 | _AQ | _CC | _AC0_COPY | _AN);
164 imm32 R0, 0x4c98aa07;
165 imm32 R4, 0x5e9da59f;
166 R4.H = R0.L + R0.L (S);
167 checkreg R4, 0x8000a59f;
168 checkreg ASTAT, (0x00104880 | _VS | _V | _AV0S | _AC1 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY | _AN);
170 dmm32 ASTAT, (0x08008c00 | _AV1S | _AV0S | _AV0 | _CC | _AC0_COPY);
171 imm32 R4, 0x58ee2400;
172 imm32 R6, 0x2e97af3e;
173 R4.L = R6.L + R6.L (NS);
174 checkreg R4, 0x58ee5e7c;
175 checkreg ASTAT, (0x08008c00 | _VS | _V | _AV1S | _AV0S | _AV0 | _AC0 | _CC | _V_COPY | _AC0_COPY);
177 dmm32 ASTAT, (0x2ce0c290 | _V | _AV1S | _AV0S | _AC1 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY | _AN);
178 imm32 R2, 0x2d467e64;
179 imm32 R6, 0x31aeb601;
180 imm32 R7, 0x1523a746;
181 R7.L = R2.L - R6.L (S);
182 checkreg R7, 0x15237fff;
183 checkreg ASTAT, (0x2ce0c290 | _VS | _V | _AV1S | _AV0S | _AC1 | _AQ | _CC | _V_COPY);