1 \ -*- coding: utf-8 -*-
3 ; -----------------------------------------------------------------------
5 ; -----------------------------------------------------------------------
8 \ MSP_EXP430FR5969 MSP_EXP430FR5994 MSP_EXP430FR6989
10 \ PUSHM order : PSP,TOS, IP, S, T, W, X, Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
11 \ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7 , R6 , R5 , R4 , R3, R2, R1, R0
13 \ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
15 \ POPM order : PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT, Y, X, W, T, S, IP,TOS,PSP
16 \ POPM order : R0, R1, R2, R3, R4 , R5 , R6 , R7 , R8, R9,R10,R11,R12,R13,R14,R15
18 \ example : POPM #6,IP pop Y,X,W,T,S,IP registers from return stack
20 \ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
21 \ ASSEMBLER conditionnal usage before ?JMP ?GOTO : S< S>= U< U>= 0= 0<> 0<
23 \ FORTH conditionnal : 0= 0< = < > U<
30 \ https://forth-standard.org/standard/core/Plus
31 \ + n1/u1 n2/u2 -- n3/u3 add n1+n2
38 [UNDEFINED] MAX [IF] \ MAX and MIN are defined in {UTILITY}
40 CODE MAX \ n1 n2 -- n3 signed maximum
47 CODE MIN \ n1 n2 -- n3 signed minimum
57 \ https://forth-standard.org/standard/core/CFetch
58 \ C@ c-addr -- char fetch char from memory
65 [UNDEFINED] CONSTANT [IF]
66 \ https://forth-standard.org/standard/core/CONSTANT
67 \ CONSTANT <name> n -- define a Forth CONSTANT
72 MOV #DOCON,-4(W) \ CFA = DOCON
73 MOV TOS,-2(W) \ PFA = n
80 \ https://forth-standard.org/standard/core/BL
81 \ BL -- char an ASCII space
85 [UNDEFINED] SPACE [IF]
86 \ https://forth-standard.org/standard/core/SPACE
87 \ SPACE -- output a space
92 [UNDEFINED] SPACES [IF]
93 \ https://forth-standard.org/standard/core/SPACES
94 \ SPACES n -- output n spaces
108 MOV @PSP+,TOS \ -- drop n
113 [UNDEFINED] OVER [IF]
114 \ https://forth-standard.org/standard/core/OVER
115 \ OVER x1 x2 -- x1 x2 x1
117 MOV TOS,-2(PSP) \ 3 -- x1 (x2) x2
118 MOV @PSP,TOS \ 2 -- x1 (x2) x1
119 SUB #2,PSP \ 1 -- x1 x2 x1
124 [UNDEFINED] U.R [IF] \ defined in {UTILITY}
125 : U.R \ u n -- display u unsigned in n width (n >= 2)
127 R> OVER - 0 MAX SPACES TYPE
131 [UNDEFINED] DUMP [IF] \ defined in {UTILITY}
132 \ https://forth-standard.org/standard/tools/DUMP
133 CODE DUMP \ adr n -- dump memory
135 PUSH &BASEADR \ save current base
136 MOV #$10,&BASEADR \ HEX base
137 ADD @PSP,TOS \ -- ORG END
140 DO CR \ generate line
141 I 4 U.R SPACE \ generate address
148 I $10 + I \ display 16 chars
149 DO I C@ $7E MIN BL MAX EMIT LOOP
151 R> BASEADR ! \ restore current base
157 ; --------------------------------------------------------------------------------
158 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES IV : Adda|Cmpa|Mova|Suba (without extended word)
159 ; --------------------------------------------------------------------------------
160 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
161 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
162 ; --------------------------------------------------------------------------------
169 ; you should see: 45 53 54 52>0B 0A<04 44 55 4D 50 4F
177 ; you should see: 45 53 54 52>1A 0B<04 44 55 4D 50 4F
185 ; you should see: 45 53 54 52>2B 01 45 23<04 44 55 4D
193 ; you should see: 45 53 54 52>3C 0A 34 12<04 44 55 4D
201 ; you should see: 45 53 54 52>61 0B 45 23<04 44 55 4D
209 ; you should see: 45 53 54 52>7A 0C 34 12<04 44 55 4D
217 ; you should see: 45 53 54 52>8C 00 01 00<04 44 55 4D
225 ; you should see: 45 53 54 52>9C 01 45 23<04 44 55 4D
233 ; you should see: 45 53 54 52>AC 02 56 34<04 44 55 4D
241 ; you should see: 45 53 54 52>BC 03 67 45<04 44 55 4D
251 ; you should see: 45 53 54 52>CB 0A<04 44 55 4D 50 4F
259 ; you should see: 45 53 54 52>DB 0A<04 44 55 4D 50 4F
267 ; you should see: 45 53 54 52>EB 0A<04 44 55 4D 50 4F
275 ; you should see: 45 53 54 52>FB 0A<04 44 55 4D 50 4F
278 ; --------------------------------------------------------------------------------
279 ; DTCforthMSP430FR5xxx ASSEMBLER: CALLA (without extended word)
280 ; --------------------------------------------------------------------------------
281 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
282 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
283 ; --------------------------------------------------------------------------------
290 ; you should see: 45 53 54 52>4A 13<04 44 55 4D 50 4F
298 ; you should see: 45 53 54 52>5A 13 56 34<04 44 55 4D
306 ; you should see: 45 53 54 52>6A 13<04 44 55 4D 50 4F
314 ; you should see: 45 53 54 52>7A 13<04 44 55 4D 50 4F
322 ; you should see: 45 53 54 52>82 13 56 34<04 44 55 4D
330 ; you should see: 45 53 54 52>B5 13 89 67<04 44 55 4D
333 ; --------------------------------------------------------------------------------
334 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES V extended double operand
335 ; --------------------------------------------------------------------------------
336 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
337 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
338 ; --------------------------------------------------------------------------------
346 ; you should see: 45 53 54 52>0B 4C 40 18 0B 4C<04 44
355 ; you should see: 45 53 54 52>0B 5B 00 18 4B 5B<04 44
365 ; you should see: 45 53 54 52>0B 5B 89 18 4B 5B<04 44
375 ; you should see: 45 53 54 52>0B 5B 07 18 4B 5B<04 44
384 ; you should see: 45 53 54 52>3B 60 76 98 80 1A 7B 60
394 ; you should see: 45 53 54 52>1B 62 76 98 80 1A 5B 62
404 ; you should see: 45 53 54 52>5B EC 32 54 46 18 5B EC
414 ; you should see: 45 53 54 52>8C 7B 32 54 06 18 CC 7B
424 ; you should see: 45 53 54 52>CC EB 32 54 46 18 CC EB
428 ; --------------------------------------------------------------------------------
429 ; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand (take count of RPT)
430 ; --------------------------------------------------------------------------------
431 ; absolute and immediate instructions must be written as $x.xxxx (DOUBLE numbers)
432 ; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
433 ; --------------------------------------------------------------------------------
441 ; you should see: 45 53 54 52>09 11 40 18 09 11<04 44
450 ; you should see: 45 53 54 52>29 10 00 18 69 10<04 44
459 ; you should see: 45 53 54 52>2C 10 00 18 6C 10<04 44
468 ; you should see: 45 53 54 52>39 10 00 19 79 10<04 44
478 ; you should see: 45 53 54 52>0B 10 08 19 4B 10<04 44
488 ; you should see: 45 53 54 52>0B 10 89 19 4B 10<04 44
497 ; you should see: 45 53 54 52>30 12 45 23 40 18 30 12
507 ; you should see: 45 53 54 52>12 12 78 56 00 1A 52 12
517 ; you should see: 45 53 54 52>52 12 33 00 40 18 52 12
527 ; you should see: 45 53 54 52>5B 12 44 33 40 18 5B 12
534 BASEADR @ %10 BASEADR ! SWAP 8 EMIT . BASEADR !
538 BASEADR @ %10 BASEADR ! SWAP 8 EMIT U. BASEADR ! ;
549 \ MOVX #$F0F0,Y \ don't forget decimal point with MOVX instruction !
558 RRUX_T ; you should see %111100001111000 --> %
577 RRUX_T ; you should see %111100001111000 --> %
591 RRUX_T ; you should see %111100001111 --> %
605 RRUX_T ; you should see %11110000 --> %
625 RRCX_T ; you should see %100000000000000 --> %
644 RRCX_T ; you should see %100000000000000 --> %
659 RRCX_T ; you should see %10000000 --> %
677 RRAX_T ; you should see %-100000000000000 --> %
696 RRAX_T ; you should see %-100000000000000 --> %
710 RRAX_T ; you should see %-10000000000000 --> %
724 RRAX_T ; you should see %-1000000000000 --> %
738 RRAX_T ; you should see %-100000000 --> %
753 MOV #.,PC \ BRANCH to .
756 RLAX_T ; you should see -2 -->
772 MOV #.,PC \ BRANCH to .
775 RLAX_T ; you should see -2 -->
786 MOV #.,PC \ BRANCH to .
789 RLAX_T ; you should see -4 -->
800 MOV #.,PC \ BRANCH to .
803 RLAX_T ; you should see -8 -->
814 MOV #.,PC \ BRANCH to .
817 RLAX_T ; you should see -256 -->
833 MOV #.,PC \ BRANCH to .
836 ADDX_T ; you should see -1 -->
853 MOV #.,PC \ BRANCH to .
856 ADDX_T ; you should see -1 -->
868 MOV #.,PC \ BRANCH to .
871 ADDX_T ; you should see -2 -->
883 MOV #.,PC \ BRANCH to .
886 ADDX_T ; you should see -8 -->
903 MOV #.,PC \ BRANCH to .
906 SUBX_T ; you should see 1 -->
923 MOV #.,PC \ BRANCH to .
926 SUBX_T ; you should see 1 -->
938 MOV #.,PC \ BRANCH to .
941 SUBX_T ; you should see 2 -->
953 MOV #.,PC \ BRANCH to .
956 SUBX_T ; you should see 8 -->
960 CODE SUBX_T \ W register = R10
961 MOV #15,W \ RPT [W] times, modulo 16 <--> RPT #16
969 MOV #.,PC \ BRANCH to .
972 SUBX_T ; you should see 16 -->
977 MOV #32,W \ RPT [W] times, modulo 16 <--> RPT #1
985 MOV #.,PC \ BRANCH to .
988 SUBX_T ; you should see 1 -->
993 MOV #33,W \ RPT [W] times, modulo 16 <--> RPT #2
1001 MOV #.,PC \ BRANCH to .
1004 SUBX_T ; you should see 2 -->