1 ; -*- coding: utf-8 -*-
3 ; Fast Forth For Texas Instrument MSP430FR4133
5 ; Copyright (C) <2016> <J.M. THOORENS>
7 ; This program is free software: you can redistribute it and/or modify
8 ; it under the terms of the GNU General Public License as published by
9 ; the Free Software Foundation, either version 3 of the License, or
10 ; (at your option) any later version.
12 ; This program is distributed in the hope that it will be useful,
13 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ; GNU General Public License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ; ======================================================================
21 ; INIT MSP-EXP430FR4133 board
22 ; ======================================================================
25 ; http://www.ebay.fr/itm/CP2102-USB-UART-Board-mini-Data-Transfer-Convertor-Module-Development-Board-/251433941479
27 ; for sd card socket be carefull : pin CD must be present !
28 ; http://www.ebay.com/itm/2-PCS-SD-Card-Module-Slot-Socket-Reader-For-Arduino-MCU-/181211954262?pt=LH_DefaultDomain_0&hash=item2a3112fc56
31 ; J101 eZ-FET <-> target
32 ; -----------------------
34 ; P3 <-> P4 - TEST - TEST
35 ; P5 <-> P6 - RST - RST
36 ; P7 <-> P8 - TX1 - P1.0 UCA0 TXD ---> RX UARTtoUSB module
37 ; P9 <->P10 - RX1 - P1.1 UCA0 RXD <--- TX UARTtoUSB module
38 ; P11<->P12 - CTS - P2.4
39 ; P13<->P14 - RTS - P2.3
40 ; P15<->P16 - VCC - 3V3
42 ; P19<->P20 - GND - VSS
44 ; Launchpad Header Left J1
45 ; ------------------------
57 ; Launchpad Header Right J2
58 ; -------------------------
60 ; P2 - P1.7 TA0.1/TDO/A7
61 ; P3 - P1.6 TA0.2/TDI/TCLK/A6
64 ; P6 - P5.2 UCB0SIMO/UCB0SDA
65 ; P7 - P5.3 UCB0SOMI/UCB0SCL
66 ; P8 - P1.3 UCA0STE/A3
67 ; P9 - P1.4 MCLK/TCK/A4
68 ; P10- P1.5 TA0CLK/TMS/A5
121 ; ===================================================================================
122 ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
123 ; then wire VCC and GND of bridge onto J13 connector
124 ; ===================================================================================
126 ; ---------------------------------------------------
127 ; MSP - MSP-EXP430FR4133 LAUNCHPAD <--> OUTPUT WORLD
128 ; ---------------------------------------------------
134 ; +-4k7-< DeepRST <-- GND
136 ; P1.0 - UCA0 TXD J101.8 --+-> RX UARTtoUSB bridge
137 ; P1.1 - UCA0 RXD J101.10 <---- TX UARTtoUSB bridge
138 ; P2.3 - RTS J101.14 ----> CTS UARTtoUSB bridge (if TERMINALCTSRTS option)
139 ; VCC - J101.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
140 ; GND - J101.20 <---> GND (optional supply from UARTtoUSB bridge)
142 ; P2.7 - J1.5 <---- OUT IR_Receiver (1 TSOP32236)
144 ; P4.1 - LFXI 32768Hz quartz
145 ; P4.2 - LFXO 32768Hz quartz
147 ; P5.2 - UCB0 SDA/SIMO J2.6 <---> SDA I2C Slave
148 ; P5.3 - UCB0 SCL/SOMI J2.7 <---- SCL I2C Slave
150 ; P5.1 - UCB0 CLK J1.7 ----> orange SD_CLK
151 ; P5.2 - UCB0 SDA/SIMO J2.6 ----> grey SD_SDI
152 ; P5.3 - UCB0 SCL/SOMI J2.7 <---- purple SD_SDO
153 ; P8.0 - J1.6 <---- violin SD_CD (Card Detect)
154 ; P8.1 - J1.2 ----> brown SD_CS (Card Select)
156 ; P8.2 - Soft I2C_Master J1.9 ----> SDA software I2C Master
157 ; P8.3 - Soft I2C_Master J1.10 <---> SCL software I2C Master
160 ; ----------------------------------------------------------------------
161 ; INIT order : WDT, GPIOs, FRAM, Clock, UARTs...
162 ; ----------------------------------------------------------------------
164 ; ----------------------------------------------------------------------
165 ; POWER ON RESET AND INITIALIZATION : LOCK PMM_LOCKLPM5
166 ; ----------------------------------------------------------------------
168 ; BIS #LOCKLPM5,&PM5CTL0 ; unlocked by WARM
170 ; ----------------------------------------------------------------------
171 ; POWER ON RESET AND INITIALIZATION : WATCHDOG TIMER A
172 ; ----------------------------------------------------------------------
175 MOV #WDTPW+WDTHOLD+WDTCNTCL,&WDTCTL ; stop WDT
177 ; ----------------------------------------------------------------------
178 ; POWER ON RESET AND INITIALIZATION : I/O
179 ; ----------------------------------------------------------------------
181 ; ----------------------------------------------------------------------
182 ; POWER ON RESET AND INITIALIZATION : PORT1/2
183 ; ----------------------------------------------------------------------
185 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
190 ; P1.0 - TX0 --> JP1 --> red LED1 --> GND
193 Deep_RST_IN .equ P1IN ; TERMINAL TX pin as FORTH Deep_RST
195 TERM_TXRX .equ 003h ; TX RX
200 .IFDEF TERMINALCTSRTS
202 ; RTS output is wired to the CTS input of UART2USB bridge
203 ; CTS is not used by FORTH terminal
204 ; configure RTS as output high to disable RX TERM during start FORTH
206 HANDSHAKOUT .set P2OUT
208 RTS .set 8 ; P2.3 bit position
209 ;CTS .set 10h ; P2.4 bit position
211 BIS #00800h,&PADIR ; all pins as input else RTS P2.3
212 BIS #-1,&PAREN ; all input pins with resistor
213 MOV #-1,&PAOUT ; that acts as pull up, and P2.3 as output HIGH
217 ; PORTx default wanted state : pins as input with pullup resistor
219 MOV #-1,&PAOUT ; OUT1 for all pins
220 BIS #-1,&PAREN ; all pins with pullup resistors
224 ; ----------------------------------------------------------------------
225 ; POWER ON RESET AND INITIALIZATION : PORT3/4
226 ; ----------------------------------------------------------------------
228 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
234 ; P4.1 - LFXI 32768Hz quartz
235 ; P4.2 - LFXO 32768Hz quartz
237 ; PORTx default wanted state : pins as input with pullup resistor
239 MOV #00100h,&PBDIR ; all pins as inputs else P4.0
240 MOV #0FEFFh,&PBOUT ; OUT1 for all pins else P4
241 BIS #0FEFFh,&PBREN ; pullup for all pins resistors else P4.0
243 ; ----------------------------------------------------------------------
244 ; POWER ON RESET AND INITIALIZATION : PORT5/6
245 ; ----------------------------------------------------------------------
247 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
249 ; PORTx default wanted state : pins as input with pullup resistor
251 MOV #-1,&PCOUT ; all pins OUT1
252 BIS #-1,&PCREN ; all pins with pull resistors
254 ; ----------------------------------------------------------------------
255 ; POWER ON RESET AND INITIALIZATION : PORT7/8
256 ; ----------------------------------------------------------------------
258 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
260 ; PORTx default wanted state : pins as input with pullup resistor
262 MOV #-1,&PDOUT ; all pins OUT1
263 BIS #-1,&PDREN ; all pins with pull resistors
265 ; ----------------------------------------------------------------------
267 ; ----------------------------------------------------------------------
270 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
271 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
272 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
275 ; ----------------------------------------------------------------------
276 ; POWER ON RESET SYS config
277 ; ----------------------------------------------------------------------
279 ; BIC #1,&SYSCFG0 ; enable write program in FRAM
280 MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
282 ; ----------------------------------------------------------------------
283 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
284 ; ----------------------------------------------------------------------
286 ; CS code for EXP430FR4133
288 ; to measure REFO frequency, output ACLK on P8.1:
291 ; result : REFO = ? kHz
294 ; ===================================================================
295 ; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
296 ; (no problem with MSP430FR5xxx families without FLL).
297 ; ===================================================================
301 MOV #0D6h,&CSCTL0 ; preset DCO = 0xD6 (measured value @ 0x180 ; to measure, type 0x180 @ U.)
303 MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
304 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
305 ; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
306 ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
307 ; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
308 ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
309 MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
310 ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
311 ; =====================================
314 .ELSEIF FREQUENCY = 1
316 MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
318 MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
319 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
320 ; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
321 ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
322 MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
323 ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
324 ; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
325 ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
326 ; =====================================
329 .ELSEIF FREQUENCY = 2
331 MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
333 MOV #0003h,&CSCTL1 ; Set 2MHZ DCORSEL,disable DCOFTRIM,Modulation
334 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
335 ; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
336 ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
337 MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
338 ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
339 ; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
340 ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
341 ; =====================================
344 .ELSEIF FREQUENCY = 4
346 MOV #00D2h,&CSCTL0 ; preset DCO = 0xD2 (measured value @ 0x180)
348 MOV #0005h,&CSCTL1 ; Set 4MHZ DCORSEL,disable DCOFTRIM,Modulation
349 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
350 ; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
351 ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
353 MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
354 ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
356 ; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
357 ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
358 ; =====================================
361 .ELSEIF FREQUENCY = 8
363 MOV #00F2h,&CSCTL0 ; preset DCO = 0xF2 (measured value @ 0x180)
365 MOV #0007h,&CSCTL1 ; Set 8MHZ DCORSEL,disable DCOFTRIM,Modulation
366 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
367 ; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
368 ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
369 ; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
370 ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
371 MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
372 ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
374 ; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
375 ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
376 ; works with cp2102 and pl2303TA
377 ; =====================================
380 .ELSEIF FREQUENCY = 16
382 MOV #0129h,&CSCTL0 ; preset DCO = 0x129 (measured value @ 0x180)
384 MOV #000Bh,&CSCTL1 ; Set 16MHZ DCORSEL,disable DCOFTRIM,Modulation
385 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
386 ; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
387 ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
388 ; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
389 ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
390 ; MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
391 ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
392 MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
393 ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
394 ; =====================================
398 .error "bad frequency setting, only 0.5,1,2,4,8,16 MHz"
402 ; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
403 MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
405 MOV #0010h,&CSCTL3 ; FLL select REFCLOCK, FLLREFDIV=0
406 ; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
410 BIS &SYSRSTIV,&SAVE_SYSRSTIV; store volatile SYSRSTIV with preserving a pending request for DEEP_RST
411 CMP #2,&SAVE_SYSRSTIV ; POWER ON ?
412 JZ ClockWaitX ; yes : wait 600ms to stabilize power source
413 .word 0359h ; no : RRUM #1,X --> wait still 300 ms...
414 ; ...because FLL lock time = 280 ms
416 ClockWaitX MOV #50000,Y ;
417 ClockWaitY SUB #1,Y ; 3 cycles loop
418 JNZ ClockWaitY ; 50000x3 = 150000 cycles delay = 150ms @ 1MHz
423 ; ----------------------------------------------------------------------
424 ; POWER ON RESET AND INITIALIZATION : RTC REGISTERS
425 ; ----------------------------------------------------------------------
428 ; LFXIN : P4.1, LFXOUT : P4.2
429 MOV #0600h,&PBSEL0 ; SEL0 for only P4.1,P4.2