1 ; -*- coding: utf-8 -*-
4 ; Fast Forth For Texas Instrument MSP430FR247
6 ; Copyright (C) <2014> <J.M. THOORENS>
8 ; This program is free software: you can redistribute it and/or modify
9 ; it under the terms of the GNU General Public License as published by
10 ; the Free Software Foundation, either version 3 of the License, or
11 ; (at your option) any later version.
13 ; This program is distributed in the hope that it will be useful,
14 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ; GNU General Public License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
21 ; ===================================================================================
22 ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
23 ; ===================================================================================
25 ; J101 Target J101 eZ-FET UARTtoUSB
30 ; P1.5 UCA0_RX 8 o--o 7 <------------ TX UARTtoUSB
31 ; P1.4 UCA0_TX 6 o--o 5 <---------+-> RX UARTtoUSB
32 ; SBWTDIO/RST 4 o--o 3 | _
33 ; SBWTCK/TST 2 o--o 1 +--4k7---o o-- GND
36 ; VCC - ----> VCC SD_CardAdapter
37 ; GND - <---> GND SD_CardAdapter
38 ; P2.4 - UCA1 CLK J2 ----> CLK SD_CardAdapter (SCK)
39 ; P2.6 - UCA1 TXD/SIMO J1 ----> SDI SD_CardAdapter (MOSI)
40 ; P2.5 - UCA1 RXD/SOMI J1 <---- SDO SD_CardAdapter (MISO)
41 ; P1.6 - J4 ----> CS SD_CardAdapter (Card Select)
42 ; P1.7 - J4 <---- CD SD_CardAdapter (Card Detect)
44 ; ======================================================================
45 ; LP_MSP430FR2476 board
46 ; ======================================================================
50 ; P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6
51 ; P2.5/UCA1RXD/UCA1SOMI/CAP1.2
52 ; P2.6/UCA1TXD/UCA1SIMO/CAP1.3
53 ; P2.2/SYNC/ACLK/COMP0.1
54 ; P5.4/UCB1STE/TA3CLK/A11
55 ; P3.5/UCB1CLK/TB0TRG/CAP3.1
56 ; P4.5/UCB0SOMI/UCB0SCL/TA3.2
57 ; P1.3/UCB0SOMI/UCB0SCL/MCLK/A3
58 ; P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/VEREF-
64 ; P1.7/UCA0STE/SMCLK/TDO/A7
65 ; P4.3/UCB1SOMI/UCB1SCL/TB0.5/A8
66 ; P4.4/UCB1SIMO/UCB1SDA/TB0.6/A9
67 ; P5.3/UCB1CLK/TA3.0/A10
68 ; P1.0/UCB0STE/TA0CLK/A0/VEREF+ -<J7>- LED1
69 ; P1.1/UCB0CLK/TA0.1/COMP0.0/A1 --- TEMPERATURE SENSOR ---<J9>--- 3V3
74 ; P5.2/UCA0TXD/UCA0SIMO/TB0.4
75 ; P5.1/UCA0RXD/UCA0SOMI/TB0.3 -<J8>- LED2Red
76 ; P5.0/UCA0CLK/TB0.2 -<J8>- LED2Green
77 ; P4.7/UCA0STE/TB0.1 -<J8>- LED2Blue
87 ; P4.6/UCB0SIMO/UCB0SDA/TA3.1
91 ; P3.2/UCB1SIMO/UCB1SDA/CAP3.2
92 ; P3.6/UCB1SOMI/UCB1SCL/CAP3.3
98 ; P4.0/TA3.1/CAP2.1 - S1
99 ; P2.3/TA2.0/CAP0.2 - S2
111 ; ----------------------------------------------------------------------
112 ; INIT order : LOCK I/O, WDT, GPIOs, FRAM, Clock, UARTs
113 ; ----------------------------------------------------------------------
115 ; ----------------------------------------------------------------------
116 ; POWER ON RESET AND INITIALIZATION : LOCK PMM_LOCKLPM5
117 ; ----------------------------------------------------------------------
118 ; BIS #LOCKLPM5,&PM5CTL0 ; unlocked by WARM
120 ; ----------------------------------------------------------------------
121 ; POWER ON RESET AND INITIALIZATION : WATCHDOG TIMER A
122 ; ----------------------------------------------------------------------
124 MOV #WDTPW+WDTHOLD+WDTCNTCL,&WDTCTL ; stop WDT
126 ; ----------------------------------------------------------------------
127 ; POWER ON RESET AND INITIALIZATION : I/O
128 ; ----------------------------------------------------------------------
129 ; ----------------------------------------------------------------------
130 ; POWER ON RESET AND INITIALIZATION : PORT1/2
131 ; ----------------------------------------------------------------------
133 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
136 ; P1.0 - LED1 green output low
138 ; PORTx default wanted state : pins as input with pullup resistor
140 BIS #-1,&PAREN ; all pins with pull up/down resistors
141 MOV #0FFFEh,&PAOUT ; all pins with pull up resistors else P1.0 (LED2)
144 ; P1.4 UCA0-TXD --> USB2UART RXD
145 ; P1.5 UCA0-RXD <-- USB2UART TXD
146 TXD .equ 10h ; P1.4 = TX + FORTH Deep_RST pin
147 RXD .equ 20h ; P1.5 = RX
155 SD_SEL .equ PASEL0 ; to configure UCA1
156 SD_REN .equ PAREN ; to configure pullup resistors
157 SD_BUS .equ 7000h ; pins P2.4 as UCA1CLK, P2.6 as UCA1SIMO & P2.5 as UCA1SOMI
160 SD_CD .equ 080h ; P1.7 as SD_CD
161 SD_CS .equ 040h ; P1.6 as SD_CS
166 ; ----------------------------------------------------------------------
167 ; POWER ON RESET AND INITIALIZATION : PORT3/4
168 ; ----------------------------------------------------------------------
169 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
171 BIS #-1,&PBREN ; all pins 1 with pull up/down resistors
172 MOV #07FFFh,&PBOUT ; all pins with pull up resistors else P4.7 (LED2B)
182 ; ----------------------------------------------------------------------
183 ; POWER ON RESET AND INITIALIZATION : PORT5/6
184 ; ----------------------------------------------------------------------
185 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
187 ; BIS #00003h,&PCDIR ; all pins 0 as input else P5.0 (LED2G) P5.1 (LED2R)
188 ; MOV #0FFFCh,&PCOUT ; all pins high else P5.0 (LED2G) P5.1 (LED2R)
189 ; BIS #0FFFCh,&PCREN ; all pins with pull resistors else P5.0 (LED2G) P5.1 (LED2R)
191 BIS #-1,&PCREN ; all pins with pull up/down resistors
192 MOV #0FFFCh,&PCOUT ; all pins with pull up resistors else P5.0 (LED2G) P5.1 (LED2R)
196 ; LED2R - J8 - P5.1 red LED
201 .IFDEF TERMINAL4WIRES
202 ; RTS output is wired to the CTS input of UART2USB bridge
203 ; configure RTS as output high to disable RX TERM during start FORTH
204 HANDSHAKOUT .equ P6OUT
207 BIS.B #RTS,&P6DIR ; RTS as output high
208 .IFDEF TERMINAL5WIRES
209 ; CTS input must be wired to the RTS output of UART2USB bridge
210 ; configure CTS as input low (true) to avoid lock when CTS is not wired
212 BIC.B #CTS,&P6OUT ; CTS input pulled down
213 .ENDIF ; TERMINAL5WIRES
214 .ENDIF ; TERMINAL4WIRES
216 ; ----------------------------------------------------------------------
218 ; ----------------------------------------------------------------------
221 MOV.B #0A5h,&FRCTL0_H ; enable FRCTL0 access
222 MOV.B #10h,&FRCTL0 ; 1 waitstate @ 16 MHz
223 MOV.B #01h,&FRCTL0_H ; disable FRCTL0 access
226 ; ----------------------------------------------------------------------
227 ; POWER ON RESET SYS config
228 ; ----------------------------------------------------------------------
231 ; BIC #1,&SYSCFG0 ; enable write program in FRAM
232 MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
234 ; ----------------------------------------------------------------------
235 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
236 ; ----------------------------------------------------------------------
238 ; CS code for MSP430FR2476
240 ; to measure REFO frequency, output ACLK on P2.2:
243 ; result : REFO = xx.xx kHz
245 ; ======================================================================
246 ; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
247 ; (no problem with MSP430FR5xxx families without FLL).
248 ; ======================================================================
250 ; .IF FREQUENCY = 0.5
252 ; MOV #0D6h,&CSCTL0 ; preset DCO = 0xD6 (measured value @ 0x180 ; to measure, type 0x180 @ U.)
254 ; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
255 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
256 ;; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
257 ; ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
258 ;; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
259 ; ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
260 ; MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
261 ; ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
262 ;; =====================================
265 ; .ELSEIF FREQUENCY = 1
267 ; MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
269 ; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
270 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
271 ;; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
272 ; ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
273 ; MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
274 ; ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
275 ;; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
276 ; ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
277 ;; =====================================
280 ; .ELSEIF FREQUENCY = 2
282 ; MOV #00B4h,&CSCTL0 ; preset DCO = 0xB4 (measured value @ 0x180 ; to measure, type HEX 0x180 ?)
284 ; MOV #0003h,&CSCTL1 ; Set 2MHZ DCORSEL,disable DCOFTRIM,Modulation
285 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
286 ;; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
287 ; ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
288 ;; MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
289 ; ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
290 ; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
291 ; ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
292 ;; =====================================
295 ; .ELSEIF FREQUENCY = 4
297 ; MOV #00D2h,&CSCTL0 ; preset DCO = 0xD2 (measured value @ 0x180)
299 ; MOV #0005h,&CSCTL1 ; Set 4MHZ DCORSEL,disable DCOFTRIM,Modulation
300 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
301 ;; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
302 ; ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
304 ; MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
305 ; ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
307 ;; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
308 ; ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
309 ;; =====================================
312 ; .ELSEIF FREQUENCY = 8
315 ; MOV #00F3h,&CSCTL0 ; preset DCO = 0xF2 (measured value @ 0x180)
317 ; MOV #0007h,&CSCTL1 ; Set 8MHZ DCORSEL,disable DCOFTRIM,Modulation
318 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
319 ;; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
320 ; ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
321 ;; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
322 ; ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
323 ; MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
324 ; ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
326 ;; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
327 ; ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
329 ;; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
330 ;; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
332 ;; =====================================
335 ; .ELSEIF FREQUENCY = 16
337 ; MOV #0129h,&CSCTL0 ; preset DCO = 0x129 (measured value @ 0x180)
339 ; MOV #000Bh,&CSCTL1 ; Set 16MHZ DCORSEL,disable DCOFTRIM,Modulation
340 ;; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
341 ;; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
342 ; ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
343 ;; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
344 ; ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
345 ;; MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
346 ; ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
347 ; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
348 ; ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
349 ;; =====================================
354 ; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
355 ; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
356 MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
357 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
358 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
359 ; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
360 ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
361 ; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
362 ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
363 MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
364 ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
365 ; =====================================
368 .ELSEIF FREQUENCY = 1
370 ; MOV #100h,&CSCTL0 ; preset DCO = 256
371 ; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
372 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
373 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
374 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
375 ; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
376 ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
377 MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
378 ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
379 ; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
380 ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
381 ; =====================================
384 .ELSEIF FREQUENCY = 2
386 ; MOV #100h,&CSCTL0 ; preset DCO = 256
387 ; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
388 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
389 MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
390 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
391 ; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
392 ; fCOCLKDIV = 32768 x (59+1) = 1.966 MHz ; measured : MHz
393 MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
394 ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
395 ; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
396 ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
397 ; =====================================
400 .ELSEIF FREQUENCY = 4
402 ; MOV #100h,&CSCTL0 ; preset DCO = 256
403 ; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
404 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
405 MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
406 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
407 ; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
408 ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
410 MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
411 ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
413 ; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
414 ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
415 ; =====================================
418 .ELSEIF FREQUENCY = 8
420 ; MOV #100h,&CSCTL0 ; preset DCO = 256
421 ; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
422 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
423 MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
424 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
425 ; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
426 ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
427 ; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
428 ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
429 MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
430 ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
432 ; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
433 ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
435 ; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
436 ; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
438 ; =====================================
441 .ELSEIF FREQUENCY = 12
443 ; MOV #100h,&CSCTL0 ; preset DCO = 256
444 ; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
445 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
446 MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
447 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
448 ; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
449 ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
450 ; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
451 ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
452 MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
453 ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
454 ; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
455 ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
456 ; =====================================
459 .ELSEIF FREQUENCY = 16
461 ; MOV #100h,&CSCTL0 ; preset DCO = 256
462 ; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
463 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
464 MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
465 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
466 ; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
467 ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
468 ; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
469 ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
470 MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
471 ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
472 ; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
473 ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
474 ; =====================================
478 .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
482 ; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
483 MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
485 BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
486 ; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
489 BIS &SYSRSTIV,&SAVE_SYSRSTIV; store volatile SYSRSTIV preserving a pending request for DEEP_RST
491 ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POR
493 ClockWaitY SUB #1,Y ;1
494 JNZ ClockWaitY ;2 5209x3 = 15627 cycles delay = 15.627ms @ 1MHz
495 SUB #1,X ; x 16 @ 1 MHZ = 250ms
496 JNZ ClockWaitX ; time to stabilize power source ( 500ms )
498 ;WAITFLL BIT #300h,&CSCTL7 ; wait FLL lock