1 ; -*- coding: utf-8 -*-
3 ; Fast Forth For Texas Instrument MSP430FR4133
5 ; Copyright (C) <2016> <J.M. THOORENS>
7 ; This program is free software: you can redistribute it and/or modify
8 ; it under the terms of the GNU General Public License as published by
9 ; the Free Software Foundation, either version 3 of the License, or
10 ; (at your option) any later version.
12 ; This program is distributed in the hope that it will be useful,
13 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ; GNU General Public License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ; ======================================================================
21 ; INIT MSP-EXP430FR4133 board
22 ; ======================================================================
25 ; http://www.ebay.fr/itm/CP2102-USB-UART-Board-mini-Data-Transfer-Convertor-Module-Development-Board-/251433941479
27 ; for sd card socket be carefull : pin CD must be present !
28 ; http://www.ebay.com/itm/2-PCS-SD-Card-Module-Slot-Socket-Reader-For-Arduino-MCU-/181211954262?pt=LH_DefaultDomain_0&hash=item2a3112fc56
31 ; J101 eZ-FET <-> target
32 ; -----------------------
34 ; P3 <-> P4 - TEST - TEST
35 ; P5 <-> P6 - RST - RST
36 ; P7 <-> P8 - TX1 - P1.0 UCA0 TXD ---> RX UARTtoUSB module
37 ; P9 <->P10 - RX1 - P1.1 UCA0 RXD <--- TX UARTtoUSB module
38 ; P11<->P12 - CTS - P2.4
39 ; P13<->P14 - RTS - P2.3
40 ; P15<->P16 - VCC - 3V3
42 ; P19<->P20 - GND - VSS
44 ; Launchpad Header Left J1
45 ; ------------------------
57 ; Launchpad Header Right J2
58 ; -------------------------
60 ; P2 - P1.7 TA0.1/TDO/A7
61 ; P3 - P1.6 TA0.2/TDI/TCLK/A6
64 ; P6 - P5.2 UCB0SIMO/UCB0SDA
65 ; P7 - P5.3 UCB0SOMI/UCB0SCL
66 ; P8 - P1.3 UCA0STE/A3
67 ; P9 - P1.4 MCLK/TCK/A4
68 ; P10- P1.5 TA0CLK/TMS/A5
121 ; ===================================================================================
122 ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
123 ; then wire VCC and GND of bridge onto J13 connector
124 ; ===================================================================================
126 ; ---------------------------------------------------
127 ; MSP - MSP-EXP430FR4133 LAUNCHPAD <--> OUTPUT WORLD
128 ; ---------------------------------------------------
134 ; +-4k7-< DeepRST <-- GND
136 ; P1.0 - UCA0 TXD J101.8 --+-> RX UARTtoUSB bridge
137 ; P1.1 - UCA0 RXD J101.10 <---- TX UARTtoUSB bridge
138 ; P2.3 - RTS J101.14 ----> CTS UARTtoUSB bridge (if TERMINALCTSRTS option)
139 ; VCC - J101.16 <---- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
140 ; GND - J101.20 <---> GND (optional supply from UARTtoUSB bridge)
142 ; P2.7 - J1.5 <---- OUT IR_Receiver (1 TSOP32236)
144 ; P4.1 - LFXI 32768Hz quartz
145 ; P4.2 - LFXO 32768Hz quartz
147 ; P5.2 - UCB0 SDA/SIMO J2.6 <---> SDA I2C Slave
148 ; P5.3 - UCB0 SCL/SOMI J2.7 <---- SCL I2C Slave
150 ; P5.1 - UCB0 CLK J1.7 ----> orange SD_CLK
151 ; P5.2 - UCB0 SDA/SIMO J2.6 ----> grey SD_SDI
152 ; P5.3 - UCB0 SCL/SOMI J2.7 <---- purple SD_SDO
153 ; P8.0 - J1.6 <---- violin SD_CD (Card Detect)
154 ; P8.1 - J1.2 ----> brown SD_CS (Card Select)
156 ; P8.2 - Soft I2C_Master J1.9 ----> SDA software I2C Master
157 ; P8.3 - Soft I2C_Master J1.10 <---> SCL software I2C Master
160 ; ----------------------------------------------------------------------
161 ; POWER ON RESET AND INITIALIZATION : I/O
162 ; ----------------------------------------------------------------------
164 ; ----------------------------------------------------------------------
165 ; POWER ON RESET AND INITIALIZATION : PORT1/2
166 ; ----------------------------------------------------------------------
168 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
170 BIS #-1,&PAREN ; all input pins with resistor
171 BIS #-1,&PAOUT ; all pins with PULLUP resistor
175 ; P1.0 - TX0 --> JP1 --> red LED1 --> GND
179 SW1 .equ 4 ; P1.2 = S1
182 IO_WIPE .equ 4 ; P1.2 = S1 = FORTH Deep_RST pin
188 TXD .equ 1 ; P1.0 = TXD
190 BUS_TERM .equ 003h ; TX RX
193 HANDSHAKOUT .set P2OUT
195 RTS .set 8 ; P2.3 bit position
196 CTS .set 10h ; P2.4 bit position
198 .IFDEF TERMINAL4WIRES
199 ; RTS output is wired to the CTS input of UART2USB bridge
200 ; configure RTS as output high to disable RX TERM during start FORTH
201 BIS.B #RTS,&P2DIR ; RTS as output high
202 .IFDEF TERMINAL5WIRES
203 BIC.B #CTS,&P2OUT ; CTS input pulled down
204 .ENDIF ; TERMINAL5WIRES
205 .ENDIF ; TERMINAL4WIRES
208 SW2 .equ 40h ; P2.6 = S2
210 ; ----------------------------------------------------------------------
211 ; POWER ON RESET AND INITIALIZATION : PORT3/4
212 ; ----------------------------------------------------------------------
214 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
216 BIS #0FEFFh,&PBREN ; pullup for all pins resistors else P4.0
217 MOV #-1,&PBOUT ; OUT1 for all pins else P4
223 ; P4.1 - LFXI 32768Hz quartz
224 ; P4.2 - LFXO 32768Hz quartz
228 LED2 .equ 1 ; P4.0 LED2 green
230 ; PORTx default wanted state : pins as input with pullup resistor
232 ; ----------------------------------------------------------------------
233 ; POWER ON RESET AND INITIALIZATION : PORT5/6
234 ; ----------------------------------------------------------------------
236 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
238 BIS #-1,&PCREN ; all pins with pull resistors
239 MOV #-1,&PCOUT ; all pins OUT1
252 SD_SEL .equ PCSEL0 ; to configure UCB0
253 SD_REN .equ PCREN ; to configure pullup resistors
254 BUS_SD .equ 000Eh ; pins P5.1 as UCB0CLK, P5.2 as UCB0SIMO & P5.3 as UCB0SOMI
256 ; PORTx default wanted state : pins as input with pullup resistor
258 ; ----------------------------------------------------------------------
259 ; POWER ON RESET AND INITIALIZATION : PORT7/8
260 ; ----------------------------------------------------------------------
262 BIS #-1,&PDREN ; all pins with pull resistors
263 MOV #-1,&PDOUT ; all pins OUT1
271 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
273 ; PORTx default wanted state : pins as input with pullup resistor
275 ; ----------------------------------------------------------------------
277 ; ----------------------------------------------------------------------
280 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
281 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
282 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
285 ; ----------------------------------------------------------------------
286 ; POWER ON RESET SYS config
287 ; ----------------------------------------------------------------------
289 ; BIC #1,&SYSCFG0 ; enable write program in FRAM
290 MOV #0A500h,&SYSCFG0 ; enable write MAIN and INFO
292 ; ----------------------------------------------------------------------
293 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
294 ; ----------------------------------------------------------------------
296 ; CS code for EXP430FR4133
298 ; to measure REFO frequency, output ACLK on P8.1:
301 ; result : REFO = ? kHz
304 ; ===================================================================
305 ; need to adjust FLLN (and DCO) for each device of MSP430fr2xxx family ?
306 ; (no problem with MSP430FR5xxx families without FLL).
307 ; ===================================================================
311 ; MOV #058h,&CSCTL0 ; preset DCO = measured value @ 0x180 (88)
312 ; MOV #0001h,&CSCTL1 ; Set 1MHZ DCORSEL,disable DCOFTRIM,Modulation
313 MOV #1ED1h,&CSCTL0 ; preset MOD=31, DCO = measured value @ 0x180 (209)
314 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
315 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
316 ; MOV #100Dh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Dh
317 ; fCOCLKDIV = 32768 x (13+1) = 0.459 MHz ; measured : MHz
318 ; MOV #100Eh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Eh
319 ; fCOCLKDIV = 32768 x (14+1) = 0.491 MHz ; measured : MHz
320 MOV #100Fh,&CSCTL2 ; Set FLLD=1 (DCOCLKCDIV=DCO/2),set FLLN=0Fh
321 ; fCOCLKDIV = 32768 x (15+1) = 0.524 MHz ; measured : MHz
322 ; =====================================
325 .ELSEIF FREQUENCY = 1
327 ; MOV #100h,&CSCTL0 ; preset DCO = 256
328 ; MOV #00B1h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
329 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
330 MOV #00B0h,&CSCTL1 ; Set 1MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
331 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
332 ; MOV #001Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Dh
333 ; fCOCLKDIV = 32768 x (29+1) = 0.983 MHz ; measured : 0.989MHz
334 MOV #001Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Eh
335 ; fCOCLKDIV = 32768 x (30+1) = 1.015 MHz ; measured : 1.013MHz
336 ; MOV #001Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1Fh
337 ; fCOCLKDIV = 32768 x (31+1) = 1.049 MHz ; measured : 1.046MHz
338 ; =====================================
341 .ELSEIF FREQUENCY = 2
343 ; MOV #100h,&CSCTL0 ; preset DCO = 256
344 ; MOV #00B3h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
345 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
346 MOV #00B2h,&CSCTL1 ; Set 2MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
347 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
348 ; MOV #003Bh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Bh
349 ; fCOCLKDIV = 32768 x (59+1) = 1.996 MHz ; measured : MHz
350 MOV #003Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Ch
351 ; fCOCLKDIV = 32768 x (60+1) = 1.998 MHz ; measured : MHz
352 ; MOV #003Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=3Dh
353 ; fCOCLKDIV = 32768 x (61+1) = 2.031 MHz ; measured : MHz
354 ; =====================================
357 .ELSEIF FREQUENCY = 4
359 ; MOV #100h,&CSCTL0 ; preset DCO = 256
360 ; MOV #00B5h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
361 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
362 MOV #00B4h,&CSCTL1 ; Set 4MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
363 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
364 ; MOV #0078h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=78h
365 ; fCOCLKDIV = 32768 x (120+1) = 3.965 MHz ; measured : 3.96MHz
367 MOV #0079h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=79h
368 ; fCOCLKDIV = 32768 x (121+1) = 3.997 MHz ; measured : 3.99MHz
370 ; MOV #007Ah,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=7Ah
371 ; fCOCLKDIV = 32768 x (122+1) = 4.030 MHz ; measured : 4.020MHz
372 ; =====================================
375 .ELSEIF FREQUENCY = 8
377 ; MOV #100h,&CSCTL0 ; preset DCO = 256
378 ; MOV #00B7h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
379 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
380 MOV #00B6h,&CSCTL1 ; Set 8MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
381 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
382 ; MOV #00F2h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F2h
383 ; fCOCLKDIV = 32768 x (242+1) = 7.963 MHz ; measured : 7.943MHz
384 ; MOV #00F3h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F3h
385 ; fCOCLKDIV = 32768 x (243+1) = 7.995 MHz ; measured : 7.976MHz
386 MOV #00F4h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F4h
387 ; fCOCLKDIV = 32768 x (244+1) = 8.028 MHz ; measured : 8.009MHz
389 ; MOV #00F5h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=F5h
390 ; fCOCLKDIV = 32768 x (245+1) = 8.061 MHz ; measured : 8.042MHz
392 ; MOV #00F8h,&CSCTL2 ; don't work with cp2102 (by low value)
393 ; MOV #00FAh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=FAh
395 ; =====================================
398 .ELSEIF FREQUENCY = 12
400 ; MOV #100h,&CSCTL0 ; preset DCO = 256
401 ; MOV #00B9h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
402 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
403 MOV #00B8h,&CSCTL1 ; Set 12MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
404 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
405 ; MOV #016Ch,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
406 ; fCOCLKDIV = 32768 x 364+1) = 12.960 MHz ; measured : 11.xxxMHz
407 ; MOV #016Dh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
408 ; fCOCLKDIV = 32768 x 365+1) = 11.993 MHz ; measured : 11.xxxMHz
409 MOV #016Eh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
410 ; fCOCLKDIV = 32768 x 366+1) = 12.025 MHz ; measured : 12.xxxMHz
411 ; MOV #016Fh,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
412 ; fCOCLKDIV = 32768 x 367+1) = 12.058 MHz ; measured : 12.xxxMHz
413 ; =====================================
416 .ELSEIF FREQUENCY = 16
418 ; MOV #100h,&CSCTL0 ; preset DCO = 256
419 ; MOV #00BBh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,disable Modulation
420 MOV #1EFFh,&CSCTL0 ; preset MOD=31, DCO=255
421 MOV #00BAh,&CSCTL1 ; Set 16MHZ DCORSEL,enable DCOFTRIM=3h ,enable Modulation to reduce EMI
422 ; ===================================== ; fCOCLKDIV = REFO x (FLLN+1)
423 ; MOV #01E6h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E6h
424 ; fCOCLKDIV = 32768 x 486+1) = 15.958 MHz ; measured : 15.92MHz
425 ; MOV #01E7h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E7h
426 ; fCOCLKDIV = 32768 x 487+1) = 15.991 MHz ; measured : 15.95MHz
427 MOV #01E8h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E8h
428 ; fCOCLKDIV = 32768 x 488+1) = 16.023 MHz ; measured : 15.99MHz
429 ; MOV #01E9h,&CSCTL2 ; Set FLLD=0 (DCOCLKCDIV=DCO),set FLLN=1E9h
430 ; fCOCLKDIV = 32768 x 489+1) = 16.056 MHz ; measured : 16.02MHz
431 ; =====================================
435 .error "bad frequency setting, only 0.5,1,2,4,8,12,16 MHz"
439 ; MOV #0000h,&CSCTL3 ; FLL select XT1, FLLREFDIV=0 (default value)
440 MOV #0000h,&CSCTL4 ; ACLOCK select XT1, MCLK & SMCLK select DCOCLKDIV
442 BIS.B #06,&P4SEL0 ; P4.2 as XOUT, P4.1 as XIN
445 BIS #0010h,&CSCTL3 ; FLL select REFCLOCK
446 ; MOV #0100h,&CSCTL4 ; ACLOCK select REFO, MCLK & SMCLK select DCOCLKDIV (default value)
449 BIS &SYSRSTIV,&SAVE_SYSRSTIV; store volatile SYSRSTIV preserving a pending request for DEEP_RST
450 ; MOV &SAVE_SYSRSTIV,TOS ;
451 ; CMP #2,TOS ; POWER ON ?
452 ; JZ ClockWaitX ; yes
453 ; RRUM #1,X ; wait only 250 ms
454 ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POR
455 ; ...because FLL lock time = 280 ms
456 ClockWaitY SUB #1,Y ;1
457 JNZ ClockWaitY ;2 5209x3 = 15625 cycles delay = 15.625ms @ 1MHz
458 SUB #1,X ; x 32 @ 1 MHZ = 500ms
459 JNZ ClockWaitX ; time to stabilize power source ( 500ms )
461 ;WAITFLL BIT #300h,&CSCTL7 ; wait FLL lock