3 .cpu MSP430X ; define CPU
22 ; ----------------------------------------------
23 ; MACROS FOR assembly instructions
24 ; ----------------------------------------------
25 NOP .macro ; 1 word, 1 cycle
26 .word 4303h ; mov #0, r3
29 NOP2 .macro ; 1 Word, 2 cycles
33 NOP3 .macro ; 1 Word, 3 cycles
34 .word 4000h ; MOV PC,PC
37 ; SR(11:0) bits are saved by interrupts and restored by the instruction RETI
42 CPUOFF .equ 0010h ; CPU Off. 1=turn_off_CPU
43 OSCOFF .equ 0020h ; Oscillator Off. 1=turn_off_LFXT1CLK
44 SCG0 .equ 0040h ; System Clock Generator 0. 1=turn_off_DCO
45 SCG1 .equ 0080h ; System Clock Generator 1. 1=turn_off_SMCLK
47 UF9 .equ 0200h ; = SR(9) User Flag 9
48 UF10 .equ 0400h ; = SR(10) User Flag 10
49 UF11 .equ 0800h ; = SR(11) User Flag 11
50 ;----------------------------------------------------------------------------
52 LPM1 .equ SCG0 + CPUOFF ; for devices with FLL: LPM1 = LPM0 + FLL disabled
53 LPM2 .equ SCG1 + CPUOFF
54 LPM3 .equ SCG1 + SCG0 + CPUOFF
55 LPM4 .equ SCG1 + SCG0 + OSCOFF + CPUOFF
57 ;-------------------------------------------------------------------------------
58 ; DEFINING FORTH REGISTERS - DTC model
59 ;-------------------------------------------------------------------------------
60 RSP .reg R1 ; RSP = Return Stack Pointer (return stack)
63 ; DOxxx registers ; must be saved before use and restored after use
65 rDODOES .reg r5 ; to restore: MOV #XDODOES,rDODOES
66 rDOCON .reg r6 ; to restore: MOV #XDOCON,rDOCON
67 rDOVAR .reg r7 ; to restore: MOV #R>,rDOVAR
69 R .reg r4 ; rDOCOL alias
70 Q .reg r5 ; rDODOES alias
71 P .reg r6 ; rDOCON alias
72 M .reg R7 ; rDOVAR alias
79 ; Forth virtual machine
80 IP .reg R13 ; interpretative pointer
81 TOS .reg R14 ; first PSP cell
82 PSP .reg R15 ; PSP = Parameters Stack Pointer (stack data)
84 ; ----------------------------------------------
85 ; EXECUTIVE WORDS FOR Direct-Threaded Code (DTC)
86 ; ----------------------------------------------
87 ;-------------------------------------------------------------------------------
88 ; very nice FAST FORTH feature:
89 ; as IP is always computed from the PC value, we can place low to high level
90 ; "ASMtoFORTH" or "mDOCOL" switches anywhere in a word, i.e. not only at its
91 ; beginning as ITC competitors.
92 ;-------------------------------------------------------------------------------
95 .CASE 1 ; DOCOL = CALL rDOCOL, [rDOCOL] = XDOCOL
96 ASMtoFORTH .MACRO ; compiled by LO2HI
97 CALL #EXIT ; 10 cycles
98 .ENDM ; 2 words, 10 cycles
99 ; LO2HI + HI2LO = 3 words, 10 cycles.
101 mDOCOL .MACRO ; compiled by : and by colon
102 CALL rDOCOL ; 10 [rDOCOL] = XDOCOL
103 .ENDM ; 1 word, 14 cycles (CALL included) (ITC+4)
104 ; COLON + SEMI = 2 words, 20 cycles (ITC+2)
105 .CASE 2 ; DOCOL = PUSH IP + CALL rDOCOL, [rDOCOL] = EXIT
106 ASMtoFORTH .MACRO ; compiled by LO2HI
107 CALL rDOCOL ; 10 [rDOCOL] = EXIT
108 .ENDM ; 1 word, 10 cycles.
109 ; LO2HI + HI2LO = 2 words, 10 cycles.
111 mDOCOL .MACRO ; compiled by : and by COLON
113 CALL rDOCOL ; 10 [rDOCOL] = EXIT
114 .ENDM ; 2 words, 13 cycles (ITC+3)
115 ; COLON + SEMI = 3 words, 19 cycles (ITC+1)
116 .CASE 3 ; inlined DOCOL
117 ASMtoFORTH .MACRO ; compiled by LO2HI
121 .ENDM ; 6 cycles, 3 words
122 ; LO2HI + HI2LO = 4 words, 6 cycles.
124 mDOCOL .MACRO ; compiled by : and by COLON
129 .ENDM ; 4 words, 9 cycles (ITC-1)
130 ; COLON + SEMI = 5 words, 15 cycles (ITC-3)
135 ; ----------------------------------------------
136 ; INIT VOCABULARY POINTERS and MACROS FOR HEADER
137 ; ----------------------------------------------
138 voclink .set 0 ; init vocabulary links
144 FORTHWORD .MACRO name
147 .byte STRLEN(name),name
151 FORTHWORDIMM .MACRO name
154 .byte STRLEN(name)+128,name
161 .byte STRLEN(name),name
230 ;-------------------------------------------
231 ; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
232 ;-------------------------------------------
233 FORTHWORD .MACRO name
234 CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
333 .byte STRLEN(name),name
336 ;-------------------------------------------
337 ; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
338 ;-------------------------------------------
339 FORTHWORDIMM .MACRO name
340 CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
439 .byte 80h+STRLEN(name),name
442 ;-------------------------------------------
443 ; (THREADS-1)*2 = AND mask to define CURRENT offset in vocabulary
444 ;-------------------------------------------
446 CONTEXTofst .set charfromstr(name,0) & ((THREADS-1)*2)
545 .byte STRLEN(name),name
550 ; -------------------------------------
551 ; define MAIN max bound
552 ; -------------------------------------
553 FRAM_FULL .equ SIGNATURES-40h ; set to protect JTAG and BSL signatures against overwrite.
554 ; 64 bytes are sufficient considering what can be compiled in one line + WORD use.
555 ; take care with ALLOT : don't ALLOT more than 32 words by line!
557 ; --------------------------
558 ; COMPUTE ASSEMBLY SWITCHES
559 ; --------------------------
560 .IFDEF CORE_COMPLEMENT
570 .IFDEF SD_CARD_LOADER
576 CONDCOMP ; mandatory for Bootstrap
579 DEFERRED ; mandatory for Bootstrap
589 .IFNDEF MSP430ASSEMBLER
598 .IFNDEF FIXPOINT_INPUT
599 FIXPOINT_INPUT ; to interpret fixpoint numbers
602 .IFDEF FIXPOINT_INPUT
603 .IFNDEF DOUBLE_NUMBERS
604 DOUBLE_NUMBERS ; to process double numbers
608 .IFNDEF DOUBLE_NUMBERS
609 DOUBLE_NUMBERS ; to process double numbers
613 ; --------------------------
614 ; COMPUTE BAUDRATE registers = fn(FREQUENCY,BAUDS)
615 ; --------------------------
617 .include "TERMINALBAUDRATE.inc"
619 ;-----------------------------------------------------------------------
620 ; DEVICE I/O, MEMORY, SFR, vectors and minimum FORTH I/O declarations
621 ;-----------------------------------------------------------------------
622 .IFDEF MSP_EXP430FR5739
630 .include "MSP430FR5739.inc"
632 .IFDEF MSP_EXP430FR5969
641 .include "MSP430FR5969.inc"
643 .IFDEF MSP_EXP430FR5994
652 .include "MSP430FR5994.inc"
654 .IFDEF MSP_EXP430FR6989
663 .INCLUDE "MSP430FR6989.inc"
665 .IFDEF MSP_EXP430FR5972
674 .INCLUDE "MSP430FR5972.inc"
676 .IFDEF MSP_EXP430FR4133
685 .INCLUDE "MSP430FR4133.inc"
687 .IFDEF MSP_EXP430FR2433
696 .include "MSP430FR2433.inc"
698 .IFDEF CHIPSTICK_FR2433
700 ; no LF_XTAL to select ACLK = REFOCLK
708 .include "MSP430FR2433.inc"
710 .IFDEF MSP_EXP430FR2355
719 .include "MSP430FR2355.inc"
721 .IFDEF LP_MSP430FR2476
724 ; LF_XTAL ; connect resistors R2=0k, R3=0k before uncomment this line
731 .include "MSP430FR2476.inc"
734 ; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
735 ; add here your device.inc item:
736 ;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
740 ; ---------------------------
741 ; compute value of FORTHADDON
742 ; ---------------------------
745 FADDON .SET FADDON | BIT15 ; LFXTAL = 32768 Hz
747 .IFNDEF TERMINAL_I2C ; if TERMINAL UART...
748 .IFDEF TERMINAL5WIRES
749 FADDON .SET FADDON | BIT14 ; UART CTS
751 .IFDEF TERMINAL4WIRES
752 FADDON .SET FADDON | BIT13 ; UART RTS
754 .IFDEF TERMINAL3WIRES
755 FADDON .SET FADDON | BIT12 ; UART XON/XOFF
758 FADDON .SET FADDON | BIT11 ; UART Half Duplex
760 .ENDIF ; TERMINAL UART
762 FADDON .SET FADDON | BIT10 ;I2C TERMINAL
764 .IFDEF FIXPOINT_INPUT
765 FADDON .SET FADDON | BIT9 ; Q15.16 INPUT
768 FADDON .SET FADDON | BIT8 ; DOUBLE INPUT
770 .IFDEF EXTENDED_ASM ; Assembler 20 bits
771 FADDON .SET FADDON | BIT7
773 .IFDEF MSP430ASSEMBLER
774 FADDON .SET FADDON | BIT6 ; Assembler 16 bits
778 FADDON .SET FADDON | BIT5 ; Assembler 16 bits with Address access beyond $FFFF
782 FADDON .SET FADDON | BIT0 ; Conditionnal Compilation