MARKER {TEST_ASMX}
- [UNDEFINED] +
+ [UNDEFINED] +
[IF]
CODE +
ADD @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] -
+ [UNDEFINED] -
[IF]
CODE -
SUB @R15+,R14
ENDCODE
[THEN]
- [UNDEFINED] MAX
+ [UNDEFINED] MAX
[IF]
CODE MAX
CMP @R15,R14
BW1 ADD #2,R15
MOV @R13+,R0
ENDCODE
-
+
CODE MIN
CMP @R15,R14
S< ?GOTO BW1
ENDCODE
[THEN]
- [UNDEFINED] C@
+ [UNDEFINED] C@
[IF]
CODE C@
MOV.B @R14,R14
ENDCODE
[THEN]
- [UNDEFINED] CONSTANT
+ [UNDEFINED] CONSTANT
[IF]
- : CONSTANT
+ : CONSTANT
CREATE
HI2LO
MOV R14,-2(R10)
ENDCODE
[THEN]
- [UNDEFINED] SPACE
+ [UNDEFINED] SPACE
[IF]
: SPACE
$20 EMIT ;
[THEN]
- [UNDEFINED] SPACES
+ [UNDEFINED] SPACES
[IF]
CODE SPACES
CMP #0,R14
LO2HI
$20 EMIT
HI2LO
- SUB #2,R13
+ SUB #2,R13
SUB #1,R14
0= UNTIL
MOV @R1+,R13
THEN
MOV @R15+,R14
- MOV @R13+,R0
+ MOV @R13+,R0
ENDCODE
[THEN]
- [UNDEFINED] OVER
+ [UNDEFINED] OVER
[IF]
CODE OVER
MOV R14,-2(R15)
ENDCODE
[THEN]
- [UNDEFINED] SWAP
+ [UNDEFINED] SWAP
[IF]
CODE SWAP
MOV @R15,R10
ENDCODE
[THEN]
- [UNDEFINED] >R
+ [UNDEFINED] >R
[IF]
CODE >R
PUSH R14
ENDCODE
[THEN]
- [UNDEFINED] R>
+ [UNDEFINED] R>
[IF]
CODE R>
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] U.R
+ [UNDEFINED] U.R
[IF]
: U.R
- >R <# 0 # #S #>
+ >R <# 0 # #S #>
R> OVER - 0 MAX SPACES TYPE
;
[THEN]
- [UNDEFINED] DO
+ [UNDEFINED] DO
[IF]
HDNCODE XDO
MOV @R15+,R14
MOV @R13+,R0
ENDCODE IMMEDIATE
-
+
HDNCODE XPLOO
ADD R14,0(R1)
MOV @R15+,R14
ENDCODE IMMEDIATE
[THEN]
- [UNDEFINED] I
+ [UNDEFINED] I
[IF]
CODE I
SUB #2,R15
ENDCODE
[THEN]
- [UNDEFINED] CR
+ [UNDEFINED] CR
[IF]
DEFER CR
-
+
:NONAME
$0D EMIT $0A EMIT
; IS CR
[THEN]
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
$1DBE CONSTANT BASE
[THEN]
- [UNDEFINED] DUMP
+ [UNDEFINED] DUMP
[IF]
CODE DUMP
PUSH R13
DO I C@ 3 U.R LOOP
SPACE
I $10 + I 8 +
- DO I C@ 3 U.R LOOP
+ DO I C@ 3 U.R LOOP
SPACE SPACE
I $10 + I
DO I C@ $7E MIN $20 MAX EMIT LOOP
;
[THEN]
- [UNDEFINED] HERE
+ [UNDEFINED] HERE
[IF]
CODE HERE
MOV #$4032,R0
RST_RET
; -----------------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES VI extended single operand
; -----------------------------------------------------------------------------
; absolute and immediate instructs. must be written as $x.xxxx (DOUBLE numbers)
; indexed instructions must be written as $.xxxx(REG) (DOUBLE numbers)
; you should see: 5B 12 44 33 40 18 5B 12 44 33
RST_RET
- [UNDEFINED] BASE
+ [UNDEFINED] BASE
[IF]
' # 2 + CONSTANT BASE
[THEN]
;
: %U.
-BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
+BASE @ %10 BASE ! SWAP 8 EMIT U. BASE !
RST_RET
;