+++ /dev/null
-@1800
-10 00 03 00 00 21 80 3E 05 00 18 00 64 67 0E 54
-90 44 A2 44 C6 5B 02 5C 00 00
-@2000
-00 00
-@4000
-2F 83 8F 4E 00 00 3E 41 2E 4E 30 4D 2F 83 8F 4E
-00 00 3E 41 0D 12 3D 4E 30 4D 00 00 04 45 58 49
-54 00 3D 41 30 4D 00 00 03 4C 49 54 2F 83 8F 4E
-00 00 3E 4D 30 4D 1C 40 03 44 55 50 2F 83 8F 4E
-00 00 30 4D 00 00 04 3F 44 55 50 00 0E 93 F6 23
-30 4D 38 40 04 44 52 4F 50 00 3E 4F 30 4D 00 00
-03 4E 49 50 2F 53 30 4D 00 00 04 53 57 41 50 00
-2A 4F 8F 4E 00 00 0E 4A 30 4D 60 40 04 4F 56 45
-52 00 8F 4E FE FF 2E 4F 2F 83 30 4D 6A 40 03 52
-4F 54 2A 4F 8F 4E 00 00 1E 4F 02 00 8F 4A 02 00
-30 4D 46 40 02 3E 52 00 0E 12 3E 4F 30 4D 8E 40
-02 52 3E 00 2F 83 8F 4E 00 00 3E 41 30 4D B0 40
-02 52 40 00 2F 83 8F 4E 00 00 2E 41 30 4D 54 40
-05 44 45 50 54 48 8F 4E FE FF 3E 40 80 1C 0E 8F
-2F 83 0E 11 30 4D 00 00 01 40 2E 4E 30 4D E8 40
-01 21 BE 4F 00 00 3E 4F 30 4D 00 00 02 43 40 00
-6E 4E 30 4D FC 40 02 43 21 00 FE 4F 00 00 1F 53
-3E 4F 30 4D 00 00 01 2B 3E 5F 30 4D 28 40 01 2D
-3E 8F 3E E3 1E 53 30 4D 00 00 02 31 2B 00 1E 53
-30 4D 2A 41 02 31 2D 00 1E 83 30 4D D0 40 04 44
-41 42 53 00 3E F3 06 34 BF E3 00 00 3E E3 9F 53
-00 00 0E 63 30 4D 34 41 02 30 3D 00 1E 83 0E 7E
-30 4D 58 41 02 30 3C 00 0E 5E 0E 7E 3E E3 30 4D
-00 00 01 3D 3E 8F 07 20 3E 43 30 4D 72 41 01 3C
-3A 4F 0A 8E F9 3B 0E 43 30 4D A4 40 01 3E 3E 8F
-F9 3F 64 41 02 30 3E 00 1E 93 EE 37 F4 3F 00 00
-02 55 3C 00 3A 4F 0A 8E E7 2B ED 3F 2D 4D 30 4D
-0E 93 3E 4F FB 27 2D 53 30 4D 1E 83 0E 7E F9 3F
-39 40 00 80 39 8F 08 4E 3E 4F 08 59 19 15 30 4D
-81 5E 00 00 3E 4F 32 B0 00 01 E8 27 2D 53 21 52
-30 4D 91 53 00 00 F7 3F A0 41 06 55 4E 4C 4F 4F
-50 00 F5 3F 00 00 01 49 2F 83 8F 4E 00 00 2E 41
-1E 81 02 00 30 4D 16 41 01 4A 2F 83 8F 4E 00 00
-1E 41 04 00 1E 81 06 00 30 4D 06 41 02 42 4C 00
-85 12 20 00 1C 42 04 42 41 53 45 00 85 12 DC 1D
-C0 40 05 53 54 41 54 45 85 12 BE 1D 7E 41 02 3C
-23 00 B2 40 B2 1D B2 1D 30 4D EA 41 06 55 4D 2F
-4D 4F 44 00 30 12 5A 40 0B 4E 2E 4F 1C 4F 02 00
-0A 43 34 40 20 00 0E 93 04 20 04 11 0E 4C 0C 43
-09 43 0A 9B 01 28 0A 8B 09 69 08 68 14 83 07 30
-0C 5C 0E 6E 0A 6A F5 2B 0A 8B 12 D3 F5 3F 34 40
-0C 40 8F 4A 02 00 8F 49 00 00 0E 48 30 41 26 42
-01 23 1B 42 DC 1D 2C 4F 2F 83 B0 12 60 42 BF 4F
-00 00 7A 90 0A 00 02 28 3A 50 07 00 3A 50 30 00
-92 83 B2 1D 18 42 B2 1D C8 4A 00 00 30 4D A0 42
-02 23 53 00 0D 12 87 12 A2 42 DC 42 2D 83 09 93
-E2 23 0E 93 E0 23 3D 41 30 4D D0 42 02 23 3E 00
-9F 42 B2 1D 00 00 3E 40 B2 1D 2E 8F 30 4D F6 41
-04 48 4F 4C 44 00 0A 4E 3E 4F DA 3F 32 42 04 53
-49 47 4E 00 0E 93 3E 4F 3A 40 2D 00 D1 33 30 4D
-4C 42 02 55 2E 00 0D 12 87 12 42 42 2C 40 00 00
-D4 42 F0 42 90 45 58 45 22 40 3E 41 02 44 2E 00
-0D 12 87 12 42 42 70 40 82 40 44 41 D4 42 92 40
-14 43 F0 42 90 45 58 45 22 40 7C 40 01 2E 0E 93
-E2 37 2F 83 8F 4E 00 00 3E 43 EA 3F 00 43 04 48
-45 52 45 00 2F 83 8F 4E 00 00 1E 42 C6 1D 30 4D
-F0 40 05 41 4C 4C 4F 54 82 5E C6 1D 3E 4F 30 4D
-EC 42 02 43 2C 00 1A 42 C6 1D CA 4E 00 00 92 53
-C6 1D 3E 4F 30 4D 08 42 03 4B 45 59 30 40 B0 43
-18 42 CC 05 2F 83 8F 4E 00 00 B0 12 90 44 92 B3
-DC 05 FD 27 1E 42 CC 05 B0 12 A2 44 30 4D 0D 12
-3D 40 EE 43 1B 42 32 20 9B 42 1E 20 16 00 1A 4F
-02 00 8F 4E 00 00 0E 43 19 42 1E 20 02 3C F0 43
-2D 83 19 92 20 20 15 2C 58 49 00 1E 19 53 78 90
-20 00 08 2C 78 90 0A 00 F4 23 82 49 1E 20 2F 53
-3D 41 30 4D 2E 9F 67 24 CA 48 00 00 1A 53 1E 53
-62 3C 0A 12 B0 12 08 5D 3A 41 DE 3F 92 43 03 43
-49 42 85 12 3C 1D 3F 80 06 00 8F 4E 04 00 3E 40
-54 00 9F 42 34 44 00 00 AF 4F 02 00 05 3C 82 43
-06 41 43 43 45 50 54 00 30 40 5C 44 3C 40 FE 44
-3B 40 C8 44 2D 15 0A 4E 2E 4F 0A 5E 3B 40 0D 00
-3C 40 20 00 3D 40 F2 44 92 B3 DC 05 05 24 18 42
-CC 05 38 90 0A 00 04 20 21 53 39 40 B6 44 4D 15
-A2 B3 DC 05 FD 27 B2 40 11 00 CE 05 E2 C2 23 02
-30 41 B2 40 13 00 CE 05 E2 D2 23 02 30 41 00 00
-05 53 4C 45 45 50 30 40 BA 44 12 D2 0A 18 FB 3F
-21 52 3A 17 58 42 CC 05 48 9C 08 2C 48 9B E9 27
-78 92 11 20 2E 9F 0F 24 1E 83 05 3C 0E 9A 03 24
-CE 48 00 00 1E 53 A2 B3 DC 05 FD 27 82 48 CE 05
-30 4D F4 44 2D 83 92 B3 DC 05 E4 23 FC 27 B2 40
-18 00 0A 18 82 93 DE 1D 02 24 92 53 DE 1D 3E 8F
-3D 41 30 4D 3C 43 04 45 4D 49 54 00 30 40 20 45
-08 4E 3E 4F E0 3F 16 45 04 45 43 48 4F 00 B2 40
-82 48 EC 44 82 43 DE 1D 30 4D 5C 43 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D EC 44 92 43 DE 1D 30 4D
-0E 43 05 53 50 41 43 45 2F 83 8F 4E 00 00 3E 40
-20 00 DC 3F 52 45 06 53 50 41 43 45 53 00 0E 93
-09 24 0D 12 3D 40 7A 45 EF 3F 7C 45 2D 83 1E 83
-EB 23 3D 41 3E 4F 30 4D 22 43 04 54 59 50 45 00
-0E 93 0F 24 1E 15 3D 40 A6 45 28 4F 7E 48 8F 48
-00 00 2F 83 BB 3F A8 45 2D 83 91 83 02 00 F5 23
-1D 17 2F 53 3E 4F 30 4D 2E 44 02 43 52 00 30 40
-C2 45 0D 12 87 12 D0 45 02 0D 0A 00 90 45 22 40
-2F 82 8F 4E 02 00 7E 4D 8F 4D 00 00 0D 5E 1D B3
-0D 63 30 4D BA 45 07 43 41 50 53 5F 4F 4E B2 43
-B4 1D 30 4D E6 45 08 43 41 50 53 5F 4F 46 46 00
-82 43 B4 1D 30 4D 66 45 82 53 22 00 0D 12 87 12
-2C 40 D0 45 78 48 00 46 2C 40 22 00 54 46 EE 45
-22 46 3D 41 6E 4E 1E 83 82 5E C6 1D 3E 4F 92 B3
-C6 1D A2 63 C6 1D 30 4D 3C 45 82 2E 22 00 0D 12
-87 12 0C 46 2C 40 90 45 78 48 22 40 00 00 04 57
-4F 52 44 00 3C 40 C0 1D 39 4C 3A 4C 09 5A 3A 5C
-28 4C 09 9A 1C 24 7E 9A FC 27 1A 83 3B 40 60 00
-C8 4C 00 00 09 9A 0F 24 7C 4A 4E 9C 0C 24 18 53
-4B 9C F6 2F 82 93 B4 1D F3 27 7C 90 7B 00 F0 2F
-7C 80 20 00 ED 3F 1A 82 C2 1D 82 4A C4 1D 1E 42
-C6 1D 08 8E CE 48 00 00 30 4D 00 00 04 46 49 4E
-44 00 2F 83 0C 4E 65 4C 74 40 80 00 3B 40 CA 1D
-3E 4B 0E 93 1E 24 58 4C 01 00 78 F0 1E 00 0E 58
-2E 53 1E 4E FE FF 0E 93 F3 27 09 4E 78 49 48 C4
-48 95 F7 23 0A 4C 1A 53 FA 99 00 00 F2 23 58 83
-FA 23 19 B3 09 63 0C 49 6A 4E 1E 43 4A 93 01 30
-2E 83 8F 4C 00 00 35 40 00 40 34 40 0C 40 30 4D
-8C 41 07 3E 4E 55 4D 42 45 52 3C 4F 38 4F 29 4F
-2F 82 1B 42 DC 1D 6A 4C 7A 80 30 00 7A 90 0A 00
-05 28 7A 80 07 00 7A 90 0A 00 13 28 0A 9B 11 2C
-82 49 D0 04 82 48 D2 04 82 4B C8 04 19 42 E4 04
-18 42 E6 04 09 5A 08 63 1C 53 1E 83 E4 23 8F 48
-02 00 8F 4C 00 00 8F 49 04 00 30 4D 0C 43 1B 42
-DC 1D 32 C0 00 02 2D 15 09 43 08 43 3D 40 BC 47
-3F 82 8F 4E 06 00 0C 4E 7E 4C 6A 4C 7A 80 2C 00
-10 2C 5A 83 2B 43 7A 52 07 24 3B 52 6A 53 04 24
-3B 40 10 00 5A 83 BF 23 1C 53 1E 83 6A 4C 7A 80
-2C 00 5A 93 B8 23 B1 43 02 00 CE 3F BE 47 0E 93
-32 24 32 B0 00 02 2F 20 32 D0 00 02 FC 90 2E 00
-00 00 02 20 2D 83 C0 3F FC 90 2C 00 00 00 23 20
-0A 4E 09 43 8F 49 02 00 5A 83 09 4A 09 5C 69 49
-39 80 30 00 79 90 0A 00 05 28 79 80 07 00 79 90
-0A 00 0A 28 09 9B 08 2C 8F 49 00 00 0E 4B 2C 15
-B0 12 58 42 2A 17 E6 3F 9F 4F 04 00 02 00 AF 4F
-04 00 0E 4A 4E 93 2B 17 0E 4C 82 4B DC 1D 04 24
-3F 50 06 00 0E F3 30 4D 2F 53 9F 4F 02 00 04 00
-BF 4F 00 00 3E E3 09 20 3E E3 BF E3 02 00 BF E3
-00 00 9F 53 02 00 8F 63 00 00 32 B0 00 02 01 20
-2F 53 30 4D 28 45 07 45 58 45 43 55 54 45 0A 4E
-3E 4F 00 4A 1E 41 01 2C 1A 42 C6 1D A2 53 C6 1D
-8A 4E 00 00 3E 4F 30 4D 76 48 87 4C 49 54 45 52
-41 4C 82 93 BE 1D 0F 24 1A 42 C6 1D A2 52 C6 1D
-BA 40 2C 40 00 00 8A 4E 02 00 3E 4F 32 B0 00 02
-32 C0 00 02 F1 23 30 4D F6 45 05 43 4F 55 4E 54
-2F 83 1E 53 8F 4E 00 00 5E 4E FF FF 30 4D 82 43
-C4 1D 82 4E C0 1D B2 4F C2 1D 3E 4F 30 4D 0D 12
-87 12 CE 48 20 42 54 46 EA 48 3D 40 F2 48 E1 22
-48 3E F4 48 0A 4E 3E 4F 3D 40 0A 49 37 27 3D 40
-E4 48 1A E2 BE 1D B8 27 B2 23 0C 49 3E 4F 3D 40
-E4 48 BF 23 DE 53 00 00 68 4E 08 5E F8 40 3F 00
-00 00 3D 40 AE 4B CC 3F 66 48 08 45 56 41 4C 55
-41 54 45 00 39 40 C0 1D 3C 49 3B 49 3A 49 3D 15
-87 12 DE 48 46 49 B2 41 C4 1D B2 41 C2 1D B2 41
-C0 1D 3D 41 30 4D 94 41 04 51 55 49 54 00 31 40
-E0 1C B2 40 00 1C 00 1C 82 43 BE 1D 82 43 08 18
-87 12 D0 45 05 0D 0A 6F 6B 20 90 45 36 44 58 45
-DE 48 D6 40 68 41 D0 45 0D 73 74 61 63 6B 20 65
-6D 70 74 79 21 20 14 4A 2C 40 30 FF 74 43 A4 41
-D0 45 0B 46 52 41 4D 20 66 75 6C 6C 21 20 14 4A
-38 42 EA 40 B0 41 72 49 D0 45 05 0D 0A 20 20 20
-AC 41 7A 49 50 44 05 41 42 4F 52 54 3F 40 80 1C
-C6 3F B2 40 18 51 16 51 B2 40 BA 44 B8 44 B2 40
-20 45 1E 45 B2 40 C2 45 C0 45 B2 40 B0 43 AE 43
-B2 40 3C 1D 34 44 B2 40 5C 44 5A 44 38 40 0A 00
-82 48 DC 1D 88 43 E8 1D 28 83 FC 2F B2 40 0A 00
-DC 1D 30 41 8F 93 02 00 03 20 2F 52 3E 4F 30 4D
-B2 40 82 48 EC 44 1B 42 32 20 0B 93 04 24 CB 43
-02 00 2B 4B FA 3F B0 12 DE 49 A2 B3 DC 05 FD 27
-B2 40 11 00 CE 05 E2 C2 23 02 92 C3 DC 05 38 40
-A0 AA 39 42 03 43 19 83 FD 23 18 83 FA 23 92 B3
-DC 05 F3 23 0D 12 87 12 D0 45 04 1B 5B 37 6D 00
-90 45 2C 40 DE 1D EA 40 4C 40 B0 41 8E 4A D0 45
-05 6C 69 6E 65 3A 90 45 38 41 26 43 2E 45 90 45
-D0 45 04 1B 5B 30 6D 00 90 45 90 50 EE 45 CC 49
-C6 49 86 41 42 4F 52 54 22 00 0D 12 87 12 0C 46
-2C 40 14 4A 78 48 22 40 AC 46 01 27 0D 12 87 12
-20 42 54 46 B2 46 B0 41 CC 4A 22 40 14 49 3E 42
-81 5C 92 42 C0 1D C4 1D 30 4D 00 00 81 5B 82 43
-BE 1D 30 4D D0 4A 01 5D B2 43 BE 1D 30 4D DC 4A
-83 5B 27 5D 0D 12 87 12 BC 4A 2C 40 2C 40 78 48
-78 48 22 40 BE 4F 02 00 3E 4F 30 4D 6E 43 82 49
-53 00 0D 12 87 12 38 42 EA 40 B0 41 28 4B F4 4A
-2C 40 04 4B 78 48 22 40 BC 4A 04 4B 22 40 0E 4B
-09 49 4D 4D 45 44 49 41 54 45 1A 42 B6 1D FA D0
-80 00 00 00 30 4D 08 46 87 52 45 43 55 52 53 45
-19 42 C6 1D 99 42 BA 1D 00 00 A2 53 C6 1D 30 4D
-58 49 88 50 4F 53 54 50 4F 4E 45 00 0D 12 87 12
-20 42 54 46 B2 46 4C 40 B0 41 CC 4A 68 41 B0 41
-8E 4B 2C 40 2C 40 78 48 78 48 2C 40 78 48 78 48
-22 40 82 9F BC 1D 2F 25 0D 12 87 12 D0 45 0F 73
-74 61 63 6B 20 6D 69 73 6D 61 74 63 68 21 20 4A
-F0 4A 81 3B 82 93 BE 1D 8C 27 0D 12 87 12 2C 40
-22 40 78 48 92 4B DE 4A 22 40 BA 40 0D 12 FC FF
-BA 40 87 12 FE FF B2 43 BE 1D 82 4F BC 1D 30 4D
-B2 4B 01 3A 30 12 CA 4B 0D 12 87 12 2E 46 20 42
-54 46 F4 4B 08 4E 7A 4E 5A D3 5A 53 0A 58 19 42
-DA 1D 6E 4E 3E F0 1E 00 09 5E 3E 4F 3D 41 BA 40
-30 40 00 00 BA 40 DE 4B 02 00 82 48 B6 1D 82 49
-B8 1D 82 4A BA 1D 2A 52 82 4A C6 1D 30 41 4E 46
-08 56 41 52 49 41 42 4C 45 00 B0 12 E8 4B BA 40
-86 12 FC FF DC 3C BA 48 08 43 4F 4E 53 54 41 4E
-54 00 B0 12 E8 4B BA 40 85 12 FC FF 8A 4E FE FF
-3E 4F CD 3C 48 4C 06 43 52 45 41 54 45 00 B0 12
-E8 4B BA 40 85 12 FC FF 8A 4A FE FF C0 3C 2A 49
-05 44 4F 45 53 3E 1A 42 BA 1D BA 40 84 12 00 00
-8A 4D 02 00 3D 41 30 4D 80 4C 05 44 45 46 45 52
-B0 12 E8 4B AC 3C 12 47 05 3E 42 4F 44 59 2E 52
-30 4D 66 4C 07 43 4F 4D 50 41 52 45 0C 4E 38 4F
-3B 4F 39 4F 0E 4B 0E 5C 0C 24 1B 83 07 30 1C 83
-07 30 19 53 F9 98 FF FF F5 27 02 2C 3E 43 30 4D
-1E 43 30 4D E2 4B 86 5B 54 48 45 4E 5D 00 30 4D
-E6 4C 86 5B 45 4C 53 45 5D 00 0D 12 87 12 2C 40
-01 00 20 42 54 46 C0 48 3C 40 B0 41 66 4D 82 40
-82 40 D0 45 04 5B 49 46 5D 00 BC 4C BA 41 28 4D
-B2 45 2E 41 AC 41 5E 4D 82 40 82 40 D0 45 06 5B
-45 4C 53 45 5D 00 BC 4C BA 41 4C 4D B2 45 38 41
-3C 40 B0 41 5E 4D 2E 41 AC 41 5E 4D D0 45 06 5B
-54 48 45 4E 5D 00 BC 4C BA 41 5E 4D 38 41 4C 40
-BA 41 02 4D 22 40 B2 45 D0 45 05 0D 0A 6B 6F 20
-90 45 36 44 CE 48 AC 41 02 4D F2 4C 84 5B 49 46
-5D 00 0E 93 3E 4F B9 27 30 4D 7C 4D 89 5B 44 45
-46 49 4E 45 44 5D 0D 12 87 12 20 42 54 46 B2 46
-64 40 22 40 8C 4D 8B 5B 55 4E 44 45 46 49 4E 45
-44 5D 0D 12 87 12 96 4D 5C 41 22 40 BE 4D 3D 41
-B2 4E 0E 18 A2 4E 0C 18 3E 4F 6C 3D 8A 48 06 4D
-41 52 4B 45 52 00 B0 12 E8 4B BA 40 84 12 FC FF
-BA 40 BC 4D FE FF 9A 42 C8 1D 00 00 28 83 8A 48
-02 00 A2 52 C6 1D 18 42 B6 1D 19 42 B8 1D A8 49
-FE FF 89 48 00 00 30 4D 30 4B 82 49 46 00 2F 83
-8F 4E 00 00 1E 42 C6 1D A2 52 C6 1D BE 40 B0 41
-00 00 2E 53 30 4D 9A 4C 84 45 4C 53 45 00 A2 52
-C6 1D 1A 42 C6 1D BA 40 AC 41 FC FF 8E 4A 00 00
-2A 83 0E 4A 30 4D 8A 45 84 54 48 45 4E 00 9E 42
-C6 1D 00 00 3E 4F 30 4D B4 4C 85 42 45 47 49 4E
-30 40 74 43 48 4E 85 55 4E 54 49 4C 39 40 B0 41
-A2 52 C6 1D 1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF
-3E 4F 30 4D A2 4A 85 41 47 41 49 4E 39 40 AC 41
-EF 3F 30 4C 85 57 48 49 4C 45 0D 12 87 12 0E 4E
-70 40 22 40 48 4B 86 52 45 50 45 41 54 00 0D 12
-87 12 8C 4E 4E 4E 22 40 28 4E 82 44 4F 00 2F 83
-8F 4E 00 00 A2 53 C6 1D 1E 42 C6 1D BE 40 C0 41
-FE FF A2 53 00 1C 1A 42 00 1C 8A 43 00 00 30 4D
-CE 4D 84 4C 4F 4F 50 00 39 40 E2 41 A2 52 C6 1D
-1A 42 C6 1D 8A 49 FC FF 8A 4E FE FF 1E 42 00 1C
-A2 83 00 1C 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F
-3E 4F 30 4D A8 43 85 2B 4C 4F 4F 50 39 40 D0 41
-E5 3F E2 4E 85 4C 45 41 56 45 1A 42 C6 1D BA 40
-F2 41 00 00 BA 40 AC 41 02 00 B2 50 06 00 C6 1D
-A2 53 00 1C 2A 52 19 42 00 1C 89 4A 00 00 30 4D
-24 4F 04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F
-0A 93 11 24 08 99 0F 24 06 2C F8 49 00 00 18 53
-1A 83 FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49
-00 00 1A 83 FA 23 30 4D 94 4E 0A 56 4F 43 41 42
-55 4C 41 52 59 00 0D 12 87 12 6E 4C 2C 40 10 00
-2C 40 00 00 C0 41 2C 40 00 00 78 48 E2 41 A6 4F
-74 43 2C 40 C8 1D 3C 40 EA 40 78 48 F2 40 86 4C
-2C 40 CA 1D F2 40 22 40 BA 4A 05 46 4F 52 54 48
-84 12 C0 4F 66 65 08 65 DC 66 2A 65 12 54 16 4F
-A4 66 D0 65 EE 65 DC 64 B2 66 F8 65 00 00 5A 65
-E6 4A E4 65 00 00 86 4E 04 41 4C 53 4F 00 3A 40
-0C 00 39 40 CA 1D 38 40 CC 1D B5 3F 62 4B 08 50
-52 45 56 49 4F 55 53 00 3A 40 0E 00 39 40 CC 1D
-38 40 CA 1D A2 3F 3A 46 04 4F 4E 4C 59 00 82 43
-CC 1D 30 4D BA 4E 0B 44 45 46 49 4E 49 54 49 4F
-4E 53 92 42 CA 1D DA 1D 30 4D D0 4F 2E 50 42 50
-52 50 3A 4E 82 4A C8 1D 2E 4E 82 4E C6 1D 3D 40
-10 00 09 4A 08 49 29 83 18 48 FE FF 0E 98 FC 2B
-89 48 00 00 1D 83 F6 23 2A 4A 0A 93 F0 23 3E 4F
-3D 41 30 4D 0E 50 09 50 57 52 5F 53 54 41 54 45
-84 12 4A 50 0E 54 64 67 A6 4E 09 52 53 54 5F 53
-54 41 54 45 92 42 0E 18 94 50 92 42 0C 18 96 50
-EF 3F 86 50 08 50 57 52 5F 48 45 52 45 00 92 42
-C8 1D 94 50 92 42 C6 1D 96 50 30 4D 9A 50 08 52
-53 54 5F 48 45 52 45 00 92 42 C8 1D 0E 18 92 42
-C6 1D 0C 18 EC 3F 8A 4F 04 57 49 50 45 00 39 40
-10 00 29 83 B9 43 80 FF FC 23 B0 12 D2 49 B2 40
-64 67 0C 18 B2 40 0E 54 0E 18 CC 3F E8 50 04 57
-41 52 4D 00 30 40 18 51 1E 42 08 18 0D 12 87 12
-D0 45 06 0D 1B 5B 37 6D 23 00 90 45 5E 43 D0 45
-1F 46 61 73 74 46 6F 72 74 68 20 56 32 30 36 20
-28 43 29 4A 2E 4D 2E 54 68 6F 6F 72 65 6E 73 20
-90 45 2C 40 30 FF 74 43 20 41 26 43 D0 45 0B 62
-79 74 65 73 20 66 72 65 65 20 36 4A 5A 4E 04 43
-4F 4C 44 00 B2 40 04 A5 20 01 B2 40 88 5A 5C 01
-B2 D0 03 00 04 02 B2 40 FC FF 02 02 B2 C0 03 00
-06 02 B2 D0 00 04 24 02 B2 D3 26 02 B2 43 22 02
-B2 43 42 02 B2 D3 46 02 B2 43 62 02 B2 D3 66 02
-F2 43 26 03 F2 D3 22 03 F2 40 A5 00 41 01 F2 40
-10 00 40 01 D2 43 41 01 F2 40 A5 00 61 01 B2 40
-48 00 62 01 82 43 66 01 39 40 00 01 B2 40 33 00
-64 01 D2 43 61 01 92 D2 9E 01 08 18 A2 93 08 18
-01 24 59 07 38 40 59 14 18 83 FE 23 19 83 FA 23
-B2 42 B0 01 F2 D0 10 00 2A 03 F2 40 A5 00 A1 04
-F2 C0 40 00 A2 04 39 40 4C 00 29 83 B9 40 7A 51
-B4 FF FB 23 B2 40 C0 44 F0 FF B2 40 18 00 0A 18
-39 40 00 10 29 83 89 43 00 1C FC 23 31 40 E0 1C
-3F 40 80 1C 37 40 22 40 36 40 B4 40 35 40 00 40
-34 40 0C 40 B2 40 0A 00 DC 1D B2 43 B4 1D 92 C3
-30 01 18 42 08 18 D2 B3 01 02 04 20 38 E3 18 53
-82 48 08 18 B2 40 81 00 C0 05 92 42 02 18 C6 05
-92 42 04 18 C8 05 F2 D0 03 00 0D 02 92 C3 C0 05
-92 D3 DA 05 3D 40 AA 52 38 90 0A 00 28 27 38 90
-16 00 25 2F 28 93 FE 22 F3 26 AC 52 E2 B2 60 02
-31 23 B2 40 81 A9 40 06 B2 40 30 00 46 06 D2 D3
-25 02 B2 D0 C0 04 0C 02 92 C3 40 06 39 42 B0 12
-9E 5B D2 C3 23 02 2C 42 B2 40 95 00 14 20 B2 40
-00 40 18 20 B0 12 14 5B 02 24 30 40 3A 5C B0 12
-9C 5B 7A 93 FC 23 B2 40 87 AA 14 20 92 43 16 20
-B2 40 00 48 18 20 B0 12 14 5B 29 42 B0 12 9E 5B
-92 43 14 20 82 43 16 20 78 43 3C 42 B2 40 00 77
-18 20 B0 12 14 5B B2 40 40 69 18 20 B0 12 5A 5B
-03 24 58 83 F3 23 D9 3F 0C 5C A2 43 16 20 B2 40
-00 50 18 20 B0 12 5A 5B D0 23 92 D3 40 06 82 43
-46 06 92 C3 40 06 B0 12 C4 5B 38 40 00 1E 92 48
-C6 01 04 20 92 48 C8 01 06 20 5A 48 C2 01 92 43
-02 20 7A 80 06 00 0D 24 7A 82 0B 24 A2 43 02 20
-6A 53 07 24 5A 53 05 24 3A 50 0B 20 0C 4A 30 40
-40 5C B0 12 C4 5B D2 48 0D 00 12 20 19 48 0E 00
-82 49 08 20 1A 48 16 00 0A 93 02 20 1A 48 24 00
-82 4A 0A 20 09 5A 82 49 0C 20 09 5A A2 93 02 20
-04 24 82 49 0E 20 39 50 20 00 19 82 12 20 19 82
-12 20 82 49 10 20 92 42 02 20 2C 20 9B 3E F8 4F
-09 41 53 53 45 4D 42 4C 45 52 84 12 C0 4F F0 59
-5E 5A A4 59 C8 5A 6A 59 F0 5A 84 56 00 00 60 59
-14 5A C2 59 02 5A 94 57 00 00 00 00 00 5B F4 4F
-0A 4E 85 48 49 32 4C 4F 0D 12 87 12 74 43 22 4E
-78 48 DE 4A FE 4F EA 53 22 40 6E 51 04 43 4F 44
-45 00 B0 12 E8 4B A2 82 C6 1D 0D 12 87 12 DA 4B
-AC 41 24 54 00 00 07 45 4E 44 43 4F 44 45 0D 12
-87 12 18 50 92 4B 22 40 E0 53 03 41 53 4D 92 42
-DA 1D E0 1D B2 40 EE 53 DA 1D E3 3F 46 54 06 45
-4E 44 41 53 4D 00 92 42 E0 1D DA 1D E8 3F 00 00
-05 43 4F 4C 4F 4E 1A 42 C6 1D BA 40 0D 12 00 00
-BA 40 87 12 02 00 A2 52 C6 1D B2 43 BE 1D 30 40
-18 50 00 00 05 4C 4F 32 48 49 A2 83 C6 1D 1A 42
-C6 1D EE 3F 38 40 C0 1D 39 48 2A 48 09 5A 1A 52
-C4 1D 09 9A 03 24 7E 9A FC 27 1A 83 0E 4A 2A 88
-82 4A C4 1D 30 4D 1C 15 87 12 54 46 B2 46 BA 41
-EA 54 6C 47 B0 41 CC 4A 0C 55 EC 54 29 4E 39 90
-86 12 02 20 2E 53 0A 3C 39 90 85 12 03 20 1E 4E
-02 00 04 3C 39 90 84 12 01 20 2E 52 1B 17 30 41
-3E 40 28 00 B0 12 D6 54 19 42 C6 1D A2 53 C6 1D
-89 4E 00 00 3E 40 29 00 1C 15 12 12 C4 1D 92 53
-C4 1D 87 12 54 46 6C 47 B0 41 48 55 3E 55 21 53
-3E 90 10 00 84 2D E2 2B 4A 55 B2 41 C4 1D DE 3F
-0D 12 87 12 20 42 B4 54 5A 55 0C 43 1B 42 C6 1D
-A2 53 C6 1D 0A 4E 3E 4F FA 90 23 00 00 00 2D 20
-92 53 C4 1D B0 12 D6 54 0E 93 03 20 3C 40 00 03
-21 3C 1E 93 03 20 3C 40 10 03 1C 3C 2E 93 03 20
-3C 40 20 03 17 3C 2E 92 03 20 3C 40 20 02 12 3C
-3E 92 03 20 3C 40 30 02 0D 3C 3E 93 03 20 3C 40
-30 03 08 3C 3C 40 30 00 19 42 C6 1D A2 53 C6 1D
-89 4E 00 00 3E 4F 3D 41 30 4D FA 90 26 00 00 00
-07 20 3C 40 10 02 92 53 C4 1D B0 12 D6 54 EC 3F
-FA 90 40 00 00 00 16 20 3C 40 20 00 92 53 C4 1D
-B0 12 28 55 0C 20 3C 50 10 00 3E 40 2B 00 B0 12
-28 55 92 92 C0 1D C4 1D 02 24 92 53 C4 1D 8E 10
-0C 5E D8 3F B0 12 28 55 FA 23 3C 50 10 00 B0 12
-10 55 EF 3F 0D 12 87 12 20 42 B4 54 2E 56 FE 90
-26 00 00 00 3E 40 20 00 03 20 3C 50 82 00 CB 3F
-B0 12 28 55 E5 23 3C 50 80 00 B0 12 10 55 E0 3F
-B0 44 04 52 45 54 49 00 0D 12 87 12 2C 40 00 13
-78 48 22 40 2C 40 2C 00 50 55 24 56 6E 56 2E 4E
-0E DC 09 4B A5 3F A4 54 03 4D 4F 56 84 12 64 56
-00 40 78 56 05 4D 4F 56 2E 42 84 12 64 56 40 40
-00 00 03 41 44 44 84 12 64 56 00 50 92 56 05 41
-44 44 2E 42 84 12 64 56 40 50 9E 56 04 41 44 44
-43 00 84 12 64 56 00 60 AC 56 06 41 44 44 43 2E
-42 00 84 12 64 56 40 60 52 56 04 53 55 42 43 00
-84 12 64 56 00 70 CA 56 06 53 55 42 43 2E 42 00
-84 12 64 56 40 70 D8 56 03 53 55 42 84 12 64 56
-00 80 E8 56 05 53 55 42 2E 42 84 12 64 56 40 80
-80 54 03 43 4D 50 84 12 64 56 00 90 02 57 05 43
-4D 50 2E 42 84 12 64 56 40 90 6E 54 04 44 41 44
-44 00 84 12 64 56 00 A0 1C 57 06 44 41 44 44 2E
-42 00 84 12 64 56 40 A0 0E 57 03 42 49 54 84 12
-64 56 00 B0 3A 57 05 42 49 54 2E 42 84 12 64 56
-40 B0 46 57 03 42 49 43 84 12 64 56 00 C0 54 57
-05 42 49 43 2E 42 84 12 64 56 40 C0 60 57 03 42
-49 53 84 12 64 56 00 D0 6E 57 05 42 49 53 2E 42
-84 12 64 56 40 D0 00 00 03 58 4F 52 84 12 64 56
-00 E0 88 57 05 58 4F 52 2E 42 84 12 64 56 40 E0
-BA 56 03 41 4E 44 84 12 64 56 00 F0 A2 57 05 41
-4E 44 2E 42 84 12 64 56 40 F0 20 42 50 55 C0 57
-0A 4C 3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F
-F4 56 03 52 52 43 84 12 BA 57 00 10 D2 57 05 52
-52 43 2E 42 84 12 BA 57 40 10 DE 57 04 53 57 50
-42 00 84 12 BA 57 80 10 EC 57 03 52 52 41 84 12
-BA 57 00 11 FA 57 05 52 52 41 2E 42 84 12 BA 57
-40 11 06 58 03 53 58 54 84 12 BA 57 80 11 00 00
-04 50 55 53 48 00 84 12 BA 57 00 12 20 58 06 50
-55 53 48 2E 42 00 84 12 BA 57 40 12 7A 57 04 43
-41 4C 4C 00 84 12 BA 57 80 12 1A 53 0E 4A 0D 12
-87 12 5E 43 D0 45 0D 6F 75 74 20 6F 66 20 62 6F
-75 6E 64 73 20 4A 20 42 B4 54 6C 58 0C 43 1B 42
-C6 1D A2 53 C6 1D 92 53 C4 1D 3E 40 2C 00 1C 15
-87 12 54 46 6C 47 B0 41 CC 4A 8C 58 1B 17 87 12
-24 56 94 58 0A 4E 3E 4F 1A 83 D7 33 29 4E 59 0E
-0A 28 08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00
-CC 2F 5A 0E 8B 3F 2A 92 C8 2F 8A 10 5A 06 86 3F
-14 58 04 52 52 43 4D 00 84 12 66 58 50 00 C2 58
-04 52 52 41 4D 00 84 12 66 58 50 01 D0 58 04 52
-4C 41 4D 00 84 12 66 58 50 02 DE 58 04 52 52 55
-4D 00 84 12 66 58 50 03 2E 58 05 50 55 53 48 4D
-84 12 66 58 00 15 FA 58 04 50 4F 50 4D 00 84 12
-66 58 00 17 85 12 00 3C EC 58 03 53 3E 3D 85 12
-00 38 1A 59 02 53 3C 00 85 12 00 34 08 59 03 30
-3E 3D 85 12 00 30 2E 59 02 30 3C 00 85 12 00 30
-00 00 02 55 3C 00 85 12 00 2C 42 59 03 55 3E 3D
-85 12 00 28 38 59 03 30 3C 3E 85 12 00 24 56 59
-02 30 3D 00 85 12 00 20 00 00 02 49 46 00 1A 42
-C6 1D 8A 4E 00 00 A2 53 C6 1D 0E 4A 30 4D 4C 59
-04 54 48 45 4E 00 1A 42 C6 1D 08 4E 3E 4F 09 48
-29 53 0A 89 0A 11 3A 90 00 02 58 2F 88 DA 00 00
-30 4D 2A 57 04 45 4C 53 45 00 1A 42 C6 1D BA 40
-00 3C 00 00 A2 53 C6 1D 2F 83 8F 4A 00 00 E3 3F
-80 59 05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42
-C6 1D 2A 83 0A 89 0A 11 3A 90 00 FE 37 3B 3A F0
-FF 03 08 DA 89 48 00 00 A2 53 C6 1D 30 4D AE 57
-05 41 47 41 49 4E 0D 12 87 12 14 59 C8 59 22 40
-00 00 05 57 48 49 4C 45 0D 12 87 12 6E 59 70 40
-22 40 24 59 06 52 45 50 45 41 54 00 0D 12 87 12
-14 59 C8 59 86 59 22 40 2A 5A 3D 41 2E 4E 08 4E
-3E 4F 2A 48 0A 93 88 43 00 00 C7 23 98 42 C6 1D
-00 00 30 4D 3E 58 03 42 57 31 84 12 28 5A E2 1D
-46 5A 03 42 57 32 84 12 28 5A E4 1D 52 5A 03 42
-57 33 84 12 28 5A E6 1D 6A 5A 3D 41 1A 42 C6 1D
-2E 4E 28 4E 8E 43 00 00 08 93 88 23 BA 4F 00 00
-A2 53 C6 1D 8E 4A 00 00 3E 4F 30 4D 00 00 03 46
-57 31 84 12 68 5A E8 1D 8E 5A 03 46 57 32 84 12
-68 5A EA 1D 9A 5A 03 46 57 33 84 12 68 5A EC 1D
-3E 90 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24
-3E E0 00 08 30 4D A6 5A 04 47 4F 54 4F 00 0D 12
-87 12 14 59 BC 4A 6E 48 22 40 00 00 05 3F 47 4F
-54 4F 0D 12 87 12 B0 5A BC 4A 6E 48 22 40 00 00
-03 4A 4D 50 0D 12 87 12 BC 4A F6 59 22 40 DC 5A
-04 3F 4A 4D 50 00 0D 12 87 12 B0 5A BC 4A 70 40
-C8 59 22 40 1A 43 25 3C D2 C3 23 02 E2 B2 60 02
-02 24 30 40 74 51 1A 52 04 20 19 62 06 20 92 43
-14 20 A2 93 02 20 07 24 0A 5A 49 69 82 4A 16 20
-C2 49 18 20 0A 3C C2 4A 15 20 8A 10 C2 4A 16 20
-C2 49 17 20 89 10 C2 49 18 20 B0 12 9C 5B 5A 53
-FC 23 39 40 05 00 D2 49 14 20 4E 06 82 93 46 06
-05 24 92 B3 6C 06 FD 27 C2 93 4C 06 59 83 F3 2F
-19 83 0B 30 F2 43 4E 06 82 93 46 06 03 24 92 B3
-6C 06 FD 27 5A 92 4C 06 F3 23 30 41 19 43 3A 43
-8A 10 C2 4A 4E 06 82 93 46 06 05 24 92 B3 6C 06
-FD 27 C2 93 4C 06 19 83 F3 23 5A 42 4C 06 30 41
-1A 52 08 20 09 43 1C D3 F2 40 51 00 19 20 B0 12
-18 5B 33 20 B0 12 9C 5B 6A 53 04 24 FB 23 D9 42
-4C 06 FF 1D F2 43 4E 06 03 43 19 53 39 90 01 02
-F6 23 F2 43 4E 06 3C C0 03 00 D2 D3 23 02 30 41
-09 43 2C D3 F0 40 58 00 11 C4 B0 12 18 5B 15 20
-3A 40 FE FF 29 43 B0 12 A0 5B D2 49 00 1E 4E 06
-03 43 19 53 39 90 00 02 F8 23 39 40 03 00 B0 12
-9E 5B 7A C0 E1 00 6A 92 DE 27 8C 10 1C 52 4C 06
-D2 D3 23 02 0D 12 87 12 D0 45 0B 3C 20 53 44 20
-45 72 72 6F 72 21 58 5C 2F 83 B2 40 10 00 DC 1D
-0E 4C 87 12 26 43 20 4A 92 4B 0E 00 22 20 92 4B
-10 00 24 20 5A 42 23 20 58 42 22 20 92 93 02 20
-08 24 59 42 24 20 89 10 0A 59 88 10 08 58 0A 6A
-88 10 08 58 30 41 82 43 1C 20 92 42 0E 20 1A 20
-C2 93 24 20 03 20 92 93 22 20 14 24 92 42 22 20
-D0 04 92 42 24 20 D2 04 92 42 12 20 C8 04 92 42
-E4 04 1A 20 92 42 E6 04 1C 20 92 52 10 20 1A 20
-82 63 1C 20 30 41 92 4B 0E 00 22 20 92 4B 10 00
-24 20 B0 12 96 5C 5A 4B 03 00 82 5A 1A 20 82 63
-1C 20 30 41 09 93 07 24 F8 90 20 00 00 1E 03 20
-18 53 19 83 F9 23 30 41 1B 42 32 20 82 43 1E 20
-B2 90 00 02 20 20 A3 20 BB 80 00 02 12 00 8B 73
-14 00 DB 53 03 00 DB 92 12 20 03 00 11 28 CB 43
-03 00 B0 12 68 5C B0 12 C0 5B 8B 43 10 00 9B 48
-00 1E 0E 00 92 93 02 20 03 24 9B 48 02 1E 10 00
-B2 40 00 02 20 20 8B 93 14 00 0B 20 92 9B 12 00
-1E 20 7D 2C BB 90 00 02 12 00 03 2C 92 4B 12 00
-20 20 B0 12 D6 5C 1A 42 1A 20 19 42 1C 20 23 3F
-3C 42 3B 40 40 20 09 43 CB 93 02 00 10 24 9B 92
-24 20 0C 00 04 20 9B 92 22 20 0A 00 07 24 09 4B
-3B 50 18 00 3B 90 00 21 EF 23 0C 5C 30 41 0C 43
-82 4B 32 20 8B 49 00 00 49 93 0A 24 99 52 C4 1D
-16 00 4A 93 05 34 C9 93 02 00 02 34 5A 59 02 00
-CB 4A 02 00 CB 43 03 00 9B 42 1A 20 04 00 9B 42
-1C 20 06 00 18 42 30 20 8B 48 08 00 9B 48 1A 1E
-0A 00 9B 48 14 1E 0C 00 9B 48 1A 1E 0E 00 9B 48
-14 1E 10 00 9B 48 1C 1E 12 00 9B 48 1E 1E 14 00
-82 43 1E 20 6A 93 5F 27 C9 37 8B 43 16 00 7A 93
-02 24 0A 38 95 3F B2 40 3C 21 34 44 B2 40 CE 43
-5A 44 B2 40 02 21 00 21 18 42 00 21 B2 50 06 00
-00 21 19 42 C4 1D 1A 42 C0 1D 0A 89 88 4A 00 00
-19 52 C2 1D 88 49 02 00 88 4D 04 00 79 3F 1B 42
-32 20 0B 93 A3 27 EB 93 02 00 04 20 B0 12 E8 62
-B0 12 B0 62 5A 4B 02 00 CB 43 02 00 09 4B 2B 4B
-82 4B 32 20 7A 93 07 20 B2 40 3C 1D 34 44 B2 40
-5C 44 5A 44 0A 3C 0B 93 89 27 CB 93 02 00 86 37
-92 4B 16 00 1E 20 B0 12 50 5D 21 52 2F 53 B2 80
-06 00 00 21 1A 42 00 21 3E 4A BF 4A 00 00 3D 4A
-30 4D CE 50 85 52 45 41 44 22 5A 43 19 3C 0E 51
-86 57 52 49 54 45 22 00 6A 43 12 3C 36 50 84 44
-45 4C 22 00 6A 42 0C 3C 2C 54 05 43 4C 4F 53 45
-B0 12 5E 5E 30 4D 52 4F 85 4C 4F 41 44 22 7A 43
-2F 83 8F 4E 00 00 0E 4A 82 93 BE 1D 0C 24 0D 12
-87 12 2C 40 2C 40 78 48 78 48 EE 45 0C 46 2C 40
-36 5F 78 48 22 40 0D 12 87 12 2C 40 22 00 54 46
-C0 48 34 5F 3D 41 35 4F 0E 55 82 4E 36 20 1C 43
-92 42 2C 20 22 20 92 42 2E 20 24 20 0E 95 8D 24
-F5 90 3A 00 01 00 01 20 25 53 F5 90 5C 00 00 00
-08 20 15 53 92 42 02 20 22 20 82 43 24 20 0E 95
-70 24 82 45 34 20 B0 12 96 5C 34 40 20 00 A2 93
-02 20 04 24 92 92 22 20 02 20 02 24 14 42 12 20
-B0 12 76 5D 2C 43 0A 43 08 4A 58 0E 08 58 82 48
-30 20 C8 93 00 1E 61 24 39 42 F8 95 00 1E 04 20
-18 53 19 83 FA 23 15 53 F5 90 2E 00 FF FF 19 24
-39 50 03 00 B0 12 F4 5C 06 20 F5 90 5C 00 FF FF
-29 24 0E 95 27 28 15 42 34 20 1A 53 3A 90 10 00
-DB 23 92 53 1A 20 82 63 1C 20 14 83 D1 23 2C 42
-3C 3C F5 90 2E 00 FE FF EE 27 B0 12 F4 5C EB 23
-39 40 03 00 F8 95 00 1E 04 20 18 53 19 83 FA 23
-09 3C 0E 95 E0 2F F5 90 5C 00 FF FF DC 23 B0 12
-F4 5C D9 23 18 42 30 20 92 48 1A 1E 22 20 92 48
-14 1E 24 20 F8 B0 10 00 0B 1E 14 24 82 93 24 20
-06 20 82 93 22 20 03 20 92 42 02 20 22 20 0E 95
-8E 2F 92 42 22 20 2C 20 92 42 24 20 2E 20 8F 43
-00 00 03 3C 2A 4F B0 12 80 5D 34 40 0C 40 35 40
-00 40 3A 4F 3E 4F 0A 93 05 24 7A 93 14 20 0C 93
-02 20 3D 41 30 4D 0D 12 87 12 D0 45 0B 3C 20 4F
-70 65 6E 45 72 72 6F 72 2E 45 74 43 C0 48 90 45
-58 45 AC 41 56 5C 1A 93 B6 20 0C 93 EC 23 30 4D
-C4 5E 04 52 45 41 44 00 2F 83 8F 4E 00 00 1E 42
-32 20 B0 12 08 5D 1E 82 32 20 30 4D 2C 43 12 12
-2A 20 18 42 02 20 08 58 2A 41 82 9A 0A 20 A1 24
-B0 12 C0 5B 09 43 28 93 03 24 89 93 02 1E 03 20
-89 93 00 1E 07 24 09 58 39 90 00 02 F4 23 91 53
-00 00 EA 3F 0C 43 6A 41 B9 43 00 1E 28 93 0F 24
-B9 40 FF 0F 02 1E 09 11 8A 10 09 5A 5A 41 01 00
-0A 11 09 10 82 4A 28 20 82 49 26 20 07 3C 09 11
-C2 49 26 20 C2 4A 27 20 82 43 28 20 3A 41 82 4A
-2A 20 30 41 0A 12 1A 52 08 20 B0 12 00 5C 3A 41
-1A 52 0C 20 30 40 00 5C F2 B0 40 00 A2 04 29 20
-F2 B0 10 00 A2 04 FC 27 5A 42 B0 04 4A 11 59 42
-B4 04 F2 40 20 00 C0 04 D2 42 B1 04 C8 04 1A 52
-E4 04 D2 42 B5 04 C8 04 19 52 E4 04 D2 42 B2 04
-C0 04 B2 40 00 08 C8 04 1A 52 E4 04 92 42 B6 04
-C0 04 B2 80 BC 07 C0 04 B2 40 00 02 C8 04 19 52
-E4 04 30 41 22 2A 2B 2C 2F 3A 3B 3C 3D 3E 3F 5B
-5C 5D 7C 2E 29 92 06 38 39 80 03 00 B0 12 04 62
-39 40 03 00 7A 4B C8 4A 00 1E 82 9B 36 20 12 28
-0D 12 3D 40 0F 00 3C 40 B4 61 7A 9C F3 27 1D 83
-FC 23 3D 41 6A 9C E6 27 3A 80 21 00 EB 3B 18 53
-19 83 E8 23 09 93 06 24 F8 40 20 00 00 1E 18 53
-19 83 FA 23 30 41 2A 93 EC 20 2C 93 0E 24 0C 93
-BB 24 0D 12 87 12 D0 45 0C 3C 20 57 72 69 74 65
-45 72 72 6F 72 00 AC 41 98 60 B0 12 CC 60 92 42
-26 20 22 20 92 42 28 20 24 20 B0 12 44 61 B0 12
-76 5D 18 42 30 20 F8 40 20 00 0B 1E B0 12 58 61
-88 43 0C 1E 88 4A 0E 1E 88 49 10 1E 88 49 12 1E
-98 42 24 20 14 1E 98 42 22 20 1A 1E 88 43 1C 1E
-88 43 1E 1E 1C 43 1B 42 34 20 82 9B 36 20 C9 27
-FB 90 2E 00 00 00 C5 27 39 40 0B 00 B0 12 D4 61
-B0 12 F2 62 2A 43 B0 12 80 5D 0C 93 BA 23 30 4D
-1A 4B 04 00 19 4B 06 00 B0 12 C6 5B B0 12 58 61
-18 4B 08 00 88 49 12 1E 88 4A 16 1E 88 49 18 1E
-98 4B 12 00 1C 1E 98 4B 14 00 1E 1E 1A 4B 04 00
-19 4B 06 00 30 40 02 5C 9B 52 1E 20 12 00 8B 63
-14 00 1A 42 1A 20 19 42 1C 20 30 40 02 5C B2 40
-00 02 1E 20 1B 42 32 20 B0 12 E8 62 82 43 1E 20
-DB 53 03 00 DB 92 12 20 03 00 22 20 CB 43 03 00
-B0 12 68 5C 08 12 0A 12 B0 12 CC 60 2A 91 05 24
-B0 12 44 61 2A 41 B0 12 C0 5B 3A 41 38 41 98 42
-26 20 00 1E 92 93 02 20 03 24 98 42 28 20 02 1E
-B0 12 44 61 9B 42 26 20 0E 00 9B 42 28 20 10 00
-30 40 D6 5C D0 5E 05 57 52 49 54 45 B0 12 FE 62
-30 4D B2 60 07 53 44 5F 45 4D 49 54 B2 90 00 02
-1E 20 02 28 B0 12 FE 62 18 42 1E 20 C8 4E 00 1E
-92 53 1E 20 3E 4F 30 4D 58 4B 13 00 59 4B 14 00
-89 10 09 58 58 4B 15 00 5B 42 12 20 0A 43 3C 42
-08 11 09 10 4A 10 1C 83 0B 11 FA 2B 0A 11 1C 83
-FD 37 1B 42 32 20 19 5B 0A 00 18 6B 0C 00 8B 49
-0E 00 8B 48 10 00 CB 4A 03 00 1A 4B 12 00 BB C0
-FF 01 12 00 3A F0 FF 01 82 4A 1E 20 B0 12 72 5D
-30 4D 0C 93 38 20 38 90 E0 01 03 2C C8 93 20 1E
-02 24 7C 40 E5 00 C8 4C 00 1E B0 12 F2 62 B0 12
-74 5C 82 4A 2A 20 0B 4A B0 12 C0 5B 1A 48 00 1E
-88 43 00 1E 92 93 02 20 09 24 19 48 02 1E 88 43
-02 1E 39 F0 FF 0F 39 90 FF 0F 02 20 3A 93 0E 24
-82 4A 22 20 82 49 24 20 B0 12 74 5C 0B 9A E6 27
-0A 12 0A 4B B0 12 44 61 3A 41 DD 3F 0A 4B B0 12
-44 61 B0 12 5E 5E 30 4D 66 4E 08 54 45 52 4D 32
-53 44 22 00 0D 12 87 12 E4 5E 2C 40 02 00 74 43
-C0 48 36 5F 86 64 3D 41 92 C3 DC 05 08 43 B0 12
-90 44 92 B3 DC 05 FD 27 59 42 CC 05 69 92 0D 24
-C8 49 00 1E 18 53 38 90 FF 01 F3 2B 03 24 B0 12
-FE 62 EC 3F B0 12 A2 44 EC 3F B0 12 A2 44 82 48
-1E 20 B0 12 5E 5E 3D 41 30 4D A6 4D 0A 7B 53 44
-5F 54 4F 4F 4C 53 7D 00 30 4D 74 63 06 53 45 43
-54 4F 52 00 09 4E 2A 4F B0 12 C6 5B 0D 12 87 12
-42 42 D4 42 F0 42 90 45 58 45 2C 40 00 1E 2C 40
-00 02 E2 66 22 40 EA 5E 07 43 4C 55 53 54 45 52
-82 4E 24 20 A2 4F 22 20 B0 12 96 5C 9F 42 1A 20
-00 00 1E 42 1C 20 DE 3F CA 4F 03 46 41 54 2F 82
-8F 4E 02 00 9F 42 08 20 00 00 0E 43 D3 3F DE 5E
-03 44 49 52 2F 82 8F 4E 02 00 92 42 2C 20 22 20
-92 42 2E 20 24 20 E0 3F CC 64 07 7B 54 4F 4F 4C
-53 7D 30 4D 5A 54 03 41 4E 44 3E FF 30 4D 28 50
-02 2E 53 00 8F 4E FE FF 0E 4F 2E 83 8F 4E FA FF
-3E 40 80 1C 2E 83 8F 4E FC FF 3F 80 06 00 2E 8F
-0E 11 0D 12 87 12 2C 40 3C 00 1C 45 5E 43 2C 40
-08 00 1C 45 2C 40 3E 00 1C 45 58 45 82 40 82 40
-8E 41 BA 41 BC 65 5A 40 5A 40 22 40 C0 41 F8 41
-EA 40 26 43 2C 40 02 00 D0 41 BE 65 22 40 70 65
-03 2E 52 53 8F 4E FE FF 8F 41 FA FF 3E 40 E0 1C
-D2 3F A8 4C 01 3F 2E 4E 30 40 26 43 B4 50 03 50
-41 44 85 12 E4 1C 66 63 05 57 4F 52 44 53 0D 12
-87 12 BE 45 2C 40 03 00 6E 45 2C 40 CA 1D EA 40
-F2 65 2C 40 10 00 3C 40 18 41 58 4F 2C 40 00 00
-3C 40 2C 40 10 00 3C 40 18 41 2C 40 00 00 C0 41
-3C 40 F8 41 F2 65 18 41 EA 40 A4 41 B0 41 4E 66
-5A 40 5A 40 F8 41 3C 40 F2 65 18 41 EA 40 2C 40
-02 00 D0 41 30 66 4C 40 B0 41 90 66 3C 40 2C 40
-02 00 20 41 EA 40 92 40 F2 65 18 41 F2 40 3C 40
-C0 48 2C 40 7F 00 6A 65 90 45 00 41 2C 40 0F 00
-6A 65 2C 40 10 00 70 40 20 41 6E 45 AC 41 1C 66
-5A 40 22 40 F8 5E 03 4D 41 58 2E 9F 07 38 2F 53
-30 4D 96 66 03 4D 49 4E 2E 9F F9 3B 3E 4F 30 4D
-6A 64 03 55 2E 52 0D 12 87 12 A8 40 42 42 2C 40
-00 00 A2 42 D4 42 F0 42 B4 40 82 40 20 41 2C 40
-00 00 9A 66 6E 45 90 45 22 40 40 65 04 44 55 4D
-50 00 0D 12 12 12 DC 1D B2 40 10 00 DC 1D 2E 5F
-87 12 70 40 82 40 82 40 26 43 2C 40 01 00 20 41
-26 43 2C 40 FE FF 6A 65 C0 41 BE 45 F8 41 2C 40
-07 00 B6 66 58 45 F8 41 2C 40 10 00 18 41 F8 41
-C0 41 F8 41 00 41 2C 40 03 00 B6 66 E2 41 22 67
-58 45 58 45 F8 41 2C 40 10 00 18 41 F8 41 C0 41
-F8 41 00 41 2C 40 7E 00 A8 66 20 42 9A 66 1C 45
-E2 41 40 67 2C 40 10 00 D0 41 0A 67 B4 40 2C 42
-F2 40 22 40
-@FFFE
-7A 51
-q
!MSP430FR2355.pat
-
-
! ----------------------------------------------
! MSP430FR2355 MEMORY MAP
! ----------------------------------------------
! ----------------------------------------------
PAGESIZE=512! ; MPU unit
! ----------------------------------------------
-! BSL
+! BSL
! ----------------------------------------------
BSL1=\$01000!
BSL2=\$0FFC00!
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW ! reset by wipe and by S1+<reset>
JTAG_SIG2=\$FF82! if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW and JTAG are locked
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
-BSL_CONF_SIG=\$FF88!
-BSL_CONF=\$FF8A!
-BSL_I2C_ADRE=\$FF8C!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
+BSL_CONF_SIG=\$FF88!
+BSL_CONF=\$FF8A!
+BSL_I2C_ADRE=\$FF8C!
JTAG_PASSWORD=\$FF88! 256 bits
BSL_PASSWORD=\$FFE0! 256 bits
INTVECT=\$FFCE! FFCE-FFFF : 24 vectors + reset
-P4_Vec=\$FFCE!
+P4_Vec=\$FFCE!
P3_Vec=\$FFD0!
-P2_Vec=\$FFD2!
+P2_Vec=\$FFD2!
P1_Vec=\$FFD4!
-SAC1SAC3_Vec=\$FFD6!
-SAC0SAC2_Vec=\$FFD8!
-eCOMPx_Vec=\$FFDA!
+SAC1SAC3_Vec=\$FFD6!
+SAC0SAC2_Vec=\$FFD8!
+eCOMPx_Vec=\$FFDA!
ADC10_Vec=\$FFDC!
eUSCI_B1_Vec=\$FFDE!
eUSCI_B0_Vec=\$FFE0!
\#Z=\#2! = SR(1) Zero flag
\#N=\#4! = SR(2) Negative flag
\#GIE=\#8! = SR(3) Enable Int
-\#CPUOFF=\#\$10!= SR(4) CPUOFF
+\#CPUOFF=\#\$10!= SR(4) CPUOFF
\#OSCOFF=\#\$20!= SR(5) OSCOFF
-\#SCG0=\#\$40! = SR(6) SCG0
+\#SCG0=\#\$40! = SR(6) SCG0
\#SCG1=\#\$80! = SR(7) SCG1
\#V=\#\$100! = SR(8) oVerflow flag
-\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
-\#UF10=\#\$400! = SR(10) User Flag 2
-\#UF11=\#\$800! = SR(11) User Flag 3
+\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
+\#UF10=\#\$400! = SR(10) User Flag 2
+\#UF11=\#\$800! = SR(11) User Flag 3
! ============================================
! PORTx, Reg bits :
NOP=MOV \#0,R3! \ one word one cycle
NOP2=\$3C00 ,! \ compile JMP 0 one word two cycles
NOP3=MOV R0,R0! \ MOV PC,PC one word three cycles
-NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
+NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
PAD_I2CCNT=\$20E2! \ count max
PAD_ORG=\$20E4! \ user scratch pad buffer, 84 bytes, grow up
-TIB_I2CADR=\$2138! \ TX I2C address
+TIB_I2CADR=\$2138! \ TX I2C address
TIB_I2CCNT=\$213A! \ count of bytes
TIB_ORG=\$213C! \ Terminal input buffer, 84 bytes, grow up
BUFEND=\$2400!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2402!
BS_FirstSectorL=\$2404!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$241E!
+BufferPtr=\$241E!
BufferLen=\$2420!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2422! 16 bits wide (FAT16)
ClusterH=\$2424! 16 bits wide (FAT16)
-NewClusterL=\$2426! 16 bits wide (FAT16)
-NewClusterH=\$2428! 16 bits wide (FAT16)
+NewClusterL=\$2426! 16 bits wide (FAT16)
+NewClusterH=\$2428! 16 bits wide (FAT16)
CurFATsector=\$242A!
! ---------------------------------------
! ---------------------------------------
DIRclusterL=\$242C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$242E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2430!
+EntryOfst=\$2430!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_BUFofst=22! BUFFER offset ; used by LOAD" and by WRITE"
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2440!
-HandleEnd=\$2500!
+FirstHandle=\$2438!
+HandleEnd=\$24F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2500!
-LOAD_STACK=\$2502!
-LOAD_STACK_END=\$2538!
+LOADPTR=\$24F8!
+LOAD_STACK=\$24FA!
+LOAD_STACK_END=\$2530!
!SD_card Input Buffer
-SDIB_I2CADR=\$2538!
-SDIB_I2CCNT=\$253A!
-SDIB_ORG=\$253C!
+SDIB_I2CADR=\$2530!
+SDIB_I2CCNT=\$2532!
+SDIB_ORG=\$2534!
-SD_END_DATA=\$2590!
+SD_END_DATA=\$2588!
! ----------------------------------------------------------------------
! MSP430FR2355 Peripheral File Map
PMMCTL0=\$120! \ PMM Control 0
PMMCTL1=\$122! \ PMM Control 0
PMMCTL2=\$124! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-SYSCTL=\$140! \ System control
-SYSBSLC=\$142! \ Bootstrap loader configuration area
-SYSJMBC=\$146! \ JTAG mailbox control
-SYSJMBI0=\$148! \ JTAG mailbox input 0
-SYSJMBI1=\$14A! \ JTAG mailbox input 1
-SYSJMBO0=\$14C! \ JTAG mailbox output 0
-SYSJMBO1=\$14E! \ JTAG mailbox output 1
-SYSUNIV=\$15A! \ User NMI vector generator
-SYSSNIV=\$15C! \ System NMI vector generator
-SYSRSTIV=\$15E! \ Reset vector generator
-SYSCFG0=\$160! \ System configuration 0
-SYSCFG1=\$162! \ System configuration 1
-SYSCFG2=\$164! \ System configuration 2
-SYSCFG3=\$166! \ System configuration 3
-
-CSCTL0=\$180! \ CS control 0
-CSCTL1=\$182! \ CS control 1
-CSCTL2=\$184! \ CS control 2
-CSCTL3=\$186! \ CS control 3
-CSCTL4=\$188! \ CS control 4
-CSCTL5=\$18A! \ CS control 5
-CSCTL6=\$18C! \ CS control 6
-CSCTL7=\$18E! \ CS control 7
-CSCTL8=\$190! \ CS control 8
-
-
-FRCTLCTL0=\$1A0! \ FRAM control 0
-GCCTL0=\$1A4! \ General control 0
-GCCTL1=\$1A6! \ General control 1
-
-CRC16DI=\$1C0! \ CRC data input
-CRCDIRB=\$1C2! \ CRC data input reverse byte
-CRCINIRES=\$1C4! \ CRC initialization and result
-CRCRESR=\$1C6! \ CRC result reverse byte
+SYSCTL=\$140! \ System control
+SYSBSLC=\$142! \ Bootstrap loader configuration area
+SYSJMBC=\$146! \ JTAG mailbox control
+SYSJMBI0=\$148! \ JTAG mailbox input 0
+SYSJMBI1=\$14A! \ JTAG mailbox input 1
+SYSJMBO0=\$14C! \ JTAG mailbox output 0
+SYSJMBO1=\$14E! \ JTAG mailbox output 1
+SYSUNIV=\$15A! \ User NMI vector generator
+SYSSNIV=\$15C! \ System NMI vector generator
+SYSRSTIV=\$15E! \ Reset vector generator
+SYSCFG0=\$160! \ System configuration 0
+SYSCFG1=\$162! \ System configuration 1
+SYSCFG2=\$164! \ System configuration 2
+SYSCFG3=\$166! \ System configuration 3
+
+CSCTL0=\$180! \ CS control 0
+CSCTL1=\$182! \ CS control 1
+CSCTL2=\$184! \ CS control 2
+CSCTL3=\$186! \ CS control 3
+CSCTL4=\$188! \ CS control 4
+CSCTL5=\$18A! \ CS control 5
+CSCTL6=\$18C! \ CS control 6
+CSCTL7=\$18E! \ CS control 7
+CSCTL8=\$190! \ CS control 8
+
+
+FRCTLCTL0=\$1A0! \ FRAM control 0
+GCCTL0=\$1A4! \ General control 0
+GCCTL1=\$1A6! \ General control 1
+
+CRC16DI=\$1C0! \ CRC data input
+CRCDIRB=\$1C2! \ CRC data input reverse byte
+CRCINIRES=\$1C4! \ CRC initialization and result
+CRCRESR=\$1C6! \ CRC result reverse byte
WDTCTL=\$1CC! \ WDT control register
P6SEL1=\$24B!
-RTCCTL=\$300! \ RTC control
-RTCIV=\$304! \ RTC interrupt vector word
-RTCMOD=\$308! \ RTC modulo
-RTCCNT=\$30C! \ RTC counter register
+RTCCTL=\$300! \ RTC control
+RTCIV=\$304! \ RTC interrupt vector word
+RTCMOD=\$308! \ RTC modulo
+RTCCNT=\$30C! \ RTC counter register
TBCLR=4!
TBIFG=1!
CCIFG=1!
-TB0CTL=\$380! \ TB0 control
-TB0CCTL0=\$382! \ Capture/compare control 0
-TB0CCTL1=\$384! \ Capture/compare control 1
-TB0CCTL2=\$386! \ Capture/compare control 2
-TB0R=\$390! \ TB0 counter register
-TB0CCR0=\$392! \ Capture/compare register 0
-TB0CCR1=\$394! \ Capture/compare register 1
-TB0CCR2=\$396! \ Capture/compare register 2
-TB0EX0=\$3A0! \ TB0 expansion register 0
-TB0IV=\$3AE! \ TB0 interrupt vector
-
-TB1CTL=\$3C0! \ TB1 control
-TB1CCTL0=\$3C2! \ Capture/compare control 0
-TB1CCTL1=\$3C4! \ Capture/compare control 1
-TB1CCTL2=\$3C6! \ Capture/compare control 2
-TB1R=\$3D0! \ TB0 counter register
-TB1CCR0=\$3D2! \ Capture/compare register 0
-TB1CCR1=\$3D4! \ Capture/compare register 1
-TB1CCR2=\$3D6! \ Capture/compare register 2
-TB1EX0=\$3E0! \ TB0 expansion register 0
-TB1IV=\$3EE! \ TB0 interrupt vector
-
-TB2CTL=\$400! \ TB2 control
-TB2CCTL0=\$402! \ Capture/compare control 0
-TB2CCTL1=\$404! \ Capture/compare control 1
-TB2CCTL2=\$406! \ Capture/compare control 2
-TB2R=\$410! \ TB0 counter register
-TB2CCR0=\$412! \ Capture/compare register 0
-TB2CCR1=\$414! \ Capture/compare register 1
-TB2CCR2=\$416! \ Capture/compare register 2
-TB2EX0=\$420! \ TB0 expansion register 0
-TB2IV=\$42E! \ TB0 interrupt vector
-
-TB3CTL=\$440! \ TB3 control
-TB3CCTL0=\$442! \ Capture/compare control 0
-TB3CCTL1=\$444! \ Capture/compare control 1
-TB3CCTL2=\$446! \ Capture/compare control 2
-TB3CCTL3=\$448! \ Capture/compare control 3
-TB3CCTL4=\$44A! \ Capture/compare control 4
-TB3CCTL6=\$44C! \ Capture/compare control 5
-TB3CCTL6=\$44E! \ Capture/compare control 6
-TB3R=\$450! \ TB0 counter register
-TB3CCR0=\$452! \ Capture/compare register 0
-TB3CCR1=\$454! \ Capture/compare register 1
-TB3CCR2=\$456! \ Capture/compare register 2
-TB3CCR3=\$456! \ Capture/compare register 3
-TB3CCR4=\$456! \ Capture/compare register 4
-TB3CCR5=\$456! \ Capture/compare register 5
-TB3CCR6=\$456! \ Capture/compare register 6
-TB3EX0=\$460! \ TB0 expansion register 0
-TB3IV=\$46E! \ TB0 interrupt vector
-
-
-
-MPY=\$4C0! \ 16-bit operand 1 \96 multiply
-MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
-MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
-MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
-OP2=\$4C8! \ 16-bit operand 2
-RESLO=\$4CA! \ 16 × 16 result low word
-RESHI=\$4CC! \ 16 × 16 result high word
-SUMEXT=\$4CE! \ 16 × 16 sum extension register
-MPY32L=\$4D0! \ 32-bit operand 1 \96 multiply low word
-MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
-MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
-MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
-MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
-MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
-MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
-MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
-OP2L=\$4E0! \ 32-bit operand 2 \96 low word
-OP2H=\$4E2! \ 32-bit operand 2 \96 high word
-RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
-RES1=\$4E6! \ 32 × 32 result 1
-RES2=\$4E8! \ 32 × 32 result 2
-RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
-MPY32CTL0=\$4EC! \ MPY32 control register 0
-
-
-
-UCA0CTLW0=\$500! \ eUSCI_A control word 0
-UCA0CTLW1=\$502! \ eUSCI_A control word 1
-UCA0BRW=\$506!
-UCA0BR0=\$506! \ eUSCI_A baud rate 0
-UCA0BR1=\$507! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$508! \ eUSCI_A modulation control
-UCA0STAT=\$50A! \ eUSCI_A status
-UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
-UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$510! \ eUSCI_A LIN control
-UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
-UCA0IE=\$51A! \ eUSCI_A interrupt enable
-UCA0IFG=\$51C! \ eUSCI_A interrupt flags
-UCA0IV=\$51E! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$580! \ eUSCI_A control word 0
-UCA1CTLW1=\$582! \ eUSCI_A control word 1
-UCA1BRW=\$586!
-UCA1BR0=\$586! \ eUSCI_A baud rate 0
-UCA1BR1=\$587! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$588! \ eUSCI_A modulation control
-UCA1STAT=\$58A! \ eUSCI_A status
-UCA1RXBUF=\$58C! \ eUSCI_A receive buffer
-UCA1TXBUF=\$58E! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$590! \ eUSCI_A LIN control
-UCA1IRTCTL=\$592! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$593! \ eUSCI_A IrDA receive control
-UCA1IE=\$59A! \ eUSCI_A interrupt enable
-UCA1IFG=\$59C! \ eUSCI_A interrupt flags
-UCA1IV=\$59E! \ eUSCI_A interrupt vector word
-
-
-UCB0CTLW0=\$540! \ eUSCI_B control word 0
-UCB0CTLW1=\$542! \ eUSCI_B control word 1
-UCB0BRW=\$546!
-UCB0BR0=\$546! \ eUSCI_B bit rate 0
-UCB0BR1=\$547! \ eUSCI_B bit rate 1
-UCB0STATW=\$548! \ eUSCI_B status word
-UCBCNT0=\$549! \ eUSCI_B hardware count
-UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$55C! \ eUSCI_B received address
-UCB0ADDMASK=\$55E! \ eUSCI_B address mask
-UCB0I2CSA=\$560! \ eUSCI I2C slave address
-UCB0IE=\$56A! \ eUSCI interrupt enable
-UCB0IFG=\$56C! \ eUSCI interrupt flags
-UCB0IV=\$56E! \ eUSCI interrupt vector word
+TB0CTL=\$380! \ TB0 control
+TB0CCTL0=\$382! \ Capture/compare control 0
+TB0CCTL1=\$384! \ Capture/compare control 1
+TB0CCTL2=\$386! \ Capture/compare control 2
+TB0R=\$390! \ TB0 counter register
+TB0CCR0=\$392! \ Capture/compare register 0
+TB0CCR1=\$394! \ Capture/compare register 1
+TB0CCR2=\$396! \ Capture/compare register 2
+TB0EX0=\$3A0! \ TB0 expansion register 0
+TB0IV=\$3AE! \ TB0 interrupt vector
+
+TB1CTL=\$3C0! \ TB1 control
+TB1CCTL0=\$3C2! \ Capture/compare control 0
+TB1CCTL1=\$3C4! \ Capture/compare control 1
+TB1CCTL2=\$3C6! \ Capture/compare control 2
+TB1R=\$3D0! \ TB0 counter register
+TB1CCR0=\$3D2! \ Capture/compare register 0
+TB1CCR1=\$3D4! \ Capture/compare register 1
+TB1CCR2=\$3D6! \ Capture/compare register 2
+TB1EX0=\$3E0! \ TB0 expansion register 0
+TB1IV=\$3EE! \ TB0 interrupt vector
+
+TB2CTL=\$400! \ TB2 control
+TB2CCTL0=\$402! \ Capture/compare control 0
+TB2CCTL1=\$404! \ Capture/compare control 1
+TB2CCTL2=\$406! \ Capture/compare control 2
+TB2R=\$410! \ TB0 counter register
+TB2CCR0=\$412! \ Capture/compare register 0
+TB2CCR1=\$414! \ Capture/compare register 1
+TB2CCR2=\$416! \ Capture/compare register 2
+TB2EX0=\$420! \ TB0 expansion register 0
+TB2IV=\$42E! \ TB0 interrupt vector
+
+TB3CTL=\$440! \ TB3 control
+TB3CCTL0=\$442! \ Capture/compare control 0
+TB3CCTL1=\$444! \ Capture/compare control 1
+TB3CCTL2=\$446! \ Capture/compare control 2
+TB3CCTL3=\$448! \ Capture/compare control 3
+TB3CCTL4=\$44A! \ Capture/compare control 4
+TB3CCTL6=\$44C! \ Capture/compare control 5
+TB3CCTL6=\$44E! \ Capture/compare control 6
+TB3R=\$450! \ TB0 counter register
+TB3CCR0=\$452! \ Capture/compare register 0
+TB3CCR1=\$454! \ Capture/compare register 1
+TB3CCR2=\$456! \ Capture/compare register 2
+TB3CCR3=\$456! \ Capture/compare register 3
+TB3CCR4=\$456! \ Capture/compare register 4
+TB3CCR5=\$456! \ Capture/compare register 5
+TB3CCR6=\$456! \ Capture/compare register 6
+TB3EX0=\$460! \ TB0 expansion register 0
+TB3IV=\$46E! \ TB0 interrupt vector
+
+
+
+MPY=\$4C0! \ 16-bit operand 1 \96 multiply
+MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
+MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
+MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
+OP2=\$4C8! \ 16-bit operand 2
+RESLO=\$4CA! \ 16 × 16 result low word
+RESHI=\$4CC! \ 16 × 16 result high word
+SUMEXT=\$4CE! \ 16 × 16 sum extension register
+MPY32L=\$4D0! \ 32-bit operand 1 \96 multiply low word
+MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
+MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
+MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
+MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
+MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
+MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
+MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
+OP2L=\$4E0! \ 32-bit operand 2 \96 low word
+OP2H=\$4E2! \ 32-bit operand 2 \96 high word
+RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
+RES1=\$4E6! \ 32 × 32 result 1
+RES2=\$4E8! \ 32 × 32 result 2
+RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
+MPY32CTL0=\$4EC! \ MPY32 control register 0
+
+
+
+UCA0CTLW0=\$500! \ eUSCI_A control word 0
+UCA0CTLW1=\$502! \ eUSCI_A control word 1
+UCA0BRW=\$506!
+UCA0BR0=\$506! \ eUSCI_A baud rate 0
+UCA0BR1=\$507! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$508! \ eUSCI_A modulation control
+UCA0STAT=\$50A! \ eUSCI_A status
+UCA0RXBUF=\$50C! \ eUSCI_A receive buffer
+UCA0TXBUF=\$50E! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$510! \ eUSCI_A LIN control
+UCA0IRTCTL=\$512! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$513! \ eUSCI_A IrDA receive control
+UCA0IE=\$51A! \ eUSCI_A interrupt enable
+UCA0IFG=\$51C! \ eUSCI_A interrupt flags
+UCA0IV=\$51E! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$580! \ eUSCI_A control word 0
+UCA1CTLW1=\$582! \ eUSCI_A control word 1
+UCA1BRW=\$586!
+UCA1BR0=\$586! \ eUSCI_A baud rate 0
+UCA1BR1=\$587! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$588! \ eUSCI_A modulation control
+UCA1STAT=\$58A! \ eUSCI_A status
+UCA1RXBUF=\$58C! \ eUSCI_A receive buffer
+UCA1TXBUF=\$58E! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$590! \ eUSCI_A LIN control
+UCA1IRTCTL=\$592! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$593! \ eUSCI_A IrDA receive control
+UCA1IE=\$59A! \ eUSCI_A interrupt enable
+UCA1IFG=\$59C! \ eUSCI_A interrupt flags
+UCA1IV=\$59E! \ eUSCI_A interrupt vector word
+
+
+UCB0CTLW0=\$540! \ eUSCI_B control word 0
+UCB0CTLW1=\$542! \ eUSCI_B control word 1
+UCB0BRW=\$546!
+UCB0BR0=\$546! \ eUSCI_B bit rate 0
+UCB0BR1=\$547! \ eUSCI_B bit rate 1
+UCB0STATW=\$548! \ eUSCI_B status word
+UCBCNT0=\$549! \ eUSCI_B hardware count
+UCB0TBCNT=\$54A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$54C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$54E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$554! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$556! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$558! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$55A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$55C! \ eUSCI_B received address
+UCB0ADDMASK=\$55E! \ eUSCI_B address mask
+UCB0I2CSA=\$560! \ eUSCI I2C slave address
+UCB0IE=\$56A! \ eUSCI interrupt enable
+UCB0IFG=\$56C! \ eUSCI interrupt flags
+UCB0IV=\$56E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-UCB1CTLW0=\$5C0! \ eUSCI_B control word 0
-UCB1CTLW1=\$5C2! \ eUSCI_B control word 1
-UCB1BRW=\$5C6!
-UCB1BR0=\$5C6! \ eUSCI_B bit rate 0
-UCB1BR1=\$5C7! \ eUSCI_B bit rate 1
-UCB1STATW=\$5C8! \ eUSCI_B status word
-UCB1NT0=\$5C9! \ eUSCI_B hardware count
-UCB1TBCNT=\$5CA! \ eUSCI_B byte counter threshold
-UCB1RXBUF=\$5CC! \ eUSCI_B receive buffer
-UCB1TXBUF=\$5CE! \ eUSCI_B transmit buffer
-UCB1I2COA0=\$5D4! \ eUSCI_B I2C own address 0
-UCB1I2COA1=\$5D6! \ eUSCI_B I2C own address 1
-UCB1I2COA2=\$5D8! \ eUSCI_B I2C own address 2
-UCB1I2COA3=\$5DA! \ eUSCI_B I2C own address 3
-UCB1ADDRX=\$5DC! \ eUSCI_B received address
-UCB1ADDMASK=\$5DE! \ eUSCI_B address mask
-UCB1I2CSA=\$5E0! \ eUSCI I2C slave address
-UCB1IE=\$5EA! \ eUSCI interrupt enable
-UCB1IFG=\$5EC! \ eUSCI interrupt flags
-UCB1IV=\$5EE! \ eUSCI interrupt vector word
-
-BAKMEM0=\$660! \ Backup Memory 0
-BAKMEM1=\$662! \ Backup Memory 1
-BAKMEM2=\$664! \ Backup Memory 2
-BAKMEM3=\$666! \ Backup Memory 3
-BAKMEM4=\$668! \ Backup Memory 4
-BAKMEM5=\$66A! \ Backup Memory 5
-BAKMEM6=\$66C! \ Backup Memory 6
-BAKMEM7=\$66E! \ Backup Memory 7
-BAKMEM8=\$670! \ Backup Memory 8
-BAKMEM9=\$672! \ Backup Memory 9
-BAKMEM10=\$674! \ Backup Memory 10
-BAKMEM11=\$676! \ Backup Memory 11
-BAKMEM12=\$678! \ Backup Memory 12
-BAKMEM13=\$67A! \ Backup Memory 13
-BAKMEM14=\$67C! \ Backup Memory 14
-BAKMEM15=\$67E! \ Backup Memory 15
+UCB1CTLW0=\$5C0! \ eUSCI_B control word 0
+UCB1CTLW1=\$5C2! \ eUSCI_B control word 1
+UCB1BRW=\$5C6!
+UCB1BR0=\$5C6! \ eUSCI_B bit rate 0
+UCB1BR1=\$5C7! \ eUSCI_B bit rate 1
+UCB1STATW=\$5C8! \ eUSCI_B status word
+UCB1NT0=\$5C9! \ eUSCI_B hardware count
+UCB1TBCNT=\$5CA! \ eUSCI_B byte counter threshold
+UCB1RXBUF=\$5CC! \ eUSCI_B receive buffer
+UCB1TXBUF=\$5CE! \ eUSCI_B transmit buffer
+UCB1I2COA0=\$5D4! \ eUSCI_B I2C own address 0
+UCB1I2COA1=\$5D6! \ eUSCI_B I2C own address 1
+UCB1I2COA2=\$5D8! \ eUSCI_B I2C own address 2
+UCB1I2COA3=\$5DA! \ eUSCI_B I2C own address 3
+UCB1ADDRX=\$5DC! \ eUSCI_B received address
+UCB1ADDMASK=\$5DE! \ eUSCI_B address mask
+UCB1I2CSA=\$5E0! \ eUSCI I2C slave address
+UCB1IE=\$5EA! \ eUSCI interrupt enable
+UCB1IFG=\$5EC! \ eUSCI interrupt flags
+UCB1IV=\$5EE! \ eUSCI interrupt vector word
+
+BAKMEM0=\$660! \ Backup Memory 0
+BAKMEM1=\$662! \ Backup Memory 1
+BAKMEM2=\$664! \ Backup Memory 2
+BAKMEM3=\$666! \ Backup Memory 3
+BAKMEM4=\$668! \ Backup Memory 4
+BAKMEM5=\$66A! \ Backup Memory 5
+BAKMEM6=\$66C! \ Backup Memory 6
+BAKMEM7=\$66E! \ Backup Memory 7
+BAKMEM8=\$670! \ Backup Memory 8
+BAKMEM9=\$672! \ Backup Memory 9
+BAKMEM10=\$674! \ Backup Memory 10
+BAKMEM11=\$676! \ Backup Memory 11
+BAKMEM12=\$678! \ Backup Memory 12
+BAKMEM13=\$67A! \ Backup Memory 13
+BAKMEM14=\$67C! \ Backup Memory 14
+BAKMEM15=\$67E! \ Backup Memory 15
ICCSC=\$6C00! \ Interrupt Compare Controller Status and Control Register
ICCMVS=\$6C02! \ Interrupt Compare Controller Mask Virtual Stack Register
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
-CP0CTL0=\$8E0! \ Comparator control 0
-CP0CTL1=\$8E2! \ Comparator control 1
-CP0INT=\$8E6! \ Comparator interrupt
-CP0IV=\$8E8! \ Comparator interrupt vector
-CP0DACCTL=\$8EA! \ Comparator built-in DAC control
-CP0DACDATA=\$8EC! \ Comparator built-in DAC data
-
-CP1CTL0=\$900! \ Comparator control 0
-CP1CTL1=\$902! \ Comparator control 1
-CP1INT=\$906! \ Comparator interrupt
-CP1IV=\$908! \ Comparator interrupt vector
-CP1DACCTL=\$90A! \ Comparator built-in DAC control
-CP1DACDATA=\$90C! \ Comparator built-in DAC data
-
-SAC0OA=\$0C80! SAC0 OA control
-SAC0PGA=\$0C82! SAC0 PGA control
-SAC0DAC=\$0C84! SAC0 DAC control
-SAC0DAT=\$0C86! SAC0 DAC data
-SAC0DATSTS=\$0C88! SAC0 DAC status
-SAC0IV=\$0C8A! SAC0 interrupt vector
-
-SAC1OA=\$0C90! SAC1 OA control
-SAC1PGA=\$0C92! SAC1 PGA control
-SAC1DAC=\$0C94! SAC1 DAC control
-SAC1DAT=\$0C96! SAC1 DAC data
-SAC1DATSTS=\$0C98! SAC1 DAC status
-SAC1IV=\$0C9A! SAC1 interrupt vector
-
-SAC2OA=\$0CA0! SAC2 OA control
-SAC2PGA=\$0CA2! SAC2 PGA control
-SAC2DAC=\$0CA4! SAC2 DAC control
-SAC2DAT=\$0CA6! SAC2 DAC data
-SAC2DATSTS=\$0CA8! SAC2 DAC status
-SAC2IV=\$0CAA! SAC2 interrupt vector
-
-SAC3OA=\$0CB0! SAC3 OA control
-SAC3PGA=\$0CB2! SAC3 PGA control
-SAC3DAC=\$0CB4! SAC3 DAC control
-SAC3DAT=\$0CB6! SAC3 DAC data
-SAC3DATSTS=\$0CB8! SAC3 DAC status
-SAC3IV=\$0CBA! SAC3 interrupt vector
+CP0CTL0=\$8E0! \ Comparator control 0
+CP0CTL1=\$8E2! \ Comparator control 1
+CP0INT=\$8E6! \ Comparator interrupt
+CP0IV=\$8E8! \ Comparator interrupt vector
+CP0DACCTL=\$8EA! \ Comparator built-in DAC control
+CP0DACDATA=\$8EC! \ Comparator built-in DAC data
+
+CP1CTL0=\$900! \ Comparator control 0
+CP1CTL1=\$902! \ Comparator control 1
+CP1INT=\$906! \ Comparator interrupt
+CP1IV=\$908! \ Comparator interrupt vector
+CP1DACCTL=\$90A! \ Comparator built-in DAC control
+CP1DACDATA=\$90C! \ Comparator built-in DAC data
+
+SAC0OA=\$0C80! SAC0 OA control
+SAC0PGA=\$0C82! SAC0 PGA control
+SAC0DAC=\$0C84! SAC0 DAC control
+SAC0DAT=\$0C86! SAC0 DAC data
+SAC0DATSTS=\$0C88! SAC0 DAC status
+SAC0IV=\$0C8A! SAC0 interrupt vector
+
+SAC1OA=\$0C90! SAC1 OA control
+SAC1PGA=\$0C92! SAC1 PGA control
+SAC1DAC=\$0C94! SAC1 DAC control
+SAC1DAT=\$0C96! SAC1 DAC data
+SAC1DATSTS=\$0C98! SAC1 DAC status
+SAC1IV=\$0C9A! SAC1 interrupt vector
+
+SAC2OA=\$0CA0! SAC2 OA control
+SAC2PGA=\$0CA2! SAC2 PGA control
+SAC2DAC=\$0CA4! SAC2 DAC control
+SAC2DAT=\$0CA6! SAC2 DAC data
+SAC2DATSTS=\$0CA8! SAC2 DAC status
+SAC2IV=\$0CAA! SAC2 interrupt vector
+
+SAC3OA=\$0CB0! SAC3 OA control
+SAC3PGA=\$0CB2! SAC3 PGA control
+SAC3DAC=\$0CB4! SAC3 DAC control
+SAC3DAT=\$0CB6! SAC3 DAC data
+SAC3DATSTS=\$0CB8! SAC3 DAC status
+SAC3IV=\$0CBA! SAC3 interrupt vector
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2440!
-HandleEnd=\$2500!
+FirstHandle=\$2438!
+HandleEnd=\$24F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2500!
-LOAD_STACK=\$2502!
-LOAD_STACK_END=\$2538!
+LOADPTR=\$24F8!
+LOAD_STACK=\$24FA!
+LOAD_STACK_END=\$2530!
!SD_card Input Buffer
-SDIB_I2CADR=\$2538!
-SDIB_I2CCNT=\$253A!
-SDIB_ORG=\$253C!
+SDIB_I2CADR=\$2530!
+SDIB_I2CCNT=\$2532!
+SDIB_ORG=\$2534!
-SD_END_DATA=\$2590!
+SD_END_DATA=\$2588!
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2440!
-HandleEnd=\$2500!
+FirstHandle=\$2438!
+HandleEnd=\$24F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2500!
-LOAD_STACK=\$2502!
-LOAD_STACK_END=\$2538!
+LOADPTR=\$24F8!
+LOAD_STACK=\$24FA!
+LOAD_STACK_END=\$2530!
!SD_card Input Buffer
-SDIB_I2CADR=\$2538!
-SDIB_I2CCNT=\$253A!
-SDIB_ORG=\$253C!
+SDIB_I2CADR=\$2530!
+SDIB_I2CCNT=\$2532!
+SDIB_ORG=\$2534!
-SD_END_DATA=\$2590!
+SD_END_DATA=\$2588!
! ============================================
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2440!
-HandleEnd=\$2500!
+FirstHandle=\$2438!
+HandleEnd=\$24F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2500!
-LOAD_STACK=\$2502!
-LOAD_STACK_END=\$2538!
+LOADPTR=\$24F8!
+LOAD_STACK=\$24FA!
+LOAD_STACK_END=\$2530!
!SD_card Input Buffer
-SDIB_I2CADR=\$2538!
-SDIB_I2CCNT=\$253A!
-SDIB_ORG=\$253C!
+SDIB_I2CADR=\$2530!
+SDIB_I2CCNT=\$2532!
+SDIB_ORG=\$2534!
-SD_END_DATA=\$2590!
+SD_END_DATA=\$2588!
! ============================================
INFOASTART=\$1880!
INFOAEND=\$18FF!
TLVSTAT=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
-TLVEND=\$1A7F!
+TLVEND=\$1A7F!
RAMSTART=\$1C00!
RAMEND=\$1FFF!
PROGRAMSTART=\$C200! Code space start
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
JTAG_PASSWORD=\$FF88! 256 bits
INTVECT=\$FFCE! FFCE-FFFF
BSL_PASSWORD=\$FFE0! 256 bits
TA1_0_Vec=\$FFE2! only CCIFG0
DMA_Vec=\$FFE4!
!eUSCI_A1_Vec=\$FFE6!
-TA0_x_Vec=\$FFE8! All others
+TA0_x_Vec=\$FFE8! All others
TA0_0_Vec=\$FFEA! only CCIFG0
ADC10_B_Vec=\$FFEC!
eUSCI_B0_Vec=\$FFEE!
\#Z=\#2! = SR(1) Zero flag
\#N=\#4! = SR(2) Negative flag
\#GIE=\#8! = SR(3) Enable Int
-\#CPUOFF=\#\$10!= SR(4) CPUOFF
+\#CPUOFF=\#\$10!= SR(4) CPUOFF
\#OSCOFF=\#\$20!= SR(5) OSCOFF
-\#SCG0=\#\$40! = SR(6) SCG0
+\#SCG0=\#\$40! = SR(6) SCG0
\#SCG1=\#\$80! = SR(7) SCG1
\#V=\#\$100! = SR(8) oVerflow flag
-\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
-\#UF10=\#\$400! = SR(10) User Flag 2
-\#UF11=\#\$800! = SR(11) User Flag 3
+\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
+\#UF10=\#\$400! = SR(10) User Flag 2
+\#UF11=\#\$800! = SR(11) User Flag 3
! ============================================
! PORTx, Reg bits :
NOP=MOV \#0,R3! \ one word one cycle
NOP2=\$3C00 ,! \ compile JMP 0 one word two cycles
NOP3=MOV R0,R0! \ MOV PC,PC one word three cycles
-NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
+NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
! =================================================
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
-FATtype=\$181A!
-BS_FirstSectorL=\$181C!
-BS_FirstSectorH=\$181E!
-OrgFAT1=\$1820!
-FATSize=\$1822!
-OrgFAT2=\$1824!
-OrgRootDir=\$1826!
-OrgClusters=\$1828! Sector of Cluster 0
-SecPerClus=\$182A!
+FATtype=\$182C!
+BS_FirstSectorL=\$182E!
+BS_FirstSectorH=\$1830!
+OrgFAT1=\$1832!
+FATSize=\$1834!
+OrgFAT2=\$1836!
+OrgRootDir=\$1838!
+OrgClusters=\$183A! Sector of Cluster 0
+SecPerClus=\$183C!
! ---------------------------------------
! SD command
! ---------------------------------------
-SD_CMD_FRM=\$182C! 6 bytes SD_CMDx inverted frame \${CRC,ll,LL,hh,HH,CMD}
-SD_CMD_FRM0=\$182C! CRC:ll word access
-SD_CMD_FRM1=\$182D! ll byte access
-SD_CMD_FRM2=\$182E! LL:hh word access
-SD_CMD_FRM3=\$182F! hh byte access
-SD_CMD_FRM4=\$1830! HH:CMD word access
-SD_CMD_FRM5=\$1831! CMD byte access
-SectorL=\$1832! 2 words
-SectorH=\$1834!
+SD_CMD_FRM=\$183E! 6 bytes SD_CMDx inverted frame \${CRC,ll,LL,hh,HH,CMD}
+SD_CMD_FRM0=\$183E! CRC:ll word access
+SD_CMD_FRM1=\$183F! ll byte access
+SD_CMD_FRM2=\$1840! LL:hh word access
+SD_CMD_FRM3=\$1841! hh byte access
+SD_CMD_FRM4=\$1842! HH:CMD word access
+SD_CMD_FRM5=\$1843! CMD byte access
+SectorL=\$1844! 2 words
+SectorH=\$1846!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$1836!
-BufferLen=\$1838!
+BufferPtr=\$1848!
+BufferLen=\$184A!
! ---------------------------------------
! FAT entry
! ---------------------------------------
-ClusterL=\$183A! 16 bits wide (FAT16)
-ClusterH=\$183C! 16 bits wide (FAT16)
-NewClusterL=\$183E! 16 bits wide (FAT16)
-NewClusterH=\$1840! 16 bits wide (FAT16)
-CurFATsector=\$1842!
+ClusterL=\$184C! 16 bits wide (FAT16)
+ClusterH=\$184E! 16 bits wide (FAT16)
+NewClusterL=\$1850! 16 bits wide (FAT16)
+NewClusterH=\$1852! 16 bits wide (FAT16)
+CurFATsector=\$1854!
! ---------------------------------------
! DIR entry
! ---------------------------------------
-DIRclusterL=\$1844! contains the Cluster of current directory ; 1 if FAT16 root directory
-DIRclusterH=\$1846! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$1848!
+DIRclusterL=\$1856! contains the Cluster of current directory ; 1 if FAT16 root directory
+DIRclusterH=\$1858! contains the Cluster of current directory ; 1 if FAT16 root directory
+EntryOfst=\$185A!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
-CurrentHdl=\$184A! contains the address of the last opened file structure, or 0
+CurrentHdl=\$185C! contains the address of the last opened file structure, or 0
! ---------------------------------------
! Load file operation
! ---------------------------------------
-pathname=\$184C! address of pathname string
-EndOfPath=\$184E!
+pathname=\$185E! address of pathname string
+EndOfPath=\$1860!
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_BUFofst=22! BUFFER offset ; used by LOAD" and by WRITE"
-!OpenedFirstFile ; "openedFile" structure
-FirstHandle=\$1858!
+!OpenedFirstFile ; "openedFile" structure
+FirstHandle=\$1862!
HandleMax=5!
HandleLenght=24!
-HandleEnd=\$18D0!
+HandleEnd=\$18DA!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$18D0!
-LOAD_STACK=\$18D2!
-LOAD_STACK_END=\$18F6!
+LOADPTR=\$18DA!
+LOAD_STACK=\$18DC!
+LOAD_STACK_END=\$1900!
! ============================================
! FORTH RAM areas :
PAD_I2CCNT=\$1CE2! \ count max
PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-TIB_I2CADR=\$1D38! \ TX I2C address
+TIB_I2CADR=\$1D38! \ TX I2C address
TIB_I2CCNT=\$1D3A! \ count of bytes
TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
SFRRPCR=\$104! \ SFR reset pin control
PMMCTL0=\$120! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-FRCTLCTL0=\$140! \ FRAM control 0
-GCCTL0=\$144! \ General control 0
-GCCTL1=\$146! \ General control 1
+FRCTLCTL0=\$140! \ FRAM control 0
+GCCTL0=\$144! \ General control 0
+GCCTL1=\$146! \ General control 1
-CRC16DI=\$150! \ CRC data input
-CRCDIRB=\$152! \ CRC data input reverse byte
-CRCINIRES=\$154! \ CRC initialization and result
-CRCRESR=\$156! \ CRC result reverse byte
+CRC16DI=\$150! \ CRC data input
+CRCDIRB=\$152! \ CRC data input reverse byte
+CRCINIRES=\$154! \ CRC initialization and result
+CRCRESR=\$156! \ CRC result reverse byte
WDTCTL=\$15C! \ WDT control register
CSCTL0=\$160! \ CS control 0
-CSCTL0_H=\$161! \
-CSCTL1=\$162! \ CS control 1
-CSCTL2=\$164! \ CS control 2
-CSCTL3=\$166! \ CS control 3
-CSCTL4=\$168! \ CS control 4
-CSCTL5=\$16A! \ CS control 5
-CSCTL6=\$16C! \ CS control 6
-
-SYSCTL=\$180! \ System control
-SYSJMBC=\$186! \ JTAG mailbox control
-SYSJMBI0=\$188! \ JTAG mailbox input 0
-SYSJMBI1=\$18A! \ JTAG mailbox input 1
-SYSJMBO0=\$18C! \ JTAG mailbox output 0
-SYSJMBO1=\$18E! \ JTAG mailbox output 1
-SYSBERRIV=\$198! \ Bus Error vector generator
-SYSUNIV=\$19A! \ User NMI vector generator
-SYSSNIV=\$19C! \ System NMI vector generator
-SYSRSTIV=\$19E! \ Reset vector generator
-
-REFCTL=\$1b0! \ Shared reference control
+CSCTL0_H=\$161! \
+CSCTL1=\$162! \ CS control 1
+CSCTL2=\$164! \ CS control 2
+CSCTL3=\$166! \ CS control 3
+CSCTL4=\$168! \ CS control 4
+CSCTL5=\$16A! \ CS control 5
+CSCTL6=\$16C! \ CS control 6
+
+SYSCTL=\$180! \ System control
+SYSJMBC=\$186! \ JTAG mailbox control
+SYSJMBI0=\$188! \ JTAG mailbox input 0
+SYSJMBI1=\$18A! \ JTAG mailbox input 1
+SYSJMBO0=\$18C! \ JTAG mailbox output 0
+SYSJMBO1=\$18E! \ JTAG mailbox output 1
+SYSBERRIV=\$198! \ Bus Error vector generator
+SYSUNIV=\$19A! \ User NMI vector generator
+SYSSNIV=\$19C! \ System NMI vector generator
+SYSRSTIV=\$19E! \ Reset vector generator
+
+REFCTL=\$1b0! \ Shared reference control
PAIN=\$200!
PAOUT=\$202!
TBIFG=1!
CCIFG=1!
-TA0CTL=\$340! \ TA0 control
-TA0CCTL0=\$342! \ Capture/compare control 0
-TA0CCTL1=\$344! \ Capture/compare control 1
-TA0CCTL2=\$346! \ Capture/compare control 2
-TA0R=\$350! \ TA0 counter register
-TA0CCR0=\$352! \ Capture/compare register 0
-TA0CCR1=\$354! \ Capture/compare register 1
-TA0CCR2=\$356! \ Capture/compare register 2
-TA0EX0=\$360! \ TA0 expansion register 0
-TA0IV=\$36E! \ TA0 interrupt vector
-
-TA1CTL=\$380! \ TA1 control
-TA1CCTL0=\$382! \ Capture/compare control 0
-TA1CCTL1=\$384! \ Capture/compare control 1
-TA1CCTL2=\$386! \ Capture/compare control 2
-TA1R=\$390! \ TA1 counter register
-TA1CCR0=\$392! \ Capture/compare register 0
-TA1CCR1=\$394! \ Capture/compare register 1
-TA1CCR2=\$396! \ Capture/compare register 2
-TA1EX0=\$3A0! \ TA1 expansion register 0
-TA1IV=\$3AE! \ TA1 interrupt vector
-
-TB0CTL=\$3C0! \ TB0 control
-TB0CCTL0=\$3C2! \ Capture/compare control 0
-TB0CCTL1=\$3C4! \ Capture/compare control 1
-TB0CCTL2=\$3C6! \ Capture/compare control 2
-TB0R=\$3D0! \ TB0 counter register
-TB0CCR0=\$3D2! \ Capture/compare register 0
-TB0CCR1=\$3D4! \ Capture/compare register 1
-TB0CCR2=\$3D6! \ Capture/compare register 2
-TB0EX0=\$3E0! \ TB0 expansion register 0
-TB0IV=\$3EE! \ TB0 interrupt vector
+TA0CTL=\$340! \ TA0 control
+TA0CCTL0=\$342! \ Capture/compare control 0
+TA0CCTL1=\$344! \ Capture/compare control 1
+TA0CCTL2=\$346! \ Capture/compare control 2
+TA0R=\$350! \ TA0 counter register
+TA0CCR0=\$352! \ Capture/compare register 0
+TA0CCR1=\$354! \ Capture/compare register 1
+TA0CCR2=\$356! \ Capture/compare register 2
+TA0EX0=\$360! \ TA0 expansion register 0
+TA0IV=\$36E! \ TA0 interrupt vector
+
+TA1CTL=\$380! \ TA1 control
+TA1CCTL0=\$382! \ Capture/compare control 0
+TA1CCTL1=\$384! \ Capture/compare control 1
+TA1CCTL2=\$386! \ Capture/compare control 2
+TA1R=\$390! \ TA1 counter register
+TA1CCR0=\$392! \ Capture/compare register 0
+TA1CCR1=\$394! \ Capture/compare register 1
+TA1CCR2=\$396! \ Capture/compare register 2
+TA1EX0=\$3A0! \ TA1 expansion register 0
+TA1IV=\$3AE! \ TA1 interrupt vector
+
+TB0CTL=\$3C0! \ TB0 control
+TB0CCTL0=\$3C2! \ Capture/compare control 0
+TB0CCTL1=\$3C4! \ Capture/compare control 1
+TB0CCTL2=\$3C6! \ Capture/compare control 2
+TB0R=\$3D0! \ TB0 counter register
+TB0CCR0=\$3D2! \ Capture/compare register 0
+TB0CCR1=\$3D4! \ Capture/compare register 1
+TB0CCR2=\$3D6! \ Capture/compare register 2
+TB0EX0=\$3E0! \ TB0 expansion register 0
+TB0IV=\$3EE! \ TB0 interrupt vector
! RTC_B
-RTCCTL0=\$4A0! \ RTC control 0
-RTCCTL1=\$4A1! \ RTC control 1
-RTCCTL2=\$4A2! \ RTC control 2
-RTCCTL3=\$4A3! \ RTC control 3
-RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
-RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
-RTCPS0=\$4AC! \ RTC prescaler 0
-RTCPS1=\$4AD! \ RTC prescaler 1
-RTCIV=\$4AE! \ RTC interrupt vector word
-RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
-RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
-RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
-RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
-RTCDAY=\$4B4! \ RTC days
+RTCCTL0=\$4A0! \ RTC control 0
+RTCCTL1=\$4A1! \ RTC control 1
+RTCCTL2=\$4A2! \ RTC control 2
+RTCCTL3=\$4A3! \ RTC control 3
+RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
+RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
+RTCPS0=\$4AC! \ RTC prescaler 0
+RTCPS1=\$4AD! \ RTC prescaler 1
+RTCIV=\$4AE! \ RTC interrupt vector word
+RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
+RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
+RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
+RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
+RTCDAY=\$4B4! \ RTC days
RTCMON=\$4B5! \ RTC month
-RTCYEAR=\$4B6!
-RTCYEARL=\$4B6! \ RTC year low
-RTCYEARH=\$4B7! \ RTC year high
-RTCAMIN=\$4B8! \ RTC alarm minutes
-RTCAHOUR=\$4B9! \ RTC alarm hours
-RTCADOW=\$4BA! \ RTC alarm day of week
-RTCADAY=\$4BB! \ RTC alarm days
-BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
-BCD2BIN=\$4BE! \ BCD-to-binary conversion register
+RTCYEAR=\$4B6!
+RTCYEARL=\$4B6! \ RTC year low
+RTCYEARH=\$4B7! \ RTC year high
+RTCAMIN=\$4B8! \ RTC alarm minutes
+RTCAHOUR=\$4B9! \ RTC alarm hours
+RTCADOW=\$4BA! \ RTC alarm day of week
+RTCADAY=\$4BB! \ RTC alarm days
+BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
+BCD2BIN=\$4BE! \ BCD-to-binary conversion register
RTCHOLD=\$40!
RTCRDY=\$10!
-MPY=\$4C0! \ 16-bit operand 1 \96 multiply
-MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
-MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
-MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
-OP2=\$4C8! \ 16-bit operand 2
-RESLO=\$4CA! \ 16 × 16 result low word
-RESHI=\$4CC! \ 16 × 16 result high word
-SUMEXT=\$4CE! \ 16 × 16 sum extension register
+MPY=\$4C0! \ 16-bit operand 1 \96 multiply
+MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
+MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
+MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
+OP2=\$4C8! \ 16-bit operand 2
+RESLO=\$4CA! \ 16 × 16 result low word
+RESHI=\$4CC! \ 16 × 16 result high word
+SUMEXT=\$4CE! \ 16 × 16 sum extension register
MPY32L=\$4D0! \ 32-bit operand 1 \96 multiply low word
-MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
-MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
-MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
-MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
-MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
-MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
-MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
-OP2L=\$4E0! \ 32-bit operand 2 \96 low word
-OP2H=\$4E2! \ 32-bit operand 2 \96 high word
-RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
-RES1=\$4E6! \ 32 × 32 result 1
-RES2=\$4E8! \ 32 × 32 result 2
-RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
-MPY32CTL0=\$4EC! \ MPY32 control register 0
+MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
+MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
+MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
+MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
+MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
+MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
+MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
+OP2L=\$4E0! \ 32-bit operand 2 \96 low word
+OP2H=\$4E2! \ 32-bit operand 2 \96 high word
+RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
+RES1=\$4E6! \ 32 × 32 result 1
+RES2=\$4E8! \ 32 × 32 result 2
+RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
+MPY32CTL0=\$4EC! \ MPY32 control register 0
DMAIFG=8!
-DMA0CTL=\$500! \ DMA channel 0 control
-DMA0SAL=\$502! \ DMA channel 0 source address low
-DMA0SAH=\$504! \ DMA channel 0 source address high
-DMA0DAL=\$506! \ DMA channel 0 destination address low
-DMA0DAH=\$508! \ DMA channel 0 destination address high
-DMA0SZ=\$50A! \ DMA channel 0 transfer size
-DMA1CTL=\$510! \ DMA channel 1 control
-DMA1SAL=\$512! \ DMA channel 1 source address low
-DMA1SAH=\$514! \ DMA channel 1 source address high
-DMA1DAL=\$516! \ DMA channel 1 destination address low
-DMA1DAH=\$518! \ DMA channel 1 destination address high
-DMA1SZ=\$51A! \ DMA channel 1 transfer size
-DMA2CTL=\$520! \ DMA channel 2 control
-DMA2SAL=\$522! \ DMA channel 2 source address low
-DMA2SAH=\$524! \ DMA channel 2 source address high
-DMA2DAL=\$526! \ DMA channel 2 destination address low
-DMA2DAH=\$528! \ DMA channel 2 destination address high
-DMA2SZ=\$52A! \ DMA channel 2 transfer size
-DMACTL0=\$530! \ DMA module control 0
-DMACTL1=\$532! \ DMA module control 1
-DMACTL2=\$534! \ DMA module control 2
-DMACTL3=\$536! \ DMA module control 3
-DMACTL4=\$538! \ DMA module control 4
-DMAIV=\$53A! \ DMA interrupt vector
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEG=\$5A4! \ MPU Segmentation Register
-MPUSAM=\$5A6! \ MPU access management
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCB0BCNT=\$649! \ eUSCI_B Byte Count !WARNING! byte access!
-UCB0TBCNT=\$64A! \ eUSCI_B Byte Count Threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
+DMA0CTL=\$500! \ DMA channel 0 control
+DMA0SAL=\$502! \ DMA channel 0 source address low
+DMA0SAH=\$504! \ DMA channel 0 source address high
+DMA0DAL=\$506! \ DMA channel 0 destination address low
+DMA0DAH=\$508! \ DMA channel 0 destination address high
+DMA0SZ=\$50A! \ DMA channel 0 transfer size
+DMA1CTL=\$510! \ DMA channel 1 control
+DMA1SAL=\$512! \ DMA channel 1 source address low
+DMA1SAH=\$514! \ DMA channel 1 source address high
+DMA1DAL=\$516! \ DMA channel 1 destination address low
+DMA1DAH=\$518! \ DMA channel 1 destination address high
+DMA1SZ=\$51A! \ DMA channel 1 transfer size
+DMA2CTL=\$520! \ DMA channel 2 control
+DMA2SAL=\$522! \ DMA channel 2 source address low
+DMA2SAH=\$524! \ DMA channel 2 source address high
+DMA2DAL=\$526! \ DMA channel 2 destination address low
+DMA2DAH=\$528! \ DMA channel 2 destination address high
+DMA2SZ=\$52A! \ DMA channel 2 transfer size
+DMACTL0=\$530! \ DMA module control 0
+DMACTL1=\$532! \ DMA module control 1
+DMACTL2=\$534! \ DMA module control 2
+DMACTL3=\$536! \ DMA module control 3
+DMACTL4=\$538! \ DMA module control 4
+DMAIV=\$53A! \ DMA interrupt vector
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEG=\$5A4! \ MPU Segmentation Register
+MPUSAM=\$5A6! \ MPU access management
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCB0BCNT=\$649! \ eUSCI_B Byte Count !WARNING! byte access!
+UCB0TBCNT=\$64A! \ eUSCI_B Byte Count Threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-ADC10CTL0=\$700! \ ADC10_B Control register 0
-ADC10CTL1=\$702! \ ADC10_B Control register 1
-ADC10CTL2=\$704! \ ADC10_B Control register 2
-ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
-ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
-ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
-ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
-ADC10IE=\$71A! \ ADC10_B Interrupt Enable
-ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
-ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
+ADC10CTL0=\$700! \ ADC10_B Control register 0
+ADC10CTL1=\$702! \ ADC10_B Control register 1
+ADC10CTL2=\$704! \ ADC10_B Control register 2
+ADC10LO=\$706! \ ADC10_B Window Comparator Low Threshold
+ADC10HI=\$708! \ ADC10_B Window Comparator High Threshold
+ADC10MCTL0=\$70A! \ ADC10_B Memory Control Register 0
+ADC10MEM0=\$712! \ ADC10_B Conversion Memory Register
+ADC10IE=\$71A! \ ADC10_B Interrupt Enable
+ADC10IFG=\$71C! \ ADC10_B Interrupt Flags
+ADC10IV=\$71E! \ ADC10_B Interrupt Vector Word
ADCON=\$10!
ADCSTART=\$03!
CDIFG=1!
CDIIFG=2!
-CDCTL0=\$8C0! \ Comparator_D control register 0
-CDCTL1=\$8C2! \ Comparator_D control register 1
-CDCTL2=\$8C4! \ Comparator_D control register 2
-CDCTL3=\$8C6! \ Comparator_D control register 3
-CDINT=\$8CC! \ Comparator_D interrupt register
-CDIV=\$8CE! \ Comparator_D interrupt vector word
+CDCTL0=\$8C0! \ Comparator_D control register 0
+CDCTL1=\$8C2! \ Comparator_D control register 1
+CDCTL2=\$8C4! \ Comparator_D control register 2
+CDCTL3=\$8C6! \ Comparator_D control register 3
+CDINT=\$8CC! \ Comparator_D interrupt register
+CDIV=\$8CE! \ Comparator_D interrupt vector word
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
-
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
-
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ---------------------------------------
! FAT16 FileSystemInfos
! ---------------------------------------
-FATtype=\$181A!
-BS_FirstSectorL=\$181C!
-BS_FirstSectorH=\$181E!
-OrgFAT1=\$1820!
-FATSize=\$1822!
-OrgFAT2=\$1824!
-OrgRootDir=\$1826!
-OrgClusters=\$1828! Sector of Cluster 0
-SecPerClus=\$182A!
+FATtype=\$182C!
+BS_FirstSectorL=\$182E!
+BS_FirstSectorH=\$1830!
+OrgFAT1=\$1832!
+FATSize=\$1834!
+OrgFAT2=\$1836!
+OrgRootDir=\$1838!
+OrgClusters=\$183A! Sector of Cluster 0
+SecPerClus=\$183C!
! ---------------------------------------
! SD command
! ---------------------------------------
-SD_CMD_FRM=\$182C! 6 bytes SD_CMDx inverted frame \${CRC,ll,LL,hh,HH,CMD}
-SD_CMD_FRM0=\$182C! CRC:ll word access
-SD_CMD_FRM1=\$182D! ll byte access
-SD_CMD_FRM2=\$182E! LL:hh word access
-SD_CMD_FRM3=\$182F! hh byte access
-SD_CMD_FRM4=\$1830! HH:CMD word access
-SD_CMD_FRM5=\$1831! CMD byte access
-SectorL=\$1832! 2 words
-SectorH=\$1834!
+SD_CMD_FRM=\$183E! 6 bytes SD_CMDx inverted frame \${CRC,ll,LL,hh,HH,CMD}
+SD_CMD_FRM0=\$183E! CRC:ll word access
+SD_CMD_FRM1=\$183F! ll byte access
+SD_CMD_FRM2=\$1840! LL:hh word access
+SD_CMD_FRM3=\$1841! hh byte access
+SD_CMD_FRM4=\$1842! HH:CMD word access
+SD_CMD_FRM5=\$1843! CMD byte access
+SectorL=\$1844! 2 words
+SectorH=\$1846!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$1836!
-BufferLen=\$1838!
+BufferPtr=\$1848!
+BufferLen=\$184A!
! ---------------------------------------
! FAT entry
! ---------------------------------------
-ClusterL=\$183A! 16 bits wide (FAT16)
-ClusterH=\$183C! 16 bits wide (FAT16)
-NewClusterL=\$183E! 16 bits wide (FAT16)
-NewClusterH=\$1840! 16 bits wide (FAT16)
-CurFATsector=\$1842!
+ClusterL=\$184C! 16 bits wide (FAT16)
+ClusterH=\$184E! 16 bits wide (FAT16)
+NewClusterL=\$1850! 16 bits wide (FAT16)
+NewClusterH=\$1852! 16 bits wide (FAT16)
+CurFATsector=\$1854!
! ---------------------------------------
! DIR entry
! ---------------------------------------
-DIRclusterL=\$1844! contains the Cluster of current directory ; 1 if FAT16 root directory
-DIRclusterH=\$1846! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$1848!
+DIRclusterL=\$1856! contains the Cluster of current directory ; 1 if FAT16 root directory
+DIRclusterH=\$1858! contains the Cluster of current directory ; 1 if FAT16 root directory
+EntryOfst=\$185A!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
-CurrentHdl=\$184A! contains the address of the last opened file structure, or 0
+CurrentHdl=\$185C! contains the address of the last opened file structure, or 0
! ---------------------------------------
! Load file operation
! ---------------------------------------
-pathname=\$184C! address of pathname string
-EndOfPath=\$184E!
+pathname=\$185E! address of pathname string
+EndOfPath=\$1860!
! ---------------------------------------
! Handle structure
!OpenedFirstFile ; "openedFile" structure
+FirstHandle=\$1862!
HandleMax=5!
HandleLenght=24!
-FirstHandle=\$1858!
-HandleEnd=\$18D0!
+HandleEnd=\$18DA!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$18D0!
-LOAD_STACK=\$18D2!
-LOAD_STACK_END=\$18F6!
+LOADPTR=\$18DA!
+LOAD_STACK=\$18DC!
+LOAD_STACK_END=\$1900!
! ============================================
! FORTH RAM areas :
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2040!
-HandleEnd=\$2100!
+FirstHandle=\$2038!
+HandleEnd=\$20F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2100!
-LOAD_STACK=\$2102!
-LOAD_STACK_END=\$2138!
+LOADPTR=\$20F8!
+LOAD_STACK=\$20FA!
+LOAD_STACK_END=\$2130!
!SD_card Input Buffer, lenght = CPL = 84
-SDIB_I2CADR=\$2138!
-SDIB_I2CCNT=\$213A!
-SDIB_ORG=\$213C!
+SDIB_I2CADR=\$2130!
+SDIB_I2CCNT=\$2132!
+SDIB_ORG=\$2134!
-SD_END_DATA=\$2190!
+SD_END_DATA=\$2188!
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2040!
-HandleEnd=\$2100!
+FirstHandle=\$2038!
+HandleEnd=\$20F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2100!
-LOAD_STACK=\$2102!
-LOAD_STACK_END=\$2138!
+LOADPTR=\$20F8!
+LOAD_STACK=\$20FA!
+LOAD_STACK_END=\$2130!
!SD_card Input Buffer, lenght = CPL = 84
-SDIB_I2CADR=\$2138!
-SDIB_I2CCNT=\$213A!
-SDIB_ORG=\$213C!
+SDIB_I2CADR=\$2130!
+SDIB_I2CCNT=\$2132!
+SDIB_ORG=\$2134!
-SD_END_DATA=\$2190!
+SD_END_DATA=\$2188!
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2040!
-HandleEnd=\$2100!
+FirstHandle=\$2038!
+HandleEnd=\$20F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2100!
-LOAD_STACK=\$2102!
-LOAD_STACK_END=\$2138!
+LOADPTR=\$20F8!
+LOAD_STACK=\$20FA!
+LOAD_STACK_END=\$2130!
!SD_card Input Buffer, lenght = CPL = 84
-SDIB_I2CADR=\$2138!
-SDIB_I2CCNT=\$213A!
-SDIB_ORG=\$213C!
-
-SD_END_DATA=\$2190!
+SDIB_I2CADR=\$2130!
+SDIB_I2CCNT=\$2132!
+SDIB_ORG=\$2134!
+SD_END_DATA=\$2188!
! ============================================
! 1900-197F = FRAM info B (128 B)
! 1980-19FF = FRAM info A (128 B)
! 1A00-1AFF = TLV device descriptor info (FRAM 256 B)
-! 1B00-1BFF = ROM boot memory
+! 1B00-1BFF = ROM boot memory
! 1C00-23FF = RAM (2 KB)
! 2000-C1FF = unused (41472 B)
! C200-FF7F = code memory (FRAM 15743 B)
INFOASTART=\$1980!
INFOAEND=\$19FF!
TLVSTAT=\$1A00! Device Descriptor Info (Tag-Lenght-Value)
-TLVEND=\$1AFF!
+TLVEND=\$1AFF!
RAMSTART=\$1C00!
RAMEND=\$23FF!
PROGRAMSTART=\$4400! Code space start
SIGNATURES=\$FF80! JTAG/BSL signatures
JTAG_SIG1=\$FF80! if 0 (electronic fuse=0) enable JTAG/SBW; must be reset by wipe.
JTAG_SIG2=\$FF82! if JTAG_SIG1=\$AAAA, length of password string @ JTAG_PASSWORD
-BSL_SIG1=\$FF84!
-BSL_SIG2=\$FF86!
+BSL_SIG1=\$FF84!
+BSL_SIG2=\$FF86!
JTAG_PASSWORD=\$FF88! 256 bits
INTVECT=\$FFC6! FFCE-FFFF
BSL_PASSWORD=\$FFE0! 256 bits
\#Z=\#2! = SR(1) Zero flag
\#N=\#4! = SR(2) Negative flag
\#GIE=\#8! = SR(3) Enable Int
-\#CPUOFF=\#\$10!= SR(4) CPUOFF
+\#CPUOFF=\#\$10!= SR(4) CPUOFF
\#OSCOFF=\#\$20!= SR(5) OSCOFF
-\#SCG0=\#\$40! = SR(6) SCG0
+\#SCG0=\#\$40! = SR(6) SCG0
\#SCG1=\#\$80! = SR(7) SCG1
\#V=\#\$100! = SR(8) oVerflow flag
-\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
-\#UF10=\#\$400! = SR(10) User Flag 2
-\#UF11=\#\$800! = SR(11) User Flag 3
+\#UF9=\#\$200! = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.
+\#UF10=\#\$400! = SR(10) User Flag 2
+\#UF11=\#\$800! = SR(11) User Flag 3
! ============================================
NOP=MOV \#0,R3! \ one word one cycle
NOP2=\$3C00 ,! \ compile JMP 0 one word two cycles
NOP3=MOV R0,R0! \ MOV PC,PC one word three cycles
-NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
+NEXT=MOV \@R13+,R0! \ MOV @IP+,PC
SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
! FastForth INFO(DCBA) memory map (256 bytes):
! ============================================
-! ----------------------
-! KERNEL CONSTANTS
-! ----------------------
INI_THREAD=\$1800! .word THREADS
TERMBRW_RST=\$1802! .word TERMBRW_RST
TERMMCTLW_RST=\$1804! .word TERMMCTLW_RST
FREQ_KHZ=\$1806! .word FREQUENCY
-! ----------------------
-! SAVED VARIABLES
-! ----------------------
SAVE_SYSRSTIV=\$1808! to enable SYSRSTIV read
LPM_MODE=\$180A! LPM0+GIE is the default mode
INIDP=\$180C! define RST_STATE, init by wipe
INIVOC=\$180E! define RST_STATE, init by wipe
+GPFLAGS=\$1810!
-RXON=\$1810!
-RXOFF=\$1812!
-
-ReadSectorWX=\$1814! call with W = SectorLO X = SectorHI
-WriteSectorWX=\$1816! call with W = SectorLO X = SectorHI
-GPFLAGS=\$1818!
+RXON=\$1812!
+RXOFF=\$1814!
+ReadSectorWX=\$1816! call with W = SectorLO X = SectorHI
+WriteSectorWX=\$1818! call with W = SectorLO X = SectorHI
! ============================================
! FORTH RAM areas :
PAD_I2CCNT=\$1CE2! \ count max
PAD_ORG=\$1CE4! \ user scratch pad buffer, 84 bytes, grow up
-TIB_I2CADR=\$1D38! \ TX I2C address
+TIB_I2CADR=\$1D38! \ TX I2C address
TIB_I2CCNT=\$1D3A! \ count of bytes
TIB_ORG=\$1D3C! \ Terminal input buffer, 84 bytes, grow up
BUFEND=\$2000!
! ---------------------------------------
-! FAT16 FileSystemInfos
+! FAT16 FileSystemInfos
! ---------------------------------------
FATtype=\$2002!
BS_FirstSectorL=\$2004!
! ---------------------------------------
! BUFFER management
! ---------------------------------------
-BufferPtr=\$201E!
+BufferPtr=\$201E!
BufferLen=\$2020!
! ---------------------------------------
! ---------------------------------------
ClusterL=\$2022! 16 bits wide (FAT16)
ClusterH=\$2024! 16 bits wide (FAT16)
-NewClusterL=\$2026! 16 bits wide (FAT16)
-NewClusterH=\$2028! 16 bits wide (FAT16)
-CurFATsector=\$202A!
+NewClusterL=\$2026! 16 bits wide (FAT16)
+NewClusterH=\$2028! 16 bits wide (FAT16)
+CurFATsector=\$202A!
! ---------------------------------------
! DIR entry
! ---------------------------------------
DIRclusterL=\$202C! contains the Cluster of current directory ; 1 if FAT16 root directory
DIRclusterH=\$202E! contains the Cluster of current directory ; 1 if FAT16 root directory
-EntryOfst=\$2030!
+EntryOfst=\$2030!
! ---------------------------------------
! Handle Pointer
! ---------------------------------------
! Handle structure
! ---------------------------------------
-! three handle tokens :
+! three handle tokens :
! token = 0 : free handle
! token = 1 : file to read
! token = 2 : file updated (write)
HDLW_BUFofst=22! BUFFER offset ; used by LOAD" and by WRITE"
-!OpenedFirstFile ; "openedFile" structure
+!OpenedFirstFile ; "openedFile" structure
HandleMax=8!
HandleLenght=24!
-FirstHandle=\$2040!
-HandleEnd=\$2100!
+FirstHandle=\$2038!
+HandleEnd=\$20F8!
!Stack of return IP for LOADed files, preincrement stack structure
-LOADPTR=\$2100!
-LOAD_STACK=\$2102!
-LOAD_STACK_END=\$2138!
+LOADPTR=\$20F8!
+LOAD_STACK=\$20FA!
+LOAD_STACK_END=\$2130!
!SD_card Input Buffer, lenght = CPL = 84
-SDIB_I2CADR=\$2138!
-SDIB_I2CCNT=\$213A!
-SDIB_ORG=\$213C!
-
-SD_END_DATA=\$2190!
+SDIB_I2CADR=\$2130!
+SDIB_I2CCNT=\$2132!
+SDIB_ORG=\$2134!
+SD_END_DATA=\$2188!
! ============================================
SFRRPCR=\$104! \ SFR reset pin control
PMMCTL0=\$120! \ PMM Control 0
-PMMIFG=\$12A! \ PMM interrupt flags
+PMMIFG=\$12A! \ PMM interrupt flags
PM5CTL0=\$130! \ PM5 Control 0
-FRCTLCTL0=\$140! \ FRAM control 0
-GCCTL0=\$144! \ General control 0
-GCCTL1=\$146! \ General control 1
+FRCTLCTL0=\$140! \ FRAM control 0
+GCCTL0=\$144! \ General control 0
+GCCTL1=\$146! \ General control 1
-CRC16DI=\$150! \ CRC data input
-CRCDIRB=\$152! \ CRC data input reverse byte
-CRCINIRES=\$154! \ CRC initialization and result
-CRCRESR=\$156! \ CRC result reverse byte
+CRC16DI=\$150! \ CRC data input
+CRCDIRB=\$152! \ CRC data input reverse byte
+CRCINIRES=\$154! \ CRC initialization and result
+CRCRESR=\$156! \ CRC result reverse byte
RCCTL0=\$158! \ RAM controller control 0
WDTCTL=\$15C! \ WDT control register
-CSCTL0=\$160! \ CS control 0
-CSCTL1=\$162! \ CS control 1
-CSCTL2=\$164! \ CS control 2
-CSCTL3=\$166! \ CS control 3
-CSCTL4=\$168! \ CS control 4
-CSCTL5=\$16A! \ CS control 5
-CSCTL6=\$16C! \ CS control 6
-
-SYSCTL=\$180! \ System control
-SYSJMBC=\$186! \ JTAG mailbox control
-SYSJMBI0=\$188! \ JTAG mailbox input 0
-SYSJMBI1=\$18A! \ JTAG mailbox input 1
-SYSJMBO0=\$18C! \ JTAG mailbox output 0
-SYSJMBO1=\$18E! \ JTAG mailbox output 1
-SYSUNIV=\$19A! \ User NMI vector generator
-SYSSNIV=\$19C! \ System NMI vector generator
-SYSRSTIV=\$19E! \ Reset vector generator
-
-REFCTL=\$1B0! \ Shared reference control
+CSCTL0=\$160! \ CS control 0
+CSCTL1=\$162! \ CS control 1
+CSCTL2=\$164! \ CS control 2
+CSCTL3=\$166! \ CS control 3
+CSCTL4=\$168! \ CS control 4
+CSCTL5=\$16A! \ CS control 5
+CSCTL6=\$16C! \ CS control 6
+
+SYSCTL=\$180! \ System control
+SYSJMBC=\$186! \ JTAG mailbox control
+SYSJMBI0=\$188! \ JTAG mailbox input 0
+SYSJMBI1=\$18A! \ JTAG mailbox input 1
+SYSJMBO0=\$18C! \ JTAG mailbox output 0
+SYSJMBO1=\$18E! \ JTAG mailbox output 1
+SYSUNIV=\$19A! \ User NMI vector generator
+SYSSNIV=\$19C! \ System NMI vector generator
+SYSRSTIV=\$19E! \ Reset vector generator
+
+REFCTL=\$1B0! \ Shared reference control
PAIN=\$200!
PAOUT=\$202!
TBIFG=1!
CCIFG=1!
-TA0CTL=\$340! \ TA0 control
-TA0CCTL0=\$342! \ Capture/compare control 0
-TA0CCTL1=\$344! \ Capture/compare control 1
-TA0CCTL2=\$346! \ Capture/compare control 2
-TA0CCTL3=\$348! \ Capture/compare control 3
-TA0CCTL4=\$34A! \ Capture/compare control 4
-TA0R=\$350! \ TA0 counter register
-TA0CCR0=\$352! \ Capture/compare register 0
-TA0CCR1=\$354! \ Capture/compare register 1
-TA0CCR2=\$356! \ Capture/compare register 2
-TA0CCR2=\$358! \ Capture/compare register 3
-TA0CCR2=\$35A! \ Capture/compare register 4
-TA0EX0=\$360! \ TA0 expansion register 0
-TA0IV=\$36E! \ TA0 interrupt vector
-
-TA1CTL=\$380! \ TA1 control
-TA1CCTL0=\$382! \ Capture/compare control 0
-TA1CCTL1=\$384! \ Capture/compare control 1
-TA1CCTL2=\$386! \ Capture/compare control 2
-TA1R=\$390! \ TA1 counter register
-TA1CCR0=\$392! \ Capture/compare register 0
-TA1CCR1=\$394! \ Capture/compare register 1
-TA1CCR2=\$396! \ Capture/compare register 2
-TA1EX0=\$3A0! \ TA1 expansion register 0
-TA1IV=\$3AE! \ TA1 interrupt vector
-
-TB0CTL=\$3C0! \ TB0 control
-TB0CCTL0=\$3C2! \ Capture/compare control 0
-TB0CCTL1=\$3C4! \ Capture/compare control 1
-TB0CCTL2=\$3C6! \ Capture/compare control 2
-TB0CCTL3=\$3C8! \ Capture/compare control 3
-TB0CCTL4=\$3CA! \ Capture/compare control 4
-TB0CCTL5=\$3CC! \ Capture/compare control 5
-TB0CCTL6=\$3CE! \ Capture/compare control 6
-TB0R=\$3D0! \ TB0 counter register
-TB0CCR0=\$3D2! \ Capture/compare register 0
-TB0CCR1=\$3D4! \ Capture/compare register 1
-TB0CCR2=\$3D6! \ Capture/compare register 2
-TB0CCR3=\$3D8! \ Capture/compare register 3
-TB0CCR5=\$3DA! \ Capture/compare register 4
-TB0CCR5=\$3DC! \ Capture/compare register 5
-TB0CCR6=\$3DE! \ Capture/compare register 6
-TB0EX0=\$3E0! \ TB0 expansion register 0
-TB0IV=\$3EE! \ TB0 interrupt vector
-
-TA2CTL=\$400! \ TA2 control
-TA2CCTL0=\$402! \ Capture/compare control 0
-TA2CCTL1=\$404! \ Capture/compare control 1
-TA2R=\$410! \ TA2 counter register
-TA2CCR0=\$412! \ Capture/compare register 0
-TA2CCR1=\$414! \ Capture/compare register 1
-TA2EX0=\$420! \ TA2 expansion register 0
-TA2IV=\$42E! \ TA2 interrupt vector
-
-CAPTIO0CTL=\$43E! \ Capacitive Touch IO 0 control
-
-TA3CTL=\$440! \ TA3 control
-TA3CCTL0=\$442! \ Capture/compare control 0
-TA3CCTL1=\$444! \ Capture/compare control 1
-TA3CCTL2=\$446! \ Capture/compare control 2
-TA3CCTL3=\$448! \ Capture/compare control 3
-TA3CCTL4=\$44A! \ Capture/compare control 4
-TA3R=\$450! \ TA3 counter register
-TA3CCR0=\$452! \ Capture/compare register 0
-TA3CCR1=\$454! \ Capture/compare register 1
-TA3CCR2=\$456! \ Capture/compare register 2
-TA3CCR3=\$458! \ Capture/compare register 3
-TA3CCR4=\$45A! \ Capture/compare register 4
-TA3EX0=\$460! \ TA3 expansion register 0
-TA3IV=\$46E! \ TA3 interrupt vector
-
-CAPTIO1CTL=\$47E! \ Capacitive Touch IO 1 control
+TA0CTL=\$340! \ TA0 control
+TA0CCTL0=\$342! \ Capture/compare control 0
+TA0CCTL1=\$344! \ Capture/compare control 1
+TA0CCTL2=\$346! \ Capture/compare control 2
+TA0CCTL3=\$348! \ Capture/compare control 3
+TA0CCTL4=\$34A! \ Capture/compare control 4
+TA0R=\$350! \ TA0 counter register
+TA0CCR0=\$352! \ Capture/compare register 0
+TA0CCR1=\$354! \ Capture/compare register 1
+TA0CCR2=\$356! \ Capture/compare register 2
+TA0CCR2=\$358! \ Capture/compare register 3
+TA0CCR2=\$35A! \ Capture/compare register 4
+TA0EX0=\$360! \ TA0 expansion register 0
+TA0IV=\$36E! \ TA0 interrupt vector
+
+TA1CTL=\$380! \ TA1 control
+TA1CCTL0=\$382! \ Capture/compare control 0
+TA1CCTL1=\$384! \ Capture/compare control 1
+TA1CCTL2=\$386! \ Capture/compare control 2
+TA1R=\$390! \ TA1 counter register
+TA1CCR0=\$392! \ Capture/compare register 0
+TA1CCR1=\$394! \ Capture/compare register 1
+TA1CCR2=\$396! \ Capture/compare register 2
+TA1EX0=\$3A0! \ TA1 expansion register 0
+TA1IV=\$3AE! \ TA1 interrupt vector
+
+TB0CTL=\$3C0! \ TB0 control
+TB0CCTL0=\$3C2! \ Capture/compare control 0
+TB0CCTL1=\$3C4! \ Capture/compare control 1
+TB0CCTL2=\$3C6! \ Capture/compare control 2
+TB0CCTL3=\$3C8! \ Capture/compare control 3
+TB0CCTL4=\$3CA! \ Capture/compare control 4
+TB0CCTL5=\$3CC! \ Capture/compare control 5
+TB0CCTL6=\$3CE! \ Capture/compare control 6
+TB0R=\$3D0! \ TB0 counter register
+TB0CCR0=\$3D2! \ Capture/compare register 0
+TB0CCR1=\$3D4! \ Capture/compare register 1
+TB0CCR2=\$3D6! \ Capture/compare register 2
+TB0CCR3=\$3D8! \ Capture/compare register 3
+TB0CCR5=\$3DA! \ Capture/compare register 4
+TB0CCR5=\$3DC! \ Capture/compare register 5
+TB0CCR6=\$3DE! \ Capture/compare register 6
+TB0EX0=\$3E0! \ TB0 expansion register 0
+TB0IV=\$3EE! \ TB0 interrupt vector
+
+TA2CTL=\$400! \ TA2 control
+TA2CCTL0=\$402! \ Capture/compare control 0
+TA2CCTL1=\$404! \ Capture/compare control 1
+TA2R=\$410! \ TA2 counter register
+TA2CCR0=\$412! \ Capture/compare register 0
+TA2CCR1=\$414! \ Capture/compare register 1
+TA2EX0=\$420! \ TA2 expansion register 0
+TA2IV=\$42E! \ TA2 interrupt vector
+
+CAPTIO0CTL=\$43E! \ Capacitive Touch IO 0 control
+
+TA3CTL=\$440! \ TA3 control
+TA3CCTL0=\$442! \ Capture/compare control 0
+TA3CCTL1=\$444! \ Capture/compare control 1
+TA3CCTL2=\$446! \ Capture/compare control 2
+TA3CCTL3=\$448! \ Capture/compare control 3
+TA3CCTL4=\$44A! \ Capture/compare control 4
+TA3R=\$450! \ TA3 counter register
+TA3CCR0=\$452! \ Capture/compare register 0
+TA3CCR1=\$454! \ Capture/compare register 1
+TA3CCR2=\$456! \ Capture/compare register 2
+TA3CCR3=\$458! \ Capture/compare register 3
+TA3CCR4=\$45A! \ Capture/compare register 4
+TA3EX0=\$460! \ TA3 expansion register 0
+TA3IV=\$46E! \ TA3 interrupt vector
+
+CAPTIO1CTL=\$47E! \ Capacitive Touch IO 1 control
! \ RTC_C
-RTCCTL0_L=\$4A0! \ RTCCTL0_L
-RTCCTL0_H=\$4A1! \ RTCCTL0_H
-RTCCTL1=\$4A2! \ RTCCTL1
-RTCCTL3=\$4A3! \ RTCCTL3
-RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
-RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
-RTCPS=\$4AC! \ RTC prescaler
-RT0PS=\$4AC! \ RTC prescaler 0
-RT1PS=\$4AD! \ RTC prescaler 1
-RTCIV=\$4AE! \ RTC interrupt vector word
-RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
-RTCCNT1=\$4B0! \ Real-Time Counter 1
-RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
-RTCCNT2=\$4B1! \ Real-Time Counter 2
-RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
-RTCCNT3=\$4B2! \ Real-Time Counter 3
-RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
-RTCCNT4=\$4B3! \ Real-Time Counter 4
-RTCDAY=\$4B4! \ RTC days
-RTCMON=\$4B5! \ RTC month
-RTCYEAR=\$4B6!
-RTCYEARL=\$4B6! \ RTC year low
-RTCYEARH=\$4B7! \ RTC year high
-RTCAMIN=\$4B8! \ RTC alarm minutes
-RTCAHOUR=\$4B9! \ RTC alarm hours
-RTCADOW=\$4BA! \ RTC alarm day of week
-RTCADAY=\$4BB! \ RTC alarm days
-BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
-BCD2BIN=\$4BE! \ BCD-to-binary conversion register
+RTCCTL0_L=\$4A0! \ RTCCTL0_L
+RTCCTL0_H=\$4A1! \ RTCCTL0_H
+RTCCTL1=\$4A2! \ RTCCTL1
+RTCCTL3=\$4A3! \ RTCCTL3
+RTCPS0CTL=\$4A8! \ RTC prescaler 0 control
+RTCPS1CTL=\$4AA! \ RTC prescaler 1 control
+RTCPS=\$4AC! \ RTC prescaler
+RT0PS=\$4AC! \ RTC prescaler 0
+RT1PS=\$4AD! \ RTC prescaler 1
+RTCIV=\$4AE! \ RTC interrupt vector word
+RTCSEC=\$4B0! \ RTC seconds, RTC counter register 1 RTCSEC,
+RTCCNT1=\$4B0! \ Real-Time Counter 1
+RTCMIN=\$4B1! \ RTC minutes, RTC counter register 2 RTCMIN,
+RTCCNT2=\$4B1! \ Real-Time Counter 2
+RTCHOUR=\$4B2! \ RTC hours, RTC counter register 3 RTCHOUR,
+RTCCNT3=\$4B2! \ Real-Time Counter 3
+RTCDOW=\$4B3! \ RTC day of week, RTC counter register 4 RTCDOW,
+RTCCNT4=\$4B3! \ Real-Time Counter 4
+RTCDAY=\$4B4! \ RTC days
+RTCMON=\$4B5! \ RTC month
+RTCYEAR=\$4B6!
+RTCYEARL=\$4B6! \ RTC year low
+RTCYEARH=\$4B7! \ RTC year high
+RTCAMIN=\$4B8! \ RTC alarm minutes
+RTCAHOUR=\$4B9! \ RTC alarm hours
+RTCADOW=\$4BA! \ RTC alarm day of week
+RTCADAY=\$4BB! \ RTC alarm days
+BIN2BCD=\$4BC! \ Binary-to-BCD conversion register
+BCD2BIN=\$4BE! \ BCD-to-binary conversion register
RTCHOLD=\$40!
RTCRDY=\$10!
-MPY=\$4C0! \ 16-bit operand 1 \96 multiply
-MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
-MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
-MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
-OP2=\$4C8! \ 16-bit operand 2
-RESLO=\$4CA! \ 16 × 16 result low word
-RESHI=\$4CC! \ 16 × 16 result high word
-SUMEXT=\$4CE! \ 16 × 16 sum extension register
-MPY32L=\$4D0! \ 32-bit operand 1 \96 multiply low word
-MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
-MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
-MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
-MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
-MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
-MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
-MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
-OP2L=\$4E0! \ 32-bit operand 2 \96 low word
-OP2H=\$4E2! \ 32-bit operand 2 \96 high word
-RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
-RES1=\$4E6! \ 32 × 32 result 1
-RES2=\$4E8! \ 32 × 32 result 2
-RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
-MPY32CTL0=\$4EC! \ MPY32 control register 0
+MPY=\$4C0! \ 16-bit operand 1 \96 multiply
+MPYS=\$4C2! \ 16-bit operand 1 \96 signed multiply
+MAC=\$4C4! \ 16-bit operand 1 \96 multiply accumulate
+MACS=\$4C6! \ 16-bit operand 1 \96 signed multiply accumulate
+OP2=\$4C8! \ 16-bit operand 2
+RESLO=\$4CA! \ 16 × 16 result low word
+RESHI=\$4CC! \ 16 × 16 result high word
+SUMEXT=\$4CE! \ 16 × 16 sum extension register
+MPY32L=\$4D0! \ 32-bit operand 1 \96 multiply low word
+MPY32H=\$4D2! \ 32-bit operand 1 \96 multiply high word
+MPYS32L=\$4D4! \ 32-bit operand 1 \96 signed multiply low word
+MPYS32H=\$4D6! \ 32-bit operand 1 \96 signed multiply high word
+MAC32L=\$4D8! \ 32-bit operand 1 \96 multiply accumulate low word
+MAC32H=\$4DA! \ 32-bit operand 1 \96 multiply accumulate high word
+MACS32L=\$4DC! \ 32-bit operand 1 \96 signed multiply accumulate low word
+MACS32H=\$4DE! \ 32-bit operand 1 \96 signed multiply accumulate high word
+OP2L=\$4E0! \ 32-bit operand 2 \96 low word
+OP2H=\$4E2! \ 32-bit operand 2 \96 high word
+RES0=\$4E4! \ 32 × 32 result 0 \96 least significant word
+RES1=\$4E6! \ 32 × 32 result 1
+RES2=\$4E8! \ 32 × 32 result 2
+RES3=\$4EA! \ 32 × 32 result 3 \96 most significant word
+MPY32CTL0=\$4EC! \ MPY32 control register 0
DMAIFG=8!
-DMACTL0=\$500! \ DMA module control 0
-DMACTL1=\$502! \ DMA module control 1
-DMACTL2=\$504! \ DMA module control 2
-DMACTL3=\$506! \ DMA module control 3
-DMACTL4=\$508! \ DMA module control 4
-DMAIV=\$50A! \ DMA interrupt vector
-
-DMA0CTL=\$510! \ DMA channel 0 control
-DMA0SAL=\$512! \ DMA channel 0 source address low
-DMA0SAH=\$514! \ DMA channel 0 source address high
-DMA0DAL=\$516! \ DMA channel 0 destination address low
-DMA0DAH=\$518! \ DMA channel 0 destination address high
-DMA0SZ=\$51A! \ DMA channel 0 transfer size
-
-DMA1CTL=\$520! \ DMA channel 1 control
-DMA1SAL=\$522! \ DMA channel 1 source address low
-DMA1SAH=\$524! \ DMA channel 1 source address high
-DMA1DAL=\$526! \ DMA channel 1 destination address low
-DMA1DAH=\$528! \ DMA channel 1 destination address high
-DMA1SZ=\$52A! \ DMA channel 1 transfer size
-
-DMA2CTL=\$530! \ DMA channel 2 control
-DMA2SAL=\$532! \ DMA channel 2 source address low
-DMA2SAH=\$534! \ DMA channel 2 source address high
-DMA2DAL=\$536! \ DMA channel 2 destination address low
-DMA2DAH=\$538! \ DMA channel 2 destination address high
-DMA2SZ=\$53A! \ DMA channel 2 transfer size
-
-
-MPUCTL0=\$5A0! \ MPU control 0
-MPUCTL1=\$5A2! \ MPU control 1
-MPUSEG=\$5A4! \ MPU Segmentation Register
-MPUSAM=\$5A6! \ MPU access management
-MPUIPC0=\$5AA! \ MPU IP control 0
-MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
-MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
-
-UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
-UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
-UCA0BRW=\$5C6!
-UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
-UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
-UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
-UCA0STAT=\$5CA! \ eUSCI_A status
-UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
-UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
-UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
-UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
-UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
-UCA0IE=\$5DA! \ eUSCI_A interrupt enable
-UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
-UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
-
-UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
-UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
-UCA1BRW=\$5E6!
-UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
-UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
-UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
-UCA1STAT=\$5EA! \ eUSCI_A status
-UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
-UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
-UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
-UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
-UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
-UCA1IE=\$5FA! \ eUSCI_A interrupt enable
-UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
-UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
-
-
-UCB0CTLW0=\$640! \ eUSCI_B control word 0
-UCB0CTLW1=\$642! \ eUSCI_B control word 1
-UCB0BRW=\$646!
-UCB0BR0=\$646! \ eUSCI_B bit rate 0
-UCB0BR1=\$647! \ eUSCI_B bit rate 1
-UCB0STATW=\$648! \ eUSCI_B status word
-UCBCNT0=\$649! \ eUSCI_B hardware count
-UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
-UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
-UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
-UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
-UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
-UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
-UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
-UCB0ADDRX=\$65C! \ eUSCI_B received address
-UCB0ADDMASK=\$65E! \ eUSCI_B address mask
-UCB0I2CSA=\$660! \ eUSCI I2C slave address
-UCB0IE=\$66A! \ eUSCI interrupt enable
-UCB0IFG=\$66C! \ eUSCI interrupt flags
-UCB0IV=\$66E! \ eUSCI interrupt vector word
-
-UCB1CTLW0=\$680! \ eUSCI_B control word 0
-UCB1CTLW1=\$682! \ eUSCI_B control word 1
-UCB1BRW=\$686!
-UCB1BR0=\$686! \ eUSCI_B bit rate 0
-UCB1BR1=\$687! \ eUSCI_B bit rate 1
-UCB1STATW=\$688! \ eUSCI_B status word
-UCB1NT0=\$689! \ eUSCI_B hardware count
-UCB1TBCNT=\$68A! \ eUSCI_B byte counter threshold
-UCB1RXBUF=\$68C! \ eUSCI_B receive buffer
-UCB1TXBUF=\$68E! \ eUSCI_B transmit buffer
-UCB1I2COA0=\$694! \ eUSCI_B I2C own address 0
-UCB1I2COA1=\$696! \ eUSCI_B I2C own address 1
-UCB1I2COA2=\$698! \ eUSCI_B I2C own address 2
-UCB1I2COA3=\$69A! \ eUSCI_B I2C own address 3
-UCB1ADDRX=\$69C! \ eUSCI_B received address
-UCB1ADDMASK=\$69E! \ eUSCI_B address mask
-UCB1I2CSA=\$6A0! \ eUSCI I2C slave address
-UCB1IE=\$6AA! \ eUSCI interrupt enable
-UCB1IFG=\$6AC! \ eUSCI interrupt flags
-UCB1IV=\$6AE! \ eUSCI interrupt vector word
+DMACTL0=\$500! \ DMA module control 0
+DMACTL1=\$502! \ DMA module control 1
+DMACTL2=\$504! \ DMA module control 2
+DMACTL3=\$506! \ DMA module control 3
+DMACTL4=\$508! \ DMA module control 4
+DMAIV=\$50A! \ DMA interrupt vector
+
+DMA0CTL=\$510! \ DMA channel 0 control
+DMA0SAL=\$512! \ DMA channel 0 source address low
+DMA0SAH=\$514! \ DMA channel 0 source address high
+DMA0DAL=\$516! \ DMA channel 0 destination address low
+DMA0DAH=\$518! \ DMA channel 0 destination address high
+DMA0SZ=\$51A! \ DMA channel 0 transfer size
+
+DMA1CTL=\$520! \ DMA channel 1 control
+DMA1SAL=\$522! \ DMA channel 1 source address low
+DMA1SAH=\$524! \ DMA channel 1 source address high
+DMA1DAL=\$526! \ DMA channel 1 destination address low
+DMA1DAH=\$528! \ DMA channel 1 destination address high
+DMA1SZ=\$52A! \ DMA channel 1 transfer size
+
+DMA2CTL=\$530! \ DMA channel 2 control
+DMA2SAL=\$532! \ DMA channel 2 source address low
+DMA2SAH=\$534! \ DMA channel 2 source address high
+DMA2DAL=\$536! \ DMA channel 2 destination address low
+DMA2DAH=\$538! \ DMA channel 2 destination address high
+DMA2SZ=\$53A! \ DMA channel 2 transfer size
+
+
+MPUCTL0=\$5A0! \ MPU control 0
+MPUCTL1=\$5A2! \ MPU control 1
+MPUSEG=\$5A4! \ MPU Segmentation Register
+MPUSAM=\$5A6! \ MPU access management
+MPUIPC0=\$5AA! \ MPU IP control 0
+MPUIPSEGB2=\$5AC! \ MPU IP Encapsulation Segment Border 2
+MPUIPSEGB1=\$5AE! \ MPU IP Encapsulation Segment Border 1
+
+UCA0CTLW0=\$5C0! \ eUSCI_A control word 0
+UCA0CTLW1=\$5C2! \ eUSCI_A control word 1
+UCA0BRW=\$5C6!
+UCA0BR0=\$5C6! \ eUSCI_A baud rate 0
+UCA0BR1=\$5C7! \ eUSCI_A baud rate 1
+UCA0MCTLW=\$5C8! \ eUSCI_A modulation control
+UCA0STAT=\$5CA! \ eUSCI_A status
+UCA0RXBUF=\$5CC! \ eUSCI_A receive buffer
+UCA0TXBUF=\$5CE! \ eUSCI_A transmit buffer
+UCA0ABCTL=\$5D0! \ eUSCI_A LIN control
+UCA0IRTCTL=\$5D2! \ eUSCI_A IrDA transmit control
+UCA0IRRCTL=\$5D3! \ eUSCI_A IrDA receive control
+UCA0IE=\$5DA! \ eUSCI_A interrupt enable
+UCA0IFG=\$5DC! \ eUSCI_A interrupt flags
+UCA0IV=\$5DE! \ eUSCI_A interrupt vector word
+
+UCA1CTLW0=\$5E0! \ eUSCI_A control word 0
+UCA1CTLW1=\$5E2! \ eUSCI_A control word 1
+UCA1BRW=\$5E6!
+UCA1BR0=\$5E6! \ eUSCI_A baud rate 0
+UCA1BR1=\$5E7! \ eUSCI_A baud rate 1
+UCA1MCTLW=\$5E8! \ eUSCI_A modulation control
+UCA1STAT=\$5EA! \ eUSCI_A status
+UCA1RXBUF=\$5EC! \ eUSCI_A receive buffer
+UCA1TXBUF=\$5EE! \ eUSCI_A transmit buffer
+UCA1ABCTL=\$5F0! \ eUSCI_A LIN control
+UCA1IRTCTL=\$5F2! \ eUSCI_A IrDA transmit control
+UCA1IRRCTL=\$5F3! \ eUSCI_A IrDA receive control
+UCA1IE=\$5FA! \ eUSCI_A interrupt enable
+UCA1IFG=\$5FC! \ eUSCI_A interrupt flags
+UCA1IV=\$5FE! \ eUSCI_A interrupt vector word
+
+
+UCB0CTLW0=\$640! \ eUSCI_B control word 0
+UCB0CTLW1=\$642! \ eUSCI_B control word 1
+UCB0BRW=\$646!
+UCB0BR0=\$646! \ eUSCI_B bit rate 0
+UCB0BR1=\$647! \ eUSCI_B bit rate 1
+UCB0STATW=\$648! \ eUSCI_B status word
+UCBCNT0=\$649! \ eUSCI_B hardware count
+UCB0TBCNT=\$64A! \ eUSCI_B byte counter threshold
+UCB0RXBUF=\$64C! \ eUSCI_B receive buffer
+UCB0TXBUF=\$64E! \ eUSCI_B transmit buffer
+UCB0I2COA0=\$654! \ eUSCI_B I2C own address 0
+UCB0I2COA1=\$656! \ eUSCI_B I2C own address 1
+UCB0I2COA2=\$658! \ eUSCI_B I2C own address 2
+UCB0I2COA3=\$65A! \ eUSCI_B I2C own address 3
+UCB0ADDRX=\$65C! \ eUSCI_B received address
+UCB0ADDMASK=\$65E! \ eUSCI_B address mask
+UCB0I2CSA=\$660! \ eUSCI I2C slave address
+UCB0IE=\$66A! \ eUSCI interrupt enable
+UCB0IFG=\$66C! \ eUSCI interrupt flags
+UCB0IV=\$66E! \ eUSCI interrupt vector word
+
+UCB1CTLW0=\$680! \ eUSCI_B control word 0
+UCB1CTLW1=\$682! \ eUSCI_B control word 1
+UCB1BRW=\$686!
+UCB1BR0=\$686! \ eUSCI_B bit rate 0
+UCB1BR1=\$687! \ eUSCI_B bit rate 1
+UCB1STATW=\$688! \ eUSCI_B status word
+UCB1NT0=\$689! \ eUSCI_B hardware count
+UCB1TBCNT=\$68A! \ eUSCI_B byte counter threshold
+UCB1RXBUF=\$68C! \ eUSCI_B receive buffer
+UCB1TXBUF=\$68E! \ eUSCI_B transmit buffer
+UCB1I2COA0=\$694! \ eUSCI_B I2C own address 0
+UCB1I2COA1=\$696! \ eUSCI_B I2C own address 1
+UCB1I2COA2=\$698! \ eUSCI_B I2C own address 2
+UCB1I2COA3=\$69A! \ eUSCI_B I2C own address 3
+UCB1ADDRX=\$69C! \ eUSCI_B received address
+UCB1ADDMASK=\$69E! \ eUSCI_B address mask
+UCB1I2CSA=\$6A0! \ eUSCI I2C slave address
+UCB1IE=\$6AA! \ eUSCI interrupt enable
+UCB1IFG=\$6AC! \ eUSCI interrupt flags
+UCB1IV=\$6AE! \ eUSCI interrupt vector word
UCTXACK=\$20!
UCTR=\$10!
-ADC12CTL0=\$800! \ ADC12_B Control 0
-ADC12CTL1=\$802! \ ADC12_B Control 1
-ADC12CTL2=\$804! \ ADC12_B Control 2
-ADC12CTL3=\$806! \ ADC12_B Control 3
-ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
-ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
-ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
-ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
-ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
-ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
-ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
-ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
-ADC12IV=\$818! \ ADC12_B Interrupt Vector
-ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
-ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
-ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
-ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
-ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
-ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
-ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
-ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
-ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
-ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
-ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
-ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
-ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
-ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
-ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
-ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
-ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
-ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
-ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
-ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
-ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
-ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
-ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
-ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
-ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
-ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
-ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
-ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
-ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
-ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
-ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
-ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
-ADC12MEM0=\$860! \ ADC12_B Memory 0
-ADC12MEM1=\$862! \ ADC12_B Memory 1
-ADC12MEM2=\$864! \ ADC12_B Memory 2
-ADC12MEM3=\$866! \ ADC12_B Memory 3
-ADC12MEM4=\$868! \ ADC12_B Memory 4
-ADC12MEM5=\$86A! \ ADC12_B Memory 5
-ADC12MEM6=\$86C! \ ADC12_B Memory 6
-ADC12MEM7=\$86E! \ ADC12_B Memory 7
-ADC12MEM8=\$870! \ ADC12_B Memory 8
-ADC12MEM9=\$872! \ ADC12_B Memory 9
-ADC12MEM10=\$874! \ ADC12_B Memory 10
-ADC12MEM11=\$876! \ ADC12_B Memory 11
-ADC12MEM12=\$878! \ ADC12_B Memory 12
-ADC12MEM13=\$87A! \ ADC12_B Memory 13
-ADC12MEM14=\$87C! \ ADC12_B Memory 14
-ADC12MEM15=\$87E! \ ADC12_B Memory 15
-ADC12MEM16=\$880! \ ADC12_B Memory 16
-ADC12MEM17=\$882! \ ADC12_B Memory 17
-ADC12MEM18=\$884! \ ADC12_B Memory 18
-ADC12MEM19=\$886! \ ADC12_B Memory 19
-ADC12MEM20=\$888! \ ADC12_B Memory 20
-ADC12MEM21=\$88A! \ ADC12_B Memory 21
-ADC12MEM22=\$88C! \ ADC12_B Memory 22
-ADC12MEM23=\$88E! \ ADC12_B Memory 23
-ADC12MEM24=\$890! \ ADC12_B Memory 24
-ADC12MEM25=\$892! \ ADC12_B Memory 25
-ADC12MEM26=\$894! \ ADC12_B Memory 26
-ADC12MEM27=\$896! \ ADC12_B Memory 27
-ADC12MEM28=\$898! \ ADC12_B Memory 28
-ADC12MEM29=\$89A! \ ADC12_B Memory 29
-ADC12MEM30=\$89C! \ ADC12_B Memory 30
-ADC12MEM31=\$89E! \ ADC12_B Memory 31
+ADC12CTL0=\$800! \ ADC12_B Control 0
+ADC12CTL1=\$802! \ ADC12_B Control 1
+ADC12CTL2=\$804! \ ADC12_B Control 2
+ADC12CTL3=\$806! \ ADC12_B Control 3
+ADC12LO=\$808! \ ADC12_B Window Comparator Low Threshold Register
+ADC12HI=\$80A! \ ADC12_B Window Comparator High Threshold Register
+ADC12IFGR0=\$80C! \ ADC12_B Interrupt Flag Register 0
+ADC12IFGR1=\$80E! \ ADC12_B Interrupt Flag Register 1
+ADC12IFGR2=\$810! \ ADC12_B Interrupt Flag Register 2
+ADC12IER0=\$812! \ ADC12_B Interrupt Enable Register 0
+ADC12IER1=\$814! \ ADC12_B Interrupt Enable Register 1
+ADC12IER2=\$816! \ ADC12_B Interrupt Enable Register 2
+ADC12IV=\$818! \ ADC12_B Interrupt Vector
+ADC12MCTL0=\$820! \ ADC12_B Memory Control 0
+ADC12MCTL1=\$822! \ ADC12_B Memory Control 1
+ADC12MCTL2=\$824! \ ADC12_B Memory Control 2
+ADC12MCTL3=\$826! \ ADC12_B Memory Control 3
+ADC12MCTL4=\$828! \ ADC12_B Memory Control 4
+ADC12MCTL5=\$82A! \ ADC12_B Memory Control 5
+ADC12MCTL6=\$82C! \ ADC12_B Memory Control 6
+ADC12MCTL7=\$82E! \ ADC12_B Memory Control 7
+ADC12MCTL8=\$830! \ ADC12_B Memory Control 8
+ADC12MCTL9=\$832! \ ADC12_B Memory Control 9
+ADC12MCTL10=\$834! \ ADC12_B Memory Control 10
+ADC12MCTL11=\$836! \ ADC12_B Memory Control 11
+ADC12MCTL12=\$838! \ ADC12_B Memory Control 12
+ADC12MCTL13=\$83A! \ ADC12_B Memory Control 13
+ADC12MCTL14=\$83C! \ ADC12_B Memory Control 14
+ADC12MCTL15=\$83E! \ ADC12_B Memory Control 15
+ADC12MCTL16=\$840! \ ADC12_B Memory Control 16
+ADC12MCTL17=\$842! \ ADC12_B Memory Control 17
+ADC12MCTL18=\$844! \ ADC12_B Memory Control 18
+ADC12MCTL19=\$846! \ ADC12_B Memory Control 19
+ADC12MCTL20=\$848! \ ADC12_B Memory Control 20
+ADC12MCTL21=\$84A! \ ADC12_B Memory Control 21
+ADC12MCTL22=\$84C! \ ADC12_B Memory Control 22
+ADC12MCTL23=\$84E! \ ADC12_B Memory Control 23
+ADC12MCTL24=\$850! \ ADC12_B Memory Control 24
+ADC12MCTL25=\$852! \ ADC12_B Memory Control 25
+ADC12MCTL26=\$854! \ ADC12_B Memory Control 26
+ADC12MCTL27=\$856! \ ADC12_B Memory Control 27
+ADC12MCTL28=\$858! \ ADC12_B Memory Control 28
+ADC12MCTL29=\$85A! \ ADC12_B Memory Control 29
+ADC12MCTL30=\$85C! \ ADC12_B Memory Control 30
+ADC12MCTL31=\$85E! \ ADC12_B Memory Control 31
+ADC12MEM0=\$860! \ ADC12_B Memory 0
+ADC12MEM1=\$862! \ ADC12_B Memory 1
+ADC12MEM2=\$864! \ ADC12_B Memory 2
+ADC12MEM3=\$866! \ ADC12_B Memory 3
+ADC12MEM4=\$868! \ ADC12_B Memory 4
+ADC12MEM5=\$86A! \ ADC12_B Memory 5
+ADC12MEM6=\$86C! \ ADC12_B Memory 6
+ADC12MEM7=\$86E! \ ADC12_B Memory 7
+ADC12MEM8=\$870! \ ADC12_B Memory 8
+ADC12MEM9=\$872! \ ADC12_B Memory 9
+ADC12MEM10=\$874! \ ADC12_B Memory 10
+ADC12MEM11=\$876! \ ADC12_B Memory 11
+ADC12MEM12=\$878! \ ADC12_B Memory 12
+ADC12MEM13=\$87A! \ ADC12_B Memory 13
+ADC12MEM14=\$87C! \ ADC12_B Memory 14
+ADC12MEM15=\$87E! \ ADC12_B Memory 15
+ADC12MEM16=\$880! \ ADC12_B Memory 16
+ADC12MEM17=\$882! \ ADC12_B Memory 17
+ADC12MEM18=\$884! \ ADC12_B Memory 18
+ADC12MEM19=\$886! \ ADC12_B Memory 19
+ADC12MEM20=\$888! \ ADC12_B Memory 20
+ADC12MEM21=\$88A! \ ADC12_B Memory 21
+ADC12MEM22=\$88C! \ ADC12_B Memory 22
+ADC12MEM23=\$88E! \ ADC12_B Memory 23
+ADC12MEM24=\$890! \ ADC12_B Memory 24
+ADC12MEM25=\$892! \ ADC12_B Memory 25
+ADC12MEM26=\$894! \ ADC12_B Memory 26
+ADC12MEM27=\$896! \ ADC12_B Memory 27
+ADC12MEM28=\$898! \ ADC12_B Memory 28
+ADC12MEM29=\$89A! \ ADC12_B Memory 29
+ADC12MEM30=\$89C! \ ADC12_B Memory 30
+ADC12MEM31=\$89E! \ ADC12_B Memory 31
ADCON=\$10!
ADCSTART=\$03!
CDIFG=1!
CDIIFG=2!
-CDCTL0=\$8C0! \ Comparator_E control register 0
-CDCTL1=\$8C2! \ Comparator_E control register 1
-CDCTL2=\$8C4! \ Comparator_E control register 2
-CDCTL3=\$8C6! \ Comparator_E control register 3
-CDINT=\$8CC! \ Comparator_E interrupt register
-CDIV=\$8CE! \ Comparator_E interrupt vector word
-
-CRC32DIW0=\$980! \ CRC32 data input
-CRC32DIRBW0=\$986! \ CRC32 data input reverse
-CRC32INIRESW0=\$988! \ CRC32 initialization and result word 0
-CRC32INIRESW1=\$98A! \ CRC32 initialization and result word 1
-CRC32RESRW1=\$98! \ CRC32 result reverse word 1
-CRC32RESRW1=\$98E! \ CRC32 result reverse word 0
-CRC16DIW0=\$990! \ CRC16 data input
-CRC16DIRBW0=\$996! \ CRC16 data input reverse
-CRC16INIRESW0=\$998! \ CRC16 initialization and result word 0
-CRC16RESRW1=\$99E! \ CRC16 result reverse word 0
-
-
-AESACTL0=\$9C0! \ AES accelerator control register 0
-AESASTAT=\$9C4! \ AES accelerator status register
-AESAKEY=\$9C6! \ AES accelerator key register
-AESADIN=\$9C8! \ AES accelerator data in register
-AESADOUT=\$9CA! \ AES accelerator data out register
-AESAXDIN=\$9CC! \ AES accelerator XORed data in register
-AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
-
-
-LCDCCTL0=\$A00! \ LCD_C control register 0
-LCDCCTL1=\$A02! \ LCD_C control register 1
-LCDCBLKCTL=\$A04! \ LCD_C blinking control register
-LCDCMEMCTL=\$A06! \ LCD_C memory control register
-LCDCVCTL=\$A08! \ LCD_C voltage control register
-LCDCPCTL0=\$A0A! \ LCD_C port control 0
-LCDCPCTL1=\$A0C! \ LCD_C port control 1
-LCDCPCTL2=\$A0E! \ LCD_C port control 2
-LCDCCPCTL=\$A12! \ LCD_C charge pump ctrl register
-LCDCIV=\$A1E! \ LCD_C interrupt vector
-LCDM1=\$A20! \ LCD_C memory 1
-LCDM2=\$A21! \ LCD_C memory 2
-LCDM3=\$A22! \ LCD_C memory 3
-LCDM4=\$A23! \ LCD_C memory 4
-LCDM5=\$A24! \ LCD_C memory 5
-LCDM6=\$A25! \ LCD_C memory 6
-LCDM7=\$A26! \ LCD_C memory 7
-LCDM8=\$A27! \ LCD_C memory 8
-LCDM9=\$A28! \ LCD_C memory 9
-LCDM10=\$A29! \ LCD_C memory 10
-LCDM11=\$A2A! \ LCD_C memory 11
-LCDM12=\$A2B! \ LCD_C memory 12
-LCDM13=\$A2C! \ LCD_C memory 13
-LCDM14=\$A2D! \ LCD_C memory 14
-LCDM15=\$A2E! \ LCD_C memory 15
-LCDM16=\$A2F! \ LCD_C memory 16
-LCDM17=\$A30! \ LCD_C memory 17
-LCDM18=\$A31! \ LCD_C memory 18
-LCDM19=\$A32! \ LCD_C memory 19
-LCDM20=\$A33! \ LCD_C memory 20
-LCDM21=\$A34! \ LCD_C memory 21
-LCDM22=\$A35! \ LCD_C memory 22
-LCDM23=\$A36! \ LCD_C memory 23
-LCDM24=\$A37! \ LCD_C memory 24
-LCDM25=\$A38! \ LCD_C memory 25
-LCDM26=\$A39! \ LCD_C memory 26
-LCDM27=\$A3A! \ LCD_C memory 27
-LCDM28=\$A3B! \ LCD_C memory 28
-LCDM29=\$A3C! \ LCD_C memory 29
-LCDM30=\$A3D! \ LCD_C memory 30
-LCDM31=\$A3E! \ LCD_C memory 31
-LCDM32=\$A3F! \ LCD_C memory 32
-LCDM33=\$A40! \ LCD_C memory 33
-LCDM34=\$A41! \ LCD_C memory 34
-LCDM35=\$A42! \ LCD_C memory 35
-LCDM36=\$A43! \ LCD_C memory 36
-LCDM37=\$A44! \ LCD_C memory 37
-LCDM38=\$A45! \ LCD_C memory 38
-LCDM39=\$A46! \ LCD_C memory 39
-LCDM40=\$A47! \ LCD_C memory 40
-LCDM41=\$A48! \ LCD_C memory 41
-LCDM42=\$A49! \ LCD_C memory 42
-LCDM43=\$A4A! \ LCD_C memory 43
-LCDBM1=\$A40! \ LCD_C blinking memory 1
-LCDBM2=\$A41! \ LCD_C blinking memory 2
-LCDBM3=\$A42! \ LCD_C blinking memory 3
-LCDBM4=\$A43! \ LCD_C blinking memory 4
-LCDBM5=\$A44! \ LCD_C blinking memory 5
-LCDBM6=\$A45! \ LCD_C blinking memory 6
-LCDBM7=\$A46! \ LCD_C blinking memory 7
-LCDBM8=\$A47! \ LCD_C blinking memory 8
-LCDBM9=\$A48! \ LCD_C blinking memory 9
-LCDBM10=\$A49! \ LCD_C blinking memory 10
-LCDBM11=\$A4A! \ LCD_C blinking memory 11
-LCDBM12=\$A4B! \ LCD_C blinking memory 12
-LCDBM13=\$A4C! \ LCD_C blinking memory 13
-LCDBM14=\$A4D! \ LCD_C blinking memory 14
-LCDBM15=\$A4E! \ LCD_C blinking memory 15
-LCDBM16=\$A4F! \ LCD_C blinking memory 16
-LCDBM17=\$A50! \ LCD_C blinking memory 17
-LCDBM18=\$A51! \ LCD_C blinking memory 18
-LCDBM19=\$A52! \ LCD_C blinking memory 19
-LCDBM20=\$A53! \ LCD_C blinking memory 20
-LCDBM21=\$A54! \ LCD_C blinking memory 21
-LCDBM22=\$A55! \ LCD_C blinking memory 22
-
-
-ESIDEBUG1=\$D00! \ ESI debug register 1
-ESIDEBUG2=\$D02! \ ESI debug register 2
-ESIDEBUG3=\$D04! \ ESI debug register 3
-ESIDEBUG4=\$D06! \ ESI debug register 4
-ESIDEBUG5=\$D08! \ ESI debug register 5
-ESICNT0=\$D10! \ ESI PSM counter 0
-ESICNT1=\$D12! \ ESI PSM counter 1
-ESICNT2=\$D14! \ ESI PSM counter 2
-ESICNT3=\$D16! \ ESI oscillator counter register
-ESIIV=\$D1A! \ ESI interrupt vector
-ESIINT1=\$D1C! \ ESI interrupt register 1
-ESIINT2=\$D1E! \ ESI interrupt register 2
-ESIAFE=\$D20! \ ESI AFE control register
-ESIPPU=\$D22! \ ESI PPU control register
-ESITSM=\$D24! \ ESI TSM control register
-ESIPSM=\$D26! \ ESI PSM control register
-ESIOSC=\$D28! \ ESI oscillator control register
-ESICTL=\$D2A! \ ESI control register
-ESITHR1=\$D2C! \ ESI PSM counter threshold register 1
-ESITHR2=\$D2E! \ ESI PSM counter threshold register 2
-ESIADMEM1=\$D30! \ ESI A/D conversion memory 1
-ESIADMEM2=\$D32! \ ESI A/D conversion memory 2
-ESIADMEM3=\$D34! \ ESI A/D conversion memory 3
-ESIADMEM4=\$D36! \ ESI A/D conversion memory 4
-ESIDAC1R0=\$D40! \ ESI DAC1 register 0
-ESIDAC1R1=\$D42! \ ESI DAC1 register 1
-ESIDAC1R2=\$D44! \ ESI DAC1 register 2
-ESIDAC1R3=\$D46! \ ESI DAC1 register 3
-ESIDAC1R4=\$D48! \ ESI DAC1 register 4
-ESIDAC1R5=\$D4A! \ ESI DAC1 register 5
-ESIDAC1R6=\$D4C! \ ESI DAC1 register 6
-ESIDAC1R7=\$D4E! \ ESI DAC1 register 7
-ESIDAC2R0=\$D50! \ ESI DAC2 register 0
-ESIDAC2R1=\$D52! \ ESI DAC2 register 1
-ESIDAC2R2=\$D54! \ ESI DAC2 register 2
-ESIDAC2R3=\$D56! \ ESI DAC2 register 3
-ESIDAC2R4=\$D58! \ ESI DAC2 register 4
-ESIDAC2R5=\$D5A! \ ESI DAC2 register 5
-ESIDAC2R6=\$D5C! \ ESI DAC2 register 6
-ESIDAC2R7=\$D5E! \ ESI DAC2 register 7
-ESITSM0=\$D60! \ ESI TSM 0
-ESITSM1=\$D62! \ ESI TSM 1
-ESITSM2=\$D64! \ ESI TSM 2
-ESITSM3=\$D66! \ ESI TSM 3
-ESITSM4=\$D68! \ ESI TSM 4
-ESITSM5=\$D6A! \ ESI TSM 5
-ESITSM6=\$D6C! \ ESI TSM 6
-ESITSM7=\$D6E! \ ESI TSM 7
-ESITSM8=\$D70! \ ESI TSM 8
-ESITSM9=\$D72! \ ESI TSM 9
-ESITSM10=\$D74! \ ESI TSM 10
-ESITSM11=\$D76! \ ESI TSM 11
-ESITSM12=\$D78! \ ESI TSM 12
-ESITSM13=\$D7A! \ ESI TSM 13
-ESITSM14=\$D7C! \ ESI TSM 14
-ESITSM15=\$D7E! \ ESI TSM 15
-ESITSM16=\$D80! \ ESI TSM 16
-ESITSM17=\$D82! \ ESI TSM 17
-ESITSM18=\$D84! \ ESI TSM 18
-ESITSM19=\$D86! \ ESI TSM 19
-ESITSM20=\$D88! \ ESI TSM 20
-ESITSM21=\$D8A! \ ESI TSM 21
-ESITSM22=\$D8C! \ ESI TSM 22
-ESITSM23=\$D8E! \ ESI TSM 23
-ESITSM24=\$D90! \ ESI TSM 24
-ESITSM25=\$D92! \ ESI TSM 25
-ESITSM26=\$D94! \ ESI TSM 26
-ESITSM27=\$D96! \ ESI TSM 27
-ESITSM28=\$D98! \ ESI TSM 28
-ESITSM29=\$D9A! \ ESI TSM 29
-ESITSM30=\$D9C! \ ESI TSM 30
-ESITSM31=\$D9E! \ ESI TSM 31
+CDCTL0=\$8C0! \ Comparator_E control register 0
+CDCTL1=\$8C2! \ Comparator_E control register 1
+CDCTL2=\$8C4! \ Comparator_E control register 2
+CDCTL3=\$8C6! \ Comparator_E control register 3
+CDINT=\$8CC! \ Comparator_E interrupt register
+CDIV=\$8CE! \ Comparator_E interrupt vector word
+
+CRC32DIW0=\$980! \ CRC32 data input
+CRC32DIRBW0=\$986! \ CRC32 data input reverse
+CRC32INIRESW0=\$988! \ CRC32 initialization and result word 0
+CRC32INIRESW1=\$98A! \ CRC32 initialization and result word 1
+CRC32RESRW1=\$98! \ CRC32 result reverse word 1
+CRC32RESRW1=\$98E! \ CRC32 result reverse word 0
+CRC16DIW0=\$990! \ CRC16 data input
+CRC16DIRBW0=\$996! \ CRC16 data input reverse
+CRC16INIRESW0=\$998! \ CRC16 initialization and result word 0
+CRC16RESRW1=\$99E! \ CRC16 result reverse word 0
+
+
+AESACTL0=\$9C0! \ AES accelerator control register 0
+AESASTAT=\$9C4! \ AES accelerator status register
+AESAKEY=\$9C6! \ AES accelerator key register
+AESADIN=\$9C8! \ AES accelerator data in register
+AESADOUT=\$9CA! \ AES accelerator data out register
+AESAXDIN=\$9CC! \ AES accelerator XORed data in register
+AESAXIN =\$9CE! \ AES accelerator XORed data in register (no trigger)
+
+
+LCDCCTL0=\$A00! \ LCD_C control register 0
+LCDCCTL1=\$A02! \ LCD_C control register 1
+LCDCBLKCTL=\$A04! \ LCD_C blinking control register
+LCDCMEMCTL=\$A06! \ LCD_C memory control register
+LCDCVCTL=\$A08! \ LCD_C voltage control register
+LCDCPCTL0=\$A0A! \ LCD_C port control 0
+LCDCPCTL1=\$A0C! \ LCD_C port control 1
+LCDCPCTL2=\$A0E! \ LCD_C port control 2
+LCDCCPCTL=\$A12! \ LCD_C charge pump ctrl register
+LCDCIV=\$A1E! \ LCD_C interrupt vector
+LCDM1=\$A20! \ LCD_C memory 1
+LCDM2=\$A21! \ LCD_C memory 2
+LCDM3=\$A22! \ LCD_C memory 3
+LCDM4=\$A23! \ LCD_C memory 4
+LCDM5=\$A24! \ LCD_C memory 5
+LCDM6=\$A25! \ LCD_C memory 6
+LCDM7=\$A26! \ LCD_C memory 7
+LCDM8=\$A27! \ LCD_C memory 8
+LCDM9=\$A28! \ LCD_C memory 9
+LCDM10=\$A29! \ LCD_C memory 10
+LCDM11=\$A2A! \ LCD_C memory 11
+LCDM12=\$A2B! \ LCD_C memory 12
+LCDM13=\$A2C! \ LCD_C memory 13
+LCDM14=\$A2D! \ LCD_C memory 14
+LCDM15=\$A2E! \ LCD_C memory 15
+LCDM16=\$A2F! \ LCD_C memory 16
+LCDM17=\$A30! \ LCD_C memory 17
+LCDM18=\$A31! \ LCD_C memory 18
+LCDM19=\$A32! \ LCD_C memory 19
+LCDM20=\$A33! \ LCD_C memory 20
+LCDM21=\$A34! \ LCD_C memory 21
+LCDM22=\$A35! \ LCD_C memory 22
+LCDM23=\$A36! \ LCD_C memory 23
+LCDM24=\$A37! \ LCD_C memory 24
+LCDM25=\$A38! \ LCD_C memory 25
+LCDM26=\$A39! \ LCD_C memory 26
+LCDM27=\$A3A! \ LCD_C memory 27
+LCDM28=\$A3B! \ LCD_C memory 28
+LCDM29=\$A3C! \ LCD_C memory 29
+LCDM30=\$A3D! \ LCD_C memory 30
+LCDM31=\$A3E! \ LCD_C memory 31
+LCDM32=\$A3F! \ LCD_C memory 32
+LCDM33=\$A40! \ LCD_C memory 33
+LCDM34=\$A41! \ LCD_C memory 34
+LCDM35=\$A42! \ LCD_C memory 35
+LCDM36=\$A43! \ LCD_C memory 36
+LCDM37=\$A44! \ LCD_C memory 37
+LCDM38=\$A45! \ LCD_C memory 38
+LCDM39=\$A46! \ LCD_C memory 39
+LCDM40=\$A47! \ LCD_C memory 40
+LCDM41=\$A48! \ LCD_C memory 41
+LCDM42=\$A49! \ LCD_C memory 42
+LCDM43=\$A4A! \ LCD_C memory 43
+LCDBM1=\$A40! \ LCD_C blinking memory 1
+LCDBM2=\$A41! \ LCD_C blinking memory 2
+LCDBM3=\$A42! \ LCD_C blinking memory 3
+LCDBM4=\$A43! \ LCD_C blinking memory 4
+LCDBM5=\$A44! \ LCD_C blinking memory 5
+LCDBM6=\$A45! \ LCD_C blinking memory 6
+LCDBM7=\$A46! \ LCD_C blinking memory 7
+LCDBM8=\$A47! \ LCD_C blinking memory 8
+LCDBM9=\$A48! \ LCD_C blinking memory 9
+LCDBM10=\$A49! \ LCD_C blinking memory 10
+LCDBM11=\$A4A! \ LCD_C blinking memory 11
+LCDBM12=\$A4B! \ LCD_C blinking memory 12
+LCDBM13=\$A4C! \ LCD_C blinking memory 13
+LCDBM14=\$A4D! \ LCD_C blinking memory 14
+LCDBM15=\$A4E! \ LCD_C blinking memory 15
+LCDBM16=\$A4F! \ LCD_C blinking memory 16
+LCDBM17=\$A50! \ LCD_C blinking memory 17
+LCDBM18=\$A51! \ LCD_C blinking memory 18
+LCDBM19=\$A52! \ LCD_C blinking memory 19
+LCDBM20=\$A53! \ LCD_C blinking memory 20
+LCDBM21=\$A54! \ LCD_C blinking memory 21
+LCDBM22=\$A55! \ LCD_C blinking memory 22
+
+
+ESIDEBUG1=\$D00! \ ESI debug register 1
+ESIDEBUG2=\$D02! \ ESI debug register 2
+ESIDEBUG3=\$D04! \ ESI debug register 3
+ESIDEBUG4=\$D06! \ ESI debug register 4
+ESIDEBUG5=\$D08! \ ESI debug register 5
+ESICNT0=\$D10! \ ESI PSM counter 0
+ESICNT1=\$D12! \ ESI PSM counter 1
+ESICNT2=\$D14! \ ESI PSM counter 2
+ESICNT3=\$D16! \ ESI oscillator counter register
+ESIIV=\$D1A! \ ESI interrupt vector
+ESIINT1=\$D1C! \ ESI interrupt register 1
+ESIINT2=\$D1E! \ ESI interrupt register 2
+ESIAFE=\$D20! \ ESI AFE control register
+ESIPPU=\$D22! \ ESI PPU control register
+ESITSM=\$D24! \ ESI TSM control register
+ESIPSM=\$D26! \ ESI PSM control register
+ESIOSC=\$D28! \ ESI oscillator control register
+ESICTL=\$D2A! \ ESI control register
+ESITHR1=\$D2C! \ ESI PSM counter threshold register 1
+ESITHR2=\$D2E! \ ESI PSM counter threshold register 2
+ESIADMEM1=\$D30! \ ESI A/D conversion memory 1
+ESIADMEM2=\$D32! \ ESI A/D conversion memory 2
+ESIADMEM3=\$D34! \ ESI A/D conversion memory 3
+ESIADMEM4=\$D36! \ ESI A/D conversion memory 4
+ESIDAC1R0=\$D40! \ ESI DAC1 register 0
+ESIDAC1R1=\$D42! \ ESI DAC1 register 1
+ESIDAC1R2=\$D44! \ ESI DAC1 register 2
+ESIDAC1R3=\$D46! \ ESI DAC1 register 3
+ESIDAC1R4=\$D48! \ ESI DAC1 register 4
+ESIDAC1R5=\$D4A! \ ESI DAC1 register 5
+ESIDAC1R6=\$D4C! \ ESI DAC1 register 6
+ESIDAC1R7=\$D4E! \ ESI DAC1 register 7
+ESIDAC2R0=\$D50! \ ESI DAC2 register 0
+ESIDAC2R1=\$D52! \ ESI DAC2 register 1
+ESIDAC2R2=\$D54! \ ESI DAC2 register 2
+ESIDAC2R3=\$D56! \ ESI DAC2 register 3
+ESIDAC2R4=\$D58! \ ESI DAC2 register 4
+ESIDAC2R5=\$D5A! \ ESI DAC2 register 5
+ESIDAC2R6=\$D5C! \ ESI DAC2 register 6
+ESIDAC2R7=\$D5E! \ ESI DAC2 register 7
+ESITSM0=\$D60! \ ESI TSM 0
+ESITSM1=\$D62! \ ESI TSM 1
+ESITSM2=\$D64! \ ESI TSM 2
+ESITSM3=\$D66! \ ESI TSM 3
+ESITSM4=\$D68! \ ESI TSM 4
+ESITSM5=\$D6A! \ ESI TSM 5
+ESITSM6=\$D6C! \ ESI TSM 6
+ESITSM7=\$D6E! \ ESI TSM 7
+ESITSM8=\$D70! \ ESI TSM 8
+ESITSM9=\$D72! \ ESI TSM 9
+ESITSM10=\$D74! \ ESI TSM 10
+ESITSM11=\$D76! \ ESI TSM 11
+ESITSM12=\$D78! \ ESI TSM 12
+ESITSM13=\$D7A! \ ESI TSM 13
+ESITSM14=\$D7C! \ ESI TSM 14
+ESITSM15=\$D7E! \ ESI TSM 15
+ESITSM16=\$D80! \ ESI TSM 16
+ESITSM17=\$D82! \ ESI TSM 17
+ESITSM18=\$D84! \ ESI TSM 18
+ESITSM19=\$D86! \ ESI TSM 19
+ESITSM20=\$D88! \ ESI TSM 20
+ESITSM21=\$D8A! \ ESI TSM 21
+ESITSM22=\$D8C! \ ESI TSM 22
+ESITSM23=\$D8E! \ ESI TSM 23
+ESITSM24=\$D90! \ ESI TSM 24
+ESITSM25=\$D92! \ ESI TSM 25
+ESITSM26=\$D94! \ ESI TSM 26
+ESITSM27=\$D96! \ ESI TSM 27
+ESITSM28=\$D98! \ ESI TSM 28
+ESITSM29=\$D9A! \ ESI TSM 29
+ESITSM30=\$D9C! \ ESI TSM 30
+ESITSM31=\$D9E! \ ESI TSM 31
ESI_RAM=\$E00!
; TARGETS kernel ; sizes are for 8MHz, DTC=2, 3WIRES (XON/XOFF)
;-------------------------------------------------------------------------------
; ;INFO + MAIN
-;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 26 + 3976 bytes
-MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 26 + 3966 bytes
-;MSP_EXP430FR5994 ;; compile for MSP-EXP430FR5994 launchpad ; 26 + 3984 bytes
-;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 26 + 3994 bytes
-;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 26 + 4028 bytes
-;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 26 + 3946 bytes
-;CHIPSTICK_FR2433 ; compile for the "CHIPSTICK" of M. Ken BOAK ; 26 + 3938 bytes
-;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 26 + 3960 bytes
+;MSP_EXP430FR5739 ; compile for MSP-EXP430FR5739 launchpad ; 26 + 3974 bytes
+;MSP_EXP430FR5969 ; compile for MSP-EXP430FR5969 launchpad ; 26 + 3962 bytes
+MSP_EXP430FR5994 ;; compile for MSP-EXP430FR5994 launchpad ; 26 + 3980 bytes
+;MSP_EXP430FR6989 ; compile for MSP-EXP430FR6989 launchpad ; 26 + 3990 bytes
+;MSP_EXP430FR4133 ; compile for MSP-EXP430FR4133 launchpad ; 26 + 4024 bytes
+;MSP_EXP430FR2355 ; compile for MSP-EXP430FR2355 launchpad ; 26 + 3956 bytes
+;MSP_EXP430FR2433 ; compile for MSP-EXP430FR2433 launchpad ; 26 + 3942 bytes
+;CHIPSTICK_FR2433 ; compile for the "CHIPSTICK" of M. Ken BOAK ; 26 + 3934 bytes
; choose DTC (Direct Threaded Code) model, if you don't know, choose 2
DTC .equ 2 ; DTC model 1 : DOCOL = CALL rDOCOL 14 cycles 1 word shortest DTC model
FIXPOINT_INPUT ;; + 78 bytes : adds the interpretation input for Q15.16 numbers
LOWERCASE ;; + 46 bytes : enables to write strings in lowercase.
VOCABULARY_SET ;; + 104 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
-;SD_CARD_LOADER ;; + 1748 bytes : to LOAD source files from SD_card
-;SD_CARD_READ_WRITE ;; + 1192 bytes : to read, create, write and del files + source files direct copy from PC to SD_Card
-NONAME ; + 64 bytes : adds :NONAME CODENN (CODENoNaMe)
+SD_CARD_LOADER ;; + 1748 bytes : to LOAD source files from SD_card
+SD_CARD_READ_WRITE ;; + 1192 bytes : to read, create, write and del files + source files direct copy from PC to SD_Card
+NONAME ;; + 64 bytes : adds :NONAME CODENN (CODENoNaMe)
;BOOTLOADER ; + 72 bytes : adds to <reset> a bootstrap to SD_CARD\BOOT.4TH.
;QUIETBOOT ; + 2 bytes : to perform bootload without displaying.
;TOTAL ; + 4 bytes : to save R4 to R7 registers during interrupts.
;UARTtoI2C ; to redirect source file to a I2C TERMINAL FastForth device UART2IIC.f
;FIXPOINT ; + 452 bytes : add Q15.16 words HOLDS F+ F- F/ F* F#S F. S>F 2@ 2CONSTANT FIXPOINT.f
UTILITY ;; + 426/508 bytes : add .S .RS WORDS U.R DUMP ? UTILITY.f
-;SD_TOOLS ;; + 126 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY SD_TOOLS.f
+SD_TOOLS ;; + 142 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY SD_TOOLS.f
;ANS_CORE_COMPLIANT ; + 876 bytes : required to pass coretest.4th ; (includes items below) ANS_COMP.f
;ARITHMETIC ; + 358 bytes : add S>D M* SM/REM FM/MOD * /MOD / MOD */MOD /MOD */
;DOUBLE ; + 130 bytes : add 2@ 2! 2DUP 2SWAP 2OVER
; the best and cheapest: UARTtoUSB cable with Prolific PL2303HXD (or PL2303TA)
; works wel in 3 WIRES (XON/XOF) and 4WIRES (GND,RX,TX,RTS) config
; --------------------------------------------------------------------------------------------
-; PL2303TA 4 wires CABLE PL2303HXD 6 wires CABLE
+; PL2303TA 4 wires CABLE PL2303HXD 6 wires CABLE
; pads upside: 3V3,txd,rxd,gnd,5V pads upside: gnd, 3V3,txd,rxd,5V
; downside: cts,dcd,dsr,rts,dtr downside: rts,cts
; --------------------------------------------------------------------------------------------
; + 460800 (2MHz)
; + 921600 (4,8,16 MHz)
-; RN42 config : connect RN41/RN42 module on teraterm, via USBtoUART bridge,
-; ----------- 8n1, 115200 bds, no flow control, echo on
+; RN42 config : connect RN41/RN42 module on teraterm, via USBtoUART bridge,
+; ----------- 8n1, 115200 bds, no flow control, echo on
; $$$ // enter control mode, response: AOK
; SU,92 // set 921600 bds, response: AOK
; R,1 // reset module to take effect
LEAVEPTR .equ LSTACK ; Leave-stack pointer
PSTACK .equ LSTACK+(LSTACK_SIZE*2)+(PSTACK_SIZE*2)
RSTACK .equ PSTACK+(RSTACK_SIZE*2)
-PAD_I2CADR .equ PAD_ORG-4
+PAD_I2CADR .equ PAD_ORG-4
PAD_I2CCNT .equ PAD_ORG-2
PAD_ORG .equ RSTACK+4
-TIB_I2CADR .equ TIB_ORG-4
+TIB_I2CADR .equ TIB_ORG-4
TIB_I2CCNT .equ TIB_ORG-2
TIB_ORG .equ PAD_ORG+PAD_LEN+4
HOLDS_ORG .equ TIB_ORG+TIB_LEN
LAST_CFA .equ BASE_HOLD+8
LAST_PSP .equ BASE_HOLD+10
STATE .equ BASE_HOLD+12 ; Interpreter state
-SOURCE .equ BASE_HOLD+14
-SOURCE_LEN .equ BASE_HOLD+14
+SOURCE .equ BASE_HOLD+14
+SOURCE_LEN .equ BASE_HOLD+14
SOURCE_ADR .equ BASE_HOLD+16 ; len, addr of input stream
TOIN .equ BASE_HOLD+18 ; CurrentInputBuffer pointer
DDP .equ BASE_HOLD+20 ; dictionnary pointer
LASTVOC .equ BASE_HOLD+22 ; keep VOC-LINK
CONTEXT .equ BASE_HOLD+24 ; CONTEXT dictionnary space (8 CELLS)
CURRENT .equ BASE_HOLD+40 ; CURRENT dictionnary ptr
-BASE .equ BASE_HOLD+42
+BASE .equ BASE_HOLD+42
LINE .equ BASE_HOLD+44 ; line in interpretation (initialized by NOECHO)
; --------------------------------------------------------------;
; RAMSTART + $1E0 : free for user after source file compilation ;
; --------------------------------------------------
; RAMSTART + $1FC : RAM SD_CARD SD_BUF 4 + 512 bytes
; --------------------------------------------------
-SD_BUF_I2CADR .equ SD_BUF-4
+SD_BUF_I2CADR .equ SD_BUF-4
SD_BUF_I2CCNT .equ SD_BUF-2
SD_BUF .equ BASE_HOLD+78
SD_BUFEND .equ SD_BUF + 200h ; 512bytes
;LPM_MODE .word CPUOFF+GIE+SCG0 ; LPM1 is the default mode (disable FLL)
INIDP .word ROMDICT ; define RST_STATE
INIVOC .word lastvoclink ; define RST_STATE
+GPFLAGS .word 0 ; always usefull
.word RXON ; user use
.word RXOFF ; user use
.ELSEIF
.word 0,0
.ENDIF ; SD_CARD_LOADER
-GPFLAGS .word 0
+
INFO_BASE_END
-; ------------------------------
-; VARIABLES that could be in RAM
-; ------------------------------
+; -------------------------------
+; VARIABLES that should be in RAM
+; -------------------------------
+
+ .IFDEF SD_CARD_LOADER
.IFDEF RAM_1K ; if RAM = 1K (FR57xx) the variables below are in INFO space (FRAM)
- .org INFO_BASE_END
+SD_ORG_DATA .equ INFO_BASE_END+18 ; 8 words free to set some core routines addresses + 1 word guard...
+ ; ...while preserving FRAM area SD_LEN_DATA.
+
.ELSE ; if RAM >= 2k the variables below are in RAM
- .org SD_BUFEND
- .word 0 ; guard
- .ENDIF
- .IFDEF SD_CARD_LOADER
+SD_ORG_DATA .equ SD_BUFEND+2 ; 1 word guard
+ .ENDIF
-SD_ORG_DATA
+ .org SD_ORG_DATA
; ---------------------------------------
; FAT FileSystemInfos
BufferPtr .equ SD_LOW_LEVEL+10
BufferLen .equ SD_LOW_LEVEL+12
-SD_FAT_LEVEL .equ SD_LOW_LEVEL+14
+SD_FAT_LEVEL .equ SD_LOW_LEVEL+14
; ---------------------------------------
; FAT entry
; ---------------------------------------
; ---------------------------------------
; Load file operation
; ---------------------------------------
-
pathname .equ SD_FAT_LEVEL+18 ; start address
EndOfPath .equ SD_FAT_LEVEL+20 ; end address
; ---------------------------------------
-FirstHandle .equ SD_FAT_LEVEL+30
+FirstHandle .equ SD_FAT_LEVEL+22
; ---------------------------------------
; Handle structure
LOADSTACK_SIZE .equ HandleMax+1 ; make room for 3 words * handles
LoadStackEnd .equ LOAD_STACK+LOADSTACK_SIZE*6
-SDIB_I2CADR .equ PAD_ORG-4
+SDIB_I2CADR .equ PAD_ORG-4
SDIB_I2CCNT .equ PAD_ORG-2
SDIB_ORG .equ PAD_ORG
LOADSTACK_SIZE .equ HandleMax+1 ; make room for 3 words * handles
LoadStackEnd .equ LOAD_STACK+LOADSTACK_SIZE*6 ; 3 words by handle
-SDIB_I2CADR .equ SDIB_ORG-4
+SDIB_I2CADR .equ SDIB_ORG-4
SDIB_I2CCNT .equ SDIB_ORG-2
SDIB_ORG .equ LoadStackEnd+4
SDIB_LEN .equ 84 ; = TIB_LEN = PAD_LEN
rDOCOL .reg R7 ; COLD defines xdocol as R7 content
L .reg R7
-M .reg r6 ; ex. PUSHM L,N
+M .reg r6 ; ex. PUSHM L,N
N .reg r5
P .reg r4
JNC MDIV1 ;2
SUB T,W ;1 REMlo - DIVlo
BIS #1,SR ;1 SETC
- JMP MDIV2 ;2
+ JMP MDIV2 ;2
ENDMDIV MOV #xdodoes,rDODOES;2 restore rDODOES
MOV W,2(PSP) ;3 REMlo in 2(PSP)
MOV X,0(PSP) ;3 QUOTlo in 0(PSP)
;https://forth-standard.org/standard/core/num
;C # ud1lo ud1hi -- ud2lo ud2hi convert 1 digit of output
FORTHWORD "#"
-NUM MOV &BASE,T ;3 T = Divisor
+NUM MOV &BASE,T ;3 T = Divisor
NUM1 MOV @PSP,S ;2 -- DVDlo DVDhi S = DVDlo
SUB #2,PSP ;1 -- DVDlo x DVDhi TOS = DVDhi
CALL #MUSMOD1 ;4 -- REMlo QUOTlo QUOThi
- MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi
+ MOV @PSP+,0(PSP) ;4 -- QUOTlo QUOThi
TODIGIT CMP.B #10,W ;2 W = REMlo
JLO TODIGIT1 ;2 U<
ADD #7,W ;2
RXON ;
; ----------------------------------;
.IFDEF TERMINAL3WIRES ;
-; .IF TERMINALBAUDRATE/FREQUENCY <230400
+; .IF TERMINALBAUDRATE/FREQUENCY <230400 ; Incompatible with baudrate modification on the fly.
RXON_LOOP BIT #UCTXIFG,&TERMIFG ;3 wait the sending end of XON, useless at high baudrates
JZ RXON_LOOP ;2
; .ENDIF
MOV.B Y,0(TOS) ; 3 no: store char @ Ptr, send echo then loopback
ADD #1,TOS ; 1 increment Ptr
YEMIT1
-; .IF TERMINALBAUDRATE/FREQUENCY <230401
+; .IF TERMINALBAUDRATE/FREQUENCY <230401; Incompatible with baudrate modification on the fly.
BIT #UCTXIFG,&TERMIFG ; 3 wait the sending end of previous char (sent before ACCEPT), useless at high baudrates
- JZ YEMIT1 ; 2
-; .ENDIF
+ JZ YEMIT1 ; 2 but there's no point in wanting to save time here:
+; .ENDIF ; it must be understood that the receiver loses time also when receiving the char.
YEMIT2
.IFDEF TERMINAL5WIRES ;
BIT.B #CTS,&HANDSHAKIN ; 3
JZ WAITaKEY ; 2 no
; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
; stops the 2th stopwatch ; best case result: 26~/22~ (with/without echo) ==> 385/455 kBds/MHz
-; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
+; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
; ----------------------------------;
ENDACCEPT ; <--- XOFF return address
FORTHWORD "EMIT"
EMIT MOV @PC+,PC ;3 15~
.word BODYEMIT
-BODYEMIT MOV TOS,Y ; 1
+BODYEMIT MOV TOS,Y ; 1
MOV @PSP+,TOS ; 2
JMP YEMIT1 ;9 12~
FORTHWORD "TYPE"
TYPE CMP #0,TOS
JZ TWODROP ; abort fonction
- .word 0151Eh ;5 PUSM TOS,IP R-- len,IP
+ .word 0151Eh ;5 PUSM TOS,IP R-- len,IP
MOV #TYPE_NEXT,IP
TYPELOOP MOV @PSP,Y ;2 -- adr adr ; 30~ char loop
MOV.B @Y+,TOS ;2
JNZ TYPELOOP ;2
POPM #2,TOS ;4 POPM IP,TOS
TWODROP ADD #2,PSP ;
- MOV @PSP+,TOS ; --
+ MOV @PSP+,TOS ; --
mNEXT ;
;https://forth-standard.org/standard/core/CR
mNEXT
FORTHWORD "CAPS_OFF"
-CAPS_OFF MOV #0,&CAPS
+CAPS_OFF MOV #0,&CAPS
mNEXT
;https://forth-standard.org/standard/core/Sq
;C WORD char -- addr Z=1 if len=0
; parse a word delimited by char separator
; "word" is capitalized
-; TOIN is the relative displacement in the ascii string
+; TOIN is the relative displacement in the ascii string
; separator filled line = 25 cycles + 7 cycles by char
FORTHWORD "WORD"
WORDD MOV #SOURCE_LEN,S ;2 -- separator
MOV #xdodoes,rDODOES ;2
mNEXT ;4 42/47 words
- .IFDEF MPY_32
+ .IFDEF MPY_32
;https://forth-standard.org/standard/core/toNUMBER
;C convert a string to double number until count2 = 0 or until not convertible char
SUB #4,PSP ;1
MOV &BASE,T ;3
TONUMLOOP MOV.B @S,W ;2 -- ud1lo ud1hi adr count W=char
-DDIGITQ SUB.B #30h,W ;2 skip all chars < '0'
+DDIGITQ SUB.B #30h,W ;2 skip all chars < '0'
CMP.B #10,W ;2 char was U< "10" ?
JLO DDIGITQNEXT ;2 no
SUB.B #7,W ;2 skip all chars between "9" and "A"
QNUMNEXT FORTHtoASM ; -- c-addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2
CMP #0,TOS ;1 cnt2=0 : conversion is ok ?
JZ QNUMNEXT1 ;2 yes
- BIT #UF9,SR ;2 already flagged double ?
+ BIT #UF9,SR ;2 already flagged double ?
; ( test to discard repeated points or repeated commas)
JNZ QNUMNEXT1 ;2 abort
BIS #UF9,SR ;2 set double number flag
JNZ QNUMNEXT1 ;2 no
S15Q16 MOV TOS,W ;1 -- c-addr ud2lo x x x yes W=cnt2
MOV #0,X ;1 -- c-addr ud2lo x 0 x init X = ud2lo' = 0
-S15Q16LOOP MOV X,2(PSP) ;3 -- c-addr ud2lo ud2lo' ud2lo' x 0(PSP) = ud2lo'
+S15Q16LOOP MOV X,2(PSP) ;3 -- c-addr ud2lo ud2lo' ud2lo' x 0(PSP) = ud2lo'
SUB.B #1,W ;1 decrement cnt2
MOV W,X ;1 X = cnt2-1
ADD S,X ;1 X = end_of_string-1, first...
JLO S15Q16EOC ;2
QS15Q16DIGI CMP T,X ;1 R-- IP sign BASE is X a digit ?
JHS S15Q16EOC ;2 -- c-addr ud2lo ud2lo' x ud2lo' if no
- MOV X,0(PSP) ;3 -- c-addr ud2lo ud2lo' digit x
+ MOV X,0(PSP) ;3 -- c-addr ud2lo ud2lo' digit x
MOV T,TOS ;1 -- c-addr ud2lo ud2lo' digit base R-- IP sign base
- .word 152Ch ;6 PUSH S,T,W: R-- IP sign base addr2 base cnt2
+ .word 152Ch ;6 PUSH S,T,W: R-- IP sign base addr2 base cnt2
CALL #MUSMOD ;4 -- c-addr ud2lo ur uqlo uqhi
- .word 172Ah ;6 restore W,T,S: R-- IP sign BASE
+ .word 172Ah ;6 restore W,T,S: R-- IP sign BASE
JMP S15Q16LOOP ;2 W=cnt
S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- c-addr ud2lo ud2hi uqlo x ud2lo from >NUMBER part1 becomes here ud2hi=S15 part2
MOV @PSP,4(PSP) ;4 -- c-addr ud2lo ud2hi x x uqlo becomes ud2lo
JZ QNUMOK ;2 -- c-addr ud2lo-hi x sign conversion OK
QNUMKO ADD #6,PSP ;1 -- c-addr sign
AND #0,TOS ;1 -- c-addr ff TOS=0 and Z=1 ==> conversion ko
- mNEXT ;4
+ mNEXT ;4
; ----------------------------------;97
-QNUMOK ADD #2,PSP ;1 -- c-addr ud2lo-hi cnt2
+QNUMOK ADD #2,PSP ;1 -- c-addr ud2lo-hi cnt2
MOV 2(PSP),4(PSP) ; -- udlo udlo udhi sign
MOV @PSP+,0(PSP) ;4 -- udlo udhi sign note : PSP is incremented before write back !!!
XOR #-1,TOS ;1 -- udlo udhi inv(sign)
JNZ QNUMEND ;2 leave double
ADD #2,PSP ;1 leave number
QNUMEND mNEXT ;4 TOS=-1 and Z=0 ==> conversion ok
-; ----------------------------------;119 words
+; ----------------------------------;119 words
.ELSE ; no hardware HRDWMPY
MOV &BASE,TOS ; -- ud1lo ud1hi x base
MOV #UMSTARNEXT1,IP ;
UMSTARONE JMP UMSTAR1 ; ud1hi * base -- x ud3hi X=ud3lo
-UMSTARNEXT1 FORTHtoASM ; -- ud1lo ud1hi x ud3hi
+UMSTARNEXT1 FORTHtoASM ; -- ud1lo ud1hi x ud3hi
MOV X,2(RSP) ; R-- IP adr count ud3lo digit
MOV 4(PSP),S ; -- ud1lo ud1hi x ud3hi S=ud1lo
MOV &BASE,TOS ; -- ud1lo ud1hi x base
UMSTARNEXT2 FORTHtoASM ; -- ud1lo ud1hi x ud4hi r-- IP adr count ud3lo digit
ADD @RSP+,X ; -- ud1lo ud1hi x ud4hi X = ud4lo+digit = ud2lo
MPLUS ADDC @RSP+,TOS ; -- ud1lo ud1hi x ud2hi TOS = ud4hi+ud3lo+carry = ud2hi
- MOV X,4(PSP) ; -- ud2lo ud1hi x ud2hi
- MOV TOS,2(PSP) ; -- ud2lo ud2hi x x R-- IP adr count
+ MOV X,4(PSP) ; -- ud2lo ud1hi x ud2hi
+ MOV TOS,2(PSP) ; -- ud2lo ud2hi x x R-- IP adr count
POPM #3,IP ; -- ud2lo ud2hi x x T=count, S=adr POPM T,S,IP
TONUMPLUS ADD #1,S ;
SUB #1,T ;
QNUMNEXT FORTHtoASM ; -- c-addr ud2lo-hi addr2 cnt2 R-- IP sign BASE S=addr2,T=cnt2
CMP #0,TOS ;1 cnt2=0 ? conversion is ok ?
JZ QNUMNEXT1 ;2 yes
- BIT #UF9,SR ;2 already flagged double ?
+ BIT #UF9,SR ;2 already flagged double ?
; ( test to discard repeated points or repeated commas)
JNZ QNUMNEXT1 ;2 abort
BIS #UF9,SR ;2 set double number flag
S15Q16 MOV T,W ;1 -- c-addr ud2lo x x x W=cnt2
MOV &BASE,T ;3 T=current base
MOV #0,X ;1 -- c-addr ud2lo x 0 x init ud2lo' = 0
-S15Q16LOOP MOV X,2(PSP) ;3 -- c-addr ud2lo ud2lo' ud2lo' x X = 0(PSP) = ud2lo'
+S15Q16LOOP MOV X,2(PSP) ;3 -- c-addr ud2lo ud2lo' ud2lo' x X = 0(PSP) = ud2lo'
SUB.B #1,W ;1 decrement cnt2
MOV W,X ;1 X = cnt2-1
ADD S,X ;1 X = end_of_string-1, first...
JLO S15Q16EOC ;2
QS15Q16DIGI CMP T,X ;1 R-- IP sign BASE is X a digit ?
JHS S15Q16EOC ;2 -- c-addr ud2lo ud2lo' x ud2lo' if no
- MOV X,0(PSP) ;3 -- c-addr ud2lo ud2lo' digit x
+ MOV X,0(PSP) ;3 -- c-addr ud2lo ud2lo' digit x
MOV T,TOS ;1 -- c-addr ud2lo ud2lo' digit base R-- IP sign base
- .word 152Ch ;6 PUSH S,T,W: R-- IP sign base addr2 base cnt2
+ .word 152Ch ;6 PUSH S,T,W: R-- IP sign base addr2 base cnt2
CALL #MUSMOD ;4 -- c-addr ud2lo ur uqlo uqhi
- .word 172Ah ;6 restore W,T,S: R-- IP sign BASE
+ .word 172Ah ;6 restore W,T,S: R-- IP sign BASE
JMP S15Q16LOOP ;2 W=cnt
S15Q16EOC MOV 4(PSP),2(PSP) ;5 -- c-addr ud2lo ud2lo uqlo x ud2lo from >NUMBER part1 becomes here ud2hi=S15 part2
MOV @PSP,4(PSP) ;4 -- c-addr ud2lo ud2hi x x uqlo becomes ud2lo
; : SETIB SOURCE 2! 0 >IN ! ; ; org len -- set Input Buffer, shared by INTERPRET and [ELSE]
SETIB MOV #0,&TOIN ;
MOV TOS,&SOURCE_LEN ; -- org len
- MOV @PSP+,&SOURCE_ADR ; -- len
- MOV @PSP+,TOS ; --
+ MOV @PSP+,&SOURCE_ADR ; -- len
+ MOV @PSP+,TOS ; --
mNEXT ;
;C INTERPRET i*x addr u -- j*x interpret given buffer
MOV @RSP+,IP ;2
mNEXT
+
+PREQUIT0 MOV #0,&SAVE_SYSRSTIV ;
+PREQUIT1 MOV #RSTACK,RSP
+ MOV #LSTACK,&LEAVEPTR
+ MOV #0,&STATE
+ mNEXT
+
.IFDEF BOOTLOAD ; Boot loader requires Conditional Compilation
;c BOOT -- jump to bootstrap then continues with (QUIT)
FORTHWORD "BOOT"
-BOOT MOV #RSTACK,RSP
- MOV #LSTACK,&LEAVEPTR
- MOV #0,&STATE
+BOOT ASMtoFORTH ;
+ .word PREQUIT1 ; doesn't reset SAVE_SYSRSTIV before testing !
+ FORTHtoASM ;
; ----------------------------------;
; BOOTSTRAP TEST ;
; ----------------------------------;
CMP #0,&SAVE_SYSRSTIV ; if WARM
JZ QUIT0 ; no boostrap
BIT.B #SD_CD,&SD_CDIN ; SD_memory in SD_Card module ?
- JNZ QUIT0 ; no
+ JNZ QUIT0 ; if not, no bootstrap
; ----------------------------------;
; BOOTSTRAP ; on SYSRSTIV <> 0
; ----------------------------------;
MOV &SAVE_SYSRSTIV,TOS ;
MOV #0,&SAVE_SYSRSTIV ;
ASMtoFORTH ;
- .IFDEF QUIETBOOT
- .word NOECHO ; warning ! your BOOT.4TH must to be finished with ECHO command!
+ .IFDEF QUIETBOOT
+ .word NOECHO ; warning ! your BOOT.4TH must to be finished with ECHO command!
.ENDIF
.word XSQUOTE ; -- addr u
.byte 15,"LOAD\34 BOOT.4TH\34" ; issues error 2 if no such file...
- .word BRAN,QUIT4 ;
+ .word BRAN,QUIT4 ; to interpret this string
; ----------------------------------;
;https://forth-standard.org/standard/core/QUIT
.word BODYQUIT ; this word may be replaced by BOOT
BODYQUIT
- .ELSE ; no BOOTLOADER, QUIT is not DEFERred
+ .ELSE ; if no BOOTLOADER, QUIT is not DEFERred
+
;https://forth-standard.org/standard/core/QUIT
;c QUIT -- interpret line by line the input stream
FORTHWORD "QUIT"
QUIT
- MOV #RSTACK,RSP
- MOV #LSTACK,&LEAVEPTR
- MOV #0,&STATE
- .ENDIF
-QUIT0 MOV #0,&SAVE_SYSRSTIV ;
- ASMtoFORTH
+ .ENDIF ; bootloader
+
+QUIT0 ASMtoFORTH
+ .word PREQUIT0
QUIT1 .word XSQUOTE
.byte 5,13,10,"ok " ; CR+LF + Forth prompt
QUIT2 .word TYPE ; display it
JMP QUIT
WIP_DEFER ; WIPE resets ALL factory primary DEFERred words
- MOV #BODYWARM,&WARM+2 ; (WARM) is WARM kill user interrupts init
- MOV #BODYSLEEP,&SLEEP+2 ; (SLEEP) is SLEEP kill user background task
-QAB_DEFER ; QABORT resets some primary DEFERred words
- MOV #BODYEMIT,&EMIT+2 ;4 (EMIT) is EMIT default console output
- MOV #BODYCR,&CR+2 ;4 (CR) is CR default CR
- MOV #BODYKEY,&KEY+2 ;4 (KEY) is KEY default KEY
+ MOV #BODYWARM,&WARM+2 ; (WARM) is WARM kill user interrupts init
+ MOV #BODYSLEEP,&SLEEP+2 ; (SLEEP) is SLEEP kill user background task
+QAB_DEFER ; QABORT resets some primary DEFERred words
+ MOV #BODYEMIT,&EMIT+2 ;4 (EMIT) is EMIT default console output
+ MOV #BODYCR,&CR+2 ;4 (CR) is CR default CR
+ MOV #BODYKEY,&KEY+2 ;4 (KEY) is KEY default KEY
.IFDEF DEFER_INPUT ; true if SD_LOADER
+ MOV #BODYACCEPT,&ACCEPT+2 ;4 (ACCEPT) is ACCEPT
MOV #TIB_ORG,&FCIB+2 ;4 TIB is CIB (Current Input Buffer)
- MOV #BODYACCEPT,&ACCEPT+2 ;4 (ACCEPT) is ACCEPT
.ENDIF
- .IFDEF MSP430ASSEMBLER ; reset all branch labels
+ .IFDEF MSP430ASSEMBLER ; reset all 6 branch labels
MOV #10,Y
MOV Y,&BASE
RAZASM MOV #0,ASMFW1(Y)
SUB #2,Y
JHS RAZASM
.ELSE
- MOV #10,&BASE ;4
- .ENDIF
- MOV #10,&BASE ;4
+ MOV #10,&BASE ;4
+ .ENDIF
RET
RefillUSBtime .equ int(frequency*2730) ; 2730*frequency ==> 65520 @ max freq (24MHz)
MOV @PSP+,TOS
mNEXT
-QABORTYES MOV #4882h,&YEMIT ; restore default YEMIT = set ECHO
-
- .IFDEF SD_CARD_LOADER ; close all handles
+QABORTYES MOV #4882h,&YEMIT ; restore default YEMIT = set ECHO
+ .IFDEF SD_CARD_LOADER ; close all handles
MOV &CurrentHdl,T
QABORTCLOSE CMP #0,T
JZ QABORTCLOSEND
MOV @T,T
JMP QABORTCLOSE
QABORTCLOSEND
-
.ENDIF
; ----------------------------------;
QABORTYESNOECHO ; <== WARM jumps here, thus, if NOECHO, TERMINAL can be disconnected without freezing the app
.byte 4,27,"[0m" ;
.word TYPE ; -- set normal video
; ----------------------------------;
- .word PWR_STATE ; remove all words beyond PWR_HERE
+ .word PWR_STATE ; remove all words beyond PWR_HERE
.IFDEF LOWERCASE ;
.word CAPS_ON ;
.ENDIF ;
MOV &DDP,TOS
MOV TOS,W
MOV #PAIN,X ; PAIN is a read only register in all MSP430FRxxxx devices...
- MOV X,Y ; so, MOV Y,0(X) writes to a read only register = lure for semicolon LAST_THREAD REVEAL...
+ MOV X,Y ; so, MOV Y,0(X) writes to a read only register = lure for semicolon LAST_THREAD REVEAL...
ADD #2,Y ; so, MOV @X,-2(Y) writes to same register = lure for semicolon LAST_NFA REVEAL...
CALL #HEADEREND ; ...because we don't want write preamble of word in dictionnary!
.ENDIF ; NONAME
.SWITCH DTC
.CASE 1
MOV #DOCOL1,-4(W) ; compile CALL rDOCOL
- SUB #2,&DDP
+ SUB #2,&DDP
.CASE 2
MOV #DOCOL1,-4(W) ; compile PUSH IP 3~
MOV #DOCOL2,-2(W) ; compile CALL rEXIT
MOV #DOCOL2,-2(W) ; compile MOV PC,IP 1~
MOV #DOCOL3,0(W) ; compile ADD #4,IP 1~
MOV #NEXT,+2(W) ; compile MOV @IP+,PC 4~
- ADD #4,&DDP
+ ADD #4,&DDP
.ENDCASE ; of DTC
MOV #-1,&STATE ; enter compiling state
SAVE_PSP MOV PSP,&LAST_PSP ; save PSP for check compiling, used by QREVEAL
MOV @RSP+,IP
MOV #4030h,0(W) ;4 by default, HEADER create a DEFERred word: CFA = MOV @PC+,PC = BR...
MOV #PFA_DEFER,2(W) ;4 by default, HEADER create a DEFERred word: PFA = address of NEXT to do nothing.
-
+
HEADEREND MOV Y,&LAST_NFA ; -- NFA --> LAST_NFA used by QREVEAL, IMMEDIATE
MOV X,&LAST_THREAD ; -- VOC_PFAx --> LAST_THREAD used by QREVEAL
MOV W,&LAST_CFA ; -- HERE=CFA --> LAST_CFA used by DOES>, RECURSE
ADD #4,W ; -- by default make room for two words...
- MOV W,&DDP ; --
+ MOV W,&DDP ; --
RET ; 23 words, W is the new DDP value )
; X is LAST_THREAD > used by VARIABLE, CONSTANT, CREATE, DEFER and :
; Y is NFA )
CONSTANT CALL #HEADER ; W = DDP = CFA + 2 words
MOV #DOCON,-4(W) ; CFA = DOCON
MOV TOS,-2(W) ; PFA = n
- MOV @PSP+,TOS
- JMP REVEAL
+ MOV @PSP+,TOS
+ JMP REVEAL
;;https://forth-standard.org/standard/core/VALUE
;;( x "<spaces>name" -- ) define a Forth VALUE
-;;Skip leading space delimiters. Parse name delimited by a space.
+;;Skip leading space delimiters. Parse name delimited by a space.
;;Create a definition for name with the execution semantics defined below,
;;with an initial value equal to x.
;
CREATE CALL #HEADER ; -- W = DDP
MOV #DOCON,-4(W) ;4 CFA = DOCON
MOV W,-2(W) ;3 PFA = next address
- JMP REVEAL
+ JMP REVEAL
;https://forth-standard.org/standard/core/DOES
;C DOES> -- set action for the latest CREATEd definition
mNEXT
;https://forth-standard.org/standard/core/DEFER
-;C DEFER "<spaces>name" --
-;Skip leading space delimiters. Parse name delimited by a space.
+;C DEFER "<spaces>name" --
+;Skip leading space delimiters. Parse name delimited by a space.
;Create a definition for name with the execution semantics defined below.
-;name Execution: --
-;Execute the xt that name is set to execute, i.e. NEXT (nothing),
+;name Execution: --
+;Execute the xt that name is set to execute, i.e. NEXT (nothing),
;until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
FORTHWORD "DEFER"
DEFER CALL #HEADER ; that create a secondary DEFERred word (whithout subsequent code)
-; MOV #4030h,-4(W) ;4 CFA = MOV @PC+,PC = BR...
-; MOV #PFA_DEFER,-2(W) ;4 PFA = address of NEXT: created word does nothing by default
- JMP REVEAL
+ JMP REVEAL
;https://forth-standard.org/standard/core/toBODY
; >BODY -- PFA leave BODY of a CREATEd or a primary DEFERred word
; ------------------------------------------------------------------------------
.include "forthMSP430FR_CONDCOMP.asm"
- ; compile the words: COMPARE [THEN] [ELSE] [IF] [UNDEFINED] [DEFINED] MARKER
+ ; compile the words: COMPARE [THEN] [ELSE] [IF] [UNDEFINED] [DEFINED] MARKER
.ENDIF ; CONDCOMP
;C ELSE IFadr -- ELSEadr resolve forward IF branch, leave ELSEadr on stack
FORTHWORDIMM "ELSE" ; immediate
ELSS ADD #4,&DDP ; make room to compile two words
- MOV &DDP,W ; W=HERE+4
- MOV #bran,-4(W)
+ MOV &DDP,W ; W=HERE+4
+ MOV #bran,-4(W)
MOV W,0(TOS) ; HERE+4 ==> [IFadr]
SUB #2,W ; HERE+2
MOV W,TOS ; -- ELSEadr
;https://forth-standard.org/standard/core/UNTIL
;C UNTIL BEGINadr -- resolve conditional backward branch
FORTHWORDIMM "UNTIL" ; immediate
-UNTIL MOV #qbran,X
+UNTIL MOV #qbran,X
UNTIL1 ADD #4,&DDP ; compile two words
MOV &DDP,W ; W = HERE
MOV X,-4(W) ; compile Bran or qbran at HERE
;https://forth-standard.org/standard/core/AGAIN
;X AGAIN BEGINadr -- resolve uncondionnal backward branch
FORTHWORDIMM "AGAIN" ; immediate
-AGAIN MOV #bran,X
- JMP UNTIL1
+AGAIN MOV #bran,X
+ JMP UNTIL1
;https://forth-standard.org/standard/core/WHILE
;C WHILE BEGINadr -- WHILEadr BEGINadr
;https://forth-standard.org/standard/core/LOOP
;C LOOP DOadr -- L-- an an-1 .. a1 0
FORTHWORDIMM "LOOP" ; immediate
-LOO MOV #xloop,X
+LOO MOV #xloop,X
ENDLOOP ADD #4,&DDP ; make room to compile two words
- MOV &DDP,W
+ MOV &DDP,W
MOV X,-4(W) ; xloop --> HERE
MOV TOS,-2(W) ; DOadr --> HERE+2
; resolve all "leave" adr
SUB #2,&LEAVEPTR ; --
MOV @TOS,TOS ; -- first LeaveStack value
CMP #0,TOS ; -- = value left by DO ?
- JZ ENDLOOPEND
+ JZ ENDLOOPEND
MOV W,0(TOS) ; move adr after loop as UNLOOP adr
- JMP LEAVELOOP
-ENDLOOPEND MOV @PSP+,TOS
+ JMP LEAVELOOP
+ENDLOOPEND MOV @PSP+,TOS
mNEXT
;https://forth-standard.org/standard/core/PlusLOOP
;C +LOOP adrs -- L-- an an-1 .. a1 0
FORTHWORDIMM "+LOOP" ; immediate
-PLUSLOOP MOV #xploop,X
- JMP ENDLOOP
+PLUSLOOP MOV #xploop,X
+ JMP ENDLOOP
;https://forth-standard.org/standard/core/LEAVE
;C LEAVE -- L: -- adrs
MOV #UNLOOP,0(W) ; [HERE] = UNLOOP
MOV #BRAN,2(W) ; [HERE+2] = BRAN
ADD #6,&DDP ; [HERE+4] = take word for AfterLOOPadr
- ADD #2,&LEAVEPTR
- ADD #4,W
- MOV &LEAVEPTR,X
+ ADD #2,&LEAVEPTR
+ ADD #4,W
+ MOV &LEAVEPTR,X
MOV W,0(X) ; leave HERE+4 on LEAVEPTR stack
mNEXT
MOV @PSP+,Y ; dest adrs
MOV @PSP+,X ; src adrs
MOV @PSP+,TOS ; pop new TOS
- CMP #0,W
+ CMP #0,W
JZ MOVE_X ; already made !
CMP X,Y ; Y-X ; dst - src
JZ MOVE_X ; already made !
JC MOVEUP ; U>= if dst > src
MOVEDOWN MOV.B @X+,0(Y) ; if X=src > Y=dst copy W bytes down
- ADD #1,Y
- SUB #1,W
- JNZ MOVEDOWN
+ ADD #1,Y
+ SUB #1,W
+ JNZ MOVEDOWN
mNEXT
MOVEUP ADD W,Y ; start at end
- ADD W,X
-MOVUP1 SUB #1,X
- SUB #1,Y
+ ADD W,X
+MOVUP1 SUB #1,X
+ SUB #1,Y
MOVUP2 MOV.B @X,0(Y) ; if X=src < Y=dst copy W bytes up
SUB #1,W
JNZ MOVUP1
MOV @TOS+,W ; -- BODY+2 W = old VOCLINK = VLK
MOV W,&LASTVOC ; -- BODY+2 restore LASTVOC
MOV @TOS,TOS ; -- OLD_DP
- MOV TOS,&DDP ; -- OLD_DP restore DP
- ; then restore words link(s) with it value < old DP
+ MOV TOS,&DDP ; -- DP restore DP
+ ; then restore words link(s) with it value < old DP
.SWITCH THREADS
.CASE 1 ; mono thread vocabularies
-MARKALLVOC MOV W,Y ; -- OLD_DP W=VLK Y=VLK
-MRKWORDLOOP MOV -2(Y),Y ; -- OLD_DP W=VLK Y=NFA
- CMP Y,TOS ; -- OLD_DP CMP = TOS-Y : OLD_DP-NFA
+MARKALLVOC MOV W,Y ; -- DP W=VLK Y=VLK
+MRKWORDLOOP MOV -2(Y),Y ; -- DP W=VLK Y=NFA
+ CMP Y,TOS ; -- DP CMP = TOS-Y : OLD_DP-NFA
JNC MRKWORDLOOP ; loop back if TOS<Y : OLD_DP<NFA
MOV Y,-2(W) ; W=VLK X=THD Y=NFA refresh thread with good NFA
- MOV @W,W ; -- OLD_DP W=[VLK] = next voclink
- CMP #0,W ; -- OLD_DP W=[VLK] = next voclink end of vocs ?
- JNZ MARKALLVOC ; -- OLD_DP W=VLK no : loopback
+ MOV @W,W ; -- DP W=[VLK] = next voclink
+ CMP #0,W ; -- DP W=[VLK] = next voclink end of vocs ?
+ JNZ MARKALLVOC ; -- DP W=VLK no : loopback
.ELSECASE ; multi threads vocabularies
-MARKALLVOC MOV #THREADS,IP ; -- OLD_DP W=VLK
- MOV W,X ; -- OLD_DP W=VLK X=VLK
-MRKTHRDLOOP MOV X,Y ; -- OLD_DP W=VLK X=VLK Y=VLK
- SUB #2,X ; -- OLD_DP W=VLK X=THD (thread ((case-2)to0))
-MRKWORDLOOP MOV -2(Y),Y ; -- OLD_DP W=VLK Y=NFA
- CMP Y,TOS ; -- OLD_DP CMP = TOS-Y : OLD_DP-NFA
- JNC MRKWORDLOOP ; loop back if TOS<Y : OLD_DP<NFA
+MARKALLVOC MOV #THREADS,IP ; -- DP W=VLK
+ MOV W,X ; -- DP W=VLK X=VLK
+MRKTHRDLOOP MOV X,Y ; -- DP W=VLK X=VLK Y=VLK
+ SUB #2,X ; -- DP W=VLK X=THD (thread ((case-2)to0))
+MRKWORDLOOP MOV -2(Y),Y ; -- DP W=VLK Y=NFA
+ CMP Y,TOS ; -- DP CMP = TOS-Y : DP-NFA
+ JNC MRKWORDLOOP ; loop back if TOS<Y : DP<NFA
MARKTHREAD MOV Y,0(X) ; W=VLK X=THD Y=NFA refresh thread with good NFA
- SUB #1,IP ; -- OLD_DP W=VLK X=THD Y=NFA IP=CFT-1
+ SUB #1,IP ; -- DP W=VLK X=THD Y=NFA IP=CFT-1
JNZ MRKTHRDLOOP ; loopback to compare NFA in next thread (thread-1)
- MOV @W,W ; -- OLD_DP W=[VLK] = next voclink
- CMP #0,W ; -- OLD_DP W=[VLK] = next voclink end of vocs ?
- JNZ MARKALLVOC ; -- OLD_DP W=VLK no : loopback
+ MOV @W,W ; -- DP W=[VLK] = next voclink
+ CMP #0,W ; -- DP W=[VLK] = next voclink end of vocs ?
+ JNZ MARKALLVOC ; -- DP W=VLK no : loopback
- .ENDCASE ; of THREADS ; -- DDP
+ .ENDCASE ; of THREADS ; -- DP
MOV @PSP+,TOS ;
MOV @RSP+,IP ;
mNEXT ;
MOV &DDP,&INIDP
JMP PWR_HERE ; ...and also for power ON...
-; FORTHWORD "WIPE" ; restore the program as it was in forthMSP430FR.txt file
-;WIPE MOV #SIGNATURES,X ; reset JTAG and BSL signatures ; unlock JTAG, SBW and BSL
-;SIGNLOOP MOV #-1,0(X) ; reset signature; WARNING ! DON'T CHANGE THIS IMMEDIATE VALUE !
-; ADD #2,X
-; CMP #INTVECT,X
-; JNZ SIGNLOOP
-; CALL #WIP_DEFER ; set default execute part of all factory primary DEFERred words
-; MOV #ROMDICT,&INIDP ; reinit this 2 factory values
-; MOV #lastvoclink,&INIVOC
-; JMP RST_STATE ; then execute RST_STATE and PWR_STATE
-
FORTHWORD "WIPE" ; restore the program as it was in forthMSP430FR.txt file
WIPE ; reset JTAG and BSL signatures ; unlock JTAG, SBW and BSL
MOV #16,X ; max known SIGNATURES length = 10
FORTHWORD "WARM"
WARM MOV @PC+,PC ;3
.word BODYWARM
-BODYWARM
+BODYWARM
; SUB #4,PSP
; MOV &SYSSNIV,0(PSP)
; MOV &SYSUNIV,2(PSP)
; fill all interrupt vectors with RESET
- MOV #VECTLEN,X ; length of vectors area
+ MOV #VECTLEN,X ; length of vectors area
RESETINT SUB #2,X
- MOV #RESET,INTVECT(X) ; begin at end of area
+ MOV #RESET,INTVECT(X) ; begin at end of area
JNZ RESETINT ; endloop when INTVECT(X) = INTVECT
; reset default TERMINAL vector interrupt and LPM0 mode for terminal use
MOV #PSTACK,PSP ; init parameter stack
.SWITCH DTC
.CASE 1
- MOV #xdocol,rDOCOL ;
+ MOV #xdocol,rDOCOL ;
.CASE 2
MOV #EXIT,rEXIT
.CASE 3 ; inlined DOCOL, do nothing here
.word WARM ; the next step
.ELSE
FORTHtoASM
- .IFDEF RAM_1K ; case of MSP430FR57xx
+ .IFDEF RAM_1K ; case of MSP430FR57xx : SD datas are in FRAM
MOV #0,&CurrentHDL ; init this FRAM area to pass QABORT
.ENDIF
BIT.B #SD_CD,&SD_CDIN ; SD_memory in SD_Card module ?
; UART to I2C bridge OPTION
;-------------------------------------------------------------------------------
.IFDEF UARTtoI2C ; redirects TERMINAL on to I2C address
- .include "ADDON/UART2MI2C.asm"
+ .include "ADDON/UART2MI2C.asm"
.ENDIF
;-------------------------------------------------------------------------------
.include "ResolveThreads.mac"
- .org 0FFFEh
+ .org 0FFFEh
.word reset
.word WORDD,QNUMBER
.word QBRAN,NotFound ; ABORT
FORTHtoASM
- POPM #2,S ; POPM T,S
+ POPM #2,S ; POPM T,S
ASMtoFORTH
.word PARAM2 ; -- PFADOES 0x000N S=ASMTYPE = 0x000R
FORTHtoASM
PxxxINSTRU MOV S,Y ; S=REG, Y=REG to test
RLAM #3,X ; OPCODE bit 0200h --> C
JNC PUSHMINSTRU ; W=n-1 Y=REG
-POPMINSTRU SUB W,S ; to make POPM opcode, keep first REG to POP; TI is complicated....
+POPMINSTRU SUB W,S ; to make POPM opcode, compute first REG to POP; TI is complicated....
PUSHMINSTRU SUB W,Y ; Y=REG-(n-1)
CMP #16,Y
JHS BOUNDERRWM1 ; JC=JHS (U>=)
- RLAM.W #4,W ; W = n << 4
+ RLAM #4,W ; W = n << 4
JMP BIS_ASMTYPE ; PFADOES --
RxxMINSTRU CMP #4,W ;
JHS BOUNDERRWM1 ; JC=JHS (U>=)
SWPB W ; -- PFADOES W = n << 8
- RLAM.W #2,W ; RLAM #2,R10 W = N << 10
+ RLAM #2,W ; W = N << 10
JMP BIS_ASMTYPE ; PFADOES --
asmword "RRCM"
CODE_JMP mDOCON ; branch always
.word 3C00h
- asmword "S>=" ; if >= assertion
+ asmword "S>=" ; if >= assertion (opposite of jump if < )
mDOCON
.word 3800h
BACKWSET ; --
MOV &DDP,0(Y) ; [ASMBWx] = DDP
mNEXT
-; JMP ASM_UNTIL1 ; resolve backward branch with W
; backward label 1
asmword "BW1"
MOV &DDP,W ;
MOV @TOS,TOS
MOV @TOS,Y ; Y=[ASMFWx]
- MOV #0,0(TOS) ; preset [ASMFWx] for next use
CMP #0,Y ; ASMFWx = 0 ? (FWx is free?)
+ MOV #0,0(TOS) ; preset [ASMFWx] for next use
FORWUSE ; PFA -- @OPCODE
- JNZ ASM_THEN1 ; no
+ JNZ ASM_THEN1 ; no
FORWSET ; OPCODE PFA --
MOV @PSP+,0(W) ; -- PFA compile incomplete opcode
ADD #2,&DDP ; increment DDP
MOV W,0(TOS) ; store @OPCODE into ASMFWx
MOV @PSP+,TOS ; --
mNEXT
-; JMP ASM_THEN1 ; resolve forward branch with Y
; forward label 1
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