(none)

diff --git a/sample/mips/jelly/gcc/gmake.mak b/sample/mips/jelly/gcc/gmake.mak
index aa70711..20bcae8 100755 (executable)
--- a/sample/mips/jelly/gcc/gmake.mak
+++ b/sample/mips/jelly/gcc/gmake.mak
@@ -34,7 +34,7 @@ TOP_DIR           = ../../../..
 KERNEL_DIR        = $(TOP_DIR)/kernel
 KERNEL_CFGRTR_DIR = $(TOP_DIR)/cfgrtr/build/gcc
 KERNEL_MAKINC_DIR = $(KERNEL_DIR)/build/common/gmake
-KERNEL_BUILD_DIR  = $(KERNEL_DIR)/build/mips/mips1/gcc
+KERNEL_BUILD_DIR  = $(KERNEL_DIR)/build/mips/jelly/gcc
 
 
 # %jp{コンフィギュレータ定義}

diff --git a/sample/mips/jelly/ostimer.c b/sample/mips/jelly/ostimer.c
index ebed574..c9bf58e 100755 (executable)
--- a/sample/mips/jelly/ostimer.c
+++ b/sample/mips/jelly/ostimer.c
@@ -13,26 +13,45 @@
 #include "ostimer.h"
 
 
+#define TIMER0_CONTROL ((volatile UW *)0xf1000000)
+#define TIMER0_COMPARE ((volatile UW *)0xf1000004)
+#define TIMER0_COUNTER ((volatile UW *)0xf100000c)
+
 #define INTNO_TIMER0   0
 
 
-static void OsTimer_Inh(void);         /**< %jp{タイマ割込みサービスルーチン} */
+
+static void OsTimer_Isr(VP_INT exinf);         /**< %jp{タイマ割込みサービスルーチン} */
 
 
 /** %jp{OS用タイマ初期化ルーチン} */
 void OsTimer_Initialize(VP_INT exinf)
 {
-       T_DINH dinh;
+       T_CISR cisr;
+       
+       /* %jp{割り込みサービスルーチン生成} */
+       cisr.isratr = TA_HLNG;
+       cisr.exinf  = 0;
+       cisr.intno  = INTNO_TIMER0;
+       cisr.isr    = (FP)OsTimer_Isr;
+       acre_isr(&cisr);
        
-       dinh.inhatr = TA_HLNG;
-       dinh.inthdr = (FP)OsTimer_Inh;
-       def_inh(INTNO_TIMER0, &dinh);
+       /* 開始 */
+       *TIMER0_COMPARE = (50000 - 1);          /* 50Mhz / 50000 = 1kHz (1ms) */
+       *TIMER0_CONTROL = 0x0002;                       /* clear */
+       *TIMER0_CONTROL = 0x0001;                       /* start */
+       
+       /* 割込み許可 */
+       ena_int(INTNO_TIMER0);
 }
 
 
 /** %jp{タイマ割込みハンドラ} */
-void OsTimer_Inh(void)
+void OsTimer_Isr(VP_INT exinf)
 {
+       /* %jp{要因クリア} */
+       vclr_int(INTNO_TIMER0);
+       
        /* %jp{タイムティック供給} */
        isig_tim();
 }

diff --git a/sample/mips/jelly/readme.txt b/sample/mips/jelly/readme.txt
index 1ca69e2..8805734 100755 (executable)
--- a/sample/mips/jelly/readme.txt
+++ b/sample/mips/jelly/readme.txt
@@ -1 +1,2 @@
 Ryuz が別途開発中の FPGA向けのMIPSライクなコア用のサンプル
+http://homepage3.nifty.com/ryuz/jelly/index.html

diff --git a/sample/mips/jelly/uart.c b/sample/mips/jelly/uart.c
index 1ab5c29..188328a 100755 (executable)
--- a/sample/mips/jelly/uart.c
+++ b/sample/mips/jelly/uart.c
@@ -12,8 +12,8 @@
 #include "kernel.h"
 
 
-#define UART_DATA      ((volatile UW *)0xf2000000)
-#define UART_STAT      ((volatile UW *)0xf2000004)
+#define UART0_DATA     ((volatile UW *)0xf2000000)
+#define UART0_STAT     ((volatile UW *)0xf2000004)
 
 
 
@@ -26,20 +26,20 @@ void Uart_Initialize(void)
 /* %jp{1文字入力} */
 char Uart_GetChar(void)
 {
-       while ( !(*UART_STAT & 0x01) )
+       while ( !(*UART0_STAT & 0x01) )
                ;
        
-       return *UART_DATA;
+       return *UART0_DATA;
 }
 
 
 /* %jp{1文字出力} */
 void Uart_PutChar(int c)
 {
-       while ( !(*UART_STAT & 0x02) )
+       while ( !(*UART0_STAT & 0x02) )
                ;
        
-       *UART_DATA = c;
+       *UART0_DATA = c;
 }