3 extern void start(void); /* ¥¹¥¿¡¼¥È¡¦¥¢¥Ã¥× */
4 extern void intr_softerr(void); /* ¥½¥Õ¥È¥¦¥¨¥¢¡¦¥¨¥é¡¼ */
5 extern void intr_syscall(void); /* ¥·¥¹¥Æ¥à¡¦¥³¡¼¥ë */
6 extern void intr_serintr(void); /* ¥·¥ê¥¢¥ë³ä¹þ¤ß */
7 extern void intr_timintr(void); /* ¥¿¥¤¥Þ³ä¹þ¤ß */
8 extern void intr_ir_edge(void); /* ¥ê¥â¥³¥ó¥¨¥Ã¥¸³ä¹þ¤ß */
9 extern void intr_ir_tovf(void); /* ¥ê¥â¥³¥ó¥¿¥¤¥Þ¡¼¥ª¡¼¥Ð¡¼¥Õ¥í¡¼³ä¹þ¤ß */
10 extern void intr_re_tovf(void); /* ¥¨¥ó¥³¡¼¥À¥¿¥¤¥Þ¡¼¥ª¡¼¥Ð¡¼¥Õ¥í¡¼³ä¹þ¤ß */
13 * ³ä¹þ¤ß¥Ù¥¯¥¿¤ÎÀßÄê¡¥
14 * ¥ê¥ó¥«¡¦¥¹¥¯¥ê¥×¥È¤ÎÄêµÁ¤Ë¤è¤ê¡¤ÀèƬÈÖÃϤËÇÛÃÖ¤µ¤ì¤ë¡¥
16 void (*vectors[])(void) = {
17 start, /* 0: ¥ê¥»¥Ã¥È */
18 NULL, /* 1: ¥·¥¹¥Æ¥àͽÌó */
19 NULL, /* 2: ¥·¥¹¥Æ¥àͽÌó */
20 NULL, /* 3: ¥·¥¹¥Æ¥àͽÌó */
21 NULL, /* 4: ¥·¥¹¥Æ¥àͽÌó */
22 NULL, /* 5: ¥·¥¹¥Æ¥àͽÌó */
23 NULL, /* 6: ¥·¥¹¥Æ¥àͽÌó */
24 NULL, /* 7: ³°Éô³ä¤ê¹þ¤ßNMI */
25 intr_syscall, /* 8: ¥È¥é¥Ã¥×Ì¿Îá */
26 intr_softerr, /* 9: ¥È¥é¥Ã¥×Ì¿Îá */
27 intr_softerr, /* 10: ¥È¥é¥Ã¥×Ì¿Îá */
28 intr_softerr, /* 11: ¥È¥é¥Ã¥×Ì¿Îá */
29 NULL, /* 12: ³°Éô³ä¤ê¹þ¤ßIRQ0 */
30 NULL, /* 13: ³°Éô³ä¤ê¹þ¤ßIRQ1 */
31 NULL, /* 14: ³°Éô³ä¤ê¹þ¤ßIRQ2 */
32 NULL, /* 15: ³°Éô³ä¤ê¹þ¤ßIRQ3 */
33 intr_ir_edge, /* 16: ³°Éô³ä¤ê¹þ¤ßIRQ4 */
34 NULL, /* 17: ³°Éô³ä¤ê¹þ¤ßIRQ5 */
35 NULL, /* 18: ¥·¥¹¥Æ¥àͽÌó */
36 NULL, /* 19: ¥·¥¹¥Æ¥àͽÌó */
37 NULL, /* 20: ¥¦¥©¥Ã¥Á¥É¥Ã¥°¥¿¥¤¥Þ */
38 NULL, /* 21: DRAM¥¤¥ó¥¿¡¼¥Õ¥§¡¼¥¹ CMI */
39 NULL, /* 22: ¥·¥¹¥Æ¥àͽÌó */
40 NULL, /* 23: A/D ADI */
41 NULL, /* 24: ITU¥Á¥ã¥Í¥ë0 IMIA0 */
42 NULL, /* 25: ITU¥Á¥ã¥Í¥ë0 IMIB0 */
43 intr_ir_tovf, /* 26: ITU¥Á¥ã¥Í¥ë0 OVI0 */
44 NULL, /* 27: ¥·¥¹¥Æ¥àͽÌó */
45 NULL, /* 28: ITU¥Á¥ã¥Í¥ë1 IMIA1 */
46 NULL, /* 29: ITU¥Á¥ã¥Í¥ë1 IMIB1 */
47 intr_re_tovf, /* 30: ITU¥Á¥ã¥Í¥ë1 OVI1 */
48 NULL, /* 31: ¥·¥¹¥Æ¥àͽÌó */
49 NULL, /* 32: ITU¥Á¥ã¥Í¥ë2 IMIA2 */
50 NULL, /* 33: ITU¥Á¥ã¥Í¥ë2 IMIB2 */
51 NULL, /* 34: ITU¥Á¥ã¥Í¥ë2 OVI2 */
52 NULL, /* 35: ¥·¥¹¥Æ¥àͽÌó */
53 intr_timintr, /* 36: ITU¥Á¥ã¥Í¥ë3 CMIA0 */
54 intr_timintr, /* 37: ITU¥Á¥ã¥Í¥ë3 CMIB0 */
55 intr_timintr, /* 38: ITU¥Á¥ã¥Í¥ë3 CMIA1/CMIB1 */
56 intr_timintr, /* 39: ITU¥Á¥ã¥Í¥ë3 TOVIO0/TOVI1 */
57 intr_timintr, /* 40: ITU¥Á¥ã¥Í¥ë4 CMIA2 */
58 intr_timintr, /* 41: ITU¥Á¥ã¥Í¥ë4 CMIB2 */
59 intr_timintr, /* 42: ITU¥Á¥ã¥Í¥ë4 CMIA3/CMIB3 */
60 intr_timintr, /* 43: ITU¥Á¥ã¥Í¥ë4 TOVI2/TOVI3 */
65 NULL, /* 48: ¥·¥¹¥Æ¥àͽÌó */
66 NULL, /* 49: ¥·¥¹¥Æ¥àͽÌó */
67 NULL, /* 50: ¥·¥¹¥Æ¥àͽÌó */
68 NULL, /* 51: ¥·¥¹¥Æ¥àͽÌó */
69 intr_serintr, /* 52: SCI¥Á¥ã¥Í¥ë0 ERI0 */
70 intr_serintr, /* 53: SCI¥Á¥ã¥Í¥ë0 RXI0 */
71 intr_serintr, /* 54: SCI¥Á¥ã¥Í¥ë0 TXI0 */
72 intr_serintr, /* 55: SCI¥Á¥ã¥Í¥ë0 TEI0 */
73 intr_serintr, /* 56: SCI¥Á¥ã¥Í¥ë1 ERI1 */
74 intr_serintr, /* 57: SCI¥Á¥ã¥Í¥ë1 RXI1 */
75 intr_serintr, /* 58: SCI¥Á¥ã¥Í¥ë1 TXI1 */
76 intr_serintr, /* 59: SCI¥Á¥ã¥Í¥ë1 TEI1 */
77 intr_serintr, /* 60: SCI¥Á¥ã¥Í¥ë2 ERI2 */
78 intr_serintr, /* 61: SCI¥Á¥ã¥Í¥ë2 RXI2 */
79 intr_serintr, /* 62: SCI¥Á¥ã¥Í¥ë2 TXI2 */
80 intr_serintr, /* 63: SCI¥Á¥ã¥Í¥ë2 TEI2 */