4 #define TIMER_TMR_NUM 2
6 #define H8_3069F_TMR01 ((volatile struct h8_3069f_tmr *)0xffff80)
7 #define H8_3069F_TMR23 ((volatile struct h8_3069f_tmr *)0xffff90)
14 volatile uint8 tcora0;
15 volatile uint8 tcora1;
16 volatile uint8 tcorb0;
17 volatile uint8 tcorb1;
21 #define H8_3069F_TMR_TCR_DISCLK (0<<0)
22 #define H8_3069F_TMR_TCR_CLK8 (1<<0)
23 #define H8_3069F_TMR_TCR_CLK64 (2<<0)
24 #define H8_3069F_TMR_TCR_CLK8192 (3<<0)
25 #define H8_3069F_TMR_TCR_OVF (4<<0)
26 #define H8_3069F_TMR_TCR_CMFA (4<<0)
27 #define H8_3069F_TMR_TCR_CLKUP (5<<0)
28 #define H8_3069F_TMR_TCR_CLKDOWN (6<<0)
29 #define H8_3069F_TMR_TCR_CLKBOTH (7<<0)
31 #define H8_3069F_TMR_TCR_CCLR_DISCLR (0<<3)
32 #define H8_3069F_TMR_TCR_CCLR_CLRCMFA (1<<3)
33 #define H8_3069F_TMR_TCR_CCLR_CLRCMFB (2<<3)
34 #define H8_3069F_TMR_TCR_CCLR_DISINPB (3<<3)
36 #define H8_3069F_TMR_TCR_OVIE (1<<5)
37 #define H8_3069F_TMR_TCR_CMIEA (1<<6)
38 #define H8_3069F_TMR_TCR_CMIEB (1<<7)
40 #define H8_3069F_TMR_TCSR_OS_NOACT (0<<0)
41 #define H8_3069F_TMR_TCSR_OIS_NOACT (0<<2)
42 #define H8_3069F_TMR_TCSR_ADTE (1<<4)
43 #define H8_3069F_TMR_TCSR_ICE (1<<4)
44 #define H8_3069F_TMR_TCSR_OVF (1<<5)
45 #define H8_3069F_TMR_TCSR_CMFA (1<<6)
46 #define H8_3069F_TMR_TCSR_CMFB (1<<7)
49 volatile struct h8_3069f_tmr *tmr;
50 } regs[TIMER_TMR_NUM] = {
56 int timer_start(int index, int msec, int flags)
58 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
62 tcr = H8_3069F_TMR_TCR_OVF;
63 if (flags & TIMER_START_FLAG_CYCLE)
64 tcr |= H8_3069F_TMR_TCR_CCLR_CLRCMFA;
66 tcr |= H8_3069F_TMR_TCR_CCLR_DISCLR;
68 tmr->tcr1 = H8_3069F_TMR_TCR_CLK8192 | H8_3069F_TMR_TCR_CCLR_DISCLR;
73 count = msec / 105; /* 20MHz: (msec * 20000000 / 8192 / 256 / 1000) */
77 tmr->tcr0 |= H8_3069F_TMR_TCR_CMIEA; /* ³ä¹þ¤ß͸ú²½ */
82 /* ¥¿¥¤¥ÞËþλ¤·¤¿¤«¡© */
83 int timer_is_expired(int index)
85 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
86 return (tmr->tcsr0 & H8_3069F_TMR_TCSR_CMFA) ? 1 : 0;
90 int timer_expire(int index)
92 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
94 tmr->tcsr0 &= ~H8_3069F_TMR_TCSR_CMFA;
99 /* ¥¿¥¤¥Þ¥¥ã¥ó¥»¥ë */
100 int timer_cancel(int index)
102 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
109 tmr->tcr0 &= ~H8_3069F_TMR_TCR_CMIEA; /* ³ä¹þ¤ß̵¸ú²½ */
114 /* ¥¿¥¤¥ÞÆ°ºîÃ椫¡© */
115 int timer_is_running(int index)
117 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
118 return (tmr->tcr0 & H8_3069F_TMR_TCR_CMIEA) ? 1 : 0;
122 int timer_gettime(int index)
124 volatile struct h8_3069f_tmr *tmr = regs[index].tmr;
129 * ¼þ´ü¥¿¥¤¥Þ¤Î¾ì¹ç¤ÏÆ°ºîÃ椫¤É¤¦¤«¤Î¥Á¥§¥Ã¥¯¤Îľ¸å¤Ë¥¿¥¤¥ÞËþλ¤¹¤ë¤È
130 * ¥«¥¦¥ó¥¿¤¬¥¼¥í¤Ë½é´ü²½¤µ¤ì¤Æ¤·¤Þ¤¦¤Î¤Ç¡¤Á°¤â¤Ã¤ÆÃͤò¼èÆÀ¤·¤Æ¤ª¤¯¡¥
133 msec = count * 2 / 5; /* 20MHz: (count * 8192 * 1000 / 20000000) */
135 return timer_is_running(index) ? msec : -1;