ppu reg read invalidate bug fixed.

diff --git a/de0_cv_nes/ppu/ppu.vhd b/de0_cv_nes/ppu/ppu.vhd
index daf418a..ae6f884 100644 (file)
--- a/de0_cv_nes/ppu/ppu.vhd
+++ b/de0_cv_nes/ppu/ppu.vhd
@@ -115,6 +115,7 @@ begin
     variable scr_cnt        : integer range 0 to 1;
     variable scr_set        : integer range 0 to 1;
     variable oam_addr_inc   : integer range 0 to 1;
+    variable ppu_read_invalid : integer range 0 to 1;
     begin
         if (pi_rst_n = '0') then
             reg_ppu_ctrl <= (others => '0');
@@ -132,6 +133,7 @@ begin
             scr_cnt := 0;
             scr_set := 0;
             oam_addr_inc := 0;
+            ppu_read_invalid := 1;
         elsif (rising_edge(pi_base_clk)) then
             if (pi_cpu_en(CP_ST0) = '1' and pi_ce_n = '0' and pi_we_n = '0') then
                 if (pi_cpu_addr = PPUCTRL) then
@@ -167,6 +169,9 @@ begin
                         end if;
                         addr_set := 1;
                     end if;
+
+                    --ppu read invaliate.
+                    ppu_read_invalid := 1;
                 elsif (pi_cpu_addr = PPUDATA) then
                     reg_ppu_data <= pio_cpu_d;
                     addr_inc := 1;
@@ -177,7 +182,11 @@ begin
                     addr_cnt := 0;
                     addr_set := 0;
                 elsif (pi_cpu_addr = PPUDATA) then
-                    addr_inc := 1;
+                    if (ppu_read_invalid = 1) then
+                        ppu_read_invalid := 0;
+                    else
+                        addr_inc := 1;
+                    end if;
                 end if;
             elsif (pi_ce_n = '1') then
                 scr_set := 0;

diff --git a/de0_cv_nes/simulation/modelsim/de0_cv_nes_run_msim_rtl_vhdl.do b/de0_cv_nes/simulation/modelsim/de0_cv_nes_run_msim_rtl_vhdl.do
index 45edb8a..53ffa05 100644 (file)
--- a/de0_cv_nes/simulation/modelsim/de0_cv_nes_run_msim_rtl_vhdl.do
+++ b/de0_cv_nes/simulation/modelsim/de0_cv_nes_run_msim_rtl_vhdl.do
@@ -192,3 +192,19 @@ run 16.8ms
 mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-09-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
 mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-09-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
 \r
+run 253ms\r
+##currently @500ms. nmi 18 is done.\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-18-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-18-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
+\r
+run 16.8ms\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-19-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-19-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
+\r
+run 16.8ms\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-1a-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-1a-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
+\r
+run 16.8ms\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-1b-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-1b-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r

diff --git a/doc/debug-work.xlsx b/doc/debug-work.xlsx
index b49c396..58de7ab 100644 (file)
Binary files a/doc/debug-work.xlsx and b/doc/debug-work.xlsx differ