jsr single_inst_test\r
jsr a2_inst_test\r
jsr a3_inst_test\r
+ jsr a4_inst_test\r
\r
.endproc\r
\r
nmi_test:\r
rti\r
\r
+\r
+;;a4 instructions:\r
+;;asl lsr\r
+;;dec rol\r
+;;inc ror\r
+.proc a4_inst_test\r
+ lda ad_a4_test\r
+ sta $00\r
+ lda ad_a4_test+1\r
+ sta $01\r
+ jsr print_ln\r
+\r
+ lda #$39\r
+ sta $6b\r
+ lda #$a1\r
+ sta $04cc\r
+ lda #$9f\r
+ sta $ff\r
+\r
+ ldx #$fd\r
+\r
+ ;;zp, abs, absx, zpx\r
+ asl $6b ;@6b=39 > 72\r
+ lda $6b\r
+ cmp #$72\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ dec $04cc ;@4cc=a1 > a0\r
+ lda $04cc\r
+ cmp #$a0\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ lsr $03cf, x ;@4cc=a0 > 50\r
+ lda $04cc\r
+ cmp #$50\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ inc $02, x ;@ff=9f > a0\r
+ lda $ff\r
+ cmp #$a0\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ clc\r
+ rol $02, x ;@ff=a0 > 40\r
+ rol $02, x ;@ff=40 > 81\r
+ lda $ff\r
+ cmp #$81\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ sec\r
+ ror $02, x ;@ff=81 > c0\r
+ ror $02, x ;@ff=40 > e0\r
+ lda $ff\r
+ cmp #$e0\r
+ beq :+\r
+ jsr test_failure\r
+:\r
+\r
+ rts\r
+.endproc\r
+\r
;;a3 instructions:\r
;;sta stx sty\r
.proc a3_inst_test\r
ldy #$8a\r
\r
;;zp, abs, absx, zpx, (ind),y\r
+ ;;(indir, x) is ommited.\r
sta $a9 ;@a9=b7\r
stx $0a99 ;@a99=e1\r
sta $0d80, x ;@e61=b7\r
sta $90\r
lda #$08\r
sta $91\r
- lda #d9\r
+ lda #$d9\r
sta $0902 ;@0902=d9\r
lda #0a\r
ldy #$ca\r
clc\r
- adc (90),y ;@0902, 0a+d9=e3\r
+ adc ($90),y ;@0902, 0a+d9=e3\r
cmp #$e3\r
beq :+\r
jsr test_failure\r
.byte "test failed!!!"\r
.byte $00\r
\r
+ad_a4_test:\r
+ .addr a4_test\r
+a4_test:\r
+ .byte "a4 inst test..."\r
+ .byte $00\r
+\r
ad_a3_test:\r
.addr a3_test\r
a3_test:\r