simplified sprite status.

diff --git a/de0_cv_nes/ppu/render.vhd b/de0_cv_nes/ppu/render.vhd
index cec3337..c95fb6d 100644 (file)
--- a/de0_cv_nes/ppu/render.vhd
+++ b/de0_cv_nes/ppu/render.vhd
@@ -207,7 +207,7 @@ signal reg_nes_y        : integer range 0 to VGA_W_MAX / 2 - 1;
 signal reg_prf_x        : integer range 0 to VGA_W_MAX / 2 + 256 - 1;\r
 signal reg_prf_y        : integer range 0 to VGA_W_MAX / 2 + 256 - 1;\r
 \r
-type vac_state is (\r
+type reg_status is (\r
     IDLE,\r
     AD_SET0,\r
     AD_SET1,\r
@@ -220,8 +220,8 @@ type vac_state is (
     );\r
 \r
 -------------bg registers.\r
-signal reg_v_cur_state      : vac_state;\r
-signal reg_v_next_state     : vac_state;\r
+signal reg_v_cur_state      : reg_status;\r
+signal reg_v_next_state     : reg_status;\r
 \r
 signal reg_v_ce_n       : std_logic;\r
 signal reg_v_rd_n       : std_logic;\r
@@ -243,41 +243,8 @@ signal reg_plt_data       : std_logic_vector (7 downto 0);
 \r
 ---------------oam registers.\r
 \r
-type s_oam_state is (\r
-    IDLE,\r
-    AD_SET0,\r
-    AD_SET1,\r
-    AD_SET2,\r
-    AD_SET3,\r
-    REG_CLR0,\r
-    REG_CLR1,\r
-    REG_CLR2,\r
-    REG_CLR3,\r
-    REG_CP0,\r
-    REG_CP1,\r
-    REG_CP2,\r
-    REG_CP3,\r
-    REG_NT0,\r
-    REG_NT1,\r
-    REG_NT2,\r
-    REG_NT3,\r
-    REG_AT0,\r
-    REG_AT1,\r
-    REG_AT2,\r
-    REG_AT3,\r
-    REG_PL0,\r
-    REG_PL1,\r
-    REG_PL2,\r
-    REG_PL3,\r
-    REG_PH0,\r
-    REG_PH1,\r
-    REG_PH2,\r
-    REG_PH3\r
-    );\r
-\r
-\r
-signal reg_s_oam_cur_state      : s_oam_state;\r
-signal reg_s_oam_next_state     : s_oam_state;\r
+signal reg_s_oam_cur_state      : reg_status;\r
+signal reg_s_oam_next_state     : reg_status;\r
 \r
 signal reg_s_oam_ce_n       : std_logic;\r
 signal reg_s_oam_rd_n       : std_logic;\r
@@ -752,214 +719,35 @@ end;
                 if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     reg_s_oam_next_state <= IDLE;\r
                 elsif (pi_rnd_en(2) = '1') then\r
-                    if (reg_nes_x < HSCAN_OAM_EVA_START) then\r
-                        --first 64 is oam clear.\r
-                        reg_s_oam_next_state <= REG_CLR0;\r
-                    elsif (reg_nes_x <= HSCAN) then\r
-                        --next until 256 is evaluate.\r
-                        --TODO: must add evaluation logic...\r
-                        reg_s_oam_next_state <= REG_CP0;\r
-                    else\r
-                        if (reg_nes_x mod 8 = 1) then\r
-                            reg_s_oam_next_state <= REG_NT0;\r
-                        elsif (reg_nes_x mod 8 = 3) then\r
-                            reg_s_oam_next_state <= REG_AT0;\r
-                        elsif (reg_nes_x mod 8 = 5) then\r
-                            reg_s_oam_next_state <= REG_PL0;\r
-                        elsif (reg_nes_x mod 8 = 7) then\r
-                            reg_s_oam_next_state <= REG_PH0;\r
-                        else\r
-                            reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                        end if;\r
-                    end if;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CLR0 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_CLR1;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CLR1 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_CLR2;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CLR2 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_CLR3;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CLR3 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(2) = '1') then\r
-                    reg_s_oam_next_state <= AD_SET0;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CP0 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_CP1;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CP1 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_CP2;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CP2 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_CP3;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_CP3 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(2) = '1') then\r
-                    reg_s_oam_next_state <= AD_SET0;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_NT0 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_NT1;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_NT1 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_NT2;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_NT2 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_NT3;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_NT3 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(2) = '1') then\r
-                    reg_s_oam_next_state <= AD_SET0;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_AT0 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_AT1;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_AT1 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_AT2;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_AT2 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_AT3;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_AT3 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(2) = '1') then\r
-                    reg_s_oam_next_state <= AD_SET0;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_PL0 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_PL1;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_PL1 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_PL2;\r
+                    reg_s_oam_next_state <= REG_SET0;\r
                 else\r
                     reg_s_oam_next_state <= reg_s_oam_cur_state;\r
                 end if;\r
-            when REG_PL2 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_PL3;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_PL3 =>\r
-                if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
-                    reg_s_oam_next_state <= IDLE;\r
-                elsif (pi_rnd_en(2) = '1') then\r
-                    reg_s_oam_next_state <= AD_SET0;\r
-                else\r
-                    reg_s_oam_next_state <= reg_s_oam_cur_state;\r
-                end if;\r
-            when REG_PH0 =>\r
+            when REG_SET0 =>\r
                 if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     reg_s_oam_next_state <= IDLE;\r
                 elsif (pi_rnd_en(3) = '1') then\r
-                    reg_s_oam_next_state <= REG_PH1;\r
+                    reg_s_oam_next_state <= REG_SET1;\r
                 else\r
                     reg_s_oam_next_state <= reg_s_oam_cur_state;\r
                 end if;\r
-            when REG_PH1 =>\r
+            when REG_SET1 =>\r
                 if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     reg_s_oam_next_state <= IDLE;\r
                 elsif (pi_rnd_en(0) = '1') then\r
-                    reg_s_oam_next_state <= REG_PH2;\r
+                    reg_s_oam_next_state <= REG_SET2;\r
                 else\r
                     reg_s_oam_next_state <= reg_s_oam_cur_state;\r
                 end if;\r
-            when REG_PH2 =>\r
+            when REG_SET2 =>\r
                 if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     reg_s_oam_next_state <= IDLE;\r
                 elsif (pi_rnd_en(1) = '1') then\r
-                    reg_s_oam_next_state <= REG_PH3;\r
+                    reg_s_oam_next_state <= REG_SET3;\r
                 else\r
                     reg_s_oam_next_state <= reg_s_oam_cur_state;\r
                 end if;\r
-            when REG_PH3 =>\r
+            when REG_SET3 =>\r
                 if (is_idle(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     reg_s_oam_next_state <= IDLE;\r
                 elsif (pi_rnd_en(2) = '1') then\r
@@ -1034,11 +822,11 @@ end;
                     if (reg_s_oam_cur_state = AD_SET0) then\r
                         reg_s_oam_ce_n <= '0';\r
                         reg_s_oam_wr_n <= '1';\r
-                    elsif (reg_s_oam_cur_state = REG_CLR0) then\r
+                    elsif (reg_s_oam_cur_state = REG_SET0) then\r
                         reg_s_oam_wr_n <= '0';\r
-                    elsif (reg_s_oam_cur_state = REG_CLR1) then\r
+                    elsif (reg_s_oam_cur_state = REG_SET1) then\r
                         reg_s_oam_wr_n <= '1';\r
-                    elsif (reg_s_oam_cur_state = REG_CLR3) then\r
+                    elsif (reg_s_oam_cur_state = REG_SET3) then\r
                         reg_s_oam_addr <= reg_s_oam_addr + 1;\r
                     end if;\r
                     \r
@@ -1065,10 +853,10 @@ end;
                         if (reg_s_oam_cur_state = AD_SET0) then\r
                             reg_s_oam_ce_n <= '0';\r
                             reg_s_oam_wr_n <= '1';\r
-                        elsif (reg_s_oam_cur_state = REG_CP0) then\r
+                        elsif (reg_s_oam_cur_state = REG_SET0) then\r
                             reg_s_oam_ce_n <= '0';\r
                             reg_s_oam_wr_n <= '0';\r
-                        elsif (reg_s_oam_cur_state = REG_CP1) then\r
+                        elsif (reg_s_oam_cur_state = REG_SET1) then\r
                             reg_s_oam_ce_n <= '1';\r
                             reg_s_oam_wr_n <= '1';\r
                             if (spr_eval_cnt = 0 and\r