spr 0 hit eval flag added.

diff --git a/de0_cv_nes/ppu/render.vhd b/de0_cv_nes/ppu/render.vhd
index 17c2eeb..2e7b41c 100644 (file)
--- a/de0_cv_nes/ppu/render.vhd
+++ b/de0_cv_nes/ppu/render.vhd
@@ -331,7 +331,8 @@ signal reg_spr_x            : oam_reg_array;
 signal reg_spr_ptn_sft_start    : std_logic_vector (7 downto 0);\r
 signal reg_spr_ptn_l            : oam_reg_array;\r
 signal reg_spr_ptn_h            : oam_reg_array;\r
-signal reg_spr_hit              : std_logic;\r
+signal reg_spr0_eval            : std_logic;\r
+signal reg_spr0_hit             : std_logic;\r
 \r
 --status register.\r
 signal reg_ppu_status       : std_logic_vector (7 downto 0);\r
@@ -712,7 +713,7 @@ end;
 \r
             reg_plt_addr    <= (others => 'Z');\r
             reg_plt_data    <= (others => 'Z');\r
-            reg_spr_hit     <= '0';\r
+            reg_spr0_hit     <= '0';\r
         elsif (rising_edge(pi_base_clk)) then\r
             \r
             reg_plt_data    <= pi_plt_data;\r
@@ -730,8 +731,9 @@ end;
                         reg_plt_addr <=\r
                             "1" & reg_spr_attr(spr_i)(1 downto 0) & reg_spr_ptn_h(spr_i)(0) & reg_spr_ptn_l(spr_i)(0);\r
                         --check sprite hit.\r
-                        if (spr_i = 0 and (reg_sft_ptn_h(0) or reg_sft_ptn_l(0)) = '1') then\r
-                            reg_spr_hit     <= '1';\r
+                        if (spr_i = 0 and (reg_sft_ptn_h(0) or reg_sft_ptn_l(0)) = '1' and\r
+                            reg_spr0_eval = '1') then\r
+                            reg_spr0_hit     <= '1';\r
                         end if;\r
                     elsif (conv_std_logic_vector(reg_nes_y, 9)(4) = '0'\r
                         and (reg_sft_ptn_h(0) or reg_sft_ptn_l(0)) = '1') then\r
@@ -750,7 +752,7 @@ end;
             else\r
                 --reset sprite hit.\r
                 if (reg_nes_y >= VSCAN_NEXT_START - 1) then\r
-                    reg_spr_hit     <= '0';\r
+                    reg_spr0_hit     <= '0';\r
                 end if;\r
                 --release plt bus.\r
                 reg_plt_ce_n <= 'Z';\r
@@ -947,6 +949,9 @@ end;
             for i in 0 to 7 loop\r
                 reg_spr_attr(i)         <= (others => '0');\r
             end loop;\r
+            \r
+            --sprite 0 check.\r
+            reg_spr0_eval <= '0';\r
         else\r
             if (rising_edge(pi_base_clk)) then\r
                 if (is_s_oam_clear(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
@@ -972,6 +977,7 @@ end;
                     reg_s_oam_cpy_cnt <= 0;\r
                     reg_p_oam_cpy_cnt <= 0;\r
                     reg_spr_eval_cnt <= 0;\r
+                    reg_spr0_eval <= '0';\r
                 elsif (is_spr_eval(pi_ppu_mask(PPUSSP), reg_nes_x, reg_nes_y) = 1) then\r
                     --copy data from primary oam ram.\r
                     reg_s_oam_addr <= conv_std_logic_vector(reg_s_oam_cpy_cnt mod 32, 5);\r
@@ -990,6 +996,9 @@ end;
                         elsif (reg_s_oam_cur_state = REG_SET0) then\r
                             reg_s_oam_ce_n <= '0';\r
                             reg_s_oam_wr_n <= '0';\r
+                            if (reg_p_oam_cpy_cnt = 0) then\r
+                                reg_spr0_eval <= '1';\r
+                            end if;\r
                         elsif (reg_s_oam_cur_state = REG_SET1) then\r
                             reg_s_oam_ce_n <= '1';\r
                             reg_s_oam_wr_n <= '1';\r
@@ -1171,7 +1180,7 @@ end;
                 if (reg_nes_y = VSCAN_NEXT_START - 1) then\r
                     reg_ppu_status(ST_SP0) <= '0';\r
                 else\r
-                    reg_ppu_status(ST_SP0) <= reg_spr_hit;\r
+                    reg_ppu_status(ST_SP0) <= reg_spr0_hit;\r
                 end if;\r
 \r
                 if (reg_nes_y > VSCAN and reg_nes_y < VSCAN_NEXT_START) then\r