VGADisplay/src/vga_generate.nsl

   1 //%d CNT_H_00                   0b0000000000
   2 //%d CNT_H1                     0b0001011111 /* 96clock */
   3 //%d CNT_H_REP32                0b0001101110 /* 110 clock */
   4 //%d CNT_H_DATA_IN      0b0010001110 /* 142 for 144clock */
   5 //%d CNT_H_DATA_OUT     0b1100001110 /* 782 for 784clock */
   6 //%d CNT_H2                     0b1100011111 /* 800clock */
   7 //%d CNT_32                     0b11111      /* 32dot */
   8 //%d H_MINUS_32         (^(0b0000011111) + 0b0000000001)      /* -32 */
   9 //%d H_MINUS_1          0b1111111111      /* -1 */
  10 //%d V_MINUS_32         (^(0b0000000000000011111) + 0b0000000000000000001) /*-32*/
  11 //%d V_MINUS_1          0b1111111111111111111      /* -1 */
  12 //%d CNT_V1                     0b0000000011000111111 /* 1600clock */
  13 //%d CNT_V_DATA_IN      0b0000110000011011111 /* 24800clock */
  14 //%d CNT_V_DATA_OUT     0b1100011110011011111 /* 408800clock */
  15 //%d CNT_V2                     0b1100101110000011111 /* 416800clock */
  16
  17 /**
  18 *       VGA\81@Signal Generate Circuit
  19 *       Module name is "vga_generate"
  20 *       @auther Yujiro Kaneko
  21 *       @version 1.2
  22 **/
  23
  24 %d CNT_H_00                     10'd0           /* for Initialize */
  25 %d CNT_H1                       10'd96          /* 96clock */
  26 %d CNT_H_REP32          10'd110         /* 110 clock */
  27 %d CNT_H_DATA_IN        10'd142         /* 142 for 144clock */
  28 %d CNT_H_DATA_OUT       10'd782         /* 782 for 784clock */
  29 %d CNT_H2                       10'd800         /* 800clock */
  30
  31 %d CNT_32                       5'b11111        /* 32dot */
  32
  33 %d H_MINUS_32           10'd1111100001          /* -31 */
  34 %d H_MINUS_1            10'b1111111111          /* -1 */
  35
  36 %d V_MINUS_32           19'b1111111111111100001 /* -32 */
  37 %d V_MINUS_1            19'b1111111111111111111 /* -1 */
  38
  39 %d CNT_V1                       19'd1599        /* 1600clock */
  40 %d CNT_V_DATA_IN        19'd24799       /* 24800clock */
  41 %d CNT_V_DATA_OUT       19'd408799      /* 408800clock */
  42 %d CNT_V2                       19'd416799      /* 416800clock */
  43
  44
  45 declare vga_generate  interface {
  46         input  p_reset ;
  47         input  m_clock ;
  48         input  i_pix32_data[32] ;
  49         output o_v_sync ;
  50         output o_h_sync ;
  51         output o_vga_red[4] ;
  52         output o_vga_green[4] ;
  53         output o_vga_blue[4] ;
  54         output o_h_cnt[10] ;
  55
  56         func_in  fi_ack_req_32dot(i_pix32_data) ;
  57         func_out fo_req_32dot ;
  58 }
  59
  60 module vga_generate {
  61         func_self fs_disp_data ;
  62
  63         reg r_v_sync = 0 ;
  64         reg r_h_sync = 0 ;
  65         reg r_h_flg = 0 ;
  66
  67         reg r_vdata_flg = 0 ;
  68         reg r_hdata_flg = 0 ;
  69
  70         reg r_h_cnt[10] = 0 ;
  71         reg r_v_cnt[19] = 0 ;
  72
  73         reg r_bit32_cnt[5] = 0 ;
  74         reg r_flg = 0 ;
  75         reg r_cnt = 0 ;
  76         reg r1[32] = 0 ;
  77         reg r2[32] = 0 ;
  78         reg r_data_select_flag = 0 ;
  79
  80         wire w_red[4] ;
  81         wire w_green[4] ;
  82         wire w_blue[4] ;
  83         wire w_disp_data;
  84
  85         {
  86                 o_v_sync        = r_v_sync;
  87                 o_h_sync        = r_h_sync;
  88                 o_vga_red       = w_red;
  89                 o_vga_green     = w_green;
  90                 o_vga_blue  = w_blue;
  91                 o_h_cnt         = r_h_cnt;
  92
  93
  94                 //horizonal synchronous signal generate
  95                 any{
  96                         r_h_cnt == 10'd96 : {
  97                                 r_h_sync := ~r_h_sync;
  98                                 r_h_cnt++ ;
  99                         }
 100                         r_h_cnt == 10'd142 : {
 101                                 r_hdata_flg := 0b1;
 102                                 r_h_cnt++ ;
 103                         }
 104                         r_h_cnt == 10'd782 : {
 105                                 r_hdata_flg := 0b0;
 106                                 r_h_cnt++ ;
 107                         }
 108                         r_h_cnt == 10'd800 : {
 109                                 r_h_sync := ~r_h_sync;
 110                                 r_h_cnt  := 0 ;
 111                         }
 112                         else : {
 113                                 r_h_cnt++ ;
 114                         }
 115                 }
 116
 117                 //vartical synchronous signal generate
 118                 any{
 119                         r_v_cnt == CNT_V1 : {
 120                                 r_v_sync := ~r_v_sync;
 121                                 r_v_cnt++ ;
 122                         }
 123                         r_v_cnt == CNT_V_DATA_IN : {
 124                                 r_vdata_flg := 0b1;
 125                                 r_v_cnt++ ;
 126                         }
 127                         r_v_cnt == CNT_V_DATA_OUT : {
 128                                 r_vdata_flg := 0b0;
 129                                 r_v_cnt++ ;
 130                         }
 131                         r_v_cnt == CNT_V2 : {
 132                                 r_v_sync := ~r_v_sync;
 133                                 r_v_cnt  := 0 ;
 134                         }
 135                         else : {
 136                                 r_v_cnt++ ;
 137                         }
 138                 }
 139
 140                 //address counter
 141                 if( r_hdata_flg & r_vdata_flg ) fs_disp_data();
 142
 143                 //32dot request signal
 144                 any {
 145                         ((r_h_cnt >= (CNT_H_DATA_IN + H_MINUS_32)) &
 146                         (r_h_cnt <= (CNT_H_DATA_OUT + H_MINUS_32 + H_MINUS_1))) &
 147                         ((r_v_cnt >= (CNT_V_DATA_IN + V_MINUS_32)) &
 148                         (r_v_cnt <= (CNT_V_DATA_OUT + V_MINUS_32 + V_MINUS_1))) : {
 149                                 if(r_bit32_cnt == 0b00000) fo_req_32dot() ;
 150                                 any {
 151                                         r_bit32_cnt == 0b11111 : r_bit32_cnt := 0b00000 ;
 152                                         else                     : r_bit32_cnt := r_bit32_cnt + 0b00001 ;
 153                                 }
 154                         }
 155                         else : r_bit32_cnt := 0b00000 ;
 156                 }
 157
 158
 159                 if (r_hdata_flg & r_vdata_flg) {
 160                         w_red = 4'h0;
 161                         w_blue = 4'hF;
 162                         w_green = 4'h0;
 163
 164 /*
 165                         any {
 166                                 w_disp_data : {
 167                                         w_red   = 4'hF ;
 168                                         w_blue  = 4'hF ;
 169                                         w_green = 4'hF ;
 170                                 }
 171                                 ~w_disp_data : {
 172                                         w_red   = 4'hF ;
 173                                         w_blue  = 4'h0 ;
 174                                         w_green = 4'h0 ;
 175                                 }
 176                         }
 177 */
 178                 } else {
 179                         w_red   = 4'h0 ;
 180                         w_blue  = 4'h0 ;
 181                         w_green = 4'h0 ;
 182                 }
 183
 184         }//par end
 185
 186
 187         func fi_ack_req_32dot {
 188                 r_data_select_flag := ~r_data_select_flag ;
 189                 any{
 190                         r_data_select_flag : r1 := i_pix32_data ;
 191                         else                       : r2 := i_pix32_data ;
 192                 }
 193         }
 194
 195         func fs_disp_data {
 196                 any{
 197                         ~r_flg : any{
 198                                 r_bit32_cnt == 0b00000 : w_disp_data = r1[31] ;
 199                                 r_bit32_cnt == 0b00001 : w_disp_data = r1[30] ;
 200                                 r_bit32_cnt == 0b00010 : w_disp_data = r1[29] ;
 201                                 r_bit32_cnt == 0b00011 : w_disp_data = r1[28] ;
 202                                 r_bit32_cnt == 0b00100 : w_disp_data = r1[27] ;
 203                                 r_bit32_cnt == 0b00101 : w_disp_data = r1[26] ;
 204                                 r_bit32_cnt == 0b00110 : w_disp_data = r1[25] ;
 205                                 r_bit32_cnt == 0b00111 : w_disp_data = r1[24] ;
 206                                 r_bit32_cnt == 0b01000 : w_disp_data = r1[23] ;
 207                                 r_bit32_cnt == 0b01001 : w_disp_data = r1[22] ;
 208                                 r_bit32_cnt == 0b01010 : w_disp_data = r1[21] ;
 209                                 r_bit32_cnt == 0b01011 : w_disp_data = r1[20] ;
 210                                 r_bit32_cnt == 0b01100 : w_disp_data = r1[19] ;
 211                                 r_bit32_cnt == 0b01101 : w_disp_data = r1[18] ;
 212                                 r_bit32_cnt == 0b01110 : w_disp_data = r1[17] ;
 213                                 r_bit32_cnt == 0b01111 : w_disp_data = r1[16] ;
 214                                 r_bit32_cnt == 0b10000 : w_disp_data = r1[15] ;
 215                                 r_bit32_cnt == 0b10001 : w_disp_data = r1[14] ;
 216                                 r_bit32_cnt == 0b10010 : w_disp_data = r1[13] ;
 217                                 r_bit32_cnt == 0b10011 : w_disp_data = r1[12] ;
 218                                 r_bit32_cnt == 0b10100 : w_disp_data = r1[11] ;
 219                                 r_bit32_cnt == 0b10101 : w_disp_data = r1[10] ;
 220                                 r_bit32_cnt == 0b10110 : w_disp_data = r1[9] ;
 221                                 r_bit32_cnt == 0b10111 : w_disp_data = r1[8] ;
 222                                 r_bit32_cnt == 0b11000 : w_disp_data = r1[7] ;
 223                                 r_bit32_cnt == 0b11001 : w_disp_data = r1[6] ;
 224                                 r_bit32_cnt == 0b11010 : w_disp_data = r1[5] ;
 225                                 r_bit32_cnt == 0b11011 : w_disp_data = r1[4] ;
 226                                 r_bit32_cnt == 0b11100 : w_disp_data = r1[3] ;
 227                                 r_bit32_cnt == 0b11101 : w_disp_data = r1[2] ;
 228                                 r_bit32_cnt == 0b11110 : w_disp_data = r1[1] ;
 229                                 r_bit32_cnt == 0b11111 : {
 230                                                                            w_disp_data = r1[0] ;
 231                                                                            r_flg := ~r_flg ;
 232                                 }
 233                         }
 234                         else : any{
 235                                 r_bit32_cnt == 0b00000 : w_disp_data = r2[31] ;
 236                                 r_bit32_cnt == 0b00001 : w_disp_data = r2[30] ;
 237                                 r_bit32_cnt == 0b00010 : w_disp_data = r2[29] ;
 238                                 r_bit32_cnt == 0b00011 : w_disp_data = r2[28] ;
 239                                 r_bit32_cnt == 0b00100 : w_disp_data = r2[27] ;
 240                                 r_bit32_cnt == 0b00101 : w_disp_data = r2[26] ;
 241                                 r_bit32_cnt == 0b00110 : w_disp_data = r2[25] ;
 242                                 r_bit32_cnt == 0b00111 : w_disp_data = r2[24] ;
 243                                 r_bit32_cnt == 0b01000 : w_disp_data = r2[23] ;
 244                                 r_bit32_cnt == 0b01001 : w_disp_data = r2[22] ;
 245                                 r_bit32_cnt == 0b01010 : w_disp_data = r2[21] ;
 246                                 r_bit32_cnt == 0b01011 : w_disp_data = r2[20] ;
 247                                 r_bit32_cnt == 0b01100 : w_disp_data = r2[19] ;
 248                                 r_bit32_cnt == 0b01101 : w_disp_data = r2[18] ;
 249                                 r_bit32_cnt == 0b01110 : w_disp_data = r2[17] ;
 250                                 r_bit32_cnt == 0b01111 : w_disp_data = r2[16] ;
 251                                 r_bit32_cnt == 0b10000 : w_disp_data = r2[15] ;
 252                                 r_bit32_cnt == 0b10001 : w_disp_data = r2[14] ;
 253                                 r_bit32_cnt == 0b10010 : w_disp_data = r2[13] ;
 254                                 r_bit32_cnt == 0b10011 : w_disp_data = r2[12] ;
 255                                 r_bit32_cnt == 0b10100 : w_disp_data = r2[11] ;
 256                                 r_bit32_cnt == 0b10101 : w_disp_data = r2[10] ;
 257                                 r_bit32_cnt == 0b10110 : w_disp_data = r2[9] ;
 258                                 r_bit32_cnt == 0b10111 : w_disp_data = r2[8] ;
 259                                 r_bit32_cnt == 0b11000 : w_disp_data = r2[7] ;
 260                                 r_bit32_cnt == 0b11001 : w_disp_data = r2[6] ;
 261                                 r_bit32_cnt == 0b11010 : w_disp_data = r2[5] ;
 262                                 r_bit32_cnt == 0b11011 : w_disp_data = r2[4] ;
 263                                 r_bit32_cnt == 0b11100 : w_disp_data = r2[3] ;
 264                                 r_bit32_cnt == 0b11101 : w_disp_data = r2[2] ;
 265                                 r_bit32_cnt == 0b11110 : w_disp_data = r2[1] ;
 266                                 r_bit32_cnt == 0b11111 : {
 267                                                                            w_disp_data = r2[0] ;
 268                                                                            r_flg := ~r_flg ;
 269                                 }
 270                         }
 271                 }
 272                 r_bit32_cnt++ ;
 273         }//disp_data
 274 }//module end