SDRAM設計開始

[oca1/test.git] / VGADisplay / SDRAMC_src / btn_ctrl.nsl

diff --git a/VGADisplay/SDRAMC_src/btn_ctrl.nsl b/VGADisplay/SDRAMC_src/btn_ctrl.nsl
new file mode 100644 (file)
index 0000000..6896b52
--- /dev/null
+++ b/VGADisplay/SDRAMC_src/btn_ctrl.nsl
@@ -0,0 +1,46 @@
+/**
+*      Push switch module
+*      Module name "push_sw"
+*      @author         Yujiro Kaneko
+*      @version        0.1
+*/
+
+#define CNT_1ms 19'd500000             // Count value for 1m sec at 50MHz
+//#define CNT_1ms 26'd50               // Count value for test
+
+#define TRUE   1'd1
+#define FALSE  1'd0
+
+declare btn_ctrl {
+       input    i_sw ;                         // Button signal input terminal
+       func_out fo_sw_enb ;            // Button enable signal
+}
+module btn_ctrl {
+       reg r_cnt[19]     = 19'd0 ;     // Button enable count
+       reg r_rise_flag   = FALSE ;     // Button signal rising flag
+       reg r_sw_hld      = 0 ;         //
+       reg r_finish_flag = FALSE ;     // "fo_btn_enb" transfer flag
+
+       r_sw_hld := i_sw ;
+
+       if( i_sw & ~r_sw_hld ) {
+               r_rise_flag := TRUE ;
+       } else if( ~i_sw ) {
+               r_rise_flag := FALSE ;
+               r_finish_flag := FALSE ;
+       }
+       
+       if( r_rise_flag == TRUE ){
+               any {
+                       ( r_cnt == CNT_1ms ) & ( r_finish_flag == FALSE ) : {
+                               r_finish_flag := TRUE ;
+                               fo_sw_enb() ;
+                       }
+                       else : {
+                               r_cnt++ ;
+                       }
+               }
+       } else {
+               r_cnt := 26'd0 ;
+       }
+}
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