1 /* CPU class elements for m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000-2009 Red Hat, Inc.
7 This file is part of the Red Hat simulators.
12 // This file is included in the middle of the cpu class struct.
16 // CPU state information.
22 /* general registers */
24 /* control registers */
40 void stream_cgen_hardware (std::ostream &ost) const
42 ost << hardware.h_pc << ' ';
43 for (int i = 0; i < 16; i++)
44 ost << hardware.h_gr[i] << ' ';
45 for (int i = 0; i < 16; i++)
46 ost << hardware.h_cr[i] << ' ';
47 ost << hardware.h_accum << ' ';
48 ost << hardware.h_cond << ' ';
49 ost << hardware.h_psw << ' ';
50 ost << hardware.h_bpsw << ' ';
51 ost << hardware.h_bbpsw << ' ';
52 ost << hardware.h_lock << ' ';
54 void destream_cgen_hardware (std::istream &ist)
57 for (int i = 0; i < 16; i++)
58 ist >> hardware.h_gr[i];
59 for (int i = 0; i < 16; i++)
60 ist >> hardware.h_cr[i];
61 ist >> hardware.h_accum;
62 ist >> hardware.h_cond;
63 ist >> hardware.h_psw;
64 ist >> hardware.h_bpsw;
65 ist >> hardware.h_bbpsw;
66 ist >> hardware.h_lock;
68 // C++ register access function templates
69 #define current_cpu this
71 inline USI h_pc_get () const { return this->hardware.h_pc; }
72 inline void h_pc_set (USI newval) { this->hardware.h_pc = newval; }
74 inline SI h_gr_get (UINT regno) const { return this->hardware.h_gr[regno]; }
75 inline void h_gr_set (UINT regno, SI newval) { this->hardware.h_gr[regno] = newval; }
77 inline USI h_cr_get (UINT regno) const { return current_cpu->m32rbf_h_cr_get_handler (regno); }
78 inline void h_cr_set (UINT regno, USI newval) { current_cpu->m32rbf_h_cr_set_handler (regno, newval);
81 inline DI h_accum_get () const { return current_cpu->m32rbf_h_accum_get_handler (); }
82 inline void h_accum_set (DI newval) { current_cpu->m32rbf_h_accum_set_handler (newval);
85 inline BI h_cond_get () const { return this->hardware.h_cond; }
86 inline void h_cond_set (BI newval) { this->hardware.h_cond = newval; }
88 inline UQI h_psw_get () const { return current_cpu->m32rbf_h_psw_get_handler (); }
89 inline void h_psw_set (UQI newval) { current_cpu->m32rbf_h_psw_set_handler (newval);
92 inline UQI h_bpsw_get () const { return this->hardware.h_bpsw; }
93 inline void h_bpsw_set (UQI newval) { this->hardware.h_bpsw = newval; }
95 inline UQI h_bbpsw_get () const { return this->hardware.h_bbpsw; }
96 inline void h_bbpsw_set (UQI newval) { this->hardware.h_bbpsw = newval; }
98 inline BI h_lock_get () const { return this->hardware.h_lock; }
99 inline void h_lock_set (BI newval) { this->hardware.h_lock = newval; }