1 /* Decode header for mepcop1_48.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 2000-2009 Red Hat, Inc.
7 This file is part of the Red Hat simulators.
12 #ifndef MEPCOP1_48_DECODE_H
13 #define MEPCOP1_48_DECODE_H
20 typedef UINT mepcop1_48_insn_word;
22 /* Enum declaration for instructions in cpu family mepcop1_48. */
23 typedef enum mepcop1_48_insn_type {
24 MEPCOP1_48_INSN_X_INVALID, MEPCOP1_48_INSN_CMOV_CRN_RM_P0, MEPCOP1_48_INSN_CMOV_RN_CRM_P0, MEPCOP1_48_INSN_CMOVC_CCRN_RM_P0
25 , MEPCOP1_48_INSN_CMOVC_RN_CCRM_P0, MEPCOP1_48_INSN_CMOVH_CRN_RM_P0, MEPCOP1_48_INSN_CMOVH_RN_CRM_P0, MEPCOP1_48_INSN_C0NOP_P0_P0S
26 , MEPCOP1_48_INSN_CPFSFTBI_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_B_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_H_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_W_P0_P1
27 , MEPCOP1_48_INSN_CPACMPNE_B_P0_P1, MEPCOP1_48_INSN_CPACMPNE_H_P0_P1, MEPCOP1_48_INSN_CPACMPNE_W_P0_P1, MEPCOP1_48_INSN_CPACMPGTU_B_P0_P1
28 , MEPCOP1_48_INSN_CPACMPGT_B_P0_P1, MEPCOP1_48_INSN_CPACMPGT_H_P0_P1, MEPCOP1_48_INSN_CPACMPGTU_W_P0_P1, MEPCOP1_48_INSN_CPACMPGT_W_P0_P1
29 , MEPCOP1_48_INSN_CPACMPGEU_B_P0_P1, MEPCOP1_48_INSN_CPACMPGE_B_P0_P1, MEPCOP1_48_INSN_CPACMPGE_H_P0_P1, MEPCOP1_48_INSN_CPACMPGEU_W_P0_P1
30 , MEPCOP1_48_INSN_CPACMPGE_W_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_B_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_H_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_W_P0_P1
31 , MEPCOP1_48_INSN_CPOCMPNE_B_P0_P1, MEPCOP1_48_INSN_CPOCMPNE_H_P0_P1, MEPCOP1_48_INSN_CPOCMPNE_W_P0_P1, MEPCOP1_48_INSN_CPOCMPGTU_B_P0_P1
32 , MEPCOP1_48_INSN_CPOCMPGT_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGT_H_P0_P1, MEPCOP1_48_INSN_CPOCMPGTU_W_P0_P1, MEPCOP1_48_INSN_CPOCMPGT_W_P0_P1
33 , MEPCOP1_48_INSN_CPOCMPGEU_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGE_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGE_H_P0_P1, MEPCOP1_48_INSN_CPOCMPGEU_W_P0_P1
34 , MEPCOP1_48_INSN_CPOCMPGE_W_P0_P1, MEPCOP1_48_INSN_CDADD3_P0_P1, MEPCOP1_48_INSN_CPSUB3_B_P0_P1, MEPCOP1_48_INSN_CPSUB3_H_P0_P1
35 , MEPCOP1_48_INSN_CPSUB3_W_P0_P1, MEPCOP1_48_INSN_CDSUB3_P0_P1, MEPCOP1_48_INSN_CPSADD3_H_P0_P1, MEPCOP1_48_INSN_CPSADD3_W_P0_P1
36 , MEPCOP1_48_INSN_CPSSUB3_H_P0_P1, MEPCOP1_48_INSN_CPSSUB3_W_P0_P1, MEPCOP1_48_INSN_CPEXTUADDU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUADD3_B_P0_P1
37 , MEPCOP1_48_INSN_CPEXTLADDU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTLADD3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUSUBU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUSUB3_B_P0_P1
38 , MEPCOP1_48_INSN_CPEXTLSUBU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTLSUB3_B_P0_P1, MEPCOP1_48_INSN_CPAVEU3_B_P0_P1, MEPCOP1_48_INSN_CPAVE3_B_P0_P1
39 , MEPCOP1_48_INSN_CPAVE3_H_P0_P1, MEPCOP1_48_INSN_CPAVE3_W_P0_P1, MEPCOP1_48_INSN_CPADDSRU3_B_P0_P1, MEPCOP1_48_INSN_CPADDSR3_B_P0_P1
40 , MEPCOP1_48_INSN_CPADDSR3_H_P0_P1, MEPCOP1_48_INSN_CPADDSR3_W_P0_P1, MEPCOP1_48_INSN_CPABSU3_B_P0_P1, MEPCOP1_48_INSN_CPABS3_B_P0_P1
41 , MEPCOP1_48_INSN_CPABS3_H_P0_P1, MEPCOP1_48_INSN_CPAND3_P0_P1, MEPCOP1_48_INSN_CPOR3_P0_P1, MEPCOP1_48_INSN_CPNOR3_P0_P1
42 , MEPCOP1_48_INSN_CPXOR3_P0_P1, MEPCOP1_48_INSN_CPPACKU_B_P0_P1, MEPCOP1_48_INSN_CPPACK_B_P0_P1, MEPCOP1_48_INSN_CPPACK_H_P0_P1
43 , MEPCOP1_48_INSN_CPMAXU3_B_P0_P1, MEPCOP1_48_INSN_CPMAX3_B_P0_P1, MEPCOP1_48_INSN_CPMAX3_H_P0_P1, MEPCOP1_48_INSN_CPMAXU3_W_P0_P1
44 , MEPCOP1_48_INSN_CPMAX3_W_P0_P1, MEPCOP1_48_INSN_CPMINU3_B_P0_P1, MEPCOP1_48_INSN_CPMIN3_B_P0_P1, MEPCOP1_48_INSN_CPMIN3_H_P0_P1
45 , MEPCOP1_48_INSN_CPMINU3_W_P0_P1, MEPCOP1_48_INSN_CPMIN3_W_P0_P1, MEPCOP1_48_INSN_CPSRL3_B_P0_P1, MEPCOP1_48_INSN_CPSSRL3_B_P0_P1
46 , MEPCOP1_48_INSN_CPSRL3_H_P0_P1, MEPCOP1_48_INSN_CPSSRL3_H_P0_P1, MEPCOP1_48_INSN_CPSRL3_W_P0_P1, MEPCOP1_48_INSN_CPSSRL3_W_P0_P1
47 , MEPCOP1_48_INSN_CDSRL3_P0_P1, MEPCOP1_48_INSN_CPSRA3_B_P0_P1, MEPCOP1_48_INSN_CPSSRA3_B_P0_P1, MEPCOP1_48_INSN_CPSRA3_H_P0_P1
48 , MEPCOP1_48_INSN_CPSSRA3_H_P0_P1, MEPCOP1_48_INSN_CPSRA3_W_P0_P1, MEPCOP1_48_INSN_CPSSRA3_W_P0_P1, MEPCOP1_48_INSN_CDSRA3_P0_P1
49 , MEPCOP1_48_INSN_CPSLL3_B_P0_P1, MEPCOP1_48_INSN_CPSSLL3_B_P0_P1, MEPCOP1_48_INSN_CPSLL3_H_P0_P1, MEPCOP1_48_INSN_CPSSLL3_H_P0_P1
50 , MEPCOP1_48_INSN_CPSLL3_W_P0_P1, MEPCOP1_48_INSN_CPSSLL3_W_P0_P1, MEPCOP1_48_INSN_CDSLL3_P0_P1, MEPCOP1_48_INSN_CPSLA3_H_P0_P1
51 , MEPCOP1_48_INSN_CPSLA3_W_P0_P1, MEPCOP1_48_INSN_CPSRLI3_B_P0_P1, MEPCOP1_48_INSN_CPSRLI3_H_P0_P1, MEPCOP1_48_INSN_CPSRLI3_W_P0_P1
52 , MEPCOP1_48_INSN_CDSRLI3_P0_P1, MEPCOP1_48_INSN_CPSRAI3_B_P0_P1, MEPCOP1_48_INSN_CPSRAI3_H_P0_P1, MEPCOP1_48_INSN_CPSRAI3_W_P0_P1
53 , MEPCOP1_48_INSN_CDSRAI3_P0_P1, MEPCOP1_48_INSN_CPSLLI3_B_P0_P1, MEPCOP1_48_INSN_CPSLLI3_H_P0_P1, MEPCOP1_48_INSN_CPSLLI3_W_P0_P1
54 , MEPCOP1_48_INSN_CDSLLI3_P0_P1, MEPCOP1_48_INSN_CPSLAI3_H_P0_P1, MEPCOP1_48_INSN_CPSLAI3_W_P0_P1, MEPCOP1_48_INSN_CPCLIPIU3_W_P0_P1
55 , MEPCOP1_48_INSN_CPCLIPI3_W_P0_P1, MEPCOP1_48_INSN_CDCLIPIU3_P0_P1, MEPCOP1_48_INSN_CDCLIPI3_P0_P1, MEPCOP1_48_INSN_CPMOVI_H_P0_P1
56 , MEPCOP1_48_INSN_CPMOVIU_W_P0_P1, MEPCOP1_48_INSN_CPMOVI_W_P0_P1, MEPCOP1_48_INSN_CDMOVIU_P0_P1, MEPCOP1_48_INSN_CDMOVI_P0_P1
57 } MEPCOP1_48_INSN_TYPE;
62 struct mepcop1_48_scache;
63 typedef sem_status (mepcop1_48_sem_fn) (mep_ext1_cpu* cpu, mepcop1_48_scache* sem);
66 // Instruction descriptor.
68 struct mepcop1_48_idesc {
70 // scache engine executor for this insn
71 mepcop1_48_sem_fn* execute;
73 const char* insn_name;
74 enum mepcop1_48_insn_type sem_index;
77 // idesc table: indexed by sem_index
78 static mepcop1_48_idesc idesc_table[];
80 static mepcop1_48_insn_type lookup_virtual (virtual_insn_type vit);
83 // Instruction argument buffer.
85 union mepcop1_48_sem_fields {
86 struct { /* no operands */
92 } sfmt_cpmoviu_w_P0_P1;
96 } sfmt_cpmovi_h_P0_P1;
101 } sfmt_cdsrli3_P0_P1;
106 } sfmt_cpsrli3_w_P0_P1;
111 } sfmt_cpsrli3_h_P0_P1;
117 } sfmt_cpfsftbi_P0_P1;
122 unsigned char out_ivc2rm;
123 } sfmt_cmovc_rn_ccrm_p0;
128 unsigned char in_ivc2rm;
129 } sfmt_cmovc_ccrn_rm_p0;
134 unsigned char out_ivc2rm;
135 } sfmt_cmov_rn_crm_p0;
140 unsigned char in_ivc2rm;
141 } sfmt_cmov_crn_rm_p0;
142 // This one is for chain/cti-chain virtual insns.
144 // Number of insns in pbb.
146 // This is used by chain insns and by untaken conditional branches.
147 mepcop1_48_scache* next;
148 mepcop1_48_scache* branch_target;
150 // This one is for `before' virtual insns.
152 // The cache entry of the real insn.
153 mepcop1_48_scache* insn;
157 // Simulator instruction cache.
159 struct mepcop1_48_scache {
163 mepcop1_48_sem_fn* fn;
166 // PC of this instruction.
170 mepcop1_48_idesc* idesc;
173 mepcop1_48_sem_fields fields;
177 // Only used if profiling or parallel execution support enabled during
179 unsigned long long written;
182 // decode given instruction
183 void decode (mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn);
186 } // end mep_ext1 namespace
188 // Decls of each semantic fn.
190 using mep_ext1::mepcop1_48_sem_fn;
191 extern mepcop1_48_sem_fn mepcop1_48_sem_x_invalid;
192 extern mepcop1_48_sem_fn mepcop1_48_sem_cmov_crn_rm_p0;
193 extern mepcop1_48_sem_fn mepcop1_48_sem_cmov_rn_crm_p0;
194 extern mepcop1_48_sem_fn mepcop1_48_sem_cmovc_ccrn_rm_p0;
195 extern mepcop1_48_sem_fn mepcop1_48_sem_cmovc_rn_ccrm_p0;
196 extern mepcop1_48_sem_fn mepcop1_48_sem_cmovh_crn_rm_p0;
197 extern mepcop1_48_sem_fn mepcop1_48_sem_cmovh_rn_crm_p0;
198 extern mepcop1_48_sem_fn mepcop1_48_sem_c0nop_P0_P0S;
199 extern mepcop1_48_sem_fn mepcop1_48_sem_cpfsftbi_P0_P1;
200 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_b_P0_P1;
201 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_h_P0_P1;
202 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_w_P0_P1;
203 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_b_P0_P1;
204 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_h_P0_P1;
205 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_w_P0_P1;
206 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgtu_b_P0_P1;
207 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_b_P0_P1;
208 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_h_P0_P1;
209 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgtu_w_P0_P1;
210 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_w_P0_P1;
211 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgeu_b_P0_P1;
212 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_b_P0_P1;
213 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_h_P0_P1;
214 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgeu_w_P0_P1;
215 extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_w_P0_P1;
216 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_b_P0_P1;
217 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_h_P0_P1;
218 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_w_P0_P1;
219 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_b_P0_P1;
220 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_h_P0_P1;
221 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_w_P0_P1;
222 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgtu_b_P0_P1;
223 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_b_P0_P1;
224 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_h_P0_P1;
225 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgtu_w_P0_P1;
226 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_w_P0_P1;
227 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgeu_b_P0_P1;
228 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_b_P0_P1;
229 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_h_P0_P1;
230 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgeu_w_P0_P1;
231 extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_w_P0_P1;
232 extern mepcop1_48_sem_fn mepcop1_48_sem_cdadd3_P0_P1;
233 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_b_P0_P1;
234 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_h_P0_P1;
235 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_w_P0_P1;
236 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsub3_P0_P1;
237 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsadd3_h_P0_P1;
238 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsadd3_w_P0_P1;
239 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssub3_h_P0_P1;
240 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssub3_w_P0_P1;
241 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextuaddu3_b_P0_P1;
242 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextuadd3_b_P0_P1;
243 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextladdu3_b_P0_P1;
244 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextladd3_b_P0_P1;
245 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextusubu3_b_P0_P1;
246 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextusub3_b_P0_P1;
247 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextlsubu3_b_P0_P1;
248 extern mepcop1_48_sem_fn mepcop1_48_sem_cpextlsub3_b_P0_P1;
249 extern mepcop1_48_sem_fn mepcop1_48_sem_cpaveu3_b_P0_P1;
250 extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_b_P0_P1;
251 extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_h_P0_P1;
252 extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_w_P0_P1;
253 extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsru3_b_P0_P1;
254 extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_b_P0_P1;
255 extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_h_P0_P1;
256 extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_w_P0_P1;
257 extern mepcop1_48_sem_fn mepcop1_48_sem_cpabsu3_b_P0_P1;
258 extern mepcop1_48_sem_fn mepcop1_48_sem_cpabs3_b_P0_P1;
259 extern mepcop1_48_sem_fn mepcop1_48_sem_cpabs3_h_P0_P1;
260 extern mepcop1_48_sem_fn mepcop1_48_sem_cpand3_P0_P1;
261 extern mepcop1_48_sem_fn mepcop1_48_sem_cpor3_P0_P1;
262 extern mepcop1_48_sem_fn mepcop1_48_sem_cpnor3_P0_P1;
263 extern mepcop1_48_sem_fn mepcop1_48_sem_cpxor3_P0_P1;
264 extern mepcop1_48_sem_fn mepcop1_48_sem_cppacku_b_P0_P1;
265 extern mepcop1_48_sem_fn mepcop1_48_sem_cppack_b_P0_P1;
266 extern mepcop1_48_sem_fn mepcop1_48_sem_cppack_h_P0_P1;
267 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmaxu3_b_P0_P1;
268 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_b_P0_P1;
269 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_h_P0_P1;
270 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmaxu3_w_P0_P1;
271 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_w_P0_P1;
272 extern mepcop1_48_sem_fn mepcop1_48_sem_cpminu3_b_P0_P1;
273 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_b_P0_P1;
274 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_h_P0_P1;
275 extern mepcop1_48_sem_fn mepcop1_48_sem_cpminu3_w_P0_P1;
276 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_w_P0_P1;
277 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_b_P0_P1;
278 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_b_P0_P1;
279 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_h_P0_P1;
280 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_h_P0_P1;
281 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_w_P0_P1;
282 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_w_P0_P1;
283 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrl3_P0_P1;
284 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_b_P0_P1;
285 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_b_P0_P1;
286 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_h_P0_P1;
287 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_h_P0_P1;
288 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_w_P0_P1;
289 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_w_P0_P1;
290 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsra3_P0_P1;
291 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_b_P0_P1;
292 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_b_P0_P1;
293 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_h_P0_P1;
294 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_h_P0_P1;
295 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_w_P0_P1;
296 extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_w_P0_P1;
297 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsll3_P0_P1;
298 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsla3_h_P0_P1;
299 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsla3_w_P0_P1;
300 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_b_P0_P1;
301 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_h_P0_P1;
302 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_w_P0_P1;
303 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrli3_P0_P1;
304 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_b_P0_P1;
305 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_h_P0_P1;
306 extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_w_P0_P1;
307 extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrai3_P0_P1;
308 extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_b_P0_P1;
309 extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_h_P0_P1;
310 extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_w_P0_P1;
311 extern mepcop1_48_sem_fn mepcop1_48_sem_cdslli3_P0_P1;
312 extern mepcop1_48_sem_fn mepcop1_48_sem_cpslai3_h_P0_P1;
313 extern mepcop1_48_sem_fn mepcop1_48_sem_cpslai3_w_P0_P1;
314 extern mepcop1_48_sem_fn mepcop1_48_sem_cpclipiu3_w_P0_P1;
315 extern mepcop1_48_sem_fn mepcop1_48_sem_cpclipi3_w_P0_P1;
316 extern mepcop1_48_sem_fn mepcop1_48_sem_cdclipiu3_P0_P1;
317 extern mepcop1_48_sem_fn mepcop1_48_sem_cdclipi3_P0_P1;
318 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmovi_h_P0_P1;
319 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmoviu_w_P0_P1;
320 extern mepcop1_48_sem_fn mepcop1_48_sem_cpmovi_w_P0_P1;
321 extern mepcop1_48_sem_fn mepcop1_48_sem_cdmoviu_P0_P1;
322 extern mepcop1_48_sem_fn mepcop1_48_sem_cdmovi_P0_P1;
324 #endif /* MEPCOP1_48_DECODE_H */