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tests/tcg: finesse the registers check for "hidden" regs
[qmiga/qemu.git] / tests / tcg / ppc64 / Makefile.target
1 # -*- Mode: makefile -*-
2 #
3 # ppc64 specific tweaks
4
5 VPATH += $(SRC_PATH)/tests/tcg/ppc64
6
7 config-cc.mak: Makefile
8         $(quiet-@)( \
9             $(call cc-option,-mpower8-vector,   CROSS_CC_HAS_POWER8_VECTOR); \
10             $(call cc-option,-mpower10,         CROSS_CC_HAS_POWER10)) 3> config-cc.mak
11
12 -include config-cc.mak
13
14 ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),)
15 PPC64_TESTS=bcdsub non_signalling_xscv
16 endif
17 $(PPC64_TESTS): CFLAGS += -mpower8-vector
18
19 ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),)
20 PPC64_TESTS += vsx_f2i_nan
21 endif
22 vsx_f2i_nan: CFLAGS += -mpower8-vector -I$(SRC_PATH)/include
23
24 PPC64_TESTS += mtfsf
25 PPC64_TESTS += mffsce
26
27 ifneq ($(CROSS_CC_HAS_POWER10),)
28 PPC64_TESTS += byte_reverse sha512-vector vector
29 endif
30 byte_reverse: CFLAGS += -mcpu=power10
31 run-byte_reverse: QEMU_OPTS+=-cpu POWER10
32
33 sha512-vector: CFLAGS +=-mcpu=power10 -O3
34 sha512-vector: sha512.c
35         $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
36
37 run-sha512-vector: QEMU_OPTS+=-cpu POWER10
38
39 vector: CFLAGS += -mcpu=power10 -I$(SRC_PATH)/include
40 run-vector: QEMU_OPTS += -cpu POWER10
41
42 PPC64_TESTS += signal_save_restore_xer
43 PPC64_TESTS += xxspltw
44 PPC64_TESTS += test-aes
45
46 TESTS += $(PPC64_TESTS)