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linux-user/hppa: Dump IIR on register dump
author
Helge Deller
<deller@gmx.de>
Sun, 18 Sep 2022 19:45:49 +0000
(21:45 +0200)
committer
Laurent Vivier
<laurent@vivier.eu>
Tue, 27 Sep 2022 07:29:33 +0000
(09:29 +0200)
Include the IIR register (which holds the opcode of the failing
instruction) when dumping the hppa registers.
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20220918194555
.83535-7-deller@gmx.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
target/hppa/helper.c
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diff --git
a/target/hppa/helper.c
b/target/hppa/helper.c
index
e2758d8
..
74b8747
100644
(file)
--- a/
target/hppa/helper.c
+++ b/
target/hppa/helper.c
@@
-85,9
+85,11
@@
void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags)
char psw_c[20];
int i;
- qemu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx "\n",
+ qemu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx
+ " IIR " TREG_FMT_lx "\n",
hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f),
- hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b));
+ hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b),
+ env->cr[CR_IIR]);
psw_c[0] = (psw & PSW_W ? 'W' : '-');
psw_c[1] = (psw & PSW_E ? 'E' : '-');