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target/riscv/cpu_helper.c: Invalid exception on MMU translation stage
[qmiga/qemu.git] / target / riscv / cpu_helper.c
2023-11-22 Ivan Klokovtarget/riscv/cpu_helper.c: Invalid exception on MMU...
2023-11-07 Stefan HajnocziMerge tag 'for_upstream' of https://git./virt/kvm/mst...
2023-11-07 Stefan HajnocziMerge tag 'pull-pa-20231106' of https://gitlab.com...
2023-11-07 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20231107' of https:...
2023-11-07 Rajnesh Kanwaltarget/riscv: Add HS-mode virtual interrupt and IRQ...
2023-11-07 Rajnesh Kanwaltarget/riscv: Add M-mode virtual interrupt and IRQ...
2023-11-07 Rajnesh Kanwaltarget/riscv: Split interrupt logic from riscv_cpu_upda...
2023-11-07 Rajnesh Kanwaltarget/riscv: Check for async flag in case of RISCV_EXC...
2023-10-16 Stefan HajnocziMerge tag 'python-pull-request' of https://gitlab.com...
2023-10-16 Stefan HajnocziMerge tag 'pull-request-2023-10-12' of https://gitlab...
2023-10-16 Stefan HajnocziMerge tag 'for-upstream' of https://repo.or.cz/qemu...
2023-10-16 Stefan HajnocziMerge tag 'pull-shadow-2023-10-12' of https://repo...
2023-10-16 Stefan HajnocziMerge tag 'mem-2023-10-12' of https://github.com/davidh...
2023-10-12 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20231012-1' of https...
2023-10-12 Richard W.M. Jonestarget/riscv: Use env_archcpu for better performance
2023-09-21 Stefan HajnocziMerge tag 'pull-block-2023-09-01' of https://gitlab...
2023-09-19 Stefan HajnocziMerge tag 'firmware/edk2-20230918-pull-request' of...
2023-09-11 Stefan HajnocziMerge tag 'pull-vfio-20230911' of https://github.com...
2023-09-11 Stefan HajnocziMerge tag 'pull-riscv-to-apply-20230911' of https:...
2023-09-11 Weiwei Litarget/riscv: Update CSR bits name for svadu extension
2023-07-24 Peter MaydellMerge tag 'pull-qapi-2023-07-10' of https://repo.or...
2023-07-11 Richard HendersonMerge tag 'for_upstream' of https://git./virt/kvm/mst...
2023-07-11 Richard HendersonMerge tag 'mips-20230710' of https://github.com/philmd...
2023-07-10 Richard HendersonMerge tag 'qga-pull-2023-07-10' of https://github.com...
2023-07-10 Richard HendersonMerge tag 'pull-riscv-to-apply-20230710-1' of https...
2023-07-10 Jason Chientarget/riscv: Set the correct exception for implict...
2023-07-10 Weiwei Litarget/riscv: update cur_pmbase/pmmask based on mode...
2023-07-10 Weiwei Litarget/riscv: Add additional xlen for address when...
2023-07-10 Weiwei Litarget/riscv: Make MPV only work when MPP != PRV_M
2023-06-28 Richard HendersonMerge tag 'for-upstream' of https://repo.or.cz/qemu...
2023-06-28 Richard HendersonMerge tag 'for_upstream' of https://git./virt/kvm/mst...
2023-06-26 Richard HendersonMerge tag 'pull-tcg-20230626' of https://gitlab.com...
2023-06-26 Anton Johanssontarget: Widen pc/cs_base in cpu_get_tb_cpu_state
2023-06-21 Richard HendersonMerge tag 'seabios-hppa-v7-pull-request' of https:...
2023-06-14 Richard HendersonMerge tag 'pull-riscv-to-apply-20230614' of https:...
2023-06-13 Weiwei Litarget/riscv: Fix initialized value for cur_pmmask
2023-06-13 Mayuresh Chitaletarget/riscv: Reuse tb->flags.FS
2023-06-13 Weiwei Litarget/riscv: Change the return type of pmp_hart_has_pr...
2023-06-13 Weiwei Litarget/riscv: Move pmp_get_tlb_size apart from get_phys...
2023-06-13 Weiwei Litarget/riscv: Update pmp_get_tlb_size()
2023-06-06 Richard HendersonMerge tag 'pull-request-2023-06-06' of https://gitlab...
2023-06-05 Richard HendersonMerge tag 'pull-tcg-20230605' of https://gitlab.com...
2023-06-05 Richard Hendersontcg: Split out tcg/oversized-guest.h
2023-05-17 Richard HendersonMerge tag 'linux-user-for-8.1-pull-request' of https...
2023-05-13 Richard HendersonMerge tag 'or1k-pull-request-20230513' of https://githu...
2023-05-05 Richard HendersonMerge tag 'pw-pull-request' of https://gitlab.com/marca...
2023-05-05 Richard HendersonMerge tag 'migration-20230505-pull-request' of https...
2023-05-05 Richard HendersonMerge tag 'pull-riscv-to-apply-20230505-1' of https...
2023-05-05 Alexandre Ghitiriscv: Make sure an exception is raised if a pte is...
2023-05-05 Irina Ryapolovatarget/riscv: Fix Guest Physical Address Translation
2023-05-05 Richard Hendersontarget/riscv: Reorg sum check in get_physical_address
2023-05-05 Richard Hendersontarget/riscv: Reorg access check in get_physical_address
2023-05-05 Richard Hendersontarget/riscv: Merge checks for reserved pte flags
2023-05-05 Richard Hendersontarget/riscv: Don't modify SUM with is_debug
2023-05-05 Richard Hendersontarget/riscv: Suppress pte update with is_debug
2023-05-05 Richard Hendersontarget/riscv: Move leaf pte processing out of level...
2023-05-05 Richard Hendersontarget/riscv: Hoist pbmte and hade out of the level...
2023-05-05 Richard Hendersontarget/riscv: Hoist second stage mode change to callers
2023-05-05 Richard Hendersontarget/riscv: Check SUM in the correct register
2023-05-05 Richard Hendersontarget/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_index
2023-05-05 Richard Hendersontarget/riscv: Move hstatus.spvp check to check_access_hlsv
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_2stage
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_priv
2023-05-05 Richard Hendersontarget/riscv: Introduce mmuidx_sum
2023-05-05 Richard Hendersontarget/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BIT
2023-05-05 Richard Hendersontarget/riscv: Handle HLV, HSV via helpers
2023-05-05 Fei Wutarget/riscv: Reduce overhead of MSTATUS_SUM change
2023-05-05 Fei Wutarget/riscv: Separate priv from mmu_idx
2023-05-05 LIU Zhiweitarget/riscv: Add a tb flags field for vstart
2023-05-05 Richard Hendersontarget/riscv: Remove mstatus_hs_{fs, vs} from tb_flags
2023-05-05 LIU Zhiweitarget/riscv: Encode the FS and VS on a normal way...
2023-05-05 LIU Zhiweitarget/riscv: Extract virt enabled state from tb flags
2023-05-05 Weiwei Litarget/riscv: Legalize MPP value in write_mstatus
2023-05-05 Weiwei Litarget/riscv: Use PRV_RESERVED instead of PRV_H
2023-05-05 Weiwei Litarget/riscv: Fix lines with over 80 characters
2023-05-05 Weiwei Litarget/riscv: Fix format for comments
2023-05-05 Weiwei Litarget/riscv: Fix format for indentation
2023-05-05 Weiwei Litarget/riscv: Remove riscv_cpu_virt_enabled()
2023-05-05 Weiwei Litarget/riscv: Fix addr type for get_physical_address
2023-05-05 Weiwei Litarget/riscv: Remove redundant parentheses
2023-05-05 LIU Zhiweitarget/riscv: Convert env->virt to a bool env->virt_enabled
2023-05-05 Weiwei Litarget/riscv: Remove check on RVH for riscv_cpu_set_vir...
2023-05-05 Weiwei Litarget/riscv: Remove check on RVH for riscv_cpu_virt_en...
2023-05-05 Weiwei Litarget/riscv: Remove redundant call to riscv_cpu_virt_e...
2023-05-05 Weiwei Litarget/riscv: Simplify type conversion for CPURISCVState
2023-05-05 Weiwei Litarget/riscv: Avoid env_archcpu() when reading RISCVCPU...
2023-03-07 Peter MaydellMerge tag 'for-upstream-mb' of https://gitlab.com/bonzi...
2023-03-03 Peter MaydellMerge tag 'pull-aspeed-20230302' of https://github...
2023-03-03 Peter MaydellMerge tag 'pull-loongarch-20230303' of https://gitlab...
2023-03-03 Peter MaydellMerge tag 'migration-20230302-pull-request' of https...
2023-03-03 Peter MaydellMerge tag 'for_upstream' of https://git./virt/kvm/mst...
2023-03-03 Peter MaydellMerge tag 'pull-riscv-to-apply-20230303' of https:...
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: some vector_helper...
2023-03-02 Palmer DabbeltMerge patch series "RISCVCPUConfig related cleanups"
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: Add support for Svadu...
2023-03-02 Weiwei Litarget/riscv: Add *envcfg.HADE related check in address...
2023-03-02 Weiwei Litarget/riscv: Add *envcfg.PBMTE related check in addres...
2023-03-02 Palmer DabbeltMerge patch series "target/riscv: Various fixes to...
2023-03-01 Palmer DabbeltMerge patch series "target/riscv: Some updates to float...
2023-03-01 Palmer DabbeltMerge patch series "make write_misa a no-op and FEATURE...
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