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powerpc/security/book3s64: Report L1TF status in sysfs
[sagit-ice-cold/kernel_xiaomi_msm8998.git] / arch / powerpc / kernel / security.c
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Security related flags and so on.
4 //
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
6
7 #include <linux/cpu.h>
8 #include <linux/kernel.h>
9 #include <linux/debugfs.h>
10 #include <linux/device.h>
11 #include <linux/seq_buf.h>
12
13 #include <asm/debug.h>
14 #include <asm/asm-prototypes.h>
15 #include <asm/code-patching.h>
16 #include <asm/security_features.h>
17 #include <asm/setup.h>
18
19
20 unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
21
22 enum count_cache_flush_type {
23         COUNT_CACHE_FLUSH_NONE  = 0x1,
24         COUNT_CACHE_FLUSH_SW    = 0x2,
25         COUNT_CACHE_FLUSH_HW    = 0x4,
26 };
27 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
28 static bool link_stack_flush_enabled;
29
30 bool barrier_nospec_enabled;
31 static bool no_nospec;
32 static bool btb_flush_enabled;
33 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
34 static bool no_spectrev2;
35 #endif
36
37 static void enable_barrier_nospec(bool enable)
38 {
39         barrier_nospec_enabled = enable;
40         do_barrier_nospec_fixups(enable);
41 }
42
43 void setup_barrier_nospec(void)
44 {
45         bool enable;
46
47         /*
48          * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
49          * But there's a good reason not to. The two flags we check below are
50          * both are enabled by default in the kernel, so if the hcall is not
51          * functional they will be enabled.
52          * On a system where the host firmware has been updated (so the ori
53          * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
54          * not been updated, we would like to enable the barrier. Dropping the
55          * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
56          * we potentially enable the barrier on systems where the host firmware
57          * is not updated, but that's harmless as it's a no-op.
58          */
59         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
60                  security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
61
62         if (!no_nospec)
63                 enable_barrier_nospec(enable);
64 }
65
66 static int __init handle_nospectre_v1(char *p)
67 {
68         no_nospec = true;
69
70         return 0;
71 }
72 early_param("nospectre_v1", handle_nospectre_v1);
73
74 #ifdef CONFIG_DEBUG_FS
75 static int barrier_nospec_set(void *data, u64 val)
76 {
77         switch (val) {
78         case 0:
79         case 1:
80                 break;
81         default:
82                 return -EINVAL;
83         }
84
85         if (!!val == !!barrier_nospec_enabled)
86                 return 0;
87
88         enable_barrier_nospec(!!val);
89
90         return 0;
91 }
92
93 static int barrier_nospec_get(void *data, u64 *val)
94 {
95         *val = barrier_nospec_enabled ? 1 : 0;
96         return 0;
97 }
98
99 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
100                         barrier_nospec_get, barrier_nospec_set, "%llu\n");
101
102 static __init int barrier_nospec_debugfs_init(void)
103 {
104         debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
105                             &fops_barrier_nospec);
106         return 0;
107 }
108 device_initcall(barrier_nospec_debugfs_init);
109 #endif /* CONFIG_DEBUG_FS */
110
111 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
112 static int __init handle_nospectre_v2(char *p)
113 {
114         no_spectrev2 = true;
115
116         return 0;
117 }
118 early_param("nospectre_v2", handle_nospectre_v2);
119 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
120
121 #ifdef CONFIG_PPC_FSL_BOOK3E
122 void setup_spectre_v2(void)
123 {
124         if (no_spectrev2)
125                 do_btb_flush_fixups();
126         else
127                 btb_flush_enabled = true;
128 }
129 #endif /* CONFIG_PPC_FSL_BOOK3E */
130
131 #ifdef CONFIG_PPC_BOOK3S_64
132 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
133 {
134         bool thread_priv;
135
136         thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
137
138         if (rfi_flush || thread_priv) {
139                 struct seq_buf s;
140                 seq_buf_init(&s, buf, PAGE_SIZE - 1);
141
142                 seq_buf_printf(&s, "Mitigation: ");
143
144                 if (rfi_flush)
145                         seq_buf_printf(&s, "RFI Flush");
146
147                 if (rfi_flush && thread_priv)
148                         seq_buf_printf(&s, ", ");
149
150                 if (thread_priv)
151                         seq_buf_printf(&s, "L1D private per thread");
152
153                 seq_buf_printf(&s, "\n");
154
155                 return s.len;
156         }
157
158         if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
159             !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
160                 return sprintf(buf, "Not affected\n");
161
162         return sprintf(buf, "Vulnerable\n");
163 }
164
165 ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
166 {
167         return cpu_show_meltdown(dev, attr, buf);
168 }
169 #endif
170
171 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
172 {
173         struct seq_buf s;
174
175         seq_buf_init(&s, buf, PAGE_SIZE - 1);
176
177         if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
178                 if (barrier_nospec_enabled)
179                         seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
180                 else
181                         seq_buf_printf(&s, "Vulnerable");
182
183                 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
184                         seq_buf_printf(&s, ", ori31 speculation barrier enabled");
185
186                 seq_buf_printf(&s, "\n");
187         } else
188                 seq_buf_printf(&s, "Not affected\n");
189
190         return s.len;
191 }
192
193 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
194 {
195         struct seq_buf s;
196         bool bcs, ccd;
197
198         seq_buf_init(&s, buf, PAGE_SIZE - 1);
199
200         bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
201         ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
202
203         if (bcs || ccd) {
204                 seq_buf_printf(&s, "Mitigation: ");
205
206                 if (bcs)
207                         seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
208
209                 if (bcs && ccd)
210                         seq_buf_printf(&s, ", ");
211
212                 if (ccd)
213                         seq_buf_printf(&s, "Indirect branch cache disabled");
214
215                 if (link_stack_flush_enabled)
216                         seq_buf_printf(&s, ", Software link stack flush");
217
218         } else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
219                 seq_buf_printf(&s, "Mitigation: Software count cache flush");
220
221                 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
222                         seq_buf_printf(&s, " (hardware accelerated)");
223
224                 if (link_stack_flush_enabled)
225                         seq_buf_printf(&s, ", Software link stack flush");
226
227         } else if (btb_flush_enabled) {
228                 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
229         } else {
230                 seq_buf_printf(&s, "Vulnerable");
231         }
232
233         seq_buf_printf(&s, "\n");
234
235         return s.len;
236 }
237
238 #ifdef CONFIG_PPC_BOOK3S_64
239 /*
240  * Store-forwarding barrier support.
241  */
242
243 static enum stf_barrier_type stf_enabled_flush_types;
244 static bool no_stf_barrier;
245 bool stf_barrier;
246
247 static int __init handle_no_stf_barrier(char *p)
248 {
249         pr_info("stf-barrier: disabled on command line.");
250         no_stf_barrier = true;
251         return 0;
252 }
253
254 early_param("no_stf_barrier", handle_no_stf_barrier);
255
256 /* This is the generic flag used by other architectures */
257 static int __init handle_ssbd(char *p)
258 {
259         if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
260                 /* Until firmware tells us, we have the barrier with auto */
261                 return 0;
262         } else if (strncmp(p, "off", 3) == 0) {
263                 handle_no_stf_barrier(NULL);
264                 return 0;
265         } else
266                 return 1;
267
268         return 0;
269 }
270 early_param("spec_store_bypass_disable", handle_ssbd);
271
272 /* This is the generic flag used by other architectures */
273 static int __init handle_no_ssbd(char *p)
274 {
275         handle_no_stf_barrier(NULL);
276         return 0;
277 }
278 early_param("nospec_store_bypass_disable", handle_no_ssbd);
279
280 static void stf_barrier_enable(bool enable)
281 {
282         if (enable)
283                 do_stf_barrier_fixups(stf_enabled_flush_types);
284         else
285                 do_stf_barrier_fixups(STF_BARRIER_NONE);
286
287         stf_barrier = enable;
288 }
289
290 void setup_stf_barrier(void)
291 {
292         enum stf_barrier_type type;
293         bool enable, hv;
294
295         hv = cpu_has_feature(CPU_FTR_HVMODE);
296
297         /* Default to fallback in case fw-features are not available */
298         if (cpu_has_feature(CPU_FTR_ARCH_207S))
299                 type = STF_BARRIER_SYNC_ORI;
300         else if (cpu_has_feature(CPU_FTR_ARCH_206))
301                 type = STF_BARRIER_FALLBACK;
302         else
303                 type = STF_BARRIER_NONE;
304
305         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
306                 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
307                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
308
309         if (type == STF_BARRIER_FALLBACK) {
310                 pr_info("stf-barrier: fallback barrier available\n");
311         } else if (type == STF_BARRIER_SYNC_ORI) {
312                 pr_info("stf-barrier: hwsync barrier available\n");
313         } else if (type == STF_BARRIER_EIEIO) {
314                 pr_info("stf-barrier: eieio barrier available\n");
315         }
316
317         stf_enabled_flush_types = type;
318
319         if (!no_stf_barrier)
320                 stf_barrier_enable(enable);
321 }
322
323 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
324 {
325         if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
326                 const char *type;
327                 switch (stf_enabled_flush_types) {
328                 case STF_BARRIER_EIEIO:
329                         type = "eieio";
330                         break;
331                 case STF_BARRIER_SYNC_ORI:
332                         type = "hwsync";
333                         break;
334                 case STF_BARRIER_FALLBACK:
335                         type = "fallback";
336                         break;
337                 default:
338                         type = "unknown";
339                 }
340                 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
341         }
342
343         if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
344             !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
345                 return sprintf(buf, "Not affected\n");
346
347         return sprintf(buf, "Vulnerable\n");
348 }
349
350 #ifdef CONFIG_DEBUG_FS
351 static int stf_barrier_set(void *data, u64 val)
352 {
353         bool enable;
354
355         if (val == 1)
356                 enable = true;
357         else if (val == 0)
358                 enable = false;
359         else
360                 return -EINVAL;
361
362         /* Only do anything if we're changing state */
363         if (enable != stf_barrier)
364                 stf_barrier_enable(enable);
365
366         return 0;
367 }
368
369 static int stf_barrier_get(void *data, u64 *val)
370 {
371         *val = stf_barrier ? 1 : 0;
372         return 0;
373 }
374
375 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
376
377 static __init int stf_barrier_debugfs_init(void)
378 {
379         debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
380         return 0;
381 }
382 device_initcall(stf_barrier_debugfs_init);
383 #endif /* CONFIG_DEBUG_FS */
384
385 static void no_count_cache_flush(void)
386 {
387         count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
388         pr_info("count-cache-flush: software flush disabled.\n");
389 }
390
391 static void toggle_count_cache_flush(bool enable)
392 {
393         if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE) &&
394             !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK))
395                 enable = false;
396
397         if (!enable) {
398                 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
399 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
400                 patch_instruction_site(&patch__call_kvm_flush_link_stack, PPC_INST_NOP);
401 #endif
402                 pr_info("link-stack-flush: software flush disabled.\n");
403                 link_stack_flush_enabled = false;
404                 no_count_cache_flush();
405                 return;
406         }
407
408         // This enables the branch from _switch to flush_count_cache
409         patch_branch_site(&patch__call_flush_count_cache,
410                           (u64)&flush_count_cache, BRANCH_SET_LINK);
411
412 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
413         // This enables the branch from guest_exit_cont to kvm_flush_link_stack
414         patch_branch_site(&patch__call_kvm_flush_link_stack,
415                           (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
416 #endif
417
418         pr_info("link-stack-flush: software flush enabled.\n");
419         link_stack_flush_enabled = true;
420
421         // If we just need to flush the link stack, patch an early return
422         if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
423                 patch_instruction_site(&patch__flush_link_stack_return, PPC_INST_BLR);
424                 no_count_cache_flush();
425                 return;
426         }
427
428         if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
429                 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
430                 pr_info("count-cache-flush: full software flush sequence enabled.\n");
431                 return;
432         }
433
434         patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
435         count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
436         pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
437 }
438
439 void setup_count_cache_flush(void)
440 {
441         bool enable = true;
442
443         if (no_spectrev2 || cpu_mitigations_off()) {
444                 if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
445                     security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
446                         pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
447
448                 enable = false;
449         }
450
451         /*
452          * There's no firmware feature flag/hypervisor bit to tell us we need to
453          * flush the link stack on context switch. So we set it here if we see
454          * either of the Spectre v2 mitigations that aim to protect userspace.
455          */
456         if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
457             security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
458                 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
459
460         toggle_count_cache_flush(enable);
461 }
462
463 #ifdef CONFIG_DEBUG_FS
464 static int count_cache_flush_set(void *data, u64 val)
465 {
466         bool enable;
467
468         if (val == 1)
469                 enable = true;
470         else if (val == 0)
471                 enable = false;
472         else
473                 return -EINVAL;
474
475         toggle_count_cache_flush(enable);
476
477         return 0;
478 }
479
480 static int count_cache_flush_get(void *data, u64 *val)
481 {
482         if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
483                 *val = 0;
484         else
485                 *val = 1;
486
487         return 0;
488 }
489
490 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
491                         count_cache_flush_set, "%llu\n");
492
493 static __init int count_cache_flush_debugfs_init(void)
494 {
495         debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
496                             NULL, &fops_count_cache_flush);
497         return 0;
498 }
499 device_initcall(count_cache_flush_debugfs_init);
500 #endif /* CONFIG_DEBUG_FS */
501 #endif /* CONFIG_PPC_BOOK3S_64 */