arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202         unsigned long flags;
 203
 204         /*
 205          * Disabling irqs at this point since the following code could be
 206          * interrupted and executed through kvm_arch_hardware_disable()
 207          */
 208         local_irq_save(flags);
 209         if (locals->registered) {
 210                 locals->registered = false;
 211                 user_return_notifier_unregister(urn);
 212         }
 213         local_irq_restore(flags);
 214         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 215                 values = &locals->values[slot];
 216                 if (values->host != values->curr) {
 217                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 218                         values->curr = values->host;
 219                 }
 220         }
 221 }
 222
 223 static void shared_msr_update(unsigned slot, u32 msr)
 224 {
 225         u64 value;
 226         unsigned int cpu = smp_processor_id();
 227         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 228
 229         /* only read, and nobody should modify it at this time,
 230          * so don't need lock */
 231         if (slot >= shared_msrs_global.nr) {
 232                 printk(KERN_ERR "kvm: invalid MSR slot!");
 233                 return;
 234         }
 235         rdmsrl_safe(msr, &value);
 236         smsr->values[slot].host = value;
 237         smsr->values[slot].curr = value;
 238 }
 239
 240 void kvm_define_shared_msr(unsigned slot, u32 msr)
 241 {
 242         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 243         shared_msrs_global.msrs[slot] = msr;
 244         if (slot >= shared_msrs_global.nr)
 245                 shared_msrs_global.nr = slot + 1;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 248
 249 static void kvm_shared_msr_cpu_online(void)
 250 {
 251         unsigned i;
 252
 253         for (i = 0; i < shared_msrs_global.nr; ++i)
 254                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 255 }
 256
 257 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 258 {
 259         unsigned int cpu = smp_processor_id();
 260         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 261         int err;
 262
 263         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 264                 return 0;
 265         smsr->values[slot].curr = value;
 266         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 267         if (err)
 268                 return 1;
 269
 270         if (!smsr->registered) {
 271                 smsr->urn.on_user_return = kvm_on_user_return;
 272                 user_return_notifier_register(&smsr->urn);
 273                 smsr->registered = true;
 274         }
 275         return 0;
 276 }
 277 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 278
 279 static void drop_user_return_notifiers(void)
 280 {
 281         unsigned int cpu = smp_processor_id();
 282         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 283
 284         if (smsr->registered)
 285                 kvm_on_user_return(&smsr->urn);
 286 }
 287
 288 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 289 {
 290         return vcpu->arch.apic_base;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 293
 294 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 295 {
 296         u64 old_state = vcpu->arch.apic_base &
 297                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 298         u64 new_state = msr_info->data &
 299                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 300         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 301                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 302
 303         if (!msr_info->host_initiated &&
 304             ((msr_info->data & reserved_bits) != 0 ||
 305              new_state == X2APIC_ENABLE ||
 306              (new_state == MSR_IA32_APICBASE_ENABLE &&
 307               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 308              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 309               old_state == 0)))
 310                 return 1;
 311
 312         kvm_lapic_set_base(vcpu, msr_info->data);
 313         return 0;
 314 }
 315 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 316
 317 asmlinkage __visible void kvm_spurious_fault(void)
 318 {
 319         /* Fault while not rebooting.  We want the trace. */
 320         BUG();
 321 }
 322 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 323
 324 #define EXCPT_BENIGN            0
 325 #define EXCPT_CONTRIBUTORY      1
 326 #define EXCPT_PF                2
 327
 328 static int exception_class(int vector)
 329 {
 330         switch (vector) {
 331         case PF_VECTOR:
 332                 return EXCPT_PF;
 333         case DE_VECTOR:
 334         case TS_VECTOR:
 335         case NP_VECTOR:
 336         case SS_VECTOR:
 337         case GP_VECTOR:
 338                 return EXCPT_CONTRIBUTORY;
 339         default:
 340                 break;
 341         }
 342         return EXCPT_BENIGN;
 343 }
 344
 345 #define EXCPT_FAULT             0
 346 #define EXCPT_TRAP              1
 347 #define EXCPT_ABORT             2
 348 #define EXCPT_INTERRUPT         3
 349
 350 static int exception_type(int vector)
 351 {
 352         unsigned int mask;
 353
 354         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 355                 return EXCPT_INTERRUPT;
 356
 357         mask = 1 << vector;
 358
 359         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 360         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 361                 return EXCPT_TRAP;
 362
 363         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 364                 return EXCPT_ABORT;
 365
 366         /* Reserved exceptions will result in fault */
 367         return EXCPT_FAULT;
 368 }
 369
 370 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 371                 unsigned nr, bool has_error, u32 error_code,
 372                 bool reinject)
 373 {
 374         u32 prev_nr;
 375         int class1, class2;
 376
 377         kvm_make_request(KVM_REQ_EVENT, vcpu);
 378
 379         if (!vcpu->arch.exception.pending) {
 380         queue:
 381                 if (has_error && !is_protmode(vcpu))
 382                         has_error = false;
 383                 vcpu->arch.exception.pending = true;
 384                 vcpu->arch.exception.has_error_code = has_error;
 385                 vcpu->arch.exception.nr = nr;
 386                 vcpu->arch.exception.error_code = error_code;
 387                 vcpu->arch.exception.reinject = reinject;
 388                 return;
 389         }
 390
 391         /* to check exception */
 392         prev_nr = vcpu->arch.exception.nr;
 393         if (prev_nr == DF_VECTOR) {
 394                 /* triple fault -> shutdown */
 395                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 396                 return;
 397         }
 398         class1 = exception_class(prev_nr);
 399         class2 = exception_class(nr);
 400         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 401                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 402                 /* generate double fault per SDM Table 5-5 */
 403                 vcpu->arch.exception.pending = true;
 404                 vcpu->arch.exception.has_error_code = true;
 405                 vcpu->arch.exception.nr = DF_VECTOR;
 406                 vcpu->arch.exception.error_code = 0;
 407         } else
 408                 /* replace previous exception with a new one in a hope
 409                    that instruction re-execution will regenerate lost
 410                    exception */
 411                 goto queue;
 412 }
 413
 414 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, false);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 419
 420 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 421 {
 422         kvm_multiple_exception(vcpu, nr, false, 0, true);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 425
 426 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 427 {
 428         if (err)
 429                 kvm_inject_gp(vcpu, 0);
 430         else
 431                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 434
 435 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 436 {
 437         ++vcpu->stat.pf_guest;
 438         vcpu->arch.cr2 = fault->address;
 439         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 440 }
 441 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 442
 443 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 444 {
 445         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 446                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 447         else
 448                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 449
 450         return fault->nested_page_fault;
 451 }
 452
 453 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 454 {
 455         atomic_inc(&vcpu->arch.nmi_queued);
 456         kvm_make_request(KVM_REQ_NMI, vcpu);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 459
 460 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 465
 466 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 467 {
 468         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 471
 472 /*
 473  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 474  * a #GP and return false.
 475  */
 476 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 477 {
 478         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 479                 return true;
 480         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 481         return false;
 482 }
 483 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 484
 485 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 486 {
 487         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 488                 return true;
 489
 490         kvm_queue_exception(vcpu, UD_VECTOR);
 491         return false;
 492 }
 493 EXPORT_SYMBOL_GPL(kvm_require_dr);
 494
 495 /*
 496  * This function will be used to read from the physical memory of the currently
 497  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 498  * can read from guest physical or from the guest's guest physical memory.
 499  */
 500 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 501                             gfn_t ngfn, void *data, int offset, int len,
 502                             u32 access)
 503 {
 504         struct x86_exception exception;
 505         gfn_t real_gfn;
 506         gpa_t ngpa;
 507
 508         ngpa     = gfn_to_gpa(ngfn);
 509         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 510         if (real_gfn == UNMAPPED_GVA)
 511                 return -EFAULT;
 512
 513         real_gfn = gpa_to_gfn(real_gfn);
 514
 515         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 516 }
 517 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 518
 519 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 520                                void *data, int offset, int len, u32 access)
 521 {
 522         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 523                                        data, offset, len, access);
 524 }
 525
 526 /*
 527  * Load the pae pdptrs.  Return true is they are all valid.
 528  */
 529 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 530 {
 531         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 532         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 533         int i;
 534         int ret;
 535         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 536
 537         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 538                                       offset * sizeof(u64), sizeof(pdpte),
 539                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 540         if (ret < 0) {
 541                 ret = 0;
 542                 goto out;
 543         }
 544         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 545                 if (is_present_gpte(pdpte[i]) &&
 546                     (pdpte[i] &
 547                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 548                         ret = 0;
 549                         goto out;
 550                 }
 551         }
 552         ret = 1;
 553
 554         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 555         __set_bit(VCPU_EXREG_PDPTR,
 556                   (unsigned long *)&vcpu->arch.regs_avail);
 557         __set_bit(VCPU_EXREG_PDPTR,
 558                   (unsigned long *)&vcpu->arch.regs_dirty);
 559 out:
 560
 561         return ret;
 562 }
 563 EXPORT_SYMBOL_GPL(load_pdptrs);
 564
 565 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 566 {
 567         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 568         bool changed = true;
 569         int offset;
 570         gfn_t gfn;
 571         int r;
 572
 573         if (is_long_mode(vcpu) || !is_pae(vcpu))
 574                 return false;
 575
 576         if (!test_bit(VCPU_EXREG_PDPTR,
 577                       (unsigned long *)&vcpu->arch.regs_avail))
 578                 return true;
 579
 580         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 581         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 582         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 583                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 584         if (r < 0)
 585                 goto out;
 586         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 587 out:
 588
 589         return changed;
 590 }
 591
 592 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 593 {
 594         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 595         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 596
 597         cr0 |= X86_CR0_ET;
 598
 599 #ifdef CONFIG_X86_64
 600         if (cr0 & 0xffffffff00000000UL)
 601                 return 1;
 602 #endif
 603
 604         cr0 &= ~CR0_RESERVED_BITS;
 605
 606         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 607                 return 1;
 608
 609         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 610                 return 1;
 611
 612         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 613 #ifdef CONFIG_X86_64
 614                 if ((vcpu->arch.efer & EFER_LME)) {
 615                         int cs_db, cs_l;
 616
 617                         if (!is_pae(vcpu))
 618                                 return 1;
 619                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 620                         if (cs_l)
 621                                 return 1;
 622                 } else
 623 #endif
 624                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 625                                                  kvm_read_cr3(vcpu)))
 626                         return 1;
 627         }
 628
 629         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 630                 return 1;
 631
 632         kvm_x86_ops->set_cr0(vcpu, cr0);
 633
 634         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 635                 kvm_clear_async_pf_completion_queue(vcpu);
 636                 kvm_async_pf_hash_reset(vcpu);
 637         }
 638
 639         if ((cr0 ^ old_cr0) & update_bits)
 640                 kvm_mmu_reset_context(vcpu);
 641
 642         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 643             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 644             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 645                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 646
 647         return 0;
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 650
 651 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 652 {
 653         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 654 }
 655 EXPORT_SYMBOL_GPL(kvm_lmsw);
 656
 657 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 658 {
 659         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 660                         !vcpu->guest_xcr0_loaded) {
 661                 /* kvm_set_xcr() also depends on this */
 662                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 663                 vcpu->guest_xcr0_loaded = 1;
 664         }
 665 }
 666
 667 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 668 {
 669         if (vcpu->guest_xcr0_loaded) {
 670                 if (vcpu->arch.xcr0 != host_xcr0)
 671                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 672                 vcpu->guest_xcr0_loaded = 0;
 673         }
 674 }
 675
 676 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 677 {
 678         u64 xcr0 = xcr;
 679         u64 old_xcr0 = vcpu->arch.xcr0;
 680         u64 valid_bits;
 681
 682         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 683         if (index != XCR_XFEATURE_ENABLED_MASK)
 684                 return 1;
 685         if (!(xcr0 & XFEATURE_MASK_FP))
 686                 return 1;
 687         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 688                 return 1;
 689
 690         /*
 691          * Do not allow the guest to set bits that we do not support
 692          * saving.  However, xcr0 bit 0 is always set, even if the
 693          * emulated CPU does not support XSAVE (see fx_init).
 694          */
 695         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 696         if (xcr0 & ~valid_bits)
 697                 return 1;
 698
 699         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 700             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 701                 return 1;
 702
 703         if (xcr0 & XFEATURE_MASK_AVX512) {
 704                 if (!(xcr0 & XFEATURE_MASK_YMM))
 705                         return 1;
 706                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 707                         return 1;
 708         }
 709         vcpu->arch.xcr0 = xcr0;
 710
 711         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 712                 kvm_update_cpuid(vcpu);
 713         return 0;
 714 }
 715
 716 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 717 {
 718         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 719             __kvm_set_xcr(vcpu, index, xcr)) {
 720                 kvm_inject_gp(vcpu, 0);
 721                 return 1;
 722         }
 723         return 0;
 724 }
 725 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 726
 727 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 728 {
 729         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 730         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 731                                    X86_CR4_SMEP | X86_CR4_SMAP;
 732
 733         if (cr4 & CR4_RESERVED_BITS)
 734                 return 1;
 735
 736         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 737                 return 1;
 738
 739         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 740                 return 1;
 741
 742         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 743                 return 1;
 744
 745         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 746                 return 1;
 747
 748         if (is_long_mode(vcpu)) {
 749                 if (!(cr4 & X86_CR4_PAE))
 750                         return 1;
 751         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 752                    && ((cr4 ^ old_cr4) & pdptr_bits)
 753                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 754                                    kvm_read_cr3(vcpu)))
 755                 return 1;
 756
 757         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 758                 if (!guest_cpuid_has_pcid(vcpu))
 759                         return 1;
 760
 761                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 762                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_ASID_MASK) ||
 763                     !is_long_mode(vcpu))
 764                         return 1;
 765         }
 766
 767         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 768                 return 1;
 769
 770         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 771             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 772                 kvm_mmu_reset_context(vcpu);
 773
 774         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 775                 kvm_update_cpuid(vcpu);
 776
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 780
 781 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 782 {
 783 #ifdef CONFIG_X86_64
 784         cr3 &= ~CR3_PCID_INVD;
 785 #endif
 786
 787         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 788                 kvm_mmu_sync_roots(vcpu);
 789                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 790                 return 0;
 791         }
 792
 793         if (is_long_mode(vcpu)) {
 794                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 795                         return 1;
 796         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 797                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 798                 return 1;
 799
 800         vcpu->arch.cr3 = cr3;
 801         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 802         kvm_mmu_new_cr3(vcpu);
 803         return 0;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 806
 807 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 808 {
 809         if (cr8 & CR8_RESERVED_BITS)
 810                 return 1;
 811         if (lapic_in_kernel(vcpu))
 812                 kvm_lapic_set_tpr(vcpu, cr8);
 813         else
 814                 vcpu->arch.cr8 = cr8;
 815         return 0;
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 818
 819 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 820 {
 821         if (lapic_in_kernel(vcpu))
 822                 return kvm_lapic_get_cr8(vcpu);
 823         else
 824                 return vcpu->arch.cr8;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 827
 828 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 829 {
 830         int i;
 831
 832         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 833                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 834                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 835                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 836         }
 837 }
 838
 839 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 840 {
 841         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 842                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 843 }
 844
 845 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 846 {
 847         unsigned long dr7;
 848
 849         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 850                 dr7 = vcpu->arch.guest_debug_dr7;
 851         else
 852                 dr7 = vcpu->arch.dr7;
 853         kvm_x86_ops->set_dr7(vcpu, dr7);
 854         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 855         if (dr7 & DR7_BP_EN_MASK)
 856                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 857 }
 858
 859 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 860 {
 861         u64 fixed = DR6_FIXED_1;
 862
 863         if (!guest_cpuid_has_rtm(vcpu))
 864                 fixed |= DR6_RTM;
 865         return fixed;
 866 }
 867
 868 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 869 {
 870         switch (dr) {
 871         case 0 ... 3:
 872                 vcpu->arch.db[dr] = val;
 873                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 874                         vcpu->arch.eff_db[dr] = val;
 875                 break;
 876         case 4:
 877                 /* fall through */
 878         case 6:
 879                 if (val & 0xffffffff00000000ULL)
 880                         return -1; /* #GP */
 881                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 882                 kvm_update_dr6(vcpu);
 883                 break;
 884         case 5:
 885                 /* fall through */
 886         default: /* 7 */
 887                 if (val & 0xffffffff00000000ULL)
 888                         return -1; /* #GP */
 889                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 890                 kvm_update_dr7(vcpu);
 891                 break;
 892         }
 893
 894         return 0;
 895 }
 896
 897 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 898 {
 899         if (__kvm_set_dr(vcpu, dr, val)) {
 900                 kvm_inject_gp(vcpu, 0);
 901                 return 1;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_set_dr);
 906
 907 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 908 {
 909         switch (dr) {
 910         case 0 ... 3:
 911                 *val = vcpu->arch.db[dr];
 912                 break;
 913         case 4:
 914                 /* fall through */
 915         case 6:
 916                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 917                         *val = vcpu->arch.dr6;
 918                 else
 919                         *val = kvm_x86_ops->get_dr6(vcpu);
 920                 break;
 921         case 5:
 922                 /* fall through */
 923         default: /* 7 */
 924                 *val = vcpu->arch.dr7;
 925                 break;
 926         }
 927         return 0;
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_get_dr);
 930
 931 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 932 {
 933         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 934         u64 data;
 935         int err;
 936
 937         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 938         if (err)
 939                 return err;
 940         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 941         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 942         return err;
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 945
 946 /*
 947  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 948  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 949  *
 950  * This list is modified at module load time to reflect the
 951  * capabilities of the host cpu. This capabilities test skips MSRs that are
 952  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 953  * may depend on host virtualization features rather than host cpu features.
 954  */
 955
 956 static u32 msrs_to_save[] = {
 957         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 958         MSR_STAR,
 959 #ifdef CONFIG_X86_64
 960         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 961 #endif
 962         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 963         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 964 };
 965
 966 static unsigned num_msrs_to_save;
 967
 968 static u32 emulated_msrs[] = {
 969         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 970         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 971         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 972         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 973         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 974         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 975         HV_X64_MSR_RESET,
 976         HV_X64_MSR_VP_INDEX,
 977         HV_X64_MSR_VP_RUNTIME,
 978         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 979         MSR_KVM_PV_EOI_EN,
 980
 981         MSR_IA32_TSC_ADJUST,
 982         MSR_IA32_TSCDEADLINE,
 983         MSR_IA32_MISC_ENABLE,
 984         MSR_IA32_MCG_STATUS,
 985         MSR_IA32_MCG_CTL,
 986         MSR_IA32_SMBASE,
 987 };
 988
 989 static unsigned num_emulated_msrs;
 990
 991 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 992 {
 993         if (efer & efer_reserved_bits)
 994                 return false;
 995
 996         if (efer & EFER_FFXSR) {
 997                 struct kvm_cpuid_entry2 *feat;
 998
 999                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1000                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1001                         return false;
1002         }
1003
1004         if (efer & EFER_SVME) {
1005                 struct kvm_cpuid_entry2 *feat;
1006
1007                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1008                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1009                         return false;
1010         }
1011
1012         return true;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1015
1016 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1017 {
1018         u64 old_efer = vcpu->arch.efer;
1019
1020         if (!kvm_valid_efer(vcpu, efer))
1021                 return 1;
1022
1023         if (is_paging(vcpu)
1024             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1025                 return 1;
1026
1027         efer &= ~EFER_LMA;
1028         efer |= vcpu->arch.efer & EFER_LMA;
1029
1030         kvm_x86_ops->set_efer(vcpu, efer);
1031
1032         /* Update reserved bits */
1033         if ((efer ^ old_efer) & EFER_NX)
1034                 kvm_mmu_reset_context(vcpu);
1035
1036         return 0;
1037 }
1038
1039 void kvm_enable_efer_bits(u64 mask)
1040 {
1041        efer_reserved_bits &= ~mask;
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1044
1045 /*
1046  * Writes msr value into into the appropriate "register".
1047  * Returns 0 on success, non-0 otherwise.
1048  * Assumes vcpu_load() was already called.
1049  */
1050 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1051 {
1052         switch (msr->index) {
1053         case MSR_FS_BASE:
1054         case MSR_GS_BASE:
1055         case MSR_KERNEL_GS_BASE:
1056         case MSR_CSTAR:
1057         case MSR_LSTAR:
1058                 if (is_noncanonical_address(msr->data))
1059                         return 1;
1060                 break;
1061         case MSR_IA32_SYSENTER_EIP:
1062         case MSR_IA32_SYSENTER_ESP:
1063                 /*
1064                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1065                  * non-canonical address is written on Intel but not on
1066                  * AMD (which ignores the top 32-bits, because it does
1067                  * not implement 64-bit SYSENTER).
1068                  *
1069                  * 64-bit code should hence be able to write a non-canonical
1070                  * value on AMD.  Making the address canonical ensures that
1071                  * vmentry does not fail on Intel after writing a non-canonical
1072                  * value, and that something deterministic happens if the guest
1073                  * invokes 64-bit SYSENTER.
1074                  */
1075                 msr->data = get_canonical(msr->data);
1076         }
1077         return kvm_x86_ops->set_msr(vcpu, msr);
1078 }
1079 EXPORT_SYMBOL_GPL(kvm_set_msr);
1080
1081 /*
1082  * Adapt set_msr() to msr_io()'s calling convention
1083  */
1084 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1085 {
1086         struct msr_data msr;
1087         int r;
1088
1089         msr.index = index;
1090         msr.host_initiated = true;
1091         r = kvm_get_msr(vcpu, &msr);
1092         if (r)
1093                 return r;
1094
1095         *data = msr.data;
1096         return 0;
1097 }
1098
1099 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1100 {
1101         struct msr_data msr;
1102
1103         msr.data = *data;
1104         msr.index = index;
1105         msr.host_initiated = true;
1106         return kvm_set_msr(vcpu, &msr);
1107 }
1108
1109 #ifdef CONFIG_X86_64
1110 struct pvclock_gtod_data {
1111         seqcount_t      seq;
1112
1113         struct { /* extract of a clocksource struct */
1114                 int vclock_mode;
1115                 cycle_t cycle_last;
1116                 cycle_t mask;
1117                 u32     mult;
1118                 u32     shift;
1119         } clock;
1120
1121         u64             boot_ns;
1122         u64             nsec_base;
1123 };
1124
1125 static struct pvclock_gtod_data pvclock_gtod_data;
1126
1127 static void update_pvclock_gtod(struct timekeeper *tk)
1128 {
1129         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1130         u64 boot_ns;
1131
1132         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1133
1134         write_seqcount_begin(&vdata->seq);
1135
1136         /* copy pvclock gtod data */
1137         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1138         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1139         vdata->clock.mask               = tk->tkr_mono.mask;
1140         vdata->clock.mult               = tk->tkr_mono.mult;
1141         vdata->clock.shift              = tk->tkr_mono.shift;
1142
1143         vdata->boot_ns                  = boot_ns;
1144         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1145
1146         write_seqcount_end(&vdata->seq);
1147 }
1148 #endif
1149
1150 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1151 {
1152         /*
1153          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1154          * vcpu_enter_guest.  This function is only called from
1155          * the physical CPU that is running vcpu.
1156          */
1157         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1158 }
1159
1160 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1161 {
1162         int version;
1163         int r;
1164         struct pvclock_wall_clock wc;
1165         struct timespec boot;
1166
1167         if (!wall_clock)
1168                 return;
1169
1170         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1171         if (r)
1172                 return;
1173
1174         if (version & 1)
1175                 ++version;  /* first time write, random junk */
1176
1177         ++version;
1178
1179         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1180
1181         /*
1182          * The guest calculates current wall clock time by adding
1183          * system time (updated by kvm_guest_time_update below) to the
1184          * wall clock specified here.  guest system time equals host
1185          * system time for us, thus we must fill in host boot time here.
1186          */
1187         getboottime(&boot);
1188
1189         if (kvm->arch.kvmclock_offset) {
1190                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1191                 boot = timespec_sub(boot, ts);
1192         }
1193         wc.sec = boot.tv_sec;
1194         wc.nsec = boot.tv_nsec;
1195         wc.version = version;
1196
1197         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1198
1199         version++;
1200         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1201 }
1202
1203 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1204 {
1205         uint32_t quotient, remainder;
1206
1207         /* Don't try to replace with do_div(), this one calculates
1208          * "(dividend << 32) / divisor" */
1209         __asm__ ( "divl %4"
1210                   : "=a" (quotient), "=d" (remainder)
1211                   : "0" (0), "1" (dividend), "r" (divisor) );
1212         return quotient;
1213 }
1214
1215 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1216                                s8 *pshift, u32 *pmultiplier)
1217 {
1218         uint64_t scaled64;
1219         int32_t  shift = 0;
1220         uint64_t tps64;
1221         uint32_t tps32;
1222
1223         tps64 = base_khz * 1000LL;
1224         scaled64 = scaled_khz * 1000LL;
1225         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1226                 tps64 >>= 1;
1227                 shift--;
1228         }
1229
1230         tps32 = (uint32_t)tps64;
1231         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1232                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1233                         scaled64 >>= 1;
1234                 else
1235                         tps32 <<= 1;
1236                 shift++;
1237         }
1238
1239         *pshift = shift;
1240         *pmultiplier = div_frac(scaled64, tps32);
1241
1242         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1243                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1244 }
1245
1246 #ifdef CONFIG_X86_64
1247 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1248 #endif
1249
1250 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1251 static unsigned long max_tsc_khz;
1252
1253 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1254 {
1255         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1256                                    vcpu->arch.virtual_tsc_shift);
1257 }
1258
1259 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1260 {
1261         u64 v = (u64)khz * (1000000 + ppm);
1262         do_div(v, 1000000);
1263         return v;
1264 }
1265
1266 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1267 {
1268         u64 ratio;
1269
1270         /* Guest TSC same frequency as host TSC? */
1271         if (!scale) {
1272                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1273                 return 0;
1274         }
1275
1276         /* TSC scaling supported? */
1277         if (!kvm_has_tsc_control) {
1278                 if (user_tsc_khz > tsc_khz) {
1279                         vcpu->arch.tsc_catchup = 1;
1280                         vcpu->arch.tsc_always_catchup = 1;
1281                         return 0;
1282                 } else {
1283                         WARN(1, "user requested TSC rate below hardware speed\n");
1284                         return -1;
1285                 }
1286         }
1287
1288         /* TSC scaling required  - calculate ratio */
1289         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1290                                 user_tsc_khz, tsc_khz);
1291
1292         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1293                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1294                           user_tsc_khz);
1295                 return -1;
1296         }
1297
1298         vcpu->arch.tsc_scaling_ratio = ratio;
1299         return 0;
1300 }
1301
1302 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1303 {
1304         u32 thresh_lo, thresh_hi;
1305         int use_scaling = 0;
1306
1307         /* tsc_khz can be zero if TSC calibration fails */
1308         if (this_tsc_khz == 0) {
1309                 /* set tsc_scaling_ratio to a safe value */
1310                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1311                 return -1;
1312         }
1313
1314         /* Compute a scale to convert nanoseconds in TSC cycles */
1315         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1316                            &vcpu->arch.virtual_tsc_shift,
1317                            &vcpu->arch.virtual_tsc_mult);
1318         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1319
1320         /*
1321          * Compute the variation in TSC rate which is acceptable
1322          * within the range of tolerance and decide if the
1323          * rate being applied is within that bounds of the hardware
1324          * rate.  If so, no scaling or compensation need be done.
1325          */
1326         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1327         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1328         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1329                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1330                 use_scaling = 1;
1331         }
1332         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1333 }
1334
1335 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1336 {
1337         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1338                                       vcpu->arch.virtual_tsc_mult,
1339                                       vcpu->arch.virtual_tsc_shift);
1340         tsc += vcpu->arch.this_tsc_write;
1341         return tsc;
1342 }
1343
1344 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1345 {
1346 #ifdef CONFIG_X86_64
1347         bool vcpus_matched;
1348         struct kvm_arch *ka = &vcpu->kvm->arch;
1349         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1350
1351         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1352                          atomic_read(&vcpu->kvm->online_vcpus));
1353
1354         /*
1355          * Once the masterclock is enabled, always perform request in
1356          * order to update it.
1357          *
1358          * In order to enable masterclock, the host clocksource must be TSC
1359          * and the vcpus need to have matched TSCs.  When that happens,
1360          * perform request to enable masterclock.
1361          */
1362         if (ka->use_master_clock ||
1363             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1364                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1365
1366         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1367                             atomic_read(&vcpu->kvm->online_vcpus),
1368                             ka->use_master_clock, gtod->clock.vclock_mode);
1369 #endif
1370 }
1371
1372 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1373 {
1374         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1375         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1376 }
1377
1378 /*
1379  * Multiply tsc by a fixed point number represented by ratio.
1380  *
1381  * The most significant 64-N bits (mult) of ratio represent the
1382  * integral part of the fixed point number; the remaining N bits
1383  * (frac) represent the fractional part, ie. ratio represents a fixed
1384  * point number (mult + frac * 2^(-N)).
1385  *
1386  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1387  */
1388 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1389 {
1390         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1391 }
1392
1393 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1394 {
1395         u64 _tsc = tsc;
1396         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1397
1398         if (ratio != kvm_default_tsc_scaling_ratio)
1399                 _tsc = __scale_tsc(ratio, tsc);
1400
1401         return _tsc;
1402 }
1403 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1404
1405 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1406 {
1407         u64 tsc;
1408
1409         tsc = kvm_scale_tsc(vcpu, rdtsc());
1410
1411         return target_tsc - tsc;
1412 }
1413
1414 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1415 {
1416         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1417 }
1418 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1419
1420 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1421 {
1422         struct kvm *kvm = vcpu->kvm;
1423         u64 offset, ns, elapsed;
1424         unsigned long flags;
1425         s64 usdiff;
1426         bool matched;
1427         bool already_matched;
1428         u64 data = msr->data;
1429
1430         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1431         offset = kvm_compute_tsc_offset(vcpu, data);
1432         ns = get_kernel_ns();
1433         elapsed = ns - kvm->arch.last_tsc_nsec;
1434
1435         if (vcpu->arch.virtual_tsc_khz) {
1436                 int faulted = 0;
1437
1438                 /* n.b - signed multiplication and division required */
1439                 usdiff = data - kvm->arch.last_tsc_write;
1440 #ifdef CONFIG_X86_64
1441                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1442 #else
1443                 /* do_div() only does unsigned */
1444                 asm("1: idivl %[divisor]\n"
1445                     "2: xor %%edx, %%edx\n"
1446                     "   movl $0, %[faulted]\n"
1447                     "3:\n"
1448                     ".section .fixup,\"ax\"\n"
1449                     "4: movl $1, %[faulted]\n"
1450                     "   jmp  3b\n"
1451                     ".previous\n"
1452
1453                 _ASM_EXTABLE(1b, 4b)
1454
1455                 : "=A"(usdiff), [faulted] "=r" (faulted)
1456                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1457
1458 #endif
1459                 do_div(elapsed, 1000);
1460                 usdiff -= elapsed;
1461                 if (usdiff < 0)
1462                         usdiff = -usdiff;
1463
1464                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1465                 if (faulted)
1466                         usdiff = USEC_PER_SEC;
1467         } else
1468                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1469
1470         /*
1471          * Special case: TSC write with a small delta (1 second) of virtual
1472          * cycle time against real time is interpreted as an attempt to
1473          * synchronize the CPU.
1474          *
1475          * For a reliable TSC, we can match TSC offsets, and for an unstable
1476          * TSC, we add elapsed time in this computation.  We could let the
1477          * compensation code attempt to catch up if we fall behind, but
1478          * it's better to try to match offsets from the beginning.
1479          */
1480         if (usdiff < USEC_PER_SEC &&
1481             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1482                 if (!check_tsc_unstable()) {
1483                         offset = kvm->arch.cur_tsc_offset;
1484                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1485                 } else {
1486                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1487                         data += delta;
1488                         offset = kvm_compute_tsc_offset(vcpu, data);
1489                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1490                 }
1491                 matched = true;
1492                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1493         } else {
1494                 /*
1495                  * We split periods of matched TSC writes into generations.
1496                  * For each generation, we track the original measured
1497                  * nanosecond time, offset, and write, so if TSCs are in
1498                  * sync, we can match exact offset, and if not, we can match
1499                  * exact software computation in compute_guest_tsc()
1500                  *
1501                  * These values are tracked in kvm->arch.cur_xxx variables.
1502                  */
1503                 kvm->arch.cur_tsc_generation++;
1504                 kvm->arch.cur_tsc_nsec = ns;
1505                 kvm->arch.cur_tsc_write = data;
1506                 kvm->arch.cur_tsc_offset = offset;
1507                 matched = false;
1508                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509                          kvm->arch.cur_tsc_generation, data);
1510         }
1511
1512         /*
1513          * We also track th most recent recorded KHZ, write and time to
1514          * allow the matching interval to be extended at each write.
1515          */
1516         kvm->arch.last_tsc_nsec = ns;
1517         kvm->arch.last_tsc_write = data;
1518         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1519
1520         vcpu->arch.last_guest_tsc = data;
1521
1522         /* Keep track of which generation this VCPU has synchronized to */
1523         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1524         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1525         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1526
1527         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1528                 update_ia32_tsc_adjust_msr(vcpu, offset);
1529         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1530         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1531
1532         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1533         if (!matched) {
1534                 kvm->arch.nr_vcpus_matched_tsc = 0;
1535         } else if (!already_matched) {
1536                 kvm->arch.nr_vcpus_matched_tsc++;
1537         }
1538
1539         kvm_track_tsc_matching(vcpu);
1540         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1541 }
1542
1543 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1544
1545 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1546                                            s64 adjustment)
1547 {
1548         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1549 }
1550
1551 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1552 {
1553         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1554                 WARN_ON(adjustment < 0);
1555         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1556         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1557 }
1558
1559 #ifdef CONFIG_X86_64
1560
1561 static cycle_t read_tsc(void)
1562 {
1563         cycle_t ret = (cycle_t)rdtsc_ordered();
1564         u64 last = pvclock_gtod_data.clock.cycle_last;
1565
1566         if (likely(ret >= last))
1567                 return ret;
1568
1569         /*
1570          * GCC likes to generate cmov here, but this branch is extremely
1571          * predictable (it's just a funciton of time and the likely is
1572          * very likely) and there's a data dependence, so force GCC
1573          * to generate a branch instead.  I don't barrier() because
1574          * we don't actually need a barrier, and if this function
1575          * ever gets inlined it will generate worse code.
1576          */
1577         asm volatile ("");
1578         return last;
1579 }
1580
1581 static inline u64 vgettsc(cycle_t *cycle_now)
1582 {
1583         long v;
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585
1586         *cycle_now = read_tsc();
1587
1588         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1589         return v * gtod->clock.mult;
1590 }
1591
1592 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1593 {
1594         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1595         unsigned long seq;
1596         int mode;
1597         u64 ns;
1598
1599         do {
1600                 seq = read_seqcount_begin(&gtod->seq);
1601                 mode = gtod->clock.vclock_mode;
1602                 ns = gtod->nsec_base;
1603                 ns += vgettsc(cycle_now);
1604                 ns >>= gtod->clock.shift;
1605                 ns += gtod->boot_ns;
1606         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1607         *t = ns;
1608
1609         return mode;
1610 }
1611
1612 /* returns true if host is using tsc clocksource */
1613 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1614 {
1615         /* checked again under seqlock below */
1616         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1617                 return false;
1618
1619         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1620 }
1621 #endif
1622
1623 /*
1624  *
1625  * Assuming a stable TSC across physical CPUS, and a stable TSC
1626  * across virtual CPUs, the following condition is possible.
1627  * Each numbered line represents an event visible to both
1628  * CPUs at the next numbered event.
1629  *
1630  * "timespecX" represents host monotonic time. "tscX" represents
1631  * RDTSC value.
1632  *
1633  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1634  *
1635  * 1.  read timespec0,tsc0
1636  * 2.                                   | timespec1 = timespec0 + N
1637  *                                      | tsc1 = tsc0 + M
1638  * 3. transition to guest               | transition to guest
1639  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1640  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1641  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1642  *
1643  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1644  *
1645  *      - ret0 < ret1
1646  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1647  *              ...
1648  *      - 0 < N - M => M < N
1649  *
1650  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1651  * always the case (the difference between two distinct xtime instances
1652  * might be smaller then the difference between corresponding TSC reads,
1653  * when updating guest vcpus pvclock areas).
1654  *
1655  * To avoid that problem, do not allow visibility of distinct
1656  * system_timestamp/tsc_timestamp values simultaneously: use a master
1657  * copy of host monotonic time values. Update that master copy
1658  * in lockstep.
1659  *
1660  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1661  *
1662  */
1663
1664 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1665 {
1666 #ifdef CONFIG_X86_64
1667         struct kvm_arch *ka = &kvm->arch;
1668         int vclock_mode;
1669         bool host_tsc_clocksource, vcpus_matched;
1670
1671         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1672                         atomic_read(&kvm->online_vcpus));
1673
1674         /*
1675          * If the host uses TSC clock, then passthrough TSC as stable
1676          * to the guest.
1677          */
1678         host_tsc_clocksource = kvm_get_time_and_clockread(
1679                                         &ka->master_kernel_ns,
1680                                         &ka->master_cycle_now);
1681
1682         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1683                                 && !backwards_tsc_observed
1684                                 && !ka->boot_vcpu_runs_old_kvmclock;
1685
1686         if (ka->use_master_clock)
1687                 atomic_set(&kvm_guest_has_master_clock, 1);
1688
1689         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1690         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1691                                         vcpus_matched);
1692 #endif
1693 }
1694
1695 static void kvm_gen_update_masterclock(struct kvm *kvm)
1696 {
1697 #ifdef CONFIG_X86_64
1698         int i;
1699         struct kvm_vcpu *vcpu;
1700         struct kvm_arch *ka = &kvm->arch;
1701
1702         spin_lock(&ka->pvclock_gtod_sync_lock);
1703         kvm_make_mclock_inprogress_request(kvm);
1704         /* no guest entries from this point */
1705         pvclock_update_vm_gtod_copy(kvm);
1706
1707         kvm_for_each_vcpu(i, vcpu, kvm)
1708                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1709
1710         /* guest entries allowed */
1711         kvm_for_each_vcpu(i, vcpu, kvm)
1712                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1713
1714         spin_unlock(&ka->pvclock_gtod_sync_lock);
1715 #endif
1716 }
1717
1718 static int kvm_guest_time_update(struct kvm_vcpu *v)
1719 {
1720         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1721         struct kvm_vcpu_arch *vcpu = &v->arch;
1722         struct kvm_arch *ka = &v->kvm->arch;
1723         s64 kernel_ns;
1724         u64 tsc_timestamp, host_tsc;
1725         struct pvclock_vcpu_time_info guest_hv_clock;
1726         u8 pvclock_flags;
1727         bool use_master_clock;
1728
1729         kernel_ns = 0;
1730         host_tsc = 0;
1731
1732         /*
1733          * If the host uses TSC clock, then passthrough TSC as stable
1734          * to the guest.
1735          */
1736         spin_lock(&ka->pvclock_gtod_sync_lock);
1737         use_master_clock = ka->use_master_clock;
1738         if (use_master_clock) {
1739                 host_tsc = ka->master_cycle_now;
1740                 kernel_ns = ka->master_kernel_ns;
1741         }
1742         spin_unlock(&ka->pvclock_gtod_sync_lock);
1743
1744         /* Keep irq disabled to prevent changes to the clock */
1745         local_irq_save(flags);
1746         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1747         if (unlikely(this_tsc_khz == 0)) {
1748                 local_irq_restore(flags);
1749                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1750                 return 1;
1751         }
1752         if (!use_master_clock) {
1753                 host_tsc = rdtsc();
1754                 kernel_ns = get_kernel_ns();
1755         }
1756
1757         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1758
1759         /*
1760          * We may have to catch up the TSC to match elapsed wall clock
1761          * time for two reasons, even if kvmclock is used.
1762          *   1) CPU could have been running below the maximum TSC rate
1763          *   2) Broken TSC compensation resets the base at each VCPU
1764          *      entry to avoid unknown leaps of TSC even when running
1765          *      again on the same CPU.  This may cause apparent elapsed
1766          *      time to disappear, and the guest to stand still or run
1767          *      very slowly.
1768          */
1769         if (vcpu->tsc_catchup) {
1770                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1771                 if (tsc > tsc_timestamp) {
1772                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1773                         tsc_timestamp = tsc;
1774                 }
1775         }
1776
1777         local_irq_restore(flags);
1778
1779         if (!vcpu->pv_time_enabled)
1780                 return 0;
1781
1782         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1783                 tgt_tsc_khz = kvm_has_tsc_control ?
1784                         vcpu->virtual_tsc_khz : this_tsc_khz;
1785                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1786                                    &vcpu->hv_clock.tsc_shift,
1787                                    &vcpu->hv_clock.tsc_to_system_mul);
1788                 vcpu->hw_tsc_khz = this_tsc_khz;
1789         }
1790
1791         /* With all the info we got, fill in the values */
1792         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1793         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1794         vcpu->last_guest_tsc = tsc_timestamp;
1795
1796         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1797                 &guest_hv_clock, sizeof(guest_hv_clock))))
1798                 return 0;
1799
1800         /* This VCPU is paused, but it's legal for a guest to read another
1801          * VCPU's kvmclock, so we really have to follow the specification where
1802          * it says that version is odd if data is being modified, and even after
1803          * it is consistent.
1804          *
1805          * Version field updates must be kept separate.  This is because
1806          * kvm_write_guest_cached might use a "rep movs" instruction, and
1807          * writes within a string instruction are weakly ordered.  So there
1808          * are three writes overall.
1809          *
1810          * As a small optimization, only write the version field in the first
1811          * and third write.  The vcpu->pv_time cache is still valid, because the
1812          * version field is the first in the struct.
1813          */
1814         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1815
1816         if (guest_hv_clock.version & 1)
1817                 ++guest_hv_clock.version;  /* first time write, random junk */
1818
1819         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1820         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1821                                 &vcpu->hv_clock,
1822                                 sizeof(vcpu->hv_clock.version));
1823
1824         smp_wmb();
1825
1826         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1827         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1828
1829         if (vcpu->pvclock_set_guest_stopped_request) {
1830                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1831                 vcpu->pvclock_set_guest_stopped_request = false;
1832         }
1833
1834         /* If the host uses TSC clocksource, then it is stable */
1835         if (use_master_clock)
1836                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1837
1838         vcpu->hv_clock.flags = pvclock_flags;
1839
1840         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1841
1842         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1843                                 &vcpu->hv_clock,
1844                                 sizeof(vcpu->hv_clock));
1845
1846         smp_wmb();
1847
1848         vcpu->hv_clock.version++;
1849         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1850                                 &vcpu->hv_clock,
1851                                 sizeof(vcpu->hv_clock.version));
1852         return 0;
1853 }
1854
1855 /*
1856  * kvmclock updates which are isolated to a given vcpu, such as
1857  * vcpu->cpu migration, should not allow system_timestamp from
1858  * the rest of the vcpus to remain static. Otherwise ntp frequency
1859  * correction applies to one vcpu's system_timestamp but not
1860  * the others.
1861  *
1862  * So in those cases, request a kvmclock update for all vcpus.
1863  * We need to rate-limit these requests though, as they can
1864  * considerably slow guests that have a large number of vcpus.
1865  * The time for a remote vcpu to update its kvmclock is bound
1866  * by the delay we use to rate-limit the updates.
1867  */
1868
1869 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1870
1871 static void kvmclock_update_fn(struct work_struct *work)
1872 {
1873         int i;
1874         struct delayed_work *dwork = to_delayed_work(work);
1875         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1876                                            kvmclock_update_work);
1877         struct kvm *kvm = container_of(ka, struct kvm, arch);
1878         struct kvm_vcpu *vcpu;
1879
1880         kvm_for_each_vcpu(i, vcpu, kvm) {
1881                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1882                 kvm_vcpu_kick(vcpu);
1883         }
1884 }
1885
1886 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1887 {
1888         struct kvm *kvm = v->kvm;
1889
1890         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1891         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1892                                         KVMCLOCK_UPDATE_DELAY);
1893 }
1894
1895 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1896
1897 static void kvmclock_sync_fn(struct work_struct *work)
1898 {
1899         struct delayed_work *dwork = to_delayed_work(work);
1900         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1901                                            kvmclock_sync_work);
1902         struct kvm *kvm = container_of(ka, struct kvm, arch);
1903
1904         if (!kvmclock_periodic_sync)
1905                 return;
1906
1907         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1908         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1909                                         KVMCLOCK_SYNC_PERIOD);
1910 }
1911
1912 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1913 {
1914         u64 mcg_cap = vcpu->arch.mcg_cap;
1915         unsigned bank_num = mcg_cap & 0xff;
1916
1917         switch (msr) {
1918         case MSR_IA32_MCG_STATUS:
1919                 vcpu->arch.mcg_status = data;
1920                 break;
1921         case MSR_IA32_MCG_CTL:
1922                 if (!(mcg_cap & MCG_CTL_P))
1923                         return 1;
1924                 if (data != 0 && data != ~(u64)0)
1925                         return -1;
1926                 vcpu->arch.mcg_ctl = data;
1927                 break;
1928         default:
1929                 if (msr >= MSR_IA32_MC0_CTL &&
1930                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1931                         u32 offset = msr - MSR_IA32_MC0_CTL;
1932                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1933                          * some Linux kernels though clear bit 10 in bank 4 to
1934                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1935                          * this to avoid an uncatched #GP in the guest
1936                          */
1937                         if ((offset & 0x3) == 0 &&
1938                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1939                                 return -1;
1940                         vcpu->arch.mce_banks[offset] = data;
1941                         break;
1942                 }
1943                 return 1;
1944         }
1945         return 0;
1946 }
1947
1948 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1949 {
1950         struct kvm *kvm = vcpu->kvm;
1951         int lm = is_long_mode(vcpu);
1952         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1953                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1954         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1955                 : kvm->arch.xen_hvm_config.blob_size_32;
1956         u32 page_num = data & ~PAGE_MASK;
1957         u64 page_addr = data & PAGE_MASK;
1958         u8 *page;
1959         int r;
1960
1961         r = -E2BIG;
1962         if (page_num >= blob_size)
1963                 goto out;
1964         r = -ENOMEM;
1965         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1966         if (IS_ERR(page)) {
1967                 r = PTR_ERR(page);
1968                 goto out;
1969         }
1970         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1971                 goto out_free;
1972         r = 0;
1973 out_free:
1974         kfree(page);
1975 out:
1976         return r;
1977 }
1978
1979 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1980 {
1981         gpa_t gpa = data & ~0x3f;
1982
1983         /* Bits 2:5 are reserved, Should be zero */
1984         if (data & 0x3c)
1985                 return 1;
1986
1987         vcpu->arch.apf.msr_val = data;
1988
1989         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1990                 kvm_clear_async_pf_completion_queue(vcpu);
1991                 kvm_async_pf_hash_reset(vcpu);
1992                 return 0;
1993         }
1994
1995         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1996                                         sizeof(u32)))
1997                 return 1;
1998
1999         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2000         kvm_async_pf_wakeup_all(vcpu);
2001         return 0;
2002 }
2003
2004 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2005 {
2006         vcpu->arch.pv_time_enabled = false;
2007 }
2008
2009 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2010 {
2011         u64 delta;
2012
2013         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2014                 return;
2015
2016         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2017         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2018         vcpu->arch.st.accum_steal = delta;
2019 }
2020
2021 static void record_steal_time(struct kvm_vcpu *vcpu)
2022 {
2023         accumulate_steal_time(vcpu);
2024
2025         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2026                 return;
2027
2028         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2029                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2030                 return;
2031
2032         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2033         vcpu->arch.st.steal.version += 2;
2034         vcpu->arch.st.accum_steal = 0;
2035
2036         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2037                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2038 }
2039
2040 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2041 {
2042         bool pr = false;
2043         u32 msr = msr_info->index;
2044         u64 data = msr_info->data;
2045
2046         switch (msr) {
2047         case MSR_AMD64_NB_CFG:
2048         case MSR_IA32_UCODE_REV:
2049         case MSR_IA32_UCODE_WRITE:
2050         case MSR_VM_HSAVE_PA:
2051         case MSR_AMD64_PATCH_LOADER:
2052         case MSR_AMD64_BU_CFG2:
2053                 break;
2054
2055         case MSR_EFER:
2056                 return set_efer(vcpu, data);
2057         case MSR_K7_HWCR:
2058                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2059                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2060                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2061                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2062                 if (data != 0) {
2063                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2064                                     data);
2065                         return 1;
2066                 }
2067                 break;
2068         case MSR_FAM10H_MMIO_CONF_BASE:
2069                 if (data != 0) {
2070                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2071                                     "0x%llx\n", data);
2072                         return 1;
2073                 }
2074                 break;
2075         case MSR_IA32_DEBUGCTLMSR:
2076                 if (!data) {
2077                         /* We support the non-activated case already */
2078                         break;
2079                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2080                         /* Values other than LBR and BTF are vendor-specific,
2081                            thus reserved and should throw a #GP */
2082                         return 1;
2083                 }
2084                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2085                             __func__, data);
2086                 break;
2087         case 0x200 ... 0x2ff:
2088                 return kvm_mtrr_set_msr(vcpu, msr, data);
2089         case MSR_IA32_APICBASE:
2090                 return kvm_set_apic_base(vcpu, msr_info);
2091         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2092                 return kvm_x2apic_msr_write(vcpu, msr, data);
2093         case MSR_IA32_TSCDEADLINE:
2094                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2095                 break;
2096         case MSR_IA32_TSC_ADJUST:
2097                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2098                         if (!msr_info->host_initiated) {
2099                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2100                                 adjust_tsc_offset_guest(vcpu, adj);
2101                         }
2102                         vcpu->arch.ia32_tsc_adjust_msr = data;
2103                 }
2104                 break;
2105         case MSR_IA32_MISC_ENABLE:
2106                 vcpu->arch.ia32_misc_enable_msr = data;
2107                 break;
2108         case MSR_IA32_SMBASE:
2109                 if (!msr_info->host_initiated)
2110                         return 1;
2111                 vcpu->arch.smbase = data;
2112                 break;
2113         case MSR_KVM_WALL_CLOCK_NEW:
2114         case MSR_KVM_WALL_CLOCK:
2115                 vcpu->kvm->arch.wall_clock = data;
2116                 kvm_write_wall_clock(vcpu->kvm, data);
2117                 break;
2118         case MSR_KVM_SYSTEM_TIME_NEW:
2119         case MSR_KVM_SYSTEM_TIME: {
2120                 u64 gpa_offset;
2121                 struct kvm_arch *ka = &vcpu->kvm->arch;
2122
2123                 kvmclock_reset(vcpu);
2124
2125                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2126                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2127
2128                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2129                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2130                                         &vcpu->requests);
2131
2132                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2133                 }
2134
2135                 vcpu->arch.time = data;
2136                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2137
2138                 /* we verify if the enable bit is set... */
2139                 if (!(data & 1))
2140                         break;
2141
2142                 gpa_offset = data & ~(PAGE_MASK | 1);
2143
2144                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2145                      &vcpu->arch.pv_time, data & ~1ULL,
2146                      sizeof(struct pvclock_vcpu_time_info)))
2147                         vcpu->arch.pv_time_enabled = false;
2148                 else
2149                         vcpu->arch.pv_time_enabled = true;
2150
2151                 break;
2152         }
2153         case MSR_KVM_ASYNC_PF_EN:
2154                 if (kvm_pv_enable_async_pf(vcpu, data))
2155                         return 1;
2156                 break;
2157         case MSR_KVM_STEAL_TIME:
2158
2159                 if (unlikely(!sched_info_on()))
2160                         return 1;
2161
2162                 if (data & KVM_STEAL_RESERVED_MASK)
2163                         return 1;
2164
2165                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2166                                                 data & KVM_STEAL_VALID_BITS,
2167                                                 sizeof(struct kvm_steal_time)))
2168                         return 1;
2169
2170                 vcpu->arch.st.msr_val = data;
2171
2172                 if (!(data & KVM_MSR_ENABLED))
2173                         break;
2174
2175                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2176
2177                 break;
2178         case MSR_KVM_PV_EOI_EN:
2179                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2180                         return 1;
2181                 break;
2182
2183         case MSR_IA32_MCG_CTL:
2184         case MSR_IA32_MCG_STATUS:
2185         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2186                 return set_msr_mce(vcpu, msr, data);
2187
2188         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2189         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2190                 pr = true; /* fall through */
2191         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2192         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2193                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2194                         return kvm_pmu_set_msr(vcpu, msr_info);
2195
2196                 if (pr || data != 0)
2197                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2198                                     "0x%x data 0x%llx\n", msr, data);
2199                 break;
2200         case MSR_K7_CLK_CTL:
2201                 /*
2202                  * Ignore all writes to this no longer documented MSR.
2203                  * Writes are only relevant for old K7 processors,
2204                  * all pre-dating SVM, but a recommended workaround from
2205                  * AMD for these chips. It is possible to specify the
2206                  * affected processor models on the command line, hence
2207                  * the need to ignore the workaround.
2208                  */
2209                 break;
2210         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2211         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2212         case HV_X64_MSR_CRASH_CTL:
2213                 return kvm_hv_set_msr_common(vcpu, msr, data,
2214                                              msr_info->host_initiated);
2215         case MSR_IA32_BBL_CR_CTL3:
2216                 /* Drop writes to this legacy MSR -- see rdmsr
2217                  * counterpart for further detail.
2218                  */
2219                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2220                 break;
2221         case MSR_AMD64_OSVW_ID_LENGTH:
2222                 if (!guest_cpuid_has_osvw(vcpu))
2223                         return 1;
2224                 vcpu->arch.osvw.length = data;
2225                 break;
2226         case MSR_AMD64_OSVW_STATUS:
2227                 if (!guest_cpuid_has_osvw(vcpu))
2228                         return 1;
2229                 vcpu->arch.osvw.status = data;
2230                 break;
2231         default:
2232                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2233                         return xen_hvm_config(vcpu, data);
2234                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2235                         return kvm_pmu_set_msr(vcpu, msr_info);
2236                 if (!ignore_msrs) {
2237                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2238                                     msr, data);
2239                         return 1;
2240                 } else {
2241                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2242                                     msr, data);
2243                         break;
2244                 }
2245         }
2246         return 0;
2247 }
2248 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2249
2250
2251 /*
2252  * Reads an msr value (of 'msr_index') into 'pdata'.
2253  * Returns 0 on success, non-0 otherwise.
2254  * Assumes vcpu_load() was already called.
2255  */
2256 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2257 {
2258         return kvm_x86_ops->get_msr(vcpu, msr);
2259 }
2260 EXPORT_SYMBOL_GPL(kvm_get_msr);
2261
2262 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2263 {
2264         u64 data;
2265         u64 mcg_cap = vcpu->arch.mcg_cap;
2266         unsigned bank_num = mcg_cap & 0xff;
2267
2268         switch (msr) {
2269         case MSR_IA32_P5_MC_ADDR:
2270         case MSR_IA32_P5_MC_TYPE:
2271                 data = 0;
2272                 break;
2273         case MSR_IA32_MCG_CAP:
2274                 data = vcpu->arch.mcg_cap;
2275                 break;
2276         case MSR_IA32_MCG_CTL:
2277                 if (!(mcg_cap & MCG_CTL_P))
2278                         return 1;
2279                 data = vcpu->arch.mcg_ctl;
2280                 break;
2281         case MSR_IA32_MCG_STATUS:
2282                 data = vcpu->arch.mcg_status;
2283                 break;
2284         default:
2285                 if (msr >= MSR_IA32_MC0_CTL &&
2286                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2287                         u32 offset = msr - MSR_IA32_MC0_CTL;
2288                         data = vcpu->arch.mce_banks[offset];
2289                         break;
2290                 }
2291                 return 1;
2292         }
2293         *pdata = data;
2294         return 0;
2295 }
2296
2297 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2298 {
2299         switch (msr_info->index) {
2300         case MSR_IA32_PLATFORM_ID:
2301         case MSR_IA32_EBL_CR_POWERON:
2302         case MSR_IA32_DEBUGCTLMSR:
2303         case MSR_IA32_LASTBRANCHFROMIP:
2304         case MSR_IA32_LASTBRANCHTOIP:
2305         case MSR_IA32_LASTINTFROMIP:
2306         case MSR_IA32_LASTINTTOIP:
2307         case MSR_K8_SYSCFG:
2308         case MSR_K8_TSEG_ADDR:
2309         case MSR_K8_TSEG_MASK:
2310         case MSR_K7_HWCR:
2311         case MSR_VM_HSAVE_PA:
2312         case MSR_K8_INT_PENDING_MSG:
2313         case MSR_AMD64_NB_CFG:
2314         case MSR_FAM10H_MMIO_CONF_BASE:
2315         case MSR_AMD64_BU_CFG2:
2316                 msr_info->data = 0;
2317                 break;
2318         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2319         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2320         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2321         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2322                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2323                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2324                 msr_info->data = 0;
2325                 break;
2326         case MSR_IA32_UCODE_REV:
2327                 msr_info->data = 0x100000000ULL;
2328                 break;
2329         case MSR_MTRRcap:
2330         case 0x200 ... 0x2ff:
2331                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2332         case 0xcd: /* fsb frequency */
2333                 msr_info->data = 3;
2334                 break;
2335                 /*
2336                  * MSR_EBC_FREQUENCY_ID
2337                  * Conservative value valid for even the basic CPU models.
2338                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2339                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2340                  * and 266MHz for model 3, or 4. Set Core Clock
2341                  * Frequency to System Bus Frequency Ratio to 1 (bits
2342                  * 31:24) even though these are only valid for CPU
2343                  * models > 2, however guests may end up dividing or
2344                  * multiplying by zero otherwise.
2345                  */
2346         case MSR_EBC_FREQUENCY_ID:
2347                 msr_info->data = 1 << 24;
2348                 break;
2349         case MSR_IA32_APICBASE:
2350                 msr_info->data = kvm_get_apic_base(vcpu);
2351                 break;
2352         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2353                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2354                 break;
2355         case MSR_IA32_TSCDEADLINE:
2356                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2357                 break;
2358         case MSR_IA32_TSC_ADJUST:
2359                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2360                 break;
2361         case MSR_IA32_MISC_ENABLE:
2362                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2363                 break;
2364         case MSR_IA32_SMBASE:
2365                 if (!msr_info->host_initiated)
2366                         return 1;
2367                 msr_info->data = vcpu->arch.smbase;
2368                 break;
2369         case MSR_IA32_PERF_STATUS:
2370                 /* TSC increment by tick */
2371                 msr_info->data = 1000ULL;
2372                 /* CPU multiplier */
2373                 msr_info->data |= (((uint64_t)4ULL) << 40);
2374                 break;
2375         case MSR_EFER:
2376                 msr_info->data = vcpu->arch.efer;
2377                 break;
2378         case MSR_KVM_WALL_CLOCK:
2379         case MSR_KVM_WALL_CLOCK_NEW:
2380                 msr_info->data = vcpu->kvm->arch.wall_clock;
2381                 break;
2382         case MSR_KVM_SYSTEM_TIME:
2383         case MSR_KVM_SYSTEM_TIME_NEW:
2384                 msr_info->data = vcpu->arch.time;
2385                 break;
2386         case MSR_KVM_ASYNC_PF_EN:
2387                 msr_info->data = vcpu->arch.apf.msr_val;
2388                 break;
2389         case MSR_KVM_STEAL_TIME:
2390                 msr_info->data = vcpu->arch.st.msr_val;
2391                 break;
2392         case MSR_KVM_PV_EOI_EN:
2393                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2394                 break;
2395         case MSR_IA32_P5_MC_ADDR:
2396         case MSR_IA32_P5_MC_TYPE:
2397         case MSR_IA32_MCG_CAP:
2398         case MSR_IA32_MCG_CTL:
2399         case MSR_IA32_MCG_STATUS:
2400         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2401                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2402         case MSR_K7_CLK_CTL:
2403                 /*
2404                  * Provide expected ramp-up count for K7. All other
2405                  * are set to zero, indicating minimum divisors for
2406                  * every field.
2407                  *
2408                  * This prevents guest kernels on AMD host with CPU
2409                  * type 6, model 8 and higher from exploding due to
2410                  * the rdmsr failing.
2411                  */
2412                 msr_info->data = 0x20000000;
2413                 break;
2414         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2415         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2416         case HV_X64_MSR_CRASH_CTL:
2417                 return kvm_hv_get_msr_common(vcpu,
2418                                              msr_info->index, &msr_info->data);
2419                 break;
2420         case MSR_IA32_BBL_CR_CTL3:
2421                 /* This legacy MSR exists but isn't fully documented in current
2422                  * silicon.  It is however accessed by winxp in very narrow
2423                  * scenarios where it sets bit #19, itself documented as
2424                  * a "reserved" bit.  Best effort attempt to source coherent
2425                  * read data here should the balance of the register be
2426                  * interpreted by the guest:
2427                  *
2428                  * L2 cache control register 3: 64GB range, 256KB size,
2429                  * enabled, latency 0x1, configured
2430                  */
2431                 msr_info->data = 0xbe702111;
2432                 break;
2433         case MSR_AMD64_OSVW_ID_LENGTH:
2434                 if (!guest_cpuid_has_osvw(vcpu))
2435                         return 1;
2436                 msr_info->data = vcpu->arch.osvw.length;
2437                 break;
2438         case MSR_AMD64_OSVW_STATUS:
2439                 if (!guest_cpuid_has_osvw(vcpu))
2440                         return 1;
2441                 msr_info->data = vcpu->arch.osvw.status;
2442                 break;
2443         default:
2444                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2445                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2446                 if (!ignore_msrs) {
2447                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2448                         return 1;
2449                 } else {
2450                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2451                         msr_info->data = 0;
2452                 }
2453                 break;
2454         }
2455         return 0;
2456 }
2457 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2458
2459 /*
2460  * Read or write a bunch of msrs. All parameters are kernel addresses.
2461  *
2462  * @return number of msrs set successfully.
2463  */
2464 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2465                     struct kvm_msr_entry *entries,
2466                     int (*do_msr)(struct kvm_vcpu *vcpu,
2467                                   unsigned index, u64 *data))
2468 {
2469         int i, idx;
2470
2471         idx = srcu_read_lock(&vcpu->kvm->srcu);
2472         for (i = 0; i < msrs->nmsrs; ++i)
2473                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2474                         break;
2475         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2476
2477         return i;
2478 }
2479
2480 /*
2481  * Read or write a bunch of msrs. Parameters are user addresses.
2482  *
2483  * @return number of msrs set successfully.
2484  */
2485 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2486                   int (*do_msr)(struct kvm_vcpu *vcpu,
2487                                 unsigned index, u64 *data),
2488                   int writeback)
2489 {
2490         struct kvm_msrs msrs;
2491         struct kvm_msr_entry *entries;
2492         int r, n;
2493         unsigned size;
2494
2495         r = -EFAULT;
2496         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2497                 goto out;
2498
2499         r = -E2BIG;
2500         if (msrs.nmsrs >= MAX_IO_MSRS)
2501                 goto out;
2502
2503         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2504         entries = memdup_user(user_msrs->entries, size);
2505         if (IS_ERR(entries)) {
2506                 r = PTR_ERR(entries);
2507                 goto out;
2508         }
2509
2510         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2511         if (r < 0)
2512                 goto out_free;
2513
2514         r = -EFAULT;
2515         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2516                 goto out_free;
2517
2518         r = n;
2519
2520 out_free:
2521         kfree(entries);
2522 out:
2523         return r;
2524 }
2525
2526 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2527 {
2528         int r;
2529
2530         switch (ext) {
2531         case KVM_CAP_IRQCHIP:
2532         case KVM_CAP_HLT:
2533         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2534         case KVM_CAP_SET_TSS_ADDR:
2535         case KVM_CAP_EXT_CPUID:
2536         case KVM_CAP_EXT_EMUL_CPUID:
2537         case KVM_CAP_CLOCKSOURCE:
2538         case KVM_CAP_PIT:
2539         case KVM_CAP_NOP_IO_DELAY:
2540         case KVM_CAP_MP_STATE:
2541         case KVM_CAP_SYNC_MMU:
2542         case KVM_CAP_USER_NMI:
2543         case KVM_CAP_REINJECT_CONTROL:
2544         case KVM_CAP_IRQ_INJECT_STATUS:
2545         case KVM_CAP_IOEVENTFD:
2546         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2547         case KVM_CAP_PIT2:
2548         case KVM_CAP_PIT_STATE2:
2549         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2550         case KVM_CAP_XEN_HVM:
2551         case KVM_CAP_ADJUST_CLOCK:
2552         case KVM_CAP_VCPU_EVENTS:
2553         case KVM_CAP_HYPERV:
2554         case KVM_CAP_HYPERV_VAPIC:
2555         case KVM_CAP_HYPERV_SPIN:
2556         case KVM_CAP_PCI_SEGMENT:
2557         case KVM_CAP_DEBUGREGS:
2558         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2559         case KVM_CAP_XSAVE:
2560         case KVM_CAP_ASYNC_PF:
2561         case KVM_CAP_GET_TSC_KHZ:
2562         case KVM_CAP_KVMCLOCK_CTRL:
2563         case KVM_CAP_READONLY_MEM:
2564         case KVM_CAP_HYPERV_TIME:
2565         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2566         case KVM_CAP_TSC_DEADLINE_TIMER:
2567         case KVM_CAP_ENABLE_CAP_VM:
2568         case KVM_CAP_DISABLE_QUIRKS:
2569         case KVM_CAP_SET_BOOT_CPU_ID:
2570         case KVM_CAP_SPLIT_IRQCHIP:
2571 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2572         case KVM_CAP_ASSIGN_DEV_IRQ:
2573         case KVM_CAP_PCI_2_3:
2574 #endif
2575                 r = 1;
2576                 break;
2577         case KVM_CAP_X86_SMM:
2578                 /* SMBASE is usually relocated above 1M on modern chipsets,
2579                  * and SMM handlers might indeed rely on 4G segment limits,
2580                  * so do not report SMM to be available if real mode is
2581                  * emulated via vm86 mode.  Still, do not go to great lengths
2582                  * to avoid userspace's usage of the feature, because it is a
2583                  * fringe case that is not enabled except via specific settings
2584                  * of the module parameters.
2585                  */
2586                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2587                 break;
2588         case KVM_CAP_COALESCED_MMIO:
2589                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2590                 break;
2591         case KVM_CAP_VAPIC:
2592                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2593                 break;
2594         case KVM_CAP_NR_VCPUS:
2595                 r = KVM_SOFT_MAX_VCPUS;
2596                 break;
2597         case KVM_CAP_MAX_VCPUS:
2598                 r = KVM_MAX_VCPUS;
2599                 break;
2600         case KVM_CAP_NR_MEMSLOTS:
2601                 r = KVM_USER_MEM_SLOTS;
2602                 break;
2603         case KVM_CAP_PV_MMU:    /* obsolete */
2604                 r = 0;
2605                 break;
2606 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2607         case KVM_CAP_IOMMU:
2608                 r = iommu_present(&pci_bus_type);
2609                 break;
2610 #endif
2611         case KVM_CAP_MCE:
2612                 r = KVM_MAX_MCE_BANKS;
2613                 break;
2614         case KVM_CAP_XCRS:
2615                 r = cpu_has_xsave;
2616                 break;
2617         case KVM_CAP_TSC_CONTROL:
2618                 r = kvm_has_tsc_control;
2619                 break;
2620         default:
2621                 r = 0;
2622                 break;
2623         }
2624         return r;
2625
2626 }
2627
2628 long kvm_arch_dev_ioctl(struct file *filp,
2629                         unsigned int ioctl, unsigned long arg)
2630 {
2631         void __user *argp = (void __user *)arg;
2632         long r;
2633
2634         switch (ioctl) {
2635         case KVM_GET_MSR_INDEX_LIST: {
2636                 struct kvm_msr_list __user *user_msr_list = argp;
2637                 struct kvm_msr_list msr_list;
2638                 unsigned n;
2639
2640                 r = -EFAULT;
2641                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2642                         goto out;
2643                 n = msr_list.nmsrs;
2644                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2645                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2646                         goto out;
2647                 r = -E2BIG;
2648                 if (n < msr_list.nmsrs)
2649                         goto out;
2650                 r = -EFAULT;
2651                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2652                                  num_msrs_to_save * sizeof(u32)))
2653                         goto out;
2654                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2655                                  &emulated_msrs,
2656                                  num_emulated_msrs * sizeof(u32)))
2657                         goto out;
2658                 r = 0;
2659                 break;
2660         }
2661         case KVM_GET_SUPPORTED_CPUID:
2662         case KVM_GET_EMULATED_CPUID: {
2663                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2664                 struct kvm_cpuid2 cpuid;
2665
2666                 r = -EFAULT;
2667                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2668                         goto out;
2669
2670                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2671                                             ioctl);
2672                 if (r)
2673                         goto out;
2674
2675                 r = -EFAULT;
2676                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2677                         goto out;
2678                 r = 0;
2679                 break;
2680         }
2681         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2682                 u64 mce_cap;
2683
2684                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2685                 r = -EFAULT;
2686                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2687                         goto out;
2688                 r = 0;
2689                 break;
2690         }
2691         default:
2692                 r = -EINVAL;
2693         }
2694 out:
2695         return r;
2696 }
2697
2698 static void wbinvd_ipi(void *garbage)
2699 {
2700         wbinvd();
2701 }
2702
2703 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2704 {
2705         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2706 }
2707
2708 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2709 {
2710         /* Address WBINVD may be executed by guest */
2711         if (need_emulate_wbinvd(vcpu)) {
2712                 if (kvm_x86_ops->has_wbinvd_exit())
2713                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2714                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2715                         smp_call_function_single(vcpu->cpu,
2716                                         wbinvd_ipi, NULL, 1);
2717         }
2718
2719         kvm_x86_ops->vcpu_load(vcpu, cpu);
2720
2721         /* Apply any externally detected TSC adjustments (due to suspend) */
2722         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2723                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2724                 vcpu->arch.tsc_offset_adjustment = 0;
2725                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2726         }
2727
2728         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2729                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2730                                 rdtsc() - vcpu->arch.last_host_tsc;
2731                 if (tsc_delta < 0)
2732                         mark_tsc_unstable("KVM discovered backwards TSC");
2733                 if (check_tsc_unstable()) {
2734                         u64 offset = kvm_compute_tsc_offset(vcpu,
2735                                                 vcpu->arch.last_guest_tsc);
2736                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2737                         vcpu->arch.tsc_catchup = 1;
2738                 }
2739                 /*
2740                  * On a host with synchronized TSC, there is no need to update
2741                  * kvmclock on vcpu->cpu migration
2742                  */
2743                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2744                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2745                 if (vcpu->cpu != cpu)
2746                         kvm_migrate_timers(vcpu);
2747                 vcpu->cpu = cpu;
2748         }
2749
2750         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2751 }
2752
2753 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2754 {
2755         kvm_x86_ops->vcpu_put(vcpu);
2756         kvm_put_guest_fpu(vcpu);
2757         vcpu->arch.last_host_tsc = rdtsc();
2758 }
2759
2760 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2761                                     struct kvm_lapic_state *s)
2762 {
2763         kvm_x86_ops->sync_pir_to_irr(vcpu);
2764         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2765
2766         return 0;
2767 }
2768
2769 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2770                                     struct kvm_lapic_state *s)
2771 {
2772         kvm_apic_post_state_restore(vcpu, s);
2773         update_cr8_intercept(vcpu);
2774
2775         return 0;
2776 }
2777
2778 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2779 {
2780         return (!lapic_in_kernel(vcpu) ||
2781                 kvm_apic_accept_pic_intr(vcpu));
2782 }
2783
2784 /*
2785  * if userspace requested an interrupt window, check that the
2786  * interrupt window is open.
2787  *
2788  * No need to exit to userspace if we already have an interrupt queued.
2789  */
2790 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2791 {
2792         return kvm_arch_interrupt_allowed(vcpu) &&
2793                 !kvm_cpu_has_interrupt(vcpu) &&
2794                 !kvm_event_needs_reinjection(vcpu) &&
2795                 kvm_cpu_accept_dm_intr(vcpu);
2796 }
2797
2798 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2799                                     struct kvm_interrupt *irq)
2800 {
2801         if (irq->irq >= KVM_NR_INTERRUPTS)
2802                 return -EINVAL;
2803
2804         if (!irqchip_in_kernel(vcpu->kvm)) {
2805                 kvm_queue_interrupt(vcpu, irq->irq, false);
2806                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2807                 return 0;
2808         }
2809
2810         /*
2811          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2812          * fail for in-kernel 8259.
2813          */
2814         if (pic_in_kernel(vcpu->kvm))
2815                 return -ENXIO;
2816
2817         if (vcpu->arch.pending_external_vector != -1)
2818                 return -EEXIST;
2819
2820         vcpu->arch.pending_external_vector = irq->irq;
2821         kvm_make_request(KVM_REQ_EVENT, vcpu);
2822         return 0;
2823 }
2824
2825 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2826 {
2827         kvm_inject_nmi(vcpu);
2828
2829         return 0;
2830 }
2831
2832 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2833 {
2834         kvm_make_request(KVM_REQ_SMI, vcpu);
2835
2836         return 0;
2837 }
2838
2839 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2840                                            struct kvm_tpr_access_ctl *tac)
2841 {
2842         if (tac->flags)
2843                 return -EINVAL;
2844         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2845         return 0;
2846 }
2847
2848 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2849                                         u64 mcg_cap)
2850 {
2851         int r;
2852         unsigned bank_num = mcg_cap & 0xff, bank;
2853
2854         r = -EINVAL;
2855         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2856                 goto out;
2857         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2858                 goto out;
2859         r = 0;
2860         vcpu->arch.mcg_cap = mcg_cap;
2861         /* Init IA32_MCG_CTL to all 1s */
2862         if (mcg_cap & MCG_CTL_P)
2863                 vcpu->arch.mcg_ctl = ~(u64)0;
2864         /* Init IA32_MCi_CTL to all 1s */
2865         for (bank = 0; bank < bank_num; bank++)
2866                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2867 out:
2868         return r;
2869 }
2870
2871 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2872                                       struct kvm_x86_mce *mce)
2873 {
2874         u64 mcg_cap = vcpu->arch.mcg_cap;
2875         unsigned bank_num = mcg_cap & 0xff;
2876         u64 *banks = vcpu->arch.mce_banks;
2877
2878         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2879                 return -EINVAL;
2880         /*
2881          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2882          * reporting is disabled
2883          */
2884         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2885             vcpu->arch.mcg_ctl != ~(u64)0)
2886                 return 0;
2887         banks += 4 * mce->bank;
2888         /*
2889          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2890          * reporting is disabled for the bank
2891          */
2892         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2893                 return 0;
2894         if (mce->status & MCI_STATUS_UC) {
2895                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2896                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2897                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2898                         return 0;
2899                 }
2900                 if (banks[1] & MCI_STATUS_VAL)
2901                         mce->status |= MCI_STATUS_OVER;
2902                 banks[2] = mce->addr;
2903                 banks[3] = mce->misc;
2904                 vcpu->arch.mcg_status = mce->mcg_status;
2905                 banks[1] = mce->status;
2906                 kvm_queue_exception(vcpu, MC_VECTOR);
2907         } else if (!(banks[1] & MCI_STATUS_VAL)
2908                    || !(banks[1] & MCI_STATUS_UC)) {
2909                 if (banks[1] & MCI_STATUS_VAL)
2910                         mce->status |= MCI_STATUS_OVER;
2911                 banks[2] = mce->addr;
2912                 banks[3] = mce->misc;
2913                 banks[1] = mce->status;
2914         } else
2915                 banks[1] |= MCI_STATUS_OVER;
2916         return 0;
2917 }
2918
2919 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2920                                                struct kvm_vcpu_events *events)
2921 {
2922         process_nmi(vcpu);
2923         events->exception.injected =
2924                 vcpu->arch.exception.pending &&
2925                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2926         events->exception.nr = vcpu->arch.exception.nr;
2927         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2928         events->exception.pad = 0;
2929         events->exception.error_code = vcpu->arch.exception.error_code;
2930
2931         events->interrupt.injected =
2932                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2933         events->interrupt.nr = vcpu->arch.interrupt.nr;
2934         events->interrupt.soft = 0;
2935         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2936
2937         events->nmi.injected = vcpu->arch.nmi_injected;
2938         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2939         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2940         events->nmi.pad = 0;
2941
2942         events->sipi_vector = 0; /* never valid when reporting to user space */
2943
2944         events->smi.smm = is_smm(vcpu);
2945         events->smi.pending = vcpu->arch.smi_pending;
2946         events->smi.smm_inside_nmi =
2947                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2948         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2949
2950         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2951                          | KVM_VCPUEVENT_VALID_SHADOW
2952                          | KVM_VCPUEVENT_VALID_SMM);
2953         memset(&events->reserved, 0, sizeof(events->reserved));
2954 }
2955
2956 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
2957
2958 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2959                                               struct kvm_vcpu_events *events)
2960 {
2961         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2962                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2963                               | KVM_VCPUEVENT_VALID_SHADOW
2964                               | KVM_VCPUEVENT_VALID_SMM))
2965                 return -EINVAL;
2966
2967         /* INITs are latched while in SMM */
2968         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
2969             (events->smi.smm || events->smi.pending) &&
2970             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
2971                 return -EINVAL;
2972
2973         process_nmi(vcpu);
2974         vcpu->arch.exception.pending = events->exception.injected;
2975         vcpu->arch.exception.nr = events->exception.nr;
2976         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2977         vcpu->arch.exception.error_code = events->exception.error_code;
2978
2979         vcpu->arch.interrupt.pending = events->interrupt.injected;
2980         vcpu->arch.interrupt.nr = events->interrupt.nr;
2981         vcpu->arch.interrupt.soft = events->interrupt.soft;
2982         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2983                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2984                                                   events->interrupt.shadow);
2985
2986         vcpu->arch.nmi_injected = events->nmi.injected;
2987         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2988                 vcpu->arch.nmi_pending = events->nmi.pending;
2989         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2990
2991         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2992             kvm_vcpu_has_lapic(vcpu))
2993                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2994
2995         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2996                 u32 hflags = vcpu->arch.hflags;
2997                 if (events->smi.smm)
2998                         hflags |= HF_SMM_MASK;
2999                 else
3000                         hflags &= ~HF_SMM_MASK;
3001                 kvm_set_hflags(vcpu, hflags);
3002
3003                 vcpu->arch.smi_pending = events->smi.pending;
3004                 if (events->smi.smm_inside_nmi)
3005                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3006                 else
3007                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3008                 if (kvm_vcpu_has_lapic(vcpu)) {
3009                         if (events->smi.latched_init)
3010                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3011                         else
3012                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3013                 }
3014         }
3015
3016         kvm_make_request(KVM_REQ_EVENT, vcpu);
3017
3018         return 0;
3019 }
3020
3021 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3022                                              struct kvm_debugregs *dbgregs)
3023 {
3024         unsigned long val;
3025
3026         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3027         kvm_get_dr(vcpu, 6, &val);
3028         dbgregs->dr6 = val;
3029         dbgregs->dr7 = vcpu->arch.dr7;
3030         dbgregs->flags = 0;
3031         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3032 }
3033
3034 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3035                                             struct kvm_debugregs *dbgregs)
3036 {
3037         if (dbgregs->flags)
3038                 return -EINVAL;
3039
3040         if (dbgregs->dr6 & ~0xffffffffull)
3041                 return -EINVAL;
3042         if (dbgregs->dr7 & ~0xffffffffull)
3043                 return -EINVAL;
3044
3045         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3046         kvm_update_dr0123(vcpu);
3047         vcpu->arch.dr6 = dbgregs->dr6;
3048         kvm_update_dr6(vcpu);
3049         vcpu->arch.dr7 = dbgregs->dr7;
3050         kvm_update_dr7(vcpu);
3051
3052         return 0;
3053 }
3054
3055 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3056
3057 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3058 {
3059         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3060         u64 xstate_bv = xsave->header.xfeatures;
3061         u64 valid;
3062
3063         /*
3064          * Copy legacy XSAVE area, to avoid complications with CPUID
3065          * leaves 0 and 1 in the loop below.
3066          */
3067         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3068
3069         /* Set XSTATE_BV */
3070         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3071         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3072
3073         /*
3074          * Copy each region from the possibly compacted offset to the
3075          * non-compacted offset.
3076          */
3077         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3078         while (valid) {
3079                 u64 feature = valid & -valid;
3080                 int index = fls64(feature) - 1;
3081                 void *src = get_xsave_addr(xsave, feature);
3082
3083                 if (src) {
3084                         u32 size, offset, ecx, edx;
3085                         cpuid_count(XSTATE_CPUID, index,
3086                                     &size, &offset, &ecx, &edx);
3087                         memcpy(dest + offset, src, size);
3088                 }
3089
3090                 valid -= feature;
3091         }
3092 }
3093
3094 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3095 {
3096         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3097         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3098         u64 valid;
3099
3100         /*
3101          * Copy legacy XSAVE area, to avoid complications with CPUID
3102          * leaves 0 and 1 in the loop below.
3103          */
3104         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3105
3106         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3107         xsave->header.xfeatures = xstate_bv;
3108         if (cpu_has_xsaves)
3109                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3110
3111         /*
3112          * Copy each region from the non-compacted offset to the
3113          * possibly compacted offset.
3114          */
3115         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3116         while (valid) {
3117                 u64 feature = valid & -valid;
3118                 int index = fls64(feature) - 1;
3119                 void *dest = get_xsave_addr(xsave, feature);
3120
3121                 if (dest) {
3122                         u32 size, offset, ecx, edx;
3123                         cpuid_count(XSTATE_CPUID, index,
3124                                     &size, &offset, &ecx, &edx);
3125                         memcpy(dest, src + offset, size);
3126                 }
3127
3128                 valid -= feature;
3129         }
3130 }
3131
3132 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3133                                          struct kvm_xsave *guest_xsave)
3134 {
3135         if (cpu_has_xsave) {
3136                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3137                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3138         } else {
3139                 memcpy(guest_xsave->region,
3140                         &vcpu->arch.guest_fpu.state.fxsave,
3141                         sizeof(struct fxregs_state));
3142                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3143                         XFEATURE_MASK_FPSSE;
3144         }
3145 }
3146
3147 #define XSAVE_MXCSR_OFFSET 24
3148
3149 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3150                                         struct kvm_xsave *guest_xsave)
3151 {
3152         u64 xstate_bv =
3153                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3154         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3155
3156         if (cpu_has_xsave) {
3157                 /*
3158                  * Here we allow setting states that are not present in
3159                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3160                  * with old userspace.
3161                  */
3162                 if (xstate_bv & ~kvm_supported_xcr0() ||
3163                         mxcsr & ~mxcsr_feature_mask)
3164                         return -EINVAL;
3165                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3166         } else {
3167                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3168                         mxcsr & ~mxcsr_feature_mask)
3169                         return -EINVAL;
3170                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3171                         guest_xsave->region, sizeof(struct fxregs_state));
3172         }
3173         return 0;
3174 }
3175
3176 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3177                                         struct kvm_xcrs *guest_xcrs)
3178 {
3179         if (!cpu_has_xsave) {
3180                 guest_xcrs->nr_xcrs = 0;
3181                 return;
3182         }
3183
3184         guest_xcrs->nr_xcrs = 1;
3185         guest_xcrs->flags = 0;
3186         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3187         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3188 }
3189
3190 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3191                                        struct kvm_xcrs *guest_xcrs)
3192 {
3193         int i, r = 0;
3194
3195         if (!cpu_has_xsave)
3196                 return -EINVAL;
3197
3198         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3199                 return -EINVAL;
3200
3201         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3202                 /* Only support XCR0 currently */
3203                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3204                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3205                                 guest_xcrs->xcrs[i].value);
3206                         break;
3207                 }
3208         if (r)
3209                 r = -EINVAL;
3210         return r;
3211 }
3212
3213 /*
3214  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3215  * stopped by the hypervisor.  This function will be called from the host only.
3216  * EINVAL is returned when the host attempts to set the flag for a guest that
3217  * does not support pv clocks.
3218  */
3219 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3220 {
3221         if (!vcpu->arch.pv_time_enabled)
3222                 return -EINVAL;
3223         vcpu->arch.pvclock_set_guest_stopped_request = true;
3224         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3225         return 0;
3226 }
3227
3228 long kvm_arch_vcpu_ioctl(struct file *filp,
3229                          unsigned int ioctl, unsigned long arg)
3230 {
3231         struct kvm_vcpu *vcpu = filp->private_data;
3232         void __user *argp = (void __user *)arg;
3233         int r;
3234         union {
3235                 struct kvm_lapic_state *lapic;
3236                 struct kvm_xsave *xsave;
3237                 struct kvm_xcrs *xcrs;
3238                 void *buffer;
3239         } u;
3240
3241         u.buffer = NULL;
3242         switch (ioctl) {
3243         case KVM_GET_LAPIC: {
3244                 r = -EINVAL;
3245                 if (!vcpu->arch.apic)
3246                         goto out;
3247                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3248
3249                 r = -ENOMEM;
3250                 if (!u.lapic)
3251                         goto out;
3252                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3253                 if (r)
3254                         goto out;
3255                 r = -EFAULT;
3256                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3257                         goto out;
3258                 r = 0;
3259                 break;
3260         }
3261         case KVM_SET_LAPIC: {
3262                 r = -EINVAL;
3263                 if (!vcpu->arch.apic)
3264                         goto out;
3265                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3266                 if (IS_ERR(u.lapic))
3267                         return PTR_ERR(u.lapic);
3268
3269                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3270                 break;
3271         }
3272         case KVM_INTERRUPT: {
3273                 struct kvm_interrupt irq;
3274
3275                 r = -EFAULT;
3276                 if (copy_from_user(&irq, argp, sizeof irq))
3277                         goto out;
3278                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3279                 break;
3280         }
3281         case KVM_NMI: {
3282                 r = kvm_vcpu_ioctl_nmi(vcpu);
3283                 break;
3284         }
3285         case KVM_SMI: {
3286                 r = kvm_vcpu_ioctl_smi(vcpu);
3287                 break;
3288         }
3289         case KVM_SET_CPUID: {
3290                 struct kvm_cpuid __user *cpuid_arg = argp;
3291                 struct kvm_cpuid cpuid;
3292
3293                 r = -EFAULT;
3294                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3295                         goto out;
3296                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3297                 break;
3298         }
3299         case KVM_SET_CPUID2: {
3300                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3301                 struct kvm_cpuid2 cpuid;
3302
3303                 r = -EFAULT;
3304                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3305                         goto out;
3306                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3307                                               cpuid_arg->entries);
3308                 break;
3309         }
3310         case KVM_GET_CPUID2: {
3311                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3312                 struct kvm_cpuid2 cpuid;
3313
3314                 r = -EFAULT;
3315                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3316                         goto out;
3317                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3318                                               cpuid_arg->entries);
3319                 if (r)
3320                         goto out;
3321                 r = -EFAULT;
3322                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3323                         goto out;
3324                 r = 0;
3325                 break;
3326         }
3327         case KVM_GET_MSRS:
3328                 r = msr_io(vcpu, argp, do_get_msr, 1);
3329                 break;
3330         case KVM_SET_MSRS:
3331                 r = msr_io(vcpu, argp, do_set_msr, 0);
3332                 break;
3333         case KVM_TPR_ACCESS_REPORTING: {
3334                 struct kvm_tpr_access_ctl tac;
3335
3336                 r = -EFAULT;
3337                 if (copy_from_user(&tac, argp, sizeof tac))
3338                         goto out;
3339                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3340                 if (r)
3341                         goto out;
3342                 r = -EFAULT;
3343                 if (copy_to_user(argp, &tac, sizeof tac))
3344                         goto out;
3345                 r = 0;
3346                 break;
3347         };
3348         case KVM_SET_VAPIC_ADDR: {
3349                 struct kvm_vapic_addr va;
3350                 int idx;
3351
3352                 r = -EINVAL;
3353                 if (!lapic_in_kernel(vcpu))
3354                         goto out;
3355                 r = -EFAULT;
3356                 if (copy_from_user(&va, argp, sizeof va))
3357                         goto out;
3358                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3359                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3360                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3361                 break;
3362         }
3363         case KVM_X86_SETUP_MCE: {
3364                 u64 mcg_cap;
3365
3366                 r = -EFAULT;
3367                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3368                         goto out;
3369                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3370                 break;
3371         }
3372         case KVM_X86_SET_MCE: {
3373                 struct kvm_x86_mce mce;
3374
3375                 r = -EFAULT;
3376                 if (copy_from_user(&mce, argp, sizeof mce))
3377                         goto out;
3378                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3379                 break;
3380         }
3381         case KVM_GET_VCPU_EVENTS: {
3382                 struct kvm_vcpu_events events;
3383
3384                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3385
3386                 r = -EFAULT;
3387                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3388                         break;
3389                 r = 0;
3390                 break;
3391         }
3392         case KVM_SET_VCPU_EVENTS: {
3393                 struct kvm_vcpu_events events;
3394
3395                 r = -EFAULT;
3396                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3397                         break;
3398
3399                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3400                 break;
3401         }
3402         case KVM_GET_DEBUGREGS: {
3403                 struct kvm_debugregs dbgregs;
3404
3405                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3406
3407                 r = -EFAULT;
3408                 if (copy_to_user(argp, &dbgregs,
3409                                  sizeof(struct kvm_debugregs)))
3410                         break;
3411                 r = 0;
3412                 break;
3413         }
3414         case KVM_SET_DEBUGREGS: {
3415                 struct kvm_debugregs dbgregs;
3416
3417                 r = -EFAULT;
3418                 if (copy_from_user(&dbgregs, argp,
3419                                    sizeof(struct kvm_debugregs)))
3420                         break;
3421
3422                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3423                 break;
3424         }
3425         case KVM_GET_XSAVE: {
3426                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3427                 r = -ENOMEM;
3428                 if (!u.xsave)
3429                         break;
3430
3431                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3432
3433                 r = -EFAULT;
3434                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3435                         break;
3436                 r = 0;
3437                 break;
3438         }
3439         case KVM_SET_XSAVE: {
3440                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3441                 if (IS_ERR(u.xsave))
3442                         return PTR_ERR(u.xsave);
3443
3444                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3445                 break;
3446         }
3447         case KVM_GET_XCRS: {
3448                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3449                 r = -ENOMEM;
3450                 if (!u.xcrs)
3451                         break;
3452
3453                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3454
3455                 r = -EFAULT;
3456                 if (copy_to_user(argp, u.xcrs,
3457                                  sizeof(struct kvm_xcrs)))
3458                         break;
3459                 r = 0;
3460                 break;
3461         }
3462         case KVM_SET_XCRS: {
3463                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3464                 if (IS_ERR(u.xcrs))
3465                         return PTR_ERR(u.xcrs);
3466
3467                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3468                 break;
3469         }
3470         case KVM_SET_TSC_KHZ: {
3471                 u32 user_tsc_khz;
3472
3473                 r = -EINVAL;
3474                 user_tsc_khz = (u32)arg;
3475
3476                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3477                         goto out;
3478
3479                 if (user_tsc_khz == 0)
3480                         user_tsc_khz = tsc_khz;
3481
3482                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3483                         r = 0;
3484
3485                 goto out;
3486         }
3487         case KVM_GET_TSC_KHZ: {
3488                 r = vcpu->arch.virtual_tsc_khz;
3489                 goto out;
3490         }
3491         case KVM_KVMCLOCK_CTRL: {
3492                 r = kvm_set_guest_paused(vcpu);
3493                 goto out;
3494         }
3495         default:
3496                 r = -EINVAL;
3497         }
3498 out:
3499         kfree(u.buffer);
3500         return r;
3501 }
3502
3503 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3504 {
3505         return VM_FAULT_SIGBUS;
3506 }
3507
3508 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3509 {
3510         int ret;
3511
3512         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3513                 return -EINVAL;
3514         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3515         return ret;
3516 }
3517
3518 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3519                                               u64 ident_addr)
3520 {
3521         kvm->arch.ept_identity_map_addr = ident_addr;
3522         return 0;
3523 }
3524
3525 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3526                                           u32 kvm_nr_mmu_pages)
3527 {
3528         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3529                 return -EINVAL;
3530
3531         mutex_lock(&kvm->slots_lock);
3532
3533         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3534         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3535
3536         mutex_unlock(&kvm->slots_lock);
3537         return 0;
3538 }
3539
3540 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3541 {
3542         return kvm->arch.n_max_mmu_pages;
3543 }
3544
3545 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3546 {
3547         int r;
3548
3549         r = 0;
3550         switch (chip->chip_id) {
3551         case KVM_IRQCHIP_PIC_MASTER:
3552                 memcpy(&chip->chip.pic,
3553                         &pic_irqchip(kvm)->pics[0],
3554                         sizeof(struct kvm_pic_state));
3555                 break;
3556         case KVM_IRQCHIP_PIC_SLAVE:
3557                 memcpy(&chip->chip.pic,
3558                         &pic_irqchip(kvm)->pics[1],
3559                         sizeof(struct kvm_pic_state));
3560                 break;
3561         case KVM_IRQCHIP_IOAPIC:
3562                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3563                 break;
3564         default:
3565                 r = -EINVAL;
3566                 break;
3567         }
3568         return r;
3569 }
3570
3571 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3572 {
3573         int r;
3574
3575         r = 0;
3576         switch (chip->chip_id) {
3577         case KVM_IRQCHIP_PIC_MASTER:
3578                 spin_lock(&pic_irqchip(kvm)->lock);
3579                 memcpy(&pic_irqchip(kvm)->pics[0],
3580                         &chip->chip.pic,
3581                         sizeof(struct kvm_pic_state));
3582                 spin_unlock(&pic_irqchip(kvm)->lock);
3583                 break;
3584         case KVM_IRQCHIP_PIC_SLAVE:
3585                 spin_lock(&pic_irqchip(kvm)->lock);
3586                 memcpy(&pic_irqchip(kvm)->pics[1],
3587                         &chip->chip.pic,
3588                         sizeof(struct kvm_pic_state));
3589                 spin_unlock(&pic_irqchip(kvm)->lock);
3590                 break;
3591         case KVM_IRQCHIP_IOAPIC:
3592                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3593                 break;
3594         default:
3595                 r = -EINVAL;
3596                 break;
3597         }
3598         kvm_pic_update_irq(pic_irqchip(kvm));
3599         return r;
3600 }
3601
3602 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3603 {
3604         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3605         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3606         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3607         return 0;
3608 }
3609
3610 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3611 {
3612         int i;
3613         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3614         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3615         for (i = 0; i < 3; i++)
3616                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3617         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3618         return 0;
3619 }
3620
3621 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3622 {
3623         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3624         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3625                 sizeof(ps->channels));
3626         ps->flags = kvm->arch.vpit->pit_state.flags;
3627         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3628         memset(&ps->reserved, 0, sizeof(ps->reserved));
3629         return 0;
3630 }
3631
3632 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3633 {
3634         int start = 0;
3635         int i;
3636         u32 prev_legacy, cur_legacy;
3637         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3638         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3639         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3640         if (!prev_legacy && cur_legacy)
3641                 start = 1;
3642         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3643                sizeof(kvm->arch.vpit->pit_state.channels));
3644         kvm->arch.vpit->pit_state.flags = ps->flags;
3645         for (i = 0; i < 3; i++)
3646                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3647                                    start && i == 0);
3648         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3649         return 0;
3650 }
3651
3652 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3653                                  struct kvm_reinject_control *control)
3654 {
3655         if (!kvm->arch.vpit)
3656                 return -ENXIO;
3657         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3658         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3659         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3660         return 0;
3661 }
3662
3663 /**
3664  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3665  * @kvm: kvm instance
3666  * @log: slot id and address to which we copy the log
3667  *
3668  * Steps 1-4 below provide general overview of dirty page logging. See
3669  * kvm_get_dirty_log_protect() function description for additional details.
3670  *
3671  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3672  * always flush the TLB (step 4) even if previous step failed  and the dirty
3673  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3674  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3675  * writes will be marked dirty for next log read.
3676  *
3677  *   1. Take a snapshot of the bit and clear it if needed.
3678  *   2. Write protect the corresponding page.
3679  *   3. Copy the snapshot to the userspace.
3680  *   4. Flush TLB's if needed.
3681  */
3682 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3683 {
3684         bool is_dirty = false;
3685         int r;
3686
3687         mutex_lock(&kvm->slots_lock);
3688
3689         /*
3690          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3691          */
3692         if (kvm_x86_ops->flush_log_dirty)
3693                 kvm_x86_ops->flush_log_dirty(kvm);
3694
3695         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3696
3697         /*
3698          * All the TLBs can be flushed out of mmu lock, see the comments in
3699          * kvm_mmu_slot_remove_write_access().
3700          */
3701         lockdep_assert_held(&kvm->slots_lock);
3702         if (is_dirty)
3703                 kvm_flush_remote_tlbs(kvm);
3704
3705         mutex_unlock(&kvm->slots_lock);
3706         return r;
3707 }
3708
3709 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3710                         bool line_status)
3711 {
3712         if (!irqchip_in_kernel(kvm))
3713                 return -ENXIO;
3714
3715         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3716                                         irq_event->irq, irq_event->level,
3717                                         line_status);
3718         return 0;
3719 }
3720
3721 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3722                                    struct kvm_enable_cap *cap)
3723 {
3724         int r;
3725
3726         if (cap->flags)
3727                 return -EINVAL;
3728
3729         switch (cap->cap) {
3730         case KVM_CAP_DISABLE_QUIRKS:
3731                 kvm->arch.disabled_quirks = cap->args[0];
3732                 r = 0;
3733                 break;
3734         case KVM_CAP_SPLIT_IRQCHIP: {
3735                 mutex_lock(&kvm->lock);
3736                 r = -EINVAL;
3737                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3738                         goto split_irqchip_unlock;
3739                 r = -EEXIST;
3740                 if (irqchip_in_kernel(kvm))
3741                         goto split_irqchip_unlock;
3742                 if (atomic_read(&kvm->online_vcpus))
3743                         goto split_irqchip_unlock;
3744                 r = kvm_setup_empty_irq_routing(kvm);
3745                 if (r)
3746                         goto split_irqchip_unlock;
3747                 /* Pairs with irqchip_in_kernel. */
3748                 smp_wmb();
3749                 kvm->arch.irqchip_split = true;
3750                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3751                 r = 0;
3752 split_irqchip_unlock:
3753                 mutex_unlock(&kvm->lock);
3754                 break;
3755         }
3756         default:
3757                 r = -EINVAL;
3758                 break;
3759         }
3760         return r;
3761 }
3762
3763 long kvm_arch_vm_ioctl(struct file *filp,
3764                        unsigned int ioctl, unsigned long arg)
3765 {
3766         struct kvm *kvm = filp->private_data;
3767         void __user *argp = (void __user *)arg;
3768         int r = -ENOTTY;
3769         /*
3770          * This union makes it completely explicit to gcc-3.x
3771          * that these two variables' stack usage should be
3772          * combined, not added together.
3773          */
3774         union {
3775                 struct kvm_pit_state ps;
3776                 struct kvm_pit_state2 ps2;
3777                 struct kvm_pit_config pit_config;
3778         } u;
3779
3780         switch (ioctl) {
3781         case KVM_SET_TSS_ADDR:
3782                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3783                 break;
3784         case KVM_SET_IDENTITY_MAP_ADDR: {
3785                 u64 ident_addr;
3786
3787                 r = -EFAULT;
3788                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3789                         goto out;
3790                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3791                 break;
3792         }
3793         case KVM_SET_NR_MMU_PAGES:
3794                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3795                 break;
3796         case KVM_GET_NR_MMU_PAGES:
3797                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3798                 break;
3799         case KVM_CREATE_IRQCHIP: {
3800                 struct kvm_pic *vpic;
3801
3802                 mutex_lock(&kvm->lock);
3803                 r = -EEXIST;
3804                 if (kvm->arch.vpic)
3805                         goto create_irqchip_unlock;
3806                 r = -EINVAL;
3807                 if (atomic_read(&kvm->online_vcpus))
3808                         goto create_irqchip_unlock;
3809                 r = -ENOMEM;
3810                 vpic = kvm_create_pic(kvm);
3811                 if (vpic) {
3812                         r = kvm_ioapic_init(kvm);
3813                         if (r) {
3814                                 mutex_lock(&kvm->slots_lock);
3815                                 kvm_destroy_pic(vpic);
3816                                 mutex_unlock(&kvm->slots_lock);
3817                                 goto create_irqchip_unlock;
3818                         }
3819                 } else
3820                         goto create_irqchip_unlock;
3821                 r = kvm_setup_default_irq_routing(kvm);
3822                 if (r) {
3823                         mutex_lock(&kvm->slots_lock);
3824                         mutex_lock(&kvm->irq_lock);
3825                         kvm_ioapic_destroy(kvm);
3826                         kvm_destroy_pic(vpic);
3827                         mutex_unlock(&kvm->irq_lock);
3828                         mutex_unlock(&kvm->slots_lock);
3829                         goto create_irqchip_unlock;
3830                 }
3831                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3832                 smp_wmb();
3833                 kvm->arch.vpic = vpic;
3834         create_irqchip_unlock:
3835                 mutex_unlock(&kvm->lock);
3836                 break;
3837         }
3838         case KVM_CREATE_PIT:
3839                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3840                 goto create_pit;
3841         case KVM_CREATE_PIT2:
3842                 r = -EFAULT;
3843                 if (copy_from_user(&u.pit_config, argp,
3844                                    sizeof(struct kvm_pit_config)))
3845                         goto out;
3846         create_pit:
3847                 mutex_lock(&kvm->slots_lock);
3848                 r = -EEXIST;
3849                 if (kvm->arch.vpit)
3850                         goto create_pit_unlock;
3851                 r = -ENOMEM;
3852                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3853                 if (kvm->arch.vpit)
3854                         r = 0;
3855         create_pit_unlock:
3856                 mutex_unlock(&kvm->slots_lock);
3857                 break;
3858         case KVM_GET_IRQCHIP: {
3859                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3860                 struct kvm_irqchip *chip;
3861
3862                 chip = memdup_user(argp, sizeof(*chip));
3863                 if (IS_ERR(chip)) {
3864                         r = PTR_ERR(chip);
3865                         goto out;
3866                 }
3867
3868                 r = -ENXIO;
3869                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3870                         goto get_irqchip_out;
3871                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3872                 if (r)
3873                         goto get_irqchip_out;
3874                 r = -EFAULT;
3875                 if (copy_to_user(argp, chip, sizeof *chip))
3876                         goto get_irqchip_out;
3877                 r = 0;
3878         get_irqchip_out:
3879                 kfree(chip);
3880                 break;
3881         }
3882         case KVM_SET_IRQCHIP: {
3883                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3884                 struct kvm_irqchip *chip;
3885
3886                 chip = memdup_user(argp, sizeof(*chip));
3887                 if (IS_ERR(chip)) {
3888                         r = PTR_ERR(chip);
3889                         goto out;
3890                 }
3891
3892                 r = -ENXIO;
3893                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3894                         goto set_irqchip_out;
3895                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3896                 if (r)
3897                         goto set_irqchip_out;
3898                 r = 0;
3899         set_irqchip_out:
3900                 kfree(chip);
3901                 break;
3902         }
3903         case KVM_GET_PIT: {
3904                 r = -EFAULT;
3905                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3906                         goto out;
3907                 r = -ENXIO;
3908                 if (!kvm->arch.vpit)
3909                         goto out;
3910                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3911                 if (r)
3912                         goto out;
3913                 r = -EFAULT;
3914                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3915                         goto out;
3916                 r = 0;
3917                 break;
3918         }
3919         case KVM_SET_PIT: {
3920                 r = -EFAULT;
3921                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3922                         goto out;
3923                 r = -ENXIO;
3924                 if (!kvm->arch.vpit)
3925                         goto out;
3926                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3927                 break;
3928         }
3929         case KVM_GET_PIT2: {
3930                 r = -ENXIO;
3931                 if (!kvm->arch.vpit)
3932                         goto out;
3933                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3934                 if (r)
3935                         goto out;
3936                 r = -EFAULT;
3937                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3938                         goto out;
3939                 r = 0;
3940                 break;
3941         }
3942         case KVM_SET_PIT2: {
3943                 r = -EFAULT;
3944                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3945                         goto out;
3946                 r = -ENXIO;
3947                 if (!kvm->arch.vpit)
3948                         goto out;
3949                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3950                 break;
3951         }
3952         case KVM_REINJECT_CONTROL: {
3953                 struct kvm_reinject_control control;
3954                 r =  -EFAULT;
3955                 if (copy_from_user(&control, argp, sizeof(control)))
3956                         goto out;
3957                 r = kvm_vm_ioctl_reinject(kvm, &control);
3958                 break;
3959         }
3960         case KVM_SET_BOOT_CPU_ID:
3961                 r = 0;
3962                 mutex_lock(&kvm->lock);
3963                 if (atomic_read(&kvm->online_vcpus) != 0)
3964                         r = -EBUSY;
3965                 else
3966                         kvm->arch.bsp_vcpu_id = arg;
3967                 mutex_unlock(&kvm->lock);
3968                 break;
3969         case KVM_XEN_HVM_CONFIG: {
3970                 r = -EFAULT;
3971                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3972                                    sizeof(struct kvm_xen_hvm_config)))
3973                         goto out;
3974                 r = -EINVAL;
3975                 if (kvm->arch.xen_hvm_config.flags)
3976                         goto out;
3977                 r = 0;
3978                 break;
3979         }
3980         case KVM_SET_CLOCK: {
3981                 struct kvm_clock_data user_ns;
3982                 u64 now_ns;
3983                 s64 delta;
3984
3985                 r = -EFAULT;
3986                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3987                         goto out;
3988
3989                 r = -EINVAL;
3990                 if (user_ns.flags)
3991                         goto out;
3992
3993                 r = 0;
3994                 local_irq_disable();
3995                 now_ns = get_kernel_ns();
3996                 delta = user_ns.clock - now_ns;
3997                 local_irq_enable();
3998                 kvm->arch.kvmclock_offset = delta;
3999                 kvm_gen_update_masterclock(kvm);
4000                 break;
4001         }
4002         case KVM_GET_CLOCK: {
4003                 struct kvm_clock_data user_ns;
4004                 u64 now_ns;
4005
4006                 local_irq_disable();
4007                 now_ns = get_kernel_ns();
4008                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4009                 local_irq_enable();
4010                 user_ns.flags = 0;
4011                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4012
4013                 r = -EFAULT;
4014                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4015                         goto out;
4016                 r = 0;
4017                 break;
4018         }
4019         case KVM_ENABLE_CAP: {
4020                 struct kvm_enable_cap cap;
4021
4022                 r = -EFAULT;
4023                 if (copy_from_user(&cap, argp, sizeof(cap)))
4024                         goto out;
4025                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4026                 break;
4027         }
4028         default:
4029                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4030         }
4031 out:
4032         return r;
4033 }
4034
4035 static void kvm_init_msr_list(void)
4036 {
4037         u32 dummy[2];
4038         unsigned i, j;
4039
4040         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4041                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4042                         continue;
4043
4044                 /*
4045                  * Even MSRs that are valid in the host may not be exposed
4046                  * to the guests in some cases.
4047                  */
4048                 switch (msrs_to_save[i]) {
4049                 case MSR_IA32_BNDCFGS:
4050                         if (!kvm_x86_ops->mpx_supported())
4051                                 continue;
4052                         break;
4053                 case MSR_TSC_AUX:
4054                         if (!kvm_x86_ops->rdtscp_supported())
4055                                 continue;
4056                         break;
4057                 default:
4058                         break;
4059                 }
4060
4061                 if (j < i)
4062                         msrs_to_save[j] = msrs_to_save[i];
4063                 j++;
4064         }
4065         num_msrs_to_save = j;
4066
4067         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4068                 switch (emulated_msrs[i]) {
4069                 case MSR_IA32_SMBASE:
4070                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4071                                 continue;
4072                         break;
4073                 default:
4074                         break;
4075                 }
4076
4077                 if (j < i)
4078                         emulated_msrs[j] = emulated_msrs[i];
4079                 j++;
4080         }
4081         num_emulated_msrs = j;
4082 }
4083
4084 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4085                            const void *v)
4086 {
4087         int handled = 0;
4088         int n;
4089
4090         do {
4091                 n = min(len, 8);
4092                 if (!(vcpu->arch.apic &&
4093                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4094                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4095                         break;
4096                 handled += n;
4097                 addr += n;
4098                 len -= n;
4099                 v += n;
4100         } while (len);
4101
4102         return handled;
4103 }
4104
4105 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4106 {
4107         int handled = 0;
4108         int n;
4109
4110         do {
4111                 n = min(len, 8);
4112                 if (!(vcpu->arch.apic &&
4113                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4114                                          addr, n, v))
4115                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4116                         break;
4117                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4118                 handled += n;
4119                 addr += n;
4120                 len -= n;
4121                 v += n;
4122         } while (len);
4123
4124         return handled;
4125 }
4126
4127 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4128                         struct kvm_segment *var, int seg)
4129 {
4130         kvm_x86_ops->set_segment(vcpu, var, seg);
4131 }
4132
4133 void kvm_get_segment(struct kvm_vcpu *vcpu,
4134                      struct kvm_segment *var, int seg)
4135 {
4136         kvm_x86_ops->get_segment(vcpu, var, seg);
4137 }
4138
4139 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4140                            struct x86_exception *exception)
4141 {
4142         gpa_t t_gpa;
4143
4144         BUG_ON(!mmu_is_nested(vcpu));
4145
4146         /* NPT walks are always user-walks */
4147         access |= PFERR_USER_MASK;
4148         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4149
4150         return t_gpa;
4151 }
4152
4153 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4154                               struct x86_exception *exception)
4155 {
4156         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4157         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4158 }
4159
4160  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4161                                 struct x86_exception *exception)
4162 {
4163         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4164         access |= PFERR_FETCH_MASK;
4165         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4166 }
4167
4168 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4169                                struct x86_exception *exception)
4170 {
4171         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4172         access |= PFERR_WRITE_MASK;
4173         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4174 }
4175
4176 /* uses this to access any guest's mapped memory without checking CPL */
4177 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4178                                 struct x86_exception *exception)
4179 {
4180         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4181 }
4182
4183 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4184                                       struct kvm_vcpu *vcpu, u32 access,
4185                                       struct x86_exception *exception)
4186 {
4187         void *data = val;
4188         int r = X86EMUL_CONTINUE;
4189
4190         while (bytes) {
4191                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4192                                                             exception);
4193                 unsigned offset = addr & (PAGE_SIZE-1);
4194                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4195                 int ret;
4196
4197                 if (gpa == UNMAPPED_GVA)
4198                         return X86EMUL_PROPAGATE_FAULT;
4199                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4200                                                offset, toread);
4201                 if (ret < 0) {
4202                         r = X86EMUL_IO_NEEDED;
4203                         goto out;
4204                 }
4205
4206                 bytes -= toread;
4207                 data += toread;
4208                 addr += toread;
4209         }
4210 out:
4211         return r;
4212 }
4213
4214 /* used for instruction fetching */
4215 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4216                                 gva_t addr, void *val, unsigned int bytes,
4217                                 struct x86_exception *exception)
4218 {
4219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4220         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4221         unsigned offset;
4222         int ret;
4223
4224         /* Inline kvm_read_guest_virt_helper for speed.  */
4225         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4226                                                     exception);
4227         if (unlikely(gpa == UNMAPPED_GVA))
4228                 return X86EMUL_PROPAGATE_FAULT;
4229
4230         offset = addr & (PAGE_SIZE-1);
4231         if (WARN_ON(offset + bytes > PAGE_SIZE))
4232                 bytes = (unsigned)PAGE_SIZE - offset;
4233         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4234                                        offset, bytes);
4235         if (unlikely(ret < 0))
4236                 return X86EMUL_IO_NEEDED;
4237
4238         return X86EMUL_CONTINUE;
4239 }
4240
4241 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4242                                gva_t addr, void *val, unsigned int bytes,
4243                                struct x86_exception *exception)
4244 {
4245         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4246         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4247
4248         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4249                                           exception);
4250 }
4251 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4252
4253 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4254                                       gva_t addr, void *val, unsigned int bytes,
4255                                       struct x86_exception *exception)
4256 {
4257         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4258         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4259 }
4260
4261 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4262                 unsigned long addr, void *val, unsigned int bytes)
4263 {
4264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4265         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4266
4267         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4268 }
4269
4270 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4271                                        gva_t addr, void *val,
4272                                        unsigned int bytes,
4273                                        struct x86_exception *exception)
4274 {
4275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4276         void *data = val;
4277         int r = X86EMUL_CONTINUE;
4278
4279         while (bytes) {
4280                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4281                                                              PFERR_WRITE_MASK,
4282                                                              exception);
4283                 unsigned offset = addr & (PAGE_SIZE-1);
4284                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4285                 int ret;
4286
4287                 if (gpa == UNMAPPED_GVA)
4288                         return X86EMUL_PROPAGATE_FAULT;
4289                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4290                 if (ret < 0) {
4291                         r = X86EMUL_IO_NEEDED;
4292                         goto out;
4293                 }
4294
4295                 bytes -= towrite;
4296                 data += towrite;
4297                 addr += towrite;
4298         }
4299 out:
4300         return r;
4301 }
4302 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4303
4304 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4305                                 gpa_t *gpa, struct x86_exception *exception,
4306                                 bool write)
4307 {
4308         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4309                 | (write ? PFERR_WRITE_MASK : 0);
4310
4311         if (vcpu_match_mmio_gva(vcpu, gva)
4312             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4313                                  vcpu->arch.access, access)) {
4314                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4315                                         (gva & (PAGE_SIZE - 1));
4316                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4317                 return 1;
4318         }
4319
4320         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4321
4322         if (*gpa == UNMAPPED_GVA)
4323                 return -1;
4324
4325         /* For APIC access vmexit */
4326         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4327                 return 1;
4328
4329         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4330                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4331                 return 1;
4332         }
4333
4334         return 0;
4335 }
4336
4337 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4338                         const void *val, int bytes)
4339 {
4340         int ret;
4341
4342         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4343         if (ret < 0)
4344                 return 0;
4345         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4346         return 1;
4347 }
4348
4349 struct read_write_emulator_ops {
4350         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4351                                   int bytes);
4352         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4353                                   void *val, int bytes);
4354         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4355                                int bytes, void *val);
4356         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4357                                     void *val, int bytes);
4358         bool write;
4359 };
4360
4361 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4362 {
4363         if (vcpu->mmio_read_completed) {
4364                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4365                                vcpu->mmio_fragments[0].gpa, val);
4366                 vcpu->mmio_read_completed = 0;
4367                 return 1;
4368         }
4369
4370         return 0;
4371 }
4372
4373 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4374                         void *val, int bytes)
4375 {
4376         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4377 }
4378
4379 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4380                          void *val, int bytes)
4381 {
4382         return emulator_write_phys(vcpu, gpa, val, bytes);
4383 }
4384
4385 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4386 {
4387         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4388         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4389 }
4390
4391 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4392                           void *val, int bytes)
4393 {
4394         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4395         return X86EMUL_IO_NEEDED;
4396 }
4397
4398 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4399                            void *val, int bytes)
4400 {
4401         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4402
4403         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4404         return X86EMUL_CONTINUE;
4405 }
4406
4407 static const struct read_write_emulator_ops read_emultor = {
4408         .read_write_prepare = read_prepare,
4409         .read_write_emulate = read_emulate,
4410         .read_write_mmio = vcpu_mmio_read,
4411         .read_write_exit_mmio = read_exit_mmio,
4412 };
4413
4414 static const struct read_write_emulator_ops write_emultor = {
4415         .read_write_emulate = write_emulate,
4416         .read_write_mmio = write_mmio,
4417         .read_write_exit_mmio = write_exit_mmio,
4418         .write = true,
4419 };
4420
4421 static int emulator_read_write_onepage(unsigned long addr, void *val,
4422                                        unsigned int bytes,
4423                                        struct x86_exception *exception,
4424                                        struct kvm_vcpu *vcpu,
4425                                        const struct read_write_emulator_ops *ops)
4426 {
4427         gpa_t gpa;
4428         int handled, ret;
4429         bool write = ops->write;
4430         struct kvm_mmio_fragment *frag;
4431
4432         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4433
4434         if (ret < 0)
4435                 return X86EMUL_PROPAGATE_FAULT;
4436
4437         /* For APIC access vmexit */
4438         if (ret)
4439                 goto mmio;
4440
4441         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4442                 return X86EMUL_CONTINUE;
4443
4444 mmio:
4445         /*
4446          * Is this MMIO handled locally?
4447          */
4448         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4449         if (handled == bytes)
4450                 return X86EMUL_CONTINUE;
4451
4452         gpa += handled;
4453         bytes -= handled;
4454         val += handled;
4455
4456         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4457         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4458         frag->gpa = gpa;
4459         frag->data = val;
4460         frag->len = bytes;
4461         return X86EMUL_CONTINUE;
4462 }
4463
4464 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4465                         unsigned long addr,
4466                         void *val, unsigned int bytes,
4467                         struct x86_exception *exception,
4468                         const struct read_write_emulator_ops *ops)
4469 {
4470         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4471         gpa_t gpa;
4472         int rc;
4473
4474         if (ops->read_write_prepare &&
4475                   ops->read_write_prepare(vcpu, val, bytes))
4476                 return X86EMUL_CONTINUE;
4477
4478         vcpu->mmio_nr_fragments = 0;
4479
4480         /* Crossing a page boundary? */
4481         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4482                 int now;
4483
4484                 now = -addr & ~PAGE_MASK;
4485                 rc = emulator_read_write_onepage(addr, val, now, exception,
4486                                                  vcpu, ops);
4487
4488                 if (rc != X86EMUL_CONTINUE)
4489                         return rc;
4490                 addr += now;
4491                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4492                         addr = (u32)addr;
4493                 val += now;
4494                 bytes -= now;
4495         }
4496
4497         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4498                                          vcpu, ops);
4499         if (rc != X86EMUL_CONTINUE)
4500                 return rc;
4501
4502         if (!vcpu->mmio_nr_fragments)
4503                 return rc;
4504
4505         gpa = vcpu->mmio_fragments[0].gpa;
4506
4507         vcpu->mmio_needed = 1;
4508         vcpu->mmio_cur_fragment = 0;
4509
4510         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4511         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4512         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4513         vcpu->run->mmio.phys_addr = gpa;
4514
4515         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4516 }
4517
4518 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4519                                   unsigned long addr,
4520                                   void *val,
4521                                   unsigned int bytes,
4522                                   struct x86_exception *exception)
4523 {
4524         return emulator_read_write(ctxt, addr, val, bytes,
4525                                    exception, &read_emultor);
4526 }
4527
4528 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4529                             unsigned long addr,
4530                             const void *val,
4531                             unsigned int bytes,
4532                             struct x86_exception *exception)
4533 {
4534         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4535                                    exception, &write_emultor);
4536 }
4537
4538 #define CMPXCHG_TYPE(t, ptr, old, new) \
4539         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4540
4541 #ifdef CONFIG_X86_64
4542 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4543 #else
4544 #  define CMPXCHG64(ptr, old, new) \
4545         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4546 #endif
4547
4548 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4549                                      unsigned long addr,
4550                                      const void *old,
4551                                      const void *new,
4552                                      unsigned int bytes,
4553                                      struct x86_exception *exception)
4554 {
4555         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4556         gpa_t gpa;
4557         struct page *page;
4558         char *kaddr;
4559         bool exchanged;
4560
4561         /* guests cmpxchg8b have to be emulated atomically */
4562         if (bytes > 8 || (bytes & (bytes - 1)))
4563                 goto emul_write;
4564
4565         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4566
4567         if (gpa == UNMAPPED_GVA ||
4568             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4569                 goto emul_write;
4570
4571         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4572                 goto emul_write;
4573
4574         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4575         if (is_error_page(page))
4576                 goto emul_write;
4577
4578         kaddr = kmap_atomic(page);
4579         kaddr += offset_in_page(gpa);
4580         switch (bytes) {
4581         case 1:
4582                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4583                 break;
4584         case 2:
4585                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4586                 break;
4587         case 4:
4588                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4589                 break;
4590         case 8:
4591                 exchanged = CMPXCHG64(kaddr, old, new);
4592                 break;
4593         default:
4594                 BUG();
4595         }
4596         kunmap_atomic(kaddr);
4597         kvm_release_page_dirty(page);
4598
4599         if (!exchanged)
4600                 return X86EMUL_CMPXCHG_FAILED;
4601
4602         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4603         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4604
4605         return X86EMUL_CONTINUE;
4606
4607 emul_write:
4608         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4609
4610         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4611 }
4612
4613 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4614 {
4615         int r = 0, i;
4616
4617         for (i = 0; i < vcpu->arch.pio.count; i++) {
4618                 if (vcpu->arch.pio.in)
4619                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4620                                             vcpu->arch.pio.size, pd);
4621                 else
4622                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4623                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4624                                              pd);
4625                 if (r)
4626                         break;
4627                 pd += vcpu->arch.pio.size;
4628         }
4629         return r;
4630 }
4631
4632 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4633                                unsigned short port, void *val,
4634                                unsigned int count, bool in)
4635 {
4636         vcpu->arch.pio.port = port;
4637         vcpu->arch.pio.in = in;
4638         vcpu->arch.pio.count  = count;
4639         vcpu->arch.pio.size = size;
4640
4641         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4642                 vcpu->arch.pio.count = 0;
4643                 return 1;
4644         }
4645
4646         vcpu->run->exit_reason = KVM_EXIT_IO;
4647         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4648         vcpu->run->io.size = size;
4649         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4650         vcpu->run->io.count = count;
4651         vcpu->run->io.port = port;
4652
4653         return 0;
4654 }
4655
4656 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4657                                     int size, unsigned short port, void *val,
4658                                     unsigned int count)
4659 {
4660         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4661         int ret;
4662
4663         if (vcpu->arch.pio.count)
4664                 goto data_avail;
4665
4666         memset(vcpu->arch.pio_data, 0, size * count);
4667
4668         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4669         if (ret) {
4670 data_avail:
4671                 memcpy(val, vcpu->arch.pio_data, size * count);
4672                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4673                 vcpu->arch.pio.count = 0;
4674                 return 1;
4675         }
4676
4677         return 0;
4678 }
4679
4680 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4681                                      int size, unsigned short port,
4682                                      const void *val, unsigned int count)
4683 {
4684         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4685
4686         memcpy(vcpu->arch.pio_data, val, size * count);
4687         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4688         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4689 }
4690
4691 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4692 {
4693         return kvm_x86_ops->get_segment_base(vcpu, seg);
4694 }
4695
4696 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4697 {
4698         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4699 }
4700
4701 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4702 {
4703         if (!need_emulate_wbinvd(vcpu))
4704                 return X86EMUL_CONTINUE;
4705
4706         if (kvm_x86_ops->has_wbinvd_exit()) {
4707                 int cpu = get_cpu();
4708
4709                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4710                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4711                                 wbinvd_ipi, NULL, 1);
4712                 put_cpu();
4713                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4714         } else
4715                 wbinvd();
4716         return X86EMUL_CONTINUE;
4717 }
4718
4719 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4720 {
4721         kvm_x86_ops->skip_emulated_instruction(vcpu);
4722         return kvm_emulate_wbinvd_noskip(vcpu);
4723 }
4724 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4725
4726
4727
4728 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4729 {
4730         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4731 }
4732
4733 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4734                            unsigned long *dest)
4735 {
4736         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4737 }
4738
4739 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4740                            unsigned long value)
4741 {
4742
4743         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4744 }
4745
4746 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4747 {
4748         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4749 }
4750
4751 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4752 {
4753         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4754         unsigned long value;
4755
4756         switch (cr) {
4757         case 0:
4758                 value = kvm_read_cr0(vcpu);
4759                 break;
4760         case 2:
4761                 value = vcpu->arch.cr2;
4762                 break;
4763         case 3:
4764                 value = kvm_read_cr3(vcpu);
4765                 break;
4766         case 4:
4767                 value = kvm_read_cr4(vcpu);
4768                 break;
4769         case 8:
4770                 value = kvm_get_cr8(vcpu);
4771                 break;
4772         default:
4773                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4774                 return 0;
4775         }
4776
4777         return value;
4778 }
4779
4780 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4781 {
4782         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4783         int res = 0;
4784
4785         switch (cr) {
4786         case 0:
4787                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4788                 break;
4789         case 2:
4790                 vcpu->arch.cr2 = val;
4791                 break;
4792         case 3:
4793                 res = kvm_set_cr3(vcpu, val);
4794                 break;
4795         case 4:
4796                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4797                 break;
4798         case 8:
4799                 res = kvm_set_cr8(vcpu, val);
4800                 break;
4801         default:
4802                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4803                 res = -1;
4804         }
4805
4806         return res;
4807 }
4808
4809 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4810 {
4811         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4812 }
4813
4814 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4815 {
4816         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4817 }
4818
4819 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4820 {
4821         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4822 }
4823
4824 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4825 {
4826         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4827 }
4828
4829 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4830 {
4831         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4832 }
4833
4834 static unsigned long emulator_get_cached_segment_base(
4835         struct x86_emulate_ctxt *ctxt, int seg)
4836 {
4837         return get_segment_base(emul_to_vcpu(ctxt), seg);
4838 }
4839
4840 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4841                                  struct desc_struct *desc, u32 *base3,
4842                                  int seg)
4843 {
4844         struct kvm_segment var;
4845
4846         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4847         *selector = var.selector;
4848
4849         if (var.unusable) {
4850                 memset(desc, 0, sizeof(*desc));
4851                 if (base3)
4852                         *base3 = 0;
4853                 return false;
4854         }
4855
4856         if (var.g)
4857                 var.limit >>= 12;
4858         set_desc_limit(desc, var.limit);
4859         set_desc_base(desc, (unsigned long)var.base);
4860 #ifdef CONFIG_X86_64
4861         if (base3)
4862                 *base3 = var.base >> 32;
4863 #endif
4864         desc->type = var.type;
4865         desc->s = var.s;
4866         desc->dpl = var.dpl;
4867         desc->p = var.present;
4868         desc->avl = var.avl;
4869         desc->l = var.l;
4870         desc->d = var.db;
4871         desc->g = var.g;
4872
4873         return true;
4874 }
4875
4876 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4877                                  struct desc_struct *desc, u32 base3,
4878                                  int seg)
4879 {
4880         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4881         struct kvm_segment var;
4882
4883         var.selector = selector;
4884         var.base = get_desc_base(desc);
4885 #ifdef CONFIG_X86_64
4886         var.base |= ((u64)base3) << 32;
4887 #endif
4888         var.limit = get_desc_limit(desc);
4889         if (desc->g)
4890                 var.limit = (var.limit << 12) | 0xfff;
4891         var.type = desc->type;
4892         var.dpl = desc->dpl;
4893         var.db = desc->d;
4894         var.s = desc->s;
4895         var.l = desc->l;
4896         var.g = desc->g;
4897         var.avl = desc->avl;
4898         var.present = desc->p;
4899         var.unusable = !var.present;
4900         var.padding = 0;
4901
4902         kvm_set_segment(vcpu, &var, seg);
4903         return;
4904 }
4905
4906 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4907                             u32 msr_index, u64 *pdata)
4908 {
4909         struct msr_data msr;
4910         int r;
4911
4912         msr.index = msr_index;
4913         msr.host_initiated = false;
4914         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4915         if (r)
4916                 return r;
4917
4918         *pdata = msr.data;
4919         return 0;
4920 }
4921
4922 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4923                             u32 msr_index, u64 data)
4924 {
4925         struct msr_data msr;
4926
4927         msr.data = data;
4928         msr.index = msr_index;
4929         msr.host_initiated = false;
4930         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4931 }
4932
4933 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4934 {
4935         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4936
4937         return vcpu->arch.smbase;
4938 }
4939
4940 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4941 {
4942         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4943
4944         vcpu->arch.smbase = smbase;
4945 }
4946
4947 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4948                               u32 pmc)
4949 {
4950         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4951 }
4952
4953 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4954                              u32 pmc, u64 *pdata)
4955 {
4956         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4957 }
4958
4959 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4960 {
4961         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4962 }
4963
4964 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4965 {
4966         preempt_disable();
4967         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4968         /*
4969          * CR0.TS may reference the host fpu state, not the guest fpu state,
4970          * so it may be clear at this point.
4971          */
4972         clts();
4973 }
4974
4975 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4976 {
4977         preempt_enable();
4978 }
4979
4980 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4981                               struct x86_instruction_info *info,
4982                               enum x86_intercept_stage stage)
4983 {
4984         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4985 }
4986
4987 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4988                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4989 {
4990         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4991 }
4992
4993 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4994 {
4995         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4996 }
4997
4998 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4999 {
5000         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5001 }
5002
5003 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5004 {
5005         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5006 }
5007
5008 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5009 {
5010         return emul_to_vcpu(ctxt)->arch.hflags;
5011 }
5012
5013 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5014 {
5015         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5016 }
5017
5018 static const struct x86_emulate_ops emulate_ops = {
5019         .read_gpr            = emulator_read_gpr,
5020         .write_gpr           = emulator_write_gpr,
5021         .read_std            = kvm_read_guest_virt_system,
5022         .write_std           = kvm_write_guest_virt_system,
5023         .read_phys           = kvm_read_guest_phys_system,
5024         .fetch               = kvm_fetch_guest_virt,
5025         .read_emulated       = emulator_read_emulated,
5026         .write_emulated      = emulator_write_emulated,
5027         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5028         .invlpg              = emulator_invlpg,
5029         .pio_in_emulated     = emulator_pio_in_emulated,
5030         .pio_out_emulated    = emulator_pio_out_emulated,
5031         .get_segment         = emulator_get_segment,
5032         .set_segment         = emulator_set_segment,
5033         .get_cached_segment_base = emulator_get_cached_segment_base,
5034         .get_gdt             = emulator_get_gdt,
5035         .get_idt             = emulator_get_idt,
5036         .set_gdt             = emulator_set_gdt,
5037         .set_idt             = emulator_set_idt,
5038         .get_cr              = emulator_get_cr,
5039         .set_cr              = emulator_set_cr,
5040         .cpl                 = emulator_get_cpl,
5041         .get_dr              = emulator_get_dr,
5042         .set_dr              = emulator_set_dr,
5043         .get_smbase          = emulator_get_smbase,
5044         .set_smbase          = emulator_set_smbase,
5045         .set_msr             = emulator_set_msr,
5046         .get_msr             = emulator_get_msr,
5047         .check_pmc           = emulator_check_pmc,
5048         .read_pmc            = emulator_read_pmc,
5049         .halt                = emulator_halt,
5050         .wbinvd              = emulator_wbinvd,
5051         .fix_hypercall       = emulator_fix_hypercall,
5052         .get_fpu             = emulator_get_fpu,
5053         .put_fpu             = emulator_put_fpu,
5054         .intercept           = emulator_intercept,
5055         .get_cpuid           = emulator_get_cpuid,
5056         .set_nmi_mask        = emulator_set_nmi_mask,
5057         .get_hflags          = emulator_get_hflags,
5058         .set_hflags          = emulator_set_hflags,
5059 };
5060
5061 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5062 {
5063         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5064         /*
5065          * an sti; sti; sequence only disable interrupts for the first
5066          * instruction. So, if the last instruction, be it emulated or
5067          * not, left the system with the INT_STI flag enabled, it
5068          * means that the last instruction is an sti. We should not
5069          * leave the flag on in this case. The same goes for mov ss
5070          */
5071         if (int_shadow & mask)
5072                 mask = 0;
5073         if (unlikely(int_shadow || mask)) {
5074                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5075                 if (!mask)
5076                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5077         }
5078 }
5079
5080 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5081 {
5082         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5083         if (ctxt->exception.vector == PF_VECTOR)
5084                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5085
5086         if (ctxt->exception.error_code_valid)
5087                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5088                                       ctxt->exception.error_code);
5089         else
5090                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5091         return false;
5092 }
5093
5094 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5095 {
5096         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5097         int cs_db, cs_l;
5098
5099         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5100
5101         ctxt->eflags = kvm_get_rflags(vcpu);
5102         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5103
5104         ctxt->eip = kvm_rip_read(vcpu);
5105         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5106                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5107                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5108                      cs_db                              ? X86EMUL_MODE_PROT32 :
5109                                                           X86EMUL_MODE_PROT16;
5110         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5111         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5112         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5113
5114         init_decode_cache(ctxt);
5115         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5116 }
5117
5118 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5119 {
5120         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5121         int ret;
5122
5123         init_emulate_ctxt(vcpu);
5124
5125         ctxt->op_bytes = 2;
5126         ctxt->ad_bytes = 2;
5127         ctxt->_eip = ctxt->eip + inc_eip;
5128         ret = emulate_int_real(ctxt, irq);
5129
5130         if (ret != X86EMUL_CONTINUE)
5131                 return EMULATE_FAIL;
5132
5133         ctxt->eip = ctxt->_eip;
5134         kvm_rip_write(vcpu, ctxt->eip);
5135         kvm_set_rflags(vcpu, ctxt->eflags);
5136
5137         if (irq == NMI_VECTOR)
5138                 vcpu->arch.nmi_pending = 0;
5139         else
5140                 vcpu->arch.interrupt.pending = false;
5141
5142         return EMULATE_DONE;
5143 }
5144 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5145
5146 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5147 {
5148         int r = EMULATE_DONE;
5149
5150         ++vcpu->stat.insn_emulation_fail;
5151         trace_kvm_emulate_insn_failed(vcpu);
5152         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5153                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5154                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5155                 vcpu->run->internal.ndata = 0;
5156                 r = EMULATE_USER_EXIT;
5157         }
5158         kvm_queue_exception(vcpu, UD_VECTOR);
5159
5160         return r;
5161 }
5162
5163 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5164                                   bool write_fault_to_shadow_pgtable,
5165                                   int emulation_type)
5166 {
5167         gpa_t gpa = cr2;
5168         pfn_t pfn;
5169
5170         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5171                 return false;
5172
5173         if (!vcpu->arch.mmu.direct_map) {
5174                 /*
5175                  * Write permission should be allowed since only
5176                  * write access need to be emulated.
5177                  */
5178                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5179
5180                 /*
5181                  * If the mapping is invalid in guest, let cpu retry
5182                  * it to generate fault.
5183                  */
5184                 if (gpa == UNMAPPED_GVA)
5185                         return true;
5186         }
5187
5188         /*
5189          * Do not retry the unhandleable instruction if it faults on the
5190          * readonly host memory, otherwise it will goto a infinite loop:
5191          * retry instruction -> write #PF -> emulation fail -> retry
5192          * instruction -> ...
5193          */
5194         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5195
5196         /*
5197          * If the instruction failed on the error pfn, it can not be fixed,
5198          * report the error to userspace.
5199          */
5200         if (is_error_noslot_pfn(pfn))
5201                 return false;
5202
5203         kvm_release_pfn_clean(pfn);
5204
5205         /* The instructions are well-emulated on direct mmu. */
5206         if (vcpu->arch.mmu.direct_map) {
5207                 unsigned int indirect_shadow_pages;
5208
5209                 spin_lock(&vcpu->kvm->mmu_lock);
5210                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5211                 spin_unlock(&vcpu->kvm->mmu_lock);
5212
5213                 if (indirect_shadow_pages)
5214                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5215
5216                 return true;
5217         }
5218
5219         /*
5220          * if emulation was due to access to shadowed page table
5221          * and it failed try to unshadow page and re-enter the
5222          * guest to let CPU execute the instruction.
5223          */
5224         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5225
5226         /*
5227          * If the access faults on its page table, it can not
5228          * be fixed by unprotecting shadow page and it should
5229          * be reported to userspace.
5230          */
5231         return !write_fault_to_shadow_pgtable;
5232 }
5233
5234 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5235                               unsigned long cr2,  int emulation_type)
5236 {
5237         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5238         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5239
5240         last_retry_eip = vcpu->arch.last_retry_eip;
5241         last_retry_addr = vcpu->arch.last_retry_addr;
5242
5243         /*
5244          * If the emulation is caused by #PF and it is non-page_table
5245          * writing instruction, it means the VM-EXIT is caused by shadow
5246          * page protected, we can zap the shadow page and retry this
5247          * instruction directly.
5248          *
5249          * Note: if the guest uses a non-page-table modifying instruction
5250          * on the PDE that points to the instruction, then we will unmap
5251          * the instruction and go to an infinite loop. So, we cache the
5252          * last retried eip and the last fault address, if we meet the eip
5253          * and the address again, we can break out of the potential infinite
5254          * loop.
5255          */
5256         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5257
5258         if (!(emulation_type & EMULTYPE_RETRY))
5259                 return false;
5260
5261         if (x86_page_table_writing_insn(ctxt))
5262                 return false;
5263
5264         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5265                 return false;
5266
5267         vcpu->arch.last_retry_eip = ctxt->eip;
5268         vcpu->arch.last_retry_addr = cr2;
5269
5270         if (!vcpu->arch.mmu.direct_map)
5271                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5272
5273         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5274
5275         return true;
5276 }
5277
5278 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5279 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5280
5281 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5282 {
5283         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5284                 /* This is a good place to trace that we are exiting SMM.  */
5285                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5286
5287                 if (unlikely(vcpu->arch.smi_pending)) {
5288                         kvm_make_request(KVM_REQ_SMI, vcpu);
5289                         vcpu->arch.smi_pending = 0;
5290                 } else {
5291                         /* Process a latched INIT, if any.  */
5292                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5293                 }
5294         }
5295
5296         kvm_mmu_reset_context(vcpu);
5297 }
5298
5299 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5300 {
5301         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5302
5303         vcpu->arch.hflags = emul_flags;
5304
5305         if (changed & HF_SMM_MASK)
5306                 kvm_smm_changed(vcpu);
5307 }
5308
5309 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5310                                 unsigned long *db)
5311 {
5312         u32 dr6 = 0;
5313         int i;
5314         u32 enable, rwlen;
5315
5316         enable = dr7;
5317         rwlen = dr7 >> 16;
5318         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5319                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5320                         dr6 |= (1 << i);
5321         return dr6;
5322 }
5323
5324 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5325 {
5326         struct kvm_run *kvm_run = vcpu->run;
5327
5328         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5329                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5330                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5331                 kvm_run->debug.arch.exception = DB_VECTOR;
5332                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5333                 *r = EMULATE_USER_EXIT;
5334         } else {
5335                 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5336                 /*
5337                  * "Certain debug exceptions may clear bit 0-3.  The
5338                  * remaining contents of the DR6 register are never
5339                  * cleared by the processor".
5340                  */
5341                 vcpu->arch.dr6 &= ~15;
5342                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5343                 kvm_queue_exception(vcpu, DB_VECTOR);
5344         }
5345 }
5346
5347 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5348 {
5349         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5350             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5351                 struct kvm_run *kvm_run = vcpu->run;
5352                 unsigned long eip = kvm_get_linear_rip(vcpu);
5353                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5354                                            vcpu->arch.guest_debug_dr7,
5355                                            vcpu->arch.eff_db);
5356
5357                 if (dr6 != 0) {
5358                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5359                         kvm_run->debug.arch.pc = eip;
5360                         kvm_run->debug.arch.exception = DB_VECTOR;
5361                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5362                         *r = EMULATE_USER_EXIT;
5363                         return true;
5364                 }
5365         }
5366
5367         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5368             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5369                 unsigned long eip = kvm_get_linear_rip(vcpu);
5370                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5371                                            vcpu->arch.dr7,
5372                                            vcpu->arch.db);
5373
5374                 if (dr6 != 0) {
5375                         vcpu->arch.dr6 &= ~15;
5376                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5377                         kvm_queue_exception(vcpu, DB_VECTOR);
5378                         *r = EMULATE_DONE;
5379                         return true;
5380                 }
5381         }
5382
5383         return false;
5384 }
5385
5386 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5387                             unsigned long cr2,
5388                             int emulation_type,
5389                             void *insn,
5390                             int insn_len)
5391 {
5392         int r;
5393         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5394         bool writeback = true;
5395         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5396
5397         /*
5398          * Clear write_fault_to_shadow_pgtable here to ensure it is
5399          * never reused.
5400          */
5401         vcpu->arch.write_fault_to_shadow_pgtable = false;
5402         kvm_clear_exception_queue(vcpu);
5403
5404         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5405                 init_emulate_ctxt(vcpu);
5406
5407                 /*
5408                  * We will reenter on the same instruction since
5409                  * we do not set complete_userspace_io.  This does not
5410                  * handle watchpoints yet, those would be handled in
5411                  * the emulate_ops.
5412                  */
5413                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5414                         return r;
5415
5416                 ctxt->interruptibility = 0;
5417                 ctxt->have_exception = false;
5418                 ctxt->exception.vector = -1;
5419                 ctxt->perm_ok = false;
5420
5421                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5422
5423                 r = x86_decode_insn(ctxt, insn, insn_len);
5424
5425                 trace_kvm_emulate_insn_start(vcpu);
5426                 ++vcpu->stat.insn_emulation;
5427                 if (r != EMULATION_OK)  {
5428                         if (emulation_type & EMULTYPE_TRAP_UD)
5429                                 return EMULATE_FAIL;
5430                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5431                                                 emulation_type))
5432                                 return EMULATE_DONE;
5433                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5434                                 return EMULATE_DONE;
5435                         if (emulation_type & EMULTYPE_SKIP)
5436                                 return EMULATE_FAIL;
5437                         return handle_emulation_failure(vcpu);
5438                 }
5439         }
5440
5441         if (emulation_type & EMULTYPE_SKIP) {
5442                 kvm_rip_write(vcpu, ctxt->_eip);
5443                 if (ctxt->eflags & X86_EFLAGS_RF)
5444                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5445                 return EMULATE_DONE;
5446         }
5447
5448         if (retry_instruction(ctxt, cr2, emulation_type))
5449                 return EMULATE_DONE;
5450
5451         /* this is needed for vmware backdoor interface to work since it
5452            changes registers values  during IO operation */
5453         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5454                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5455                 emulator_invalidate_register_cache(ctxt);
5456         }
5457
5458 restart:
5459         r = x86_emulate_insn(ctxt);
5460
5461         if (r == EMULATION_INTERCEPTED)
5462                 return EMULATE_DONE;
5463
5464         if (r == EMULATION_FAILED) {
5465                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5466                                         emulation_type))
5467                         return EMULATE_DONE;
5468
5469                 return handle_emulation_failure(vcpu);
5470         }
5471
5472         if (ctxt->have_exception) {
5473                 r = EMULATE_DONE;
5474                 if (inject_emulated_exception(vcpu))
5475                         return r;
5476         } else if (vcpu->arch.pio.count) {
5477                 if (!vcpu->arch.pio.in) {
5478                         /* FIXME: return into emulator if single-stepping.  */
5479                         vcpu->arch.pio.count = 0;
5480                 } else {
5481                         writeback = false;
5482                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5483                 }
5484                 r = EMULATE_USER_EXIT;
5485         } else if (vcpu->mmio_needed) {
5486                 if (!vcpu->mmio_is_write)
5487                         writeback = false;
5488                 r = EMULATE_USER_EXIT;
5489                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5490         } else if (r == EMULATION_RESTART)
5491                 goto restart;
5492         else
5493                 r = EMULATE_DONE;
5494
5495         if (writeback) {
5496                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5497                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5498                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5499                 kvm_rip_write(vcpu, ctxt->eip);
5500                 if (r == EMULATE_DONE &&
5501                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5502                         kvm_vcpu_do_singlestep(vcpu, &r);
5503                 if (!ctxt->have_exception ||
5504                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5505                         __kvm_set_rflags(vcpu, ctxt->eflags);
5506
5507                 /*
5508                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5509                  * do nothing, and it will be requested again as soon as
5510                  * the shadow expires.  But we still need to check here,
5511                  * because POPF has no interrupt shadow.
5512                  */
5513                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5514                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5515         } else
5516                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5517
5518         return r;
5519 }
5520 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5521
5522 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5523 {
5524         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5525         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5526                                             size, port, &val, 1);
5527         /* do not return to emulator after return from userspace */
5528         vcpu->arch.pio.count = 0;
5529         return ret;
5530 }
5531 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5532
5533 static void tsc_bad(void *info)
5534 {
5535         __this_cpu_write(cpu_tsc_khz, 0);
5536 }
5537
5538 static void tsc_khz_changed(void *data)
5539 {
5540         struct cpufreq_freqs *freq = data;
5541         unsigned long khz = 0;
5542
5543         if (data)
5544                 khz = freq->new;
5545         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5546                 khz = cpufreq_quick_get(raw_smp_processor_id());
5547         if (!khz)
5548                 khz = tsc_khz;
5549         __this_cpu_write(cpu_tsc_khz, khz);
5550 }
5551
5552 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5553                                      void *data)
5554 {
5555         struct cpufreq_freqs *freq = data;
5556         struct kvm *kvm;
5557         struct kvm_vcpu *vcpu;
5558         int i, send_ipi = 0;
5559
5560         /*
5561          * We allow guests to temporarily run on slowing clocks,
5562          * provided we notify them after, or to run on accelerating
5563          * clocks, provided we notify them before.  Thus time never
5564          * goes backwards.
5565          *
5566          * However, we have a problem.  We can't atomically update
5567          * the frequency of a given CPU from this function; it is
5568          * merely a notifier, which can be called from any CPU.
5569          * Changing the TSC frequency at arbitrary points in time
5570          * requires a recomputation of local variables related to
5571          * the TSC for each VCPU.  We must flag these local variables
5572          * to be updated and be sure the update takes place with the
5573          * new frequency before any guests proceed.
5574          *
5575          * Unfortunately, the combination of hotplug CPU and frequency
5576          * change creates an intractable locking scenario; the order
5577          * of when these callouts happen is undefined with respect to
5578          * CPU hotplug, and they can race with each other.  As such,
5579          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5580          * undefined; you can actually have a CPU frequency change take
5581          * place in between the computation of X and the setting of the
5582          * variable.  To protect against this problem, all updates of
5583          * the per_cpu tsc_khz variable are done in an interrupt
5584          * protected IPI, and all callers wishing to update the value
5585          * must wait for a synchronous IPI to complete (which is trivial
5586          * if the caller is on the CPU already).  This establishes the
5587          * necessary total order on variable updates.
5588          *
5589          * Note that because a guest time update may take place
5590          * anytime after the setting of the VCPU's request bit, the
5591          * correct TSC value must be set before the request.  However,
5592          * to ensure the update actually makes it to any guest which
5593          * starts running in hardware virtualization between the set
5594          * and the acquisition of the spinlock, we must also ping the
5595          * CPU after setting the request bit.
5596          *
5597          */
5598
5599         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5600                 return 0;
5601         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5602                 return 0;
5603
5604         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5605
5606         spin_lock(&kvm_lock);
5607         list_for_each_entry(kvm, &vm_list, vm_list) {
5608                 kvm_for_each_vcpu(i, vcpu, kvm) {
5609                         if (vcpu->cpu != freq->cpu)
5610                                 continue;
5611                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5612                         if (vcpu->cpu != smp_processor_id())
5613                                 send_ipi = 1;
5614                 }
5615         }
5616         spin_unlock(&kvm_lock);
5617
5618         if (freq->old < freq->new && send_ipi) {
5619                 /*
5620                  * We upscale the frequency.  Must make the guest
5621                  * doesn't see old kvmclock values while running with
5622                  * the new frequency, otherwise we risk the guest sees
5623                  * time go backwards.
5624                  *
5625                  * In case we update the frequency for another cpu
5626                  * (which might be in guest context) send an interrupt
5627                  * to kick the cpu out of guest context.  Next time
5628                  * guest context is entered kvmclock will be updated,
5629                  * so the guest will not see stale values.
5630                  */
5631                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5632         }
5633         return 0;
5634 }
5635
5636 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5637         .notifier_call  = kvmclock_cpufreq_notifier
5638 };
5639
5640 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5641                                         unsigned long action, void *hcpu)
5642 {
5643         unsigned int cpu = (unsigned long)hcpu;
5644
5645         switch (action) {
5646                 case CPU_ONLINE:
5647                 case CPU_DOWN_FAILED:
5648                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5649                         break;
5650                 case CPU_DOWN_PREPARE:
5651                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5652                         break;
5653         }
5654         return NOTIFY_OK;
5655 }
5656
5657 static struct notifier_block kvmclock_cpu_notifier_block = {
5658         .notifier_call  = kvmclock_cpu_notifier,
5659         .priority = -INT_MAX
5660 };
5661
5662 static void kvm_timer_init(void)
5663 {
5664         int cpu;
5665
5666         max_tsc_khz = tsc_khz;
5667
5668         cpu_notifier_register_begin();
5669         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5670 #ifdef CONFIG_CPU_FREQ
5671                 struct cpufreq_policy policy;
5672                 memset(&policy, 0, sizeof(policy));
5673                 cpu = get_cpu();
5674                 cpufreq_get_policy(&policy, cpu);
5675                 if (policy.cpuinfo.max_freq)
5676                         max_tsc_khz = policy.cpuinfo.max_freq;
5677                 put_cpu();
5678 #endif
5679                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5680                                           CPUFREQ_TRANSITION_NOTIFIER);
5681         }
5682         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5683         for_each_online_cpu(cpu)
5684                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5685
5686         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5687         cpu_notifier_register_done();
5688
5689 }
5690
5691 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5692
5693 int kvm_is_in_guest(void)
5694 {
5695         return __this_cpu_read(current_vcpu) != NULL;
5696 }
5697
5698 static int kvm_is_user_mode(void)
5699 {
5700         int user_mode = 3;
5701
5702         if (__this_cpu_read(current_vcpu))
5703                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5704
5705         return user_mode != 0;
5706 }
5707
5708 static unsigned long kvm_get_guest_ip(void)
5709 {
5710         unsigned long ip = 0;
5711
5712         if (__this_cpu_read(current_vcpu))
5713                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5714
5715         return ip;
5716 }
5717
5718 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5719         .is_in_guest            = kvm_is_in_guest,
5720         .is_user_mode           = kvm_is_user_mode,
5721         .get_guest_ip           = kvm_get_guest_ip,
5722 };
5723
5724 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5725 {
5726         __this_cpu_write(current_vcpu, vcpu);
5727 }
5728 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5729
5730 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5731 {
5732         __this_cpu_write(current_vcpu, NULL);
5733 }
5734 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5735
5736 static void kvm_set_mmio_spte_mask(void)
5737 {
5738         u64 mask;
5739         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5740
5741         /*
5742          * Set the reserved bits and the present bit of an paging-structure
5743          * entry to generate page fault with PFER.RSV = 1.
5744          */
5745          /* Mask the reserved physical address bits. */
5746         mask = rsvd_bits(maxphyaddr, 51);
5747
5748         /* Bit 62 is always reserved for 32bit host. */
5749         mask |= 0x3ull << 62;
5750
5751         /* Set the present bit. */
5752         mask |= 1ull;
5753
5754 #ifdef CONFIG_X86_64
5755         /*
5756          * If reserved bit is not supported, clear the present bit to disable
5757          * mmio page fault.
5758          */
5759         if (maxphyaddr == 52)
5760                 mask &= ~1ull;
5761 #endif
5762
5763         kvm_mmu_set_mmio_spte_mask(mask);
5764 }
5765
5766 #ifdef CONFIG_X86_64
5767 static void pvclock_gtod_update_fn(struct work_struct *work)
5768 {
5769         struct kvm *kvm;
5770
5771         struct kvm_vcpu *vcpu;
5772         int i;
5773
5774         spin_lock(&kvm_lock);
5775         list_for_each_entry(kvm, &vm_list, vm_list)
5776                 kvm_for_each_vcpu(i, vcpu, kvm)
5777                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5778         atomic_set(&kvm_guest_has_master_clock, 0);
5779         spin_unlock(&kvm_lock);
5780 }
5781
5782 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5783
5784 /*
5785  * Notification about pvclock gtod data update.
5786  */
5787 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5788                                void *priv)
5789 {
5790         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5791         struct timekeeper *tk = priv;
5792
5793         update_pvclock_gtod(tk);
5794
5795         /* disable master clock if host does not trust, or does not
5796          * use, TSC clocksource
5797          */
5798         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5799             atomic_read(&kvm_guest_has_master_clock) != 0)
5800                 queue_work(system_long_wq, &pvclock_gtod_work);
5801
5802         return 0;
5803 }
5804
5805 static struct notifier_block pvclock_gtod_notifier = {
5806         .notifier_call = pvclock_gtod_notify,
5807 };
5808 #endif
5809
5810 int kvm_arch_init(void *opaque)
5811 {
5812         int r;
5813         struct kvm_x86_ops *ops = opaque;
5814
5815         if (kvm_x86_ops) {
5816                 printk(KERN_ERR "kvm: already loaded the other module\n");
5817                 r = -EEXIST;
5818                 goto out;
5819         }
5820
5821         if (!ops->cpu_has_kvm_support()) {
5822                 printk(KERN_ERR "kvm: no hardware support\n");
5823                 r = -EOPNOTSUPP;
5824                 goto out;
5825         }
5826         if (ops->disabled_by_bios()) {
5827                 printk(KERN_ERR "kvm: disabled by bios\n");
5828                 r = -EOPNOTSUPP;
5829                 goto out;
5830         }
5831
5832         r = -ENOMEM;
5833         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5834         if (!shared_msrs) {
5835                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5836                 goto out;
5837         }
5838
5839         r = kvm_mmu_module_init();
5840         if (r)
5841                 goto out_free_percpu;
5842
5843         kvm_set_mmio_spte_mask();
5844
5845         kvm_x86_ops = ops;
5846
5847         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5848                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5849
5850         kvm_timer_init();
5851
5852         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5853
5854         if (cpu_has_xsave)
5855                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5856
5857         kvm_lapic_init();
5858 #ifdef CONFIG_X86_64
5859         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5860 #endif
5861
5862         return 0;
5863
5864 out_free_percpu:
5865         free_percpu(shared_msrs);
5866 out:
5867         return r;
5868 }
5869
5870 void kvm_arch_exit(void)
5871 {
5872         kvm_lapic_exit();
5873         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5874
5875         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5876                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5877                                             CPUFREQ_TRANSITION_NOTIFIER);
5878         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5879 #ifdef CONFIG_X86_64
5880         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5881 #endif
5882         kvm_x86_ops = NULL;
5883         kvm_mmu_module_exit();
5884         free_percpu(shared_msrs);
5885 }
5886
5887 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5888 {
5889         ++vcpu->stat.halt_exits;
5890         if (lapic_in_kernel(vcpu)) {
5891                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5892                 return 1;
5893         } else {
5894                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5895                 return 0;
5896         }
5897 }
5898 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5899
5900 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5901 {
5902         kvm_x86_ops->skip_emulated_instruction(vcpu);
5903         return kvm_vcpu_halt(vcpu);
5904 }
5905 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5906
5907 /*
5908  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5909  *
5910  * @apicid - apicid of vcpu to be kicked.
5911  */
5912 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5913 {
5914         struct kvm_lapic_irq lapic_irq;
5915
5916         lapic_irq.shorthand = 0;
5917         lapic_irq.dest_mode = 0;
5918         lapic_irq.dest_id = apicid;
5919         lapic_irq.msi_redir_hint = false;
5920
5921         lapic_irq.delivery_mode = APIC_DM_REMRD;
5922         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5923 }
5924
5925 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5926 {
5927         unsigned long nr, a0, a1, a2, a3, ret;
5928         int op_64_bit, r = 1;
5929
5930         kvm_x86_ops->skip_emulated_instruction(vcpu);
5931
5932         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5933                 return kvm_hv_hypercall(vcpu);
5934
5935         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5936         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5937         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5938         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5939         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5940
5941         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5942
5943         op_64_bit = is_64_bit_mode(vcpu);
5944         if (!op_64_bit) {
5945                 nr &= 0xFFFFFFFF;
5946                 a0 &= 0xFFFFFFFF;
5947                 a1 &= 0xFFFFFFFF;
5948                 a2 &= 0xFFFFFFFF;
5949                 a3 &= 0xFFFFFFFF;
5950         }
5951
5952         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5953                 ret = -KVM_EPERM;
5954                 goto out;
5955         }
5956
5957         switch (nr) {
5958         case KVM_HC_VAPIC_POLL_IRQ:
5959                 ret = 0;
5960                 break;
5961         case KVM_HC_KICK_CPU:
5962                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5963                 ret = 0;
5964                 break;
5965         default:
5966                 ret = -KVM_ENOSYS;
5967                 break;
5968         }
5969 out:
5970         if (!op_64_bit)
5971                 ret = (u32)ret;
5972         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5973         ++vcpu->stat.hypercalls;
5974         return r;
5975 }
5976 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5977
5978 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5979 {
5980         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5981         char instruction[3];
5982         unsigned long rip = kvm_rip_read(vcpu);
5983
5984         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5985
5986         return emulator_write_emulated(ctxt, rip, instruction, 3,
5987                 &ctxt->exception);
5988 }
5989
5990 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5991 {
5992         return vcpu->run->request_interrupt_window &&
5993                 likely(!pic_in_kernel(vcpu->kvm));
5994 }
5995
5996 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5997 {
5998         struct kvm_run *kvm_run = vcpu->run;
5999
6000         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6001         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6002         kvm_run->cr8 = kvm_get_cr8(vcpu);
6003         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6004         kvm_run->ready_for_interrupt_injection =
6005                 pic_in_kernel(vcpu->kvm) ||
6006                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6007 }
6008
6009 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6010 {
6011         int max_irr, tpr;
6012
6013         if (!kvm_x86_ops->update_cr8_intercept)
6014                 return;
6015
6016         if (!vcpu->arch.apic)
6017                 return;
6018
6019         if (!vcpu->arch.apic->vapic_addr)
6020                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6021         else
6022                 max_irr = -1;
6023
6024         if (max_irr != -1)
6025                 max_irr >>= 4;
6026
6027         tpr = kvm_lapic_get_cr8(vcpu);
6028
6029         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6030 }
6031
6032 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6033 {
6034         int r;
6035
6036         /* try to reinject previous events if any */
6037         if (vcpu->arch.exception.pending) {
6038                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6039                                         vcpu->arch.exception.has_error_code,
6040                                         vcpu->arch.exception.error_code);
6041
6042                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6043                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6044                                              X86_EFLAGS_RF);
6045
6046                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6047                     (vcpu->arch.dr7 & DR7_GD)) {
6048                         vcpu->arch.dr7 &= ~DR7_GD;
6049                         kvm_update_dr7(vcpu);
6050                 }
6051
6052                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6053                                           vcpu->arch.exception.has_error_code,
6054                                           vcpu->arch.exception.error_code,
6055                                           vcpu->arch.exception.reinject);
6056                 return 0;
6057         }
6058
6059         if (vcpu->arch.nmi_injected) {
6060                 kvm_x86_ops->set_nmi(vcpu);
6061                 return 0;
6062         }
6063
6064         if (vcpu->arch.interrupt.pending) {
6065                 kvm_x86_ops->set_irq(vcpu);
6066                 return 0;
6067         }
6068
6069         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6070                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6071                 if (r != 0)
6072                         return r;
6073         }
6074
6075         /* try to inject new event if pending */
6076         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6077                 --vcpu->arch.nmi_pending;
6078                 vcpu->arch.nmi_injected = true;
6079                 kvm_x86_ops->set_nmi(vcpu);
6080         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6081                 /*
6082                  * Because interrupts can be injected asynchronously, we are
6083                  * calling check_nested_events again here to avoid a race condition.
6084                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6085                  * proposal and current concerns.  Perhaps we should be setting
6086                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6087                  */
6088                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6089                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6090                         if (r != 0)
6091                                 return r;
6092                 }
6093                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6094                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6095                                             false);
6096                         kvm_x86_ops->set_irq(vcpu);
6097                 }
6098         }
6099         return 0;
6100 }
6101
6102 static void process_nmi(struct kvm_vcpu *vcpu)
6103 {
6104         unsigned limit = 2;
6105
6106         /*
6107          * x86 is limited to one NMI running, and one NMI pending after it.
6108          * If an NMI is already in progress, limit further NMIs to just one.
6109          * Otherwise, allow two (and we'll inject the first one immediately).
6110          */
6111         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6112                 limit = 1;
6113
6114         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6115         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6116         kvm_make_request(KVM_REQ_EVENT, vcpu);
6117 }
6118
6119 #define put_smstate(type, buf, offset, val)                       \
6120         *(type *)((buf) + (offset) - 0x7e00) = val
6121
6122 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6123 {
6124         u32 flags = 0;
6125         flags |= seg->g       << 23;
6126         flags |= seg->db      << 22;
6127         flags |= seg->l       << 21;
6128         flags |= seg->avl     << 20;
6129         flags |= seg->present << 15;
6130         flags |= seg->dpl     << 13;
6131         flags |= seg->s       << 12;
6132         flags |= seg->type    << 8;
6133         return flags;
6134 }
6135
6136 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6137 {
6138         struct kvm_segment seg;
6139         int offset;
6140
6141         kvm_get_segment(vcpu, &seg, n);
6142         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6143
6144         if (n < 3)
6145                 offset = 0x7f84 + n * 12;
6146         else
6147                 offset = 0x7f2c + (n - 3) * 12;
6148
6149         put_smstate(u32, buf, offset + 8, seg.base);
6150         put_smstate(u32, buf, offset + 4, seg.limit);
6151         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6152 }
6153
6154 #ifdef CONFIG_X86_64
6155 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6156 {
6157         struct kvm_segment seg;
6158         int offset;
6159         u16 flags;
6160
6161         kvm_get_segment(vcpu, &seg, n);
6162         offset = 0x7e00 + n * 16;
6163
6164         flags = process_smi_get_segment_flags(&seg) >> 8;
6165         put_smstate(u16, buf, offset, seg.selector);
6166         put_smstate(u16, buf, offset + 2, flags);
6167         put_smstate(u32, buf, offset + 4, seg.limit);
6168         put_smstate(u64, buf, offset + 8, seg.base);
6169 }
6170 #endif
6171
6172 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6173 {
6174         struct desc_ptr dt;
6175         struct kvm_segment seg;
6176         unsigned long val;
6177         int i;
6178
6179         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6180         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6181         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6182         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6183
6184         for (i = 0; i < 8; i++)
6185                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6186
6187         kvm_get_dr(vcpu, 6, &val);
6188         put_smstate(u32, buf, 0x7fcc, (u32)val);
6189         kvm_get_dr(vcpu, 7, &val);
6190         put_smstate(u32, buf, 0x7fc8, (u32)val);
6191
6192         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6193         put_smstate(u32, buf, 0x7fc4, seg.selector);
6194         put_smstate(u32, buf, 0x7f64, seg.base);
6195         put_smstate(u32, buf, 0x7f60, seg.limit);
6196         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6197
6198         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6199         put_smstate(u32, buf, 0x7fc0, seg.selector);
6200         put_smstate(u32, buf, 0x7f80, seg.base);
6201         put_smstate(u32, buf, 0x7f7c, seg.limit);
6202         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6203
6204         kvm_x86_ops->get_gdt(vcpu, &dt);
6205         put_smstate(u32, buf, 0x7f74, dt.address);
6206         put_smstate(u32, buf, 0x7f70, dt.size);
6207
6208         kvm_x86_ops->get_idt(vcpu, &dt);
6209         put_smstate(u32, buf, 0x7f58, dt.address);
6210         put_smstate(u32, buf, 0x7f54, dt.size);
6211
6212         for (i = 0; i < 6; i++)
6213                 process_smi_save_seg_32(vcpu, buf, i);
6214
6215         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6216
6217         /* revision id */
6218         put_smstate(u32, buf, 0x7efc, 0x00020000);
6219         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6220 }
6221
6222 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6223 {
6224 #ifdef CONFIG_X86_64
6225         struct desc_ptr dt;
6226         struct kvm_segment seg;
6227         unsigned long val;
6228         int i;
6229
6230         for (i = 0; i < 16; i++)
6231                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6232
6233         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6234         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6235
6236         kvm_get_dr(vcpu, 6, &val);
6237         put_smstate(u64, buf, 0x7f68, val);
6238         kvm_get_dr(vcpu, 7, &val);
6239         put_smstate(u64, buf, 0x7f60, val);
6240
6241         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6242         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6243         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6244
6245         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6246
6247         /* revision id */
6248         put_smstate(u32, buf, 0x7efc, 0x00020064);
6249
6250         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6251
6252         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6253         put_smstate(u16, buf, 0x7e90, seg.selector);
6254         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6255         put_smstate(u32, buf, 0x7e94, seg.limit);
6256         put_smstate(u64, buf, 0x7e98, seg.base);
6257
6258         kvm_x86_ops->get_idt(vcpu, &dt);
6259         put_smstate(u32, buf, 0x7e84, dt.size);
6260         put_smstate(u64, buf, 0x7e88, dt.address);
6261
6262         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6263         put_smstate(u16, buf, 0x7e70, seg.selector);
6264         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6265         put_smstate(u32, buf, 0x7e74, seg.limit);
6266         put_smstate(u64, buf, 0x7e78, seg.base);
6267
6268         kvm_x86_ops->get_gdt(vcpu, &dt);
6269         put_smstate(u32, buf, 0x7e64, dt.size);
6270         put_smstate(u64, buf, 0x7e68, dt.address);
6271
6272         for (i = 0; i < 6; i++)
6273                 process_smi_save_seg_64(vcpu, buf, i);
6274 #else
6275         WARN_ON_ONCE(1);
6276 #endif
6277 }
6278
6279 static void process_smi(struct kvm_vcpu *vcpu)
6280 {
6281         struct kvm_segment cs, ds;
6282         struct desc_ptr dt;
6283         char buf[512];
6284         u32 cr0;
6285
6286         if (is_smm(vcpu)) {
6287                 vcpu->arch.smi_pending = true;
6288                 return;
6289         }
6290
6291         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6292         vcpu->arch.hflags |= HF_SMM_MASK;
6293         memset(buf, 0, 512);
6294         if (guest_cpuid_has_longmode(vcpu))
6295                 process_smi_save_state_64(vcpu, buf);
6296         else
6297                 process_smi_save_state_32(vcpu, buf);
6298
6299         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6300
6301         if (kvm_x86_ops->get_nmi_mask(vcpu))
6302                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6303         else
6304                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6305
6306         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6307         kvm_rip_write(vcpu, 0x8000);
6308
6309         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6310         kvm_x86_ops->set_cr0(vcpu, cr0);
6311         vcpu->arch.cr0 = cr0;
6312
6313         kvm_x86_ops->set_cr4(vcpu, 0);
6314
6315         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6316         dt.address = dt.size = 0;
6317         kvm_x86_ops->set_idt(vcpu, &dt);
6318
6319         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6320
6321         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6322         cs.base = vcpu->arch.smbase;
6323
6324         ds.selector = 0;
6325         ds.base = 0;
6326
6327         cs.limit    = ds.limit = 0xffffffff;
6328         cs.type     = ds.type = 0x3;
6329         cs.dpl      = ds.dpl = 0;
6330         cs.db       = ds.db = 0;
6331         cs.s        = ds.s = 1;
6332         cs.l        = ds.l = 0;
6333         cs.g        = ds.g = 1;
6334         cs.avl      = ds.avl = 0;
6335         cs.present  = ds.present = 1;
6336         cs.unusable = ds.unusable = 0;
6337         cs.padding  = ds.padding = 0;
6338
6339         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6340         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6341         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6342         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6343         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6344         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6345
6346         if (guest_cpuid_has_longmode(vcpu))
6347                 kvm_x86_ops->set_efer(vcpu, 0);
6348
6349         kvm_update_cpuid(vcpu);
6350         kvm_mmu_reset_context(vcpu);
6351 }
6352
6353 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6354 {
6355         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6356                 return;
6357
6358         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6359
6360         if (irqchip_split(vcpu->kvm))
6361                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6362         else {
6363                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6364                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6365         }
6366         kvm_x86_ops->load_eoi_exitmap(vcpu);
6367 }
6368
6369 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6370 {
6371         ++vcpu->stat.tlb_flush;
6372         kvm_x86_ops->tlb_flush(vcpu);
6373 }
6374
6375 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6376 {
6377         struct page *page = NULL;
6378
6379         if (!lapic_in_kernel(vcpu))
6380                 return;
6381
6382         if (!kvm_x86_ops->set_apic_access_page_addr)
6383                 return;
6384
6385         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6386         if (is_error_page(page))
6387                 return;
6388         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6389
6390         /*
6391          * Do not pin apic access page in memory, the MMU notifier
6392          * will call us again if it is migrated or swapped out.
6393          */
6394         put_page(page);
6395 }
6396 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6397
6398 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6399                                            unsigned long address)
6400 {
6401         /*
6402          * The physical address of apic access page is stored in the VMCS.
6403          * Update it when it becomes invalid.
6404          */
6405         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6406                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6407 }
6408
6409 /*
6410  * Returns 1 to let vcpu_run() continue the guest execution loop without
6411  * exiting to the userspace.  Otherwise, the value will be returned to the
6412  * userspace.
6413  */
6414 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6415 {
6416         int r;
6417         bool req_int_win =
6418                 dm_request_for_irq_injection(vcpu) &&
6419                 kvm_cpu_accept_dm_intr(vcpu);
6420
6421         bool req_immediate_exit = false;
6422
6423         if (vcpu->requests) {
6424                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6425                         kvm_mmu_unload(vcpu);
6426                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6427                         __kvm_migrate_timers(vcpu);
6428                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6429                         kvm_gen_update_masterclock(vcpu->kvm);
6430                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6431                         kvm_gen_kvmclock_update(vcpu);
6432                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6433                         r = kvm_guest_time_update(vcpu);
6434                         if (unlikely(r))
6435                                 goto out;
6436                 }
6437                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6438                         kvm_mmu_sync_roots(vcpu);
6439                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6440                         kvm_vcpu_flush_tlb(vcpu);
6441                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6442                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6443                         r = 0;
6444                         goto out;
6445                 }
6446                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6447                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6448                         r = 0;
6449                         goto out;
6450                 }
6451                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6452                         vcpu->fpu_active = 0;
6453                         kvm_x86_ops->fpu_deactivate(vcpu);
6454                 }
6455                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6456                         /* Page is swapped out. Do synthetic halt */
6457                         vcpu->arch.apf.halted = true;
6458                         r = 1;
6459                         goto out;
6460                 }
6461                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6462                         record_steal_time(vcpu);
6463                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6464                         process_smi(vcpu);
6465                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6466                         process_nmi(vcpu);
6467                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6468                         kvm_pmu_handle_event(vcpu);
6469                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6470                         kvm_pmu_deliver_pmi(vcpu);
6471                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6472                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6473                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6474                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6475                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6476                                 vcpu->run->eoi.vector =
6477                                                 vcpu->arch.pending_ioapic_eoi;
6478                                 r = 0;
6479                                 goto out;
6480                         }
6481                 }
6482                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6483                         vcpu_scan_ioapic(vcpu);
6484                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6485                         kvm_vcpu_reload_apic_access_page(vcpu);
6486                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6487                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6488                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6489                         r = 0;
6490                         goto out;
6491                 }
6492                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6493                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6494                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6495                         r = 0;
6496                         goto out;
6497                 }
6498         }
6499
6500         /*
6501          * KVM_REQ_EVENT is not set when posted interrupts are set by
6502          * VT-d hardware, so we have to update RVI unconditionally.
6503          */
6504         if (kvm_lapic_enabled(vcpu)) {
6505                 /*
6506                  * Update architecture specific hints for APIC
6507                  * virtual interrupt delivery.
6508                  */
6509                 if (kvm_x86_ops->hwapic_irr_update)
6510                         kvm_x86_ops->hwapic_irr_update(vcpu,
6511                                 kvm_lapic_find_highest_irr(vcpu));
6512         }
6513
6514         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6515                 kvm_apic_accept_events(vcpu);
6516                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6517                         r = 1;
6518                         goto out;
6519                 }
6520
6521                 if (inject_pending_event(vcpu, req_int_win) != 0)
6522                         req_immediate_exit = true;
6523                 /* enable NMI/IRQ window open exits if needed */
6524                 else {
6525                         if (vcpu->arch.nmi_pending)
6526                                 kvm_x86_ops->enable_nmi_window(vcpu);
6527                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6528                                 kvm_x86_ops->enable_irq_window(vcpu);
6529                 }
6530
6531                 if (kvm_lapic_enabled(vcpu)) {
6532                         update_cr8_intercept(vcpu);
6533                         kvm_lapic_sync_to_vapic(vcpu);
6534                 }
6535         }
6536
6537         r = kvm_mmu_reload(vcpu);
6538         if (unlikely(r)) {
6539                 goto cancel_injection;
6540         }
6541
6542         preempt_disable();
6543
6544         kvm_x86_ops->prepare_guest_switch(vcpu);
6545         if (vcpu->fpu_active)
6546                 kvm_load_guest_fpu(vcpu);
6547         vcpu->mode = IN_GUEST_MODE;
6548
6549         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6550
6551         /* We should set ->mode before check ->requests,
6552          * see the comment in make_all_cpus_request.
6553          */
6554         smp_mb__after_srcu_read_unlock();
6555
6556         local_irq_disable();
6557
6558         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6559             || need_resched() || signal_pending(current)) {
6560                 vcpu->mode = OUTSIDE_GUEST_MODE;
6561                 smp_wmb();
6562                 local_irq_enable();
6563                 preempt_enable();
6564                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6565                 r = 1;
6566                 goto cancel_injection;
6567         }
6568
6569         kvm_load_guest_xcr0(vcpu);
6570
6571         if (req_immediate_exit)
6572                 smp_send_reschedule(vcpu->cpu);
6573
6574         trace_kvm_entry(vcpu->vcpu_id);
6575         wait_lapic_expire(vcpu);
6576         __kvm_guest_enter();
6577
6578         if (unlikely(vcpu->arch.switch_db_regs)) {
6579                 set_debugreg(0, 7);
6580                 set_debugreg(vcpu->arch.eff_db[0], 0);
6581                 set_debugreg(vcpu->arch.eff_db[1], 1);
6582                 set_debugreg(vcpu->arch.eff_db[2], 2);
6583                 set_debugreg(vcpu->arch.eff_db[3], 3);
6584                 set_debugreg(vcpu->arch.dr6, 6);
6585                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6586         }
6587
6588         kvm_x86_ops->run(vcpu);
6589
6590         /*
6591          * Do this here before restoring debug registers on the host.  And
6592          * since we do this before handling the vmexit, a DR access vmexit
6593          * can (a) read the correct value of the debug registers, (b) set
6594          * KVM_DEBUGREG_WONT_EXIT again.
6595          */
6596         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6597                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6598                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6599                 kvm_update_dr0123(vcpu);
6600                 kvm_update_dr6(vcpu);
6601                 kvm_update_dr7(vcpu);
6602                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6603         }
6604
6605         /*
6606          * If the guest has used debug registers, at least dr7
6607          * will be disabled while returning to the host.
6608          * If we don't have active breakpoints in the host, we don't
6609          * care about the messed up debug address registers. But if
6610          * we have some of them active, restore the old state.
6611          */
6612         if (hw_breakpoint_active())
6613                 hw_breakpoint_restore();
6614
6615         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6616
6617         vcpu->mode = OUTSIDE_GUEST_MODE;
6618         smp_wmb();
6619
6620         kvm_put_guest_xcr0(vcpu);
6621
6622         /* Interrupt is enabled by handle_external_intr() */
6623         kvm_x86_ops->handle_external_intr(vcpu);
6624
6625         ++vcpu->stat.exits;
6626
6627         /*
6628          * We must have an instruction between local_irq_enable() and
6629          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6630          * the interrupt shadow.  The stat.exits increment will do nicely.
6631          * But we need to prevent reordering, hence this barrier():
6632          */
6633         barrier();
6634
6635         kvm_guest_exit();
6636
6637         preempt_enable();
6638
6639         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6640
6641         /*
6642          * Profile KVM exit RIPs:
6643          */
6644         if (unlikely(prof_on == KVM_PROFILING)) {
6645                 unsigned long rip = kvm_rip_read(vcpu);
6646                 profile_hit(KVM_PROFILING, (void *)rip);
6647         }
6648
6649         if (unlikely(vcpu->arch.tsc_always_catchup))
6650                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6651
6652         if (vcpu->arch.apic_attention)
6653                 kvm_lapic_sync_from_vapic(vcpu);
6654
6655         r = kvm_x86_ops->handle_exit(vcpu);
6656         return r;
6657
6658 cancel_injection:
6659         kvm_x86_ops->cancel_injection(vcpu);
6660         if (unlikely(vcpu->arch.apic_attention))
6661                 kvm_lapic_sync_from_vapic(vcpu);
6662 out:
6663         return r;
6664 }
6665
6666 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6667 {
6668         if (!kvm_arch_vcpu_runnable(vcpu) &&
6669             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6670                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6671                 kvm_vcpu_block(vcpu);
6672                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6673
6674                 if (kvm_x86_ops->post_block)
6675                         kvm_x86_ops->post_block(vcpu);
6676
6677                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6678                         return 1;
6679         }
6680
6681         kvm_apic_accept_events(vcpu);
6682         switch(vcpu->arch.mp_state) {
6683         case KVM_MP_STATE_HALTED:
6684                 vcpu->arch.pv.pv_unhalted = false;
6685                 vcpu->arch.mp_state =
6686                         KVM_MP_STATE_RUNNABLE;
6687         case KVM_MP_STATE_RUNNABLE:
6688                 vcpu->arch.apf.halted = false;
6689                 break;
6690         case KVM_MP_STATE_INIT_RECEIVED:
6691                 break;
6692         default:
6693                 return -EINTR;
6694                 break;
6695         }
6696         return 1;
6697 }
6698
6699 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6700 {
6701         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6702                 !vcpu->arch.apf.halted);
6703 }
6704
6705 static int vcpu_run(struct kvm_vcpu *vcpu)
6706 {
6707         int r;
6708         struct kvm *kvm = vcpu->kvm;
6709
6710         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6711
6712         for (;;) {
6713                 if (kvm_vcpu_running(vcpu)) {
6714                         r = vcpu_enter_guest(vcpu);
6715                 } else {
6716                         r = vcpu_block(kvm, vcpu);
6717                 }
6718
6719                 if (r <= 0)
6720                         break;
6721
6722                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6723                 if (kvm_cpu_has_pending_timer(vcpu))
6724                         kvm_inject_pending_timer_irqs(vcpu);
6725
6726                 if (dm_request_for_irq_injection(vcpu) &&
6727                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6728                         r = 0;
6729                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6730                         ++vcpu->stat.request_irq_exits;
6731                         break;
6732                 }
6733
6734                 kvm_check_async_pf_completion(vcpu);
6735
6736                 if (signal_pending(current)) {
6737                         r = -EINTR;
6738                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6739                         ++vcpu->stat.signal_exits;
6740                         break;
6741                 }
6742                 if (need_resched()) {
6743                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6744                         cond_resched();
6745                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6746                 }
6747         }
6748
6749         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6750
6751         return r;
6752 }
6753
6754 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6755 {
6756         int r;
6757         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6758         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6759         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6760         if (r != EMULATE_DONE)
6761                 return 0;
6762         return 1;
6763 }
6764
6765 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6766 {
6767         BUG_ON(!vcpu->arch.pio.count);
6768
6769         return complete_emulated_io(vcpu);
6770 }
6771
6772 /*
6773  * Implements the following, as a state machine:
6774  *
6775  * read:
6776  *   for each fragment
6777  *     for each mmio piece in the fragment
6778  *       write gpa, len
6779  *       exit
6780  *       copy data
6781  *   execute insn
6782  *
6783  * write:
6784  *   for each fragment
6785  *     for each mmio piece in the fragment
6786  *       write gpa, len
6787  *       copy data
6788  *       exit
6789  */
6790 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6791 {
6792         struct kvm_run *run = vcpu->run;
6793         struct kvm_mmio_fragment *frag;
6794         unsigned len;
6795
6796         BUG_ON(!vcpu->mmio_needed);
6797
6798         /* Complete previous fragment */
6799         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6800         len = min(8u, frag->len);
6801         if (!vcpu->mmio_is_write)
6802                 memcpy(frag->data, run->mmio.data, len);
6803
6804         if (frag->len <= 8) {
6805                 /* Switch to the next fragment. */
6806                 frag++;
6807                 vcpu->mmio_cur_fragment++;
6808         } else {
6809                 /* Go forward to the next mmio piece. */
6810                 frag->data += len;
6811                 frag->gpa += len;
6812                 frag->len -= len;
6813         }
6814
6815         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6816                 vcpu->mmio_needed = 0;
6817
6818                 /* FIXME: return into emulator if single-stepping.  */
6819                 if (vcpu->mmio_is_write)
6820                         return 1;
6821                 vcpu->mmio_read_completed = 1;
6822                 return complete_emulated_io(vcpu);
6823         }
6824
6825         run->exit_reason = KVM_EXIT_MMIO;
6826         run->mmio.phys_addr = frag->gpa;
6827         if (vcpu->mmio_is_write)
6828                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6829         run->mmio.len = min(8u, frag->len);
6830         run->mmio.is_write = vcpu->mmio_is_write;
6831         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6832         return 0;
6833 }
6834
6835
6836 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6837 {
6838         struct fpu *fpu = &current->thread.fpu;
6839         int r;
6840         sigset_t sigsaved;
6841
6842         fpu__activate_curr(fpu);
6843
6844         if (vcpu->sigset_active)
6845                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6846
6847         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6848                 kvm_vcpu_block(vcpu);
6849                 kvm_apic_accept_events(vcpu);
6850                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6851                 r = -EAGAIN;
6852                 goto out;
6853         }
6854
6855         /* re-sync apic's tpr */
6856         if (!lapic_in_kernel(vcpu)) {
6857                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6858                         r = -EINVAL;
6859                         goto out;
6860                 }
6861         }
6862
6863         if (unlikely(vcpu->arch.complete_userspace_io)) {
6864                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6865                 vcpu->arch.complete_userspace_io = NULL;
6866                 r = cui(vcpu);
6867                 if (r <= 0)
6868                         goto out;
6869         } else
6870                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6871
6872         r = vcpu_run(vcpu);
6873
6874 out:
6875         post_kvm_run_save(vcpu);
6876         if (vcpu->sigset_active)
6877                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6878
6879         return r;
6880 }
6881
6882 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6883 {
6884         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6885                 /*
6886                  * We are here if userspace calls get_regs() in the middle of
6887                  * instruction emulation. Registers state needs to be copied
6888                  * back from emulation context to vcpu. Userspace shouldn't do
6889                  * that usually, but some bad designed PV devices (vmware
6890                  * backdoor interface) need this to work
6891                  */
6892                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6893                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6894         }
6895         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6896         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6897         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6898         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6899         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6900         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6901         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6902         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6903 #ifdef CONFIG_X86_64
6904         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6905         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6906         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6907         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6908         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6909         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6910         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6911         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6912 #endif
6913
6914         regs->rip = kvm_rip_read(vcpu);
6915         regs->rflags = kvm_get_rflags(vcpu);
6916
6917         return 0;
6918 }
6919
6920 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6921 {
6922         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6923         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6924
6925         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6926         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6927         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6928         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6929         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6930         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6931         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6932         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6933 #ifdef CONFIG_X86_64
6934         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6935         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6936         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6937         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6938         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6939         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6940         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6941         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6942 #endif
6943
6944         kvm_rip_write(vcpu, regs->rip);
6945         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
6946
6947         vcpu->arch.exception.pending = false;
6948
6949         kvm_make_request(KVM_REQ_EVENT, vcpu);
6950
6951         return 0;
6952 }
6953
6954 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6955 {
6956         struct kvm_segment cs;
6957
6958         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6959         *db = cs.db;
6960         *l = cs.l;
6961 }
6962 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6963
6964 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6965                                   struct kvm_sregs *sregs)
6966 {
6967         struct desc_ptr dt;
6968
6969         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6970         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6971         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6972         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6973         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6974         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6975
6976         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6977         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6978
6979         kvm_x86_ops->get_idt(vcpu, &dt);
6980         sregs->idt.limit = dt.size;
6981         sregs->idt.base = dt.address;
6982         kvm_x86_ops->get_gdt(vcpu, &dt);
6983         sregs->gdt.limit = dt.size;
6984         sregs->gdt.base = dt.address;
6985
6986         sregs->cr0 = kvm_read_cr0(vcpu);
6987         sregs->cr2 = vcpu->arch.cr2;
6988         sregs->cr3 = kvm_read_cr3(vcpu);
6989         sregs->cr4 = kvm_read_cr4(vcpu);
6990         sregs->cr8 = kvm_get_cr8(vcpu);
6991         sregs->efer = vcpu->arch.efer;
6992         sregs->apic_base = kvm_get_apic_base(vcpu);
6993
6994         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6995
6996         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6997                 set_bit(vcpu->arch.interrupt.nr,
6998                         (unsigned long *)sregs->interrupt_bitmap);
6999
7000         return 0;
7001 }
7002
7003 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7004                                     struct kvm_mp_state *mp_state)
7005 {
7006         kvm_apic_accept_events(vcpu);
7007         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7008                                         vcpu->arch.pv.pv_unhalted)
7009                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7010         else
7011                 mp_state->mp_state = vcpu->arch.mp_state;
7012
7013         return 0;
7014 }
7015
7016 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7017                                     struct kvm_mp_state *mp_state)
7018 {
7019         if (!kvm_vcpu_has_lapic(vcpu) &&
7020             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7021                 return -EINVAL;
7022
7023         /* INITs are latched while in SMM */
7024         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7025             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7026              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7027                 return -EINVAL;
7028
7029         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7030                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7031                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7032         } else
7033                 vcpu->arch.mp_state = mp_state->mp_state;
7034         kvm_make_request(KVM_REQ_EVENT, vcpu);
7035         return 0;
7036 }
7037
7038 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7039                     int reason, bool has_error_code, u32 error_code)
7040 {
7041         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7042         int ret;
7043
7044         init_emulate_ctxt(vcpu);
7045
7046         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7047                                    has_error_code, error_code);
7048
7049         if (ret)
7050                 return EMULATE_FAIL;
7051
7052         kvm_rip_write(vcpu, ctxt->eip);
7053         kvm_set_rflags(vcpu, ctxt->eflags);
7054         kvm_make_request(KVM_REQ_EVENT, vcpu);
7055         return EMULATE_DONE;
7056 }
7057 EXPORT_SYMBOL_GPL(kvm_task_switch);
7058
7059 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7060                                   struct kvm_sregs *sregs)
7061 {
7062         struct msr_data apic_base_msr;
7063         int mmu_reset_needed = 0;
7064         int pending_vec, max_bits, idx;
7065         struct desc_ptr dt;
7066
7067         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7068                 return -EINVAL;
7069
7070         dt.size = sregs->idt.limit;
7071         dt.address = sregs->idt.base;
7072         kvm_x86_ops->set_idt(vcpu, &dt);
7073         dt.size = sregs->gdt.limit;
7074         dt.address = sregs->gdt.base;
7075         kvm_x86_ops->set_gdt(vcpu, &dt);
7076
7077         vcpu->arch.cr2 = sregs->cr2;
7078         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7079         vcpu->arch.cr3 = sregs->cr3;
7080         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7081
7082         kvm_set_cr8(vcpu, sregs->cr8);
7083
7084         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7085         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7086         apic_base_msr.data = sregs->apic_base;
7087         apic_base_msr.host_initiated = true;
7088         kvm_set_apic_base(vcpu, &apic_base_msr);
7089
7090         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7091         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7092         vcpu->arch.cr0 = sregs->cr0;
7093
7094         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7095         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7096         if (sregs->cr4 & X86_CR4_OSXSAVE)
7097                 kvm_update_cpuid(vcpu);
7098
7099         idx = srcu_read_lock(&vcpu->kvm->srcu);
7100         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7101                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7102                 mmu_reset_needed = 1;
7103         }
7104         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7105
7106         if (mmu_reset_needed)
7107                 kvm_mmu_reset_context(vcpu);
7108
7109         max_bits = KVM_NR_INTERRUPTS;
7110         pending_vec = find_first_bit(
7111                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7112         if (pending_vec < max_bits) {
7113                 kvm_queue_interrupt(vcpu, pending_vec, false);
7114                 pr_debug("Set back pending irq %d\n", pending_vec);
7115         }
7116
7117         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7118         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7119         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7120         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7121         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7122         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7123
7124         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7125         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7126
7127         update_cr8_intercept(vcpu);
7128
7129         /* Older userspace won't unhalt the vcpu on reset. */
7130         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7131             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7132             !is_protmode(vcpu))
7133                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7134
7135         kvm_make_request(KVM_REQ_EVENT, vcpu);
7136
7137         return 0;
7138 }
7139
7140 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7141                                         struct kvm_guest_debug *dbg)
7142 {
7143         unsigned long rflags;
7144         int i, r;
7145
7146         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7147                 r = -EBUSY;
7148                 if (vcpu->arch.exception.pending)
7149                         goto out;
7150                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7151                         kvm_queue_exception(vcpu, DB_VECTOR);
7152                 else
7153                         kvm_queue_exception(vcpu, BP_VECTOR);
7154         }
7155
7156         /*
7157          * Read rflags as long as potentially injected trace flags are still
7158          * filtered out.
7159          */
7160         rflags = kvm_get_rflags(vcpu);
7161
7162         vcpu->guest_debug = dbg->control;
7163         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7164                 vcpu->guest_debug = 0;
7165
7166         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7167                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7168                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7169                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7170         } else {
7171                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7172                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7173         }
7174         kvm_update_dr7(vcpu);
7175
7176         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7177                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7178                         get_segment_base(vcpu, VCPU_SREG_CS);
7179
7180         /*
7181          * Trigger an rflags update that will inject or remove the trace
7182          * flags.
7183          */
7184         kvm_set_rflags(vcpu, rflags);
7185
7186         kvm_x86_ops->update_bp_intercept(vcpu);
7187
7188         r = 0;
7189
7190 out:
7191
7192         return r;
7193 }
7194
7195 /*
7196  * Translate a guest virtual address to a guest physical address.
7197  */
7198 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7199                                     struct kvm_translation *tr)
7200 {
7201         unsigned long vaddr = tr->linear_address;
7202         gpa_t gpa;
7203         int idx;
7204
7205         idx = srcu_read_lock(&vcpu->kvm->srcu);
7206         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7207         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7208         tr->physical_address = gpa;
7209         tr->valid = gpa != UNMAPPED_GVA;
7210         tr->writeable = 1;
7211         tr->usermode = 0;
7212
7213         return 0;
7214 }
7215
7216 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7217 {
7218         struct fxregs_state *fxsave =
7219                         &vcpu->arch.guest_fpu.state.fxsave;
7220
7221         memcpy(fpu->fpr, fxsave->st_space, 128);
7222         fpu->fcw = fxsave->cwd;
7223         fpu->fsw = fxsave->swd;
7224         fpu->ftwx = fxsave->twd;
7225         fpu->last_opcode = fxsave->fop;
7226         fpu->last_ip = fxsave->rip;
7227         fpu->last_dp = fxsave->rdp;
7228         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7229
7230         return 0;
7231 }
7232
7233 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7234 {
7235         struct fxregs_state *fxsave =
7236                         &vcpu->arch.guest_fpu.state.fxsave;
7237
7238         memcpy(fxsave->st_space, fpu->fpr, 128);
7239         fxsave->cwd = fpu->fcw;
7240         fxsave->swd = fpu->fsw;
7241         fxsave->twd = fpu->ftwx;
7242         fxsave->fop = fpu->last_opcode;
7243         fxsave->rip = fpu->last_ip;
7244         fxsave->rdp = fpu->last_dp;
7245         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7246
7247         return 0;
7248 }
7249
7250 static void fx_init(struct kvm_vcpu *vcpu)
7251 {
7252         fpstate_init(&vcpu->arch.guest_fpu.state);
7253         if (cpu_has_xsaves)
7254                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7255                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7256
7257         /*
7258          * Ensure guest xcr0 is valid for loading
7259          */
7260         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7261
7262         vcpu->arch.cr0 |= X86_CR0_ET;
7263 }
7264
7265 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7266 {
7267         if (vcpu->guest_fpu_loaded)
7268                 return;
7269
7270         /*
7271          * Restore all possible states in the guest,
7272          * and assume host would use all available bits.
7273          * Guest xcr0 would be loaded later.
7274          */
7275         vcpu->guest_fpu_loaded = 1;
7276         __kernel_fpu_begin();
7277         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7278         trace_kvm_fpu(1);
7279 }
7280
7281 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7282 {
7283         if (!vcpu->guest_fpu_loaded) {
7284                 vcpu->fpu_counter = 0;
7285                 return;
7286         }
7287
7288         vcpu->guest_fpu_loaded = 0;
7289         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7290         __kernel_fpu_end();
7291         ++vcpu->stat.fpu_reload;
7292         /*
7293          * If using eager FPU mode, or if the guest is a frequent user
7294          * of the FPU, just leave the FPU active for next time.
7295          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7296          * the FPU in bursts will revert to loading it on demand.
7297          */
7298         if (!vcpu->arch.eager_fpu) {
7299                 if (++vcpu->fpu_counter < 5)
7300                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7301         }
7302         trace_kvm_fpu(0);
7303 }
7304
7305 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7306 {
7307         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7308
7309         kvmclock_reset(vcpu);
7310
7311         kvm_x86_ops->vcpu_free(vcpu);
7312         free_cpumask_var(wbinvd_dirty_mask);
7313 }
7314
7315 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7316                                                 unsigned int id)
7317 {
7318         struct kvm_vcpu *vcpu;
7319
7320         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7321                 printk_once(KERN_WARNING
7322                 "kvm: SMP vm created on host with unstable TSC; "
7323                 "guest TSC will not be reliable\n");
7324
7325         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7326
7327         return vcpu;
7328 }
7329
7330 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7331 {
7332         int r;
7333
7334         kvm_vcpu_mtrr_init(vcpu);
7335         r = vcpu_load(vcpu);
7336         if (r)
7337                 return r;
7338         kvm_vcpu_reset(vcpu, false);
7339         kvm_mmu_setup(vcpu);
7340         vcpu_put(vcpu);
7341         return r;
7342 }
7343
7344 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7345 {
7346         struct msr_data msr;
7347         struct kvm *kvm = vcpu->kvm;
7348
7349         if (vcpu_load(vcpu))
7350                 return;
7351         msr.data = 0x0;
7352         msr.index = MSR_IA32_TSC;
7353         msr.host_initiated = true;
7354         kvm_write_tsc(vcpu, &msr);
7355         vcpu_put(vcpu);
7356
7357         if (!kvmclock_periodic_sync)
7358                 return;
7359
7360         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7361                                         KVMCLOCK_SYNC_PERIOD);
7362 }
7363
7364 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7365 {
7366         int r;
7367         vcpu->arch.apf.msr_val = 0;
7368
7369         r = vcpu_load(vcpu);
7370         BUG_ON(r);
7371         kvm_mmu_unload(vcpu);
7372         vcpu_put(vcpu);
7373
7374         kvm_x86_ops->vcpu_free(vcpu);
7375 }
7376
7377 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7378 {
7379         vcpu->arch.hflags = 0;
7380
7381         atomic_set(&vcpu->arch.nmi_queued, 0);
7382         vcpu->arch.nmi_pending = 0;
7383         vcpu->arch.nmi_injected = false;
7384         kvm_clear_interrupt_queue(vcpu);
7385         kvm_clear_exception_queue(vcpu);
7386
7387         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7388         kvm_update_dr0123(vcpu);
7389         vcpu->arch.dr6 = DR6_INIT;
7390         kvm_update_dr6(vcpu);
7391         vcpu->arch.dr7 = DR7_FIXED_1;
7392         kvm_update_dr7(vcpu);
7393
7394         vcpu->arch.cr2 = 0;
7395
7396         kvm_make_request(KVM_REQ_EVENT, vcpu);
7397         vcpu->arch.apf.msr_val = 0;
7398         vcpu->arch.st.msr_val = 0;
7399
7400         kvmclock_reset(vcpu);
7401
7402         kvm_clear_async_pf_completion_queue(vcpu);
7403         kvm_async_pf_hash_reset(vcpu);
7404         vcpu->arch.apf.halted = false;
7405
7406         if (!init_event) {
7407                 kvm_pmu_reset(vcpu);
7408                 vcpu->arch.smbase = 0x30000;
7409         }
7410
7411         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7412         vcpu->arch.regs_avail = ~0;
7413         vcpu->arch.regs_dirty = ~0;
7414
7415         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7416 }
7417
7418 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7419 {
7420         struct kvm_segment cs;
7421
7422         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7423         cs.selector = vector << 8;
7424         cs.base = vector << 12;
7425         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7426         kvm_rip_write(vcpu, 0);
7427 }
7428
7429 int kvm_arch_hardware_enable(void)
7430 {
7431         struct kvm *kvm;
7432         struct kvm_vcpu *vcpu;
7433         int i;
7434         int ret;
7435         u64 local_tsc;
7436         u64 max_tsc = 0;
7437         bool stable, backwards_tsc = false;
7438
7439         kvm_shared_msr_cpu_online();
7440         ret = kvm_x86_ops->hardware_enable();
7441         if (ret != 0)
7442                 return ret;
7443
7444         local_tsc = rdtsc();
7445         stable = !check_tsc_unstable();
7446         list_for_each_entry(kvm, &vm_list, vm_list) {
7447                 kvm_for_each_vcpu(i, vcpu, kvm) {
7448                         if (!stable && vcpu->cpu == smp_processor_id())
7449                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7450                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7451                                 backwards_tsc = true;
7452                                 if (vcpu->arch.last_host_tsc > max_tsc)
7453                                         max_tsc = vcpu->arch.last_host_tsc;
7454                         }
7455                 }
7456         }
7457
7458         /*
7459          * Sometimes, even reliable TSCs go backwards.  This happens on
7460          * platforms that reset TSC during suspend or hibernate actions, but
7461          * maintain synchronization.  We must compensate.  Fortunately, we can
7462          * detect that condition here, which happens early in CPU bringup,
7463          * before any KVM threads can be running.  Unfortunately, we can't
7464          * bring the TSCs fully up to date with real time, as we aren't yet far
7465          * enough into CPU bringup that we know how much real time has actually
7466          * elapsed; our helper function, get_kernel_ns() will be using boot
7467          * variables that haven't been updated yet.
7468          *
7469          * So we simply find the maximum observed TSC above, then record the
7470          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7471          * the adjustment will be applied.  Note that we accumulate
7472          * adjustments, in case multiple suspend cycles happen before some VCPU
7473          * gets a chance to run again.  In the event that no KVM threads get a
7474          * chance to run, we will miss the entire elapsed period, as we'll have
7475          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7476          * loose cycle time.  This isn't too big a deal, since the loss will be
7477          * uniform across all VCPUs (not to mention the scenario is extremely
7478          * unlikely). It is possible that a second hibernate recovery happens
7479          * much faster than a first, causing the observed TSC here to be
7480          * smaller; this would require additional padding adjustment, which is
7481          * why we set last_host_tsc to the local tsc observed here.
7482          *
7483          * N.B. - this code below runs only on platforms with reliable TSC,
7484          * as that is the only way backwards_tsc is set above.  Also note
7485          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7486          * have the same delta_cyc adjustment applied if backwards_tsc
7487          * is detected.  Note further, this adjustment is only done once,
7488          * as we reset last_host_tsc on all VCPUs to stop this from being
7489          * called multiple times (one for each physical CPU bringup).
7490          *
7491          * Platforms with unreliable TSCs don't have to deal with this, they
7492          * will be compensated by the logic in vcpu_load, which sets the TSC to
7493          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7494          * guarantee that they stay in perfect synchronization.
7495          */
7496         if (backwards_tsc) {
7497                 u64 delta_cyc = max_tsc - local_tsc;
7498                 backwards_tsc_observed = true;
7499                 list_for_each_entry(kvm, &vm_list, vm_list) {
7500                         kvm_for_each_vcpu(i, vcpu, kvm) {
7501                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7502                                 vcpu->arch.last_host_tsc = local_tsc;
7503                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7504                         }
7505
7506                         /*
7507                          * We have to disable TSC offset matching.. if you were
7508                          * booting a VM while issuing an S4 host suspend....
7509                          * you may have some problem.  Solving this issue is
7510                          * left as an exercise to the reader.
7511                          */
7512                         kvm->arch.last_tsc_nsec = 0;
7513                         kvm->arch.last_tsc_write = 0;
7514                 }
7515
7516         }
7517         return 0;
7518 }
7519
7520 void kvm_arch_hardware_disable(void)
7521 {
7522         kvm_x86_ops->hardware_disable();
7523         drop_user_return_notifiers();
7524 }
7525
7526 int kvm_arch_hardware_setup(void)
7527 {
7528         int r;
7529
7530         r = kvm_x86_ops->hardware_setup();
7531         if (r != 0)
7532                 return r;
7533
7534         if (kvm_has_tsc_control) {
7535                 /*
7536                  * Make sure the user can only configure tsc_khz values that
7537                  * fit into a signed integer.
7538                  * A min value is not calculated needed because it will always
7539                  * be 1 on all machines.
7540                  */
7541                 u64 max = min(0x7fffffffULL,
7542                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7543                 kvm_max_guest_tsc_khz = max;
7544
7545                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7546         }
7547
7548         kvm_init_msr_list();
7549         return 0;
7550 }
7551
7552 void kvm_arch_hardware_unsetup(void)
7553 {
7554         kvm_x86_ops->hardware_unsetup();
7555 }
7556
7557 void kvm_arch_check_processor_compat(void *rtn)
7558 {
7559         kvm_x86_ops->check_processor_compatibility(rtn);
7560 }
7561
7562 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7563 {
7564         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7565 }
7566 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7567
7568 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7569 {
7570         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7571 }
7572
7573 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7574 {
7575         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7576 }
7577
7578 struct static_key kvm_no_apic_vcpu __read_mostly;
7579
7580 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7581 {
7582         struct page *page;
7583         struct kvm *kvm;
7584         int r;
7585
7586         BUG_ON(vcpu->kvm == NULL);
7587         kvm = vcpu->kvm;
7588
7589         vcpu->arch.pv.pv_unhalted = false;
7590         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7591         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7592                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7593         else
7594                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7595
7596         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7597         if (!page) {
7598                 r = -ENOMEM;
7599                 goto fail;
7600         }
7601         vcpu->arch.pio_data = page_address(page);
7602
7603         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7604
7605         r = kvm_mmu_create(vcpu);
7606         if (r < 0)
7607                 goto fail_free_pio_data;
7608
7609         if (irqchip_in_kernel(kvm)) {
7610                 r = kvm_create_lapic(vcpu);
7611                 if (r < 0)
7612                         goto fail_mmu_destroy;
7613         } else
7614                 static_key_slow_inc(&kvm_no_apic_vcpu);
7615
7616         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7617                                        GFP_KERNEL);
7618         if (!vcpu->arch.mce_banks) {
7619                 r = -ENOMEM;
7620                 goto fail_free_lapic;
7621         }
7622         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7623
7624         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7625                 r = -ENOMEM;
7626                 goto fail_free_mce_banks;
7627         }
7628
7629         fx_init(vcpu);
7630
7631         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7632         vcpu->arch.pv_time_enabled = false;
7633
7634         vcpu->arch.guest_supported_xcr0 = 0;
7635         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7636
7637         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7638
7639         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7640
7641         kvm_async_pf_hash_reset(vcpu);
7642         kvm_pmu_init(vcpu);
7643
7644         vcpu->arch.pending_external_vector = -1;
7645
7646         return 0;
7647
7648 fail_free_mce_banks:
7649         kfree(vcpu->arch.mce_banks);
7650 fail_free_lapic:
7651         kvm_free_lapic(vcpu);
7652 fail_mmu_destroy:
7653         kvm_mmu_destroy(vcpu);
7654 fail_free_pio_data:
7655         free_page((unsigned long)vcpu->arch.pio_data);
7656 fail:
7657         return r;
7658 }
7659
7660 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7661 {
7662         int idx;
7663
7664         kvm_pmu_destroy(vcpu);
7665         kfree(vcpu->arch.mce_banks);
7666         kvm_free_lapic(vcpu);
7667         idx = srcu_read_lock(&vcpu->kvm->srcu);
7668         kvm_mmu_destroy(vcpu);
7669         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7670         free_page((unsigned long)vcpu->arch.pio_data);
7671         if (!lapic_in_kernel(vcpu))
7672                 static_key_slow_dec(&kvm_no_apic_vcpu);
7673 }
7674
7675 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7676 {
7677         kvm_x86_ops->sched_in(vcpu, cpu);
7678 }
7679
7680 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7681 {
7682         if (type)
7683                 return -EINVAL;
7684
7685         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7686         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7687         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7688         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7689         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7690
7691         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7692         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7693         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7694         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7695                 &kvm->arch.irq_sources_bitmap);
7696
7697         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7698         mutex_init(&kvm->arch.apic_map_lock);
7699         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7700
7701         pvclock_update_vm_gtod_copy(kvm);
7702
7703         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7704         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7705
7706         return 0;
7707 }
7708
7709 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7710 {
7711         int r;
7712         r = vcpu_load(vcpu);
7713         BUG_ON(r);
7714         kvm_mmu_unload(vcpu);
7715         vcpu_put(vcpu);
7716 }
7717
7718 static void kvm_free_vcpus(struct kvm *kvm)
7719 {
7720         unsigned int i;
7721         struct kvm_vcpu *vcpu;
7722
7723         /*
7724          * Unpin any mmu pages first.
7725          */
7726         kvm_for_each_vcpu(i, vcpu, kvm) {
7727                 kvm_clear_async_pf_completion_queue(vcpu);
7728                 kvm_unload_vcpu_mmu(vcpu);
7729         }
7730         kvm_for_each_vcpu(i, vcpu, kvm)
7731                 kvm_arch_vcpu_free(vcpu);
7732
7733         mutex_lock(&kvm->lock);
7734         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7735                 kvm->vcpus[i] = NULL;
7736
7737         atomic_set(&kvm->online_vcpus, 0);
7738         mutex_unlock(&kvm->lock);
7739 }
7740
7741 void kvm_arch_sync_events(struct kvm *kvm)
7742 {
7743         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7744         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7745         kvm_free_all_assigned_devices(kvm);
7746         kvm_free_pit(kvm);
7747 }
7748
7749 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7750 {
7751         int i, r;
7752         unsigned long hva;
7753         struct kvm_memslots *slots = kvm_memslots(kvm);
7754         struct kvm_memory_slot *slot, old;
7755
7756         /* Called with kvm->slots_lock held.  */
7757         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7758                 return -EINVAL;
7759
7760         slot = id_to_memslot(slots, id);
7761         if (size) {
7762                 if (WARN_ON(slot->npages))
7763                         return -EEXIST;
7764
7765                 /*
7766                  * MAP_SHARED to prevent internal slot pages from being moved
7767                  * by fork()/COW.
7768                  */
7769                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7770                               MAP_SHARED | MAP_ANONYMOUS, 0);
7771                 if (IS_ERR((void *)hva))
7772                         return PTR_ERR((void *)hva);
7773         } else {
7774                 if (!slot->npages)
7775                         return 0;
7776
7777                 hva = 0;
7778         }
7779
7780         old = *slot;
7781         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7782                 struct kvm_userspace_memory_region m;
7783
7784                 m.slot = id | (i << 16);
7785                 m.flags = 0;
7786                 m.guest_phys_addr = gpa;
7787                 m.userspace_addr = hva;
7788                 m.memory_size = size;
7789                 r = __kvm_set_memory_region(kvm, &m);
7790                 if (r < 0)
7791                         return r;
7792         }
7793
7794         if (!size) {
7795                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7796                 WARN_ON(r < 0);
7797         }
7798
7799         return 0;
7800 }
7801 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7802
7803 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7804 {
7805         int r;
7806
7807         mutex_lock(&kvm->slots_lock);
7808         r = __x86_set_memory_region(kvm, id, gpa, size);
7809         mutex_unlock(&kvm->slots_lock);
7810
7811         return r;
7812 }
7813 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7814
7815 void kvm_arch_destroy_vm(struct kvm *kvm)
7816 {
7817         if (current->mm == kvm->mm) {
7818                 /*
7819                  * Free memory regions allocated on behalf of userspace,
7820                  * unless the the memory map has changed due to process exit
7821                  * or fd copying.
7822                  */
7823                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7824                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7825                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7826         }
7827         kvm_iommu_unmap_guest(kvm);
7828         kfree(kvm->arch.vpic);
7829         kfree(kvm->arch.vioapic);
7830         kvm_free_vcpus(kvm);
7831         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7832 }
7833
7834 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7835                            struct kvm_memory_slot *dont)
7836 {
7837         int i;
7838
7839         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7840                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7841                         kvfree(free->arch.rmap[i]);
7842                         free->arch.rmap[i] = NULL;
7843                 }
7844                 if (i == 0)
7845                         continue;
7846
7847                 if (!dont || free->arch.lpage_info[i - 1] !=
7848                              dont->arch.lpage_info[i - 1]) {
7849                         kvfree(free->arch.lpage_info[i - 1]);
7850                         free->arch.lpage_info[i - 1] = NULL;
7851                 }
7852         }
7853 }
7854
7855 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7856                             unsigned long npages)
7857 {
7858         int i;
7859
7860         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7861                 unsigned long ugfn;
7862                 int lpages;
7863                 int level = i + 1;
7864
7865                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7866                                       slot->base_gfn, level) + 1;
7867
7868                 slot->arch.rmap[i] =
7869                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7870                 if (!slot->arch.rmap[i])
7871                         goto out_free;
7872                 if (i == 0)
7873                         continue;
7874
7875                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7876                                         sizeof(*slot->arch.lpage_info[i - 1]));
7877                 if (!slot->arch.lpage_info[i - 1])
7878                         goto out_free;
7879
7880                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7881                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7882                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7883                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7884                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7885                 /*
7886                  * If the gfn and userspace address are not aligned wrt each
7887                  * other, or if explicitly asked to, disable large page
7888                  * support for this slot
7889                  */
7890                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7891                     !kvm_largepages_enabled()) {
7892                         unsigned long j;
7893
7894                         for (j = 0; j < lpages; ++j)
7895                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7896                 }
7897         }
7898
7899         return 0;
7900
7901 out_free:
7902         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7903                 kvfree(slot->arch.rmap[i]);
7904                 slot->arch.rmap[i] = NULL;
7905                 if (i == 0)
7906                         continue;
7907
7908                 kvfree(slot->arch.lpage_info[i - 1]);
7909                 slot->arch.lpage_info[i - 1] = NULL;
7910         }
7911         return -ENOMEM;
7912 }
7913
7914 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7915 {
7916         /*
7917          * memslots->generation has been incremented.
7918          * mmio generation may have reached its maximum value.
7919          */
7920         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7921 }
7922
7923 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7924                                 struct kvm_memory_slot *memslot,
7925                                 const struct kvm_userspace_memory_region *mem,
7926                                 enum kvm_mr_change change)
7927 {
7928         return 0;
7929 }
7930
7931 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7932                                      struct kvm_memory_slot *new)
7933 {
7934         /* Still write protect RO slot */
7935         if (new->flags & KVM_MEM_READONLY) {
7936                 kvm_mmu_slot_remove_write_access(kvm, new);
7937                 return;
7938         }
7939
7940         /*
7941          * Call kvm_x86_ops dirty logging hooks when they are valid.
7942          *
7943          * kvm_x86_ops->slot_disable_log_dirty is called when:
7944          *
7945          *  - KVM_MR_CREATE with dirty logging is disabled
7946          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7947          *
7948          * The reason is, in case of PML, we need to set D-bit for any slots
7949          * with dirty logging disabled in order to eliminate unnecessary GPA
7950          * logging in PML buffer (and potential PML buffer full VMEXT). This
7951          * guarantees leaving PML enabled during guest's lifetime won't have
7952          * any additonal overhead from PML when guest is running with dirty
7953          * logging disabled for memory slots.
7954          *
7955          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7956          * to dirty logging mode.
7957          *
7958          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7959          *
7960          * In case of write protect:
7961          *
7962          * Write protect all pages for dirty logging.
7963          *
7964          * All the sptes including the large sptes which point to this
7965          * slot are set to readonly. We can not create any new large
7966          * spte on this slot until the end of the logging.
7967          *
7968          * See the comments in fast_page_fault().
7969          */
7970         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7971                 if (kvm_x86_ops->slot_enable_log_dirty)
7972                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7973                 else
7974                         kvm_mmu_slot_remove_write_access(kvm, new);
7975         } else {
7976                 if (kvm_x86_ops->slot_disable_log_dirty)
7977                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7978         }
7979 }
7980
7981 void kvm_arch_commit_memory_region(struct kvm *kvm,
7982                                 const struct kvm_userspace_memory_region *mem,
7983                                 const struct kvm_memory_slot *old,
7984                                 const struct kvm_memory_slot *new,
7985                                 enum kvm_mr_change change)
7986 {
7987         int nr_mmu_pages = 0;
7988
7989         if (!kvm->arch.n_requested_mmu_pages)
7990                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7991
7992         if (nr_mmu_pages)
7993                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7994
7995         /*
7996          * Dirty logging tracks sptes in 4k granularity, meaning that large
7997          * sptes have to be split.  If live migration is successful, the guest
7998          * in the source machine will be destroyed and large sptes will be
7999          * created in the destination. However, if the guest continues to run
8000          * in the source machine (for example if live migration fails), small
8001          * sptes will remain around and cause bad performance.
8002          *
8003          * Scan sptes if dirty logging has been stopped, dropping those
8004          * which can be collapsed into a single large-page spte.  Later
8005          * page faults will create the large-page sptes.
8006          */
8007         if ((change != KVM_MR_DELETE) &&
8008                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8009                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8010                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8011
8012         /*
8013          * Set up write protection and/or dirty logging for the new slot.
8014          *
8015          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8016          * been zapped so no dirty logging staff is needed for old slot. For
8017          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8018          * new and it's also covered when dealing with the new slot.
8019          *
8020          * FIXME: const-ify all uses of struct kvm_memory_slot.
8021          */
8022         if (change != KVM_MR_DELETE)
8023                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8024 }
8025
8026 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8027 {
8028         kvm_mmu_invalidate_zap_all_pages(kvm);
8029 }
8030
8031 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8032                                    struct kvm_memory_slot *slot)
8033 {
8034         kvm_mmu_invalidate_zap_all_pages(kvm);
8035 }
8036
8037 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8038 {
8039         if (!list_empty_careful(&vcpu->async_pf.done))
8040                 return true;
8041
8042         if (kvm_apic_has_events(vcpu))
8043                 return true;
8044
8045         if (vcpu->arch.pv.pv_unhalted)
8046                 return true;
8047
8048         if (atomic_read(&vcpu->arch.nmi_queued))
8049                 return true;
8050
8051         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8052                 return true;
8053
8054         if (kvm_arch_interrupt_allowed(vcpu) &&
8055             kvm_cpu_has_interrupt(vcpu))
8056                 return true;
8057
8058         return false;
8059 }
8060
8061 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8062 {
8063         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8064                 kvm_x86_ops->check_nested_events(vcpu, false);
8065
8066         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8067 }
8068
8069 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8070 {
8071         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8072 }
8073
8074 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8075 {
8076         return kvm_x86_ops->interrupt_allowed(vcpu);
8077 }
8078
8079 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8080 {
8081         if (is_64_bit_mode(vcpu))
8082                 return kvm_rip_read(vcpu);
8083         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8084                      kvm_rip_read(vcpu));
8085 }
8086 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8087
8088 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8089 {
8090         return kvm_get_linear_rip(vcpu) == linear_rip;
8091 }
8092 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8093
8094 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8095 {
8096         unsigned long rflags;
8097
8098         rflags = kvm_x86_ops->get_rflags(vcpu);
8099         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8100                 rflags &= ~X86_EFLAGS_TF;
8101         return rflags;
8102 }
8103 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8104
8105 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8106 {
8107         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8108             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8109                 rflags |= X86_EFLAGS_TF;
8110         kvm_x86_ops->set_rflags(vcpu, rflags);
8111 }
8112
8113 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8114 {
8115         __kvm_set_rflags(vcpu, rflags);
8116         kvm_make_request(KVM_REQ_EVENT, vcpu);
8117 }
8118 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8119
8120 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8121 {
8122         int r;
8123
8124         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8125               work->wakeup_all)
8126                 return;
8127
8128         r = kvm_mmu_reload(vcpu);
8129         if (unlikely(r))
8130                 return;
8131
8132         if (!vcpu->arch.mmu.direct_map &&
8133               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8134                 return;
8135
8136         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8137 }
8138
8139 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8140 {
8141         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8142 }
8143
8144 static inline u32 kvm_async_pf_next_probe(u32 key)
8145 {
8146         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8147 }
8148
8149 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8150 {
8151         u32 key = kvm_async_pf_hash_fn(gfn);
8152
8153         while (vcpu->arch.apf.gfns[key] != ~0)
8154                 key = kvm_async_pf_next_probe(key);
8155
8156         vcpu->arch.apf.gfns[key] = gfn;
8157 }
8158
8159 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8160 {
8161         int i;
8162         u32 key = kvm_async_pf_hash_fn(gfn);
8163
8164         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8165                      (vcpu->arch.apf.gfns[key] != gfn &&
8166                       vcpu->arch.apf.gfns[key] != ~0); i++)
8167                 key = kvm_async_pf_next_probe(key);
8168
8169         return key;
8170 }
8171
8172 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8173 {
8174         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8175 }
8176
8177 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8178 {
8179         u32 i, j, k;
8180
8181         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8182         while (true) {
8183                 vcpu->arch.apf.gfns[i] = ~0;
8184                 do {
8185                         j = kvm_async_pf_next_probe(j);
8186                         if (vcpu->arch.apf.gfns[j] == ~0)
8187                                 return;
8188                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8189                         /*
8190                          * k lies cyclically in ]i,j]
8191                          * |    i.k.j |
8192                          * |....j i.k.| or  |.k..j i...|
8193                          */
8194                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8195                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8196                 i = j;
8197         }
8198 }
8199
8200 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8201 {
8202
8203         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8204                                       sizeof(val));
8205 }
8206
8207 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8208                                      struct kvm_async_pf *work)
8209 {
8210         struct x86_exception fault;
8211
8212         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8213         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8214
8215         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8216             (vcpu->arch.apf.send_user_only &&
8217              kvm_x86_ops->get_cpl(vcpu) == 0))
8218                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8219         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8220                 fault.vector = PF_VECTOR;
8221                 fault.error_code_valid = true;
8222                 fault.error_code = 0;
8223                 fault.nested_page_fault = false;
8224                 fault.address = work->arch.token;
8225                 kvm_inject_page_fault(vcpu, &fault);
8226         }
8227 }
8228
8229 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8230                                  struct kvm_async_pf *work)
8231 {
8232         struct x86_exception fault;
8233
8234         if (work->wakeup_all)
8235                 work->arch.token = ~0; /* broadcast wakeup */
8236         else
8237                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8238         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8239
8240         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8241             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8242                 fault.vector = PF_VECTOR;
8243                 fault.error_code_valid = true;
8244                 fault.error_code = 0;
8245                 fault.nested_page_fault = false;
8246                 fault.address = work->arch.token;
8247                 kvm_inject_page_fault(vcpu, &fault);
8248         }
8249         vcpu->arch.apf.halted = false;
8250         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8251 }
8252
8253 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8254 {
8255         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8256                 return true;
8257         else
8258                 return kvm_can_do_async_pf(vcpu);
8259 }
8260
8261 void kvm_arch_start_assignment(struct kvm *kvm)
8262 {
8263         atomic_inc(&kvm->arch.assigned_device_count);
8264 }
8265 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8266
8267 void kvm_arch_end_assignment(struct kvm *kvm)
8268 {
8269         atomic_dec(&kvm->arch.assigned_device_count);
8270 }
8271 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8272
8273 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8274 {
8275         return atomic_read(&kvm->arch.assigned_device_count);
8276 }
8277 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8278
8279 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8280 {
8281         atomic_inc(&kvm->arch.noncoherent_dma_count);
8282 }
8283 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8284
8285 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8286 {
8287         atomic_dec(&kvm->arch.noncoherent_dma_count);
8288 }
8289 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8290
8291 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8292 {
8293         return atomic_read(&kvm->arch.noncoherent_dma_count);
8294 }
8295 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8296
8297 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8298                                       struct irq_bypass_producer *prod)
8299 {
8300         struct kvm_kernel_irqfd *irqfd =
8301                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8302
8303         if (kvm_x86_ops->update_pi_irte) {
8304                 irqfd->producer = prod;
8305                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8306                                 prod->irq, irqfd->gsi, 1);
8307         }
8308
8309         return -EINVAL;
8310 }
8311
8312 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8313                                       struct irq_bypass_producer *prod)
8314 {
8315         int ret;
8316         struct kvm_kernel_irqfd *irqfd =
8317                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8318
8319         if (!kvm_x86_ops->update_pi_irte) {
8320                 WARN_ON(irqfd->producer != NULL);
8321                 return;
8322         }
8323
8324         WARN_ON(irqfd->producer != prod);
8325         irqfd->producer = NULL;
8326
8327         /*
8328          * When producer of consumer is unregistered, we change back to
8329          * remapped mode, so we can re-use the current implementation
8330          * when the irq is masked/disabed or the consumer side (KVM
8331          * int this case doesn't want to receive the interrupts.
8332         */
8333         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8334         if (ret)
8335                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8336                        " fails: %d\n", irqfd->consumer.token, ret);
8337 }
8338
8339 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8340                                    uint32_t guest_irq, bool set)
8341 {
8342         if (!kvm_x86_ops->update_pi_irte)
8343                 return -EINVAL;
8344
8345         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8346 }
8347
8348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8359 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8360 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8361 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8362 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8363 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8364 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);