arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202         unsigned long flags;
 203
 204         /*
 205          * Disabling irqs at this point since the following code could be
 206          * interrupted and executed through kvm_arch_hardware_disable()
 207          */
 208         local_irq_save(flags);
 209         if (locals->registered) {
 210                 locals->registered = false;
 211                 user_return_notifier_unregister(urn);
 212         }
 213         local_irq_restore(flags);
 214         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 215                 values = &locals->values[slot];
 216                 if (values->host != values->curr) {
 217                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 218                         values->curr = values->host;
 219                 }
 220         }
 221 }
 222
 223 static void shared_msr_update(unsigned slot, u32 msr)
 224 {
 225         u64 value;
 226         unsigned int cpu = smp_processor_id();
 227         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 228
 229         /* only read, and nobody should modify it at this time,
 230          * so don't need lock */
 231         if (slot >= shared_msrs_global.nr) {
 232                 printk(KERN_ERR "kvm: invalid MSR slot!");
 233                 return;
 234         }
 235         rdmsrl_safe(msr, &value);
 236         smsr->values[slot].host = value;
 237         smsr->values[slot].curr = value;
 238 }
 239
 240 void kvm_define_shared_msr(unsigned slot, u32 msr)
 241 {
 242         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 243         shared_msrs_global.msrs[slot] = msr;
 244         if (slot >= shared_msrs_global.nr)
 245                 shared_msrs_global.nr = slot + 1;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 248
 249 static void kvm_shared_msr_cpu_online(void)
 250 {
 251         unsigned i;
 252
 253         for (i = 0; i < shared_msrs_global.nr; ++i)
 254                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 255 }
 256
 257 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 258 {
 259         unsigned int cpu = smp_processor_id();
 260         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 261         int err;
 262
 263         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 264                 return 0;
 265         smsr->values[slot].curr = value;
 266         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 267         if (err)
 268                 return 1;
 269
 270         if (!smsr->registered) {
 271                 smsr->urn.on_user_return = kvm_on_user_return;
 272                 user_return_notifier_register(&smsr->urn);
 273                 smsr->registered = true;
 274         }
 275         return 0;
 276 }
 277 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 278
 279 static void drop_user_return_notifiers(void)
 280 {
 281         unsigned int cpu = smp_processor_id();
 282         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 283
 284         if (smsr->registered)
 285                 kvm_on_user_return(&smsr->urn);
 286 }
 287
 288 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 289 {
 290         return vcpu->arch.apic_base;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 293
 294 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 295 {
 296         u64 old_state = vcpu->arch.apic_base &
 297                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 298         u64 new_state = msr_info->data &
 299                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 300         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 301                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 302
 303         if (!msr_info->host_initiated &&
 304             ((msr_info->data & reserved_bits) != 0 ||
 305              new_state == X2APIC_ENABLE ||
 306              (new_state == MSR_IA32_APICBASE_ENABLE &&
 307               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 308              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 309               old_state == 0)))
 310                 return 1;
 311
 312         kvm_lapic_set_base(vcpu, msr_info->data);
 313         return 0;
 314 }
 315 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 316
 317 asmlinkage __visible void kvm_spurious_fault(void)
 318 {
 319         /* Fault while not rebooting.  We want the trace. */
 320         BUG();
 321 }
 322 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 323
 324 #define EXCPT_BENIGN            0
 325 #define EXCPT_CONTRIBUTORY      1
 326 #define EXCPT_PF                2
 327
 328 static int exception_class(int vector)
 329 {
 330         switch (vector) {
 331         case PF_VECTOR:
 332                 return EXCPT_PF;
 333         case DE_VECTOR:
 334         case TS_VECTOR:
 335         case NP_VECTOR:
 336         case SS_VECTOR:
 337         case GP_VECTOR:
 338                 return EXCPT_CONTRIBUTORY;
 339         default:
 340                 break;
 341         }
 342         return EXCPT_BENIGN;
 343 }
 344
 345 #define EXCPT_FAULT             0
 346 #define EXCPT_TRAP              1
 347 #define EXCPT_ABORT             2
 348 #define EXCPT_INTERRUPT         3
 349
 350 static int exception_type(int vector)
 351 {
 352         unsigned int mask;
 353
 354         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 355                 return EXCPT_INTERRUPT;
 356
 357         mask = 1 << vector;
 358
 359         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 360         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 361                 return EXCPT_TRAP;
 362
 363         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 364                 return EXCPT_ABORT;
 365
 366         /* Reserved exceptions will result in fault */
 367         return EXCPT_FAULT;
 368 }
 369
 370 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 371                 unsigned nr, bool has_error, u32 error_code,
 372                 bool reinject)
 373 {
 374         u32 prev_nr;
 375         int class1, class2;
 376
 377         kvm_make_request(KVM_REQ_EVENT, vcpu);
 378
 379         if (!vcpu->arch.exception.pending) {
 380         queue:
 381                 if (has_error && !is_protmode(vcpu))
 382                         has_error = false;
 383                 vcpu->arch.exception.pending = true;
 384                 vcpu->arch.exception.has_error_code = has_error;
 385                 vcpu->arch.exception.nr = nr;
 386                 vcpu->arch.exception.error_code = error_code;
 387                 vcpu->arch.exception.reinject = reinject;
 388                 return;
 389         }
 390
 391         /* to check exception */
 392         prev_nr = vcpu->arch.exception.nr;
 393         if (prev_nr == DF_VECTOR) {
 394                 /* triple fault -> shutdown */
 395                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 396                 return;
 397         }
 398         class1 = exception_class(prev_nr);
 399         class2 = exception_class(nr);
 400         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 401                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 402                 /* generate double fault per SDM Table 5-5 */
 403                 vcpu->arch.exception.pending = true;
 404                 vcpu->arch.exception.has_error_code = true;
 405                 vcpu->arch.exception.nr = DF_VECTOR;
 406                 vcpu->arch.exception.error_code = 0;
 407         } else
 408                 /* replace previous exception with a new one in a hope
 409                    that instruction re-execution will regenerate lost
 410                    exception */
 411                 goto queue;
 412 }
 413
 414 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 415 {
 416         kvm_multiple_exception(vcpu, nr, false, 0, false);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 419
 420 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 421 {
 422         kvm_multiple_exception(vcpu, nr, false, 0, true);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 425
 426 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 427 {
 428         if (err)
 429                 kvm_inject_gp(vcpu, 0);
 430         else
 431                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 434
 435 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 436 {
 437         ++vcpu->stat.pf_guest;
 438         vcpu->arch.cr2 = fault->address;
 439         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 440 }
 441 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 442
 443 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 444 {
 445         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 446                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 447         else
 448                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 449
 450         return fault->nested_page_fault;
 451 }
 452
 453 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 454 {
 455         atomic_inc(&vcpu->arch.nmi_queued);
 456         kvm_make_request(KVM_REQ_NMI, vcpu);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 459
 460 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 461 {
 462         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 465
 466 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 467 {
 468         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 469 }
 470 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 471
 472 /*
 473  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 474  * a #GP and return false.
 475  */
 476 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 477 {
 478         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 479                 return true;
 480         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 481         return false;
 482 }
 483 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 484
 485 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 486 {
 487         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 488                 return true;
 489
 490         kvm_queue_exception(vcpu, UD_VECTOR);
 491         return false;
 492 }
 493 EXPORT_SYMBOL_GPL(kvm_require_dr);
 494
 495 /*
 496  * This function will be used to read from the physical memory of the currently
 497  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 498  * can read from guest physical or from the guest's guest physical memory.
 499  */
 500 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 501                             gfn_t ngfn, void *data, int offset, int len,
 502                             u32 access)
 503 {
 504         struct x86_exception exception;
 505         gfn_t real_gfn;
 506         gpa_t ngpa;
 507
 508         ngpa     = gfn_to_gpa(ngfn);
 509         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 510         if (real_gfn == UNMAPPED_GVA)
 511                 return -EFAULT;
 512
 513         real_gfn = gpa_to_gfn(real_gfn);
 514
 515         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 516 }
 517 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 518
 519 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 520                                void *data, int offset, int len, u32 access)
 521 {
 522         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 523                                        data, offset, len, access);
 524 }
 525
 526 /*
 527  * Load the pae pdptrs.  Return true is they are all valid.
 528  */
 529 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 530 {
 531         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 532         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 533         int i;
 534         int ret;
 535         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 536
 537         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 538                                       offset * sizeof(u64), sizeof(pdpte),
 539                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 540         if (ret < 0) {
 541                 ret = 0;
 542                 goto out;
 543         }
 544         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 545                 if (is_present_gpte(pdpte[i]) &&
 546                     (pdpte[i] &
 547                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 548                         ret = 0;
 549                         goto out;
 550                 }
 551         }
 552         ret = 1;
 553
 554         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 555         __set_bit(VCPU_EXREG_PDPTR,
 556                   (unsigned long *)&vcpu->arch.regs_avail);
 557         __set_bit(VCPU_EXREG_PDPTR,
 558                   (unsigned long *)&vcpu->arch.regs_dirty);
 559 out:
 560
 561         return ret;
 562 }
 563 EXPORT_SYMBOL_GPL(load_pdptrs);
 564
 565 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 566 {
 567         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 568         bool changed = true;
 569         int offset;
 570         gfn_t gfn;
 571         int r;
 572
 573         if (is_long_mode(vcpu) || !is_pae(vcpu))
 574                 return false;
 575
 576         if (!test_bit(VCPU_EXREG_PDPTR,
 577                       (unsigned long *)&vcpu->arch.regs_avail))
 578                 return true;
 579
 580         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 581         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 582         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 583                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 584         if (r < 0)
 585                 goto out;
 586         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 587 out:
 588
 589         return changed;
 590 }
 591
 592 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 593 {
 594         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 595         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 596
 597         cr0 |= X86_CR0_ET;
 598
 599 #ifdef CONFIG_X86_64
 600         if (cr0 & 0xffffffff00000000UL)
 601                 return 1;
 602 #endif
 603
 604         cr0 &= ~CR0_RESERVED_BITS;
 605
 606         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 607                 return 1;
 608
 609         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 610                 return 1;
 611
 612         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 613 #ifdef CONFIG_X86_64
 614                 if ((vcpu->arch.efer & EFER_LME)) {
 615                         int cs_db, cs_l;
 616
 617                         if (!is_pae(vcpu))
 618                                 return 1;
 619                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 620                         if (cs_l)
 621                                 return 1;
 622                 } else
 623 #endif
 624                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 625                                                  kvm_read_cr3(vcpu)))
 626                         return 1;
 627         }
 628
 629         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 630                 return 1;
 631
 632         kvm_x86_ops->set_cr0(vcpu, cr0);
 633
 634         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 635                 kvm_clear_async_pf_completion_queue(vcpu);
 636                 kvm_async_pf_hash_reset(vcpu);
 637         }
 638
 639         if ((cr0 ^ old_cr0) & update_bits)
 640                 kvm_mmu_reset_context(vcpu);
 641
 642         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 643             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 644             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 645                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 646
 647         return 0;
 648 }
 649 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 650
 651 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 652 {
 653         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 654 }
 655 EXPORT_SYMBOL_GPL(kvm_lmsw);
 656
 657 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 658 {
 659         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 660                         !vcpu->guest_xcr0_loaded) {
 661                 /* kvm_set_xcr() also depends on this */
 662                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 663                 vcpu->guest_xcr0_loaded = 1;
 664         }
 665 }
 666
 667 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 668 {
 669         if (vcpu->guest_xcr0_loaded) {
 670                 if (vcpu->arch.xcr0 != host_xcr0)
 671                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 672                 vcpu->guest_xcr0_loaded = 0;
 673         }
 674 }
 675
 676 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 677 {
 678         u64 xcr0 = xcr;
 679         u64 old_xcr0 = vcpu->arch.xcr0;
 680         u64 valid_bits;
 681
 682         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 683         if (index != XCR_XFEATURE_ENABLED_MASK)
 684                 return 1;
 685         if (!(xcr0 & XFEATURE_MASK_FP))
 686                 return 1;
 687         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 688                 return 1;
 689
 690         /*
 691          * Do not allow the guest to set bits that we do not support
 692          * saving.  However, xcr0 bit 0 is always set, even if the
 693          * emulated CPU does not support XSAVE (see fx_init).
 694          */
 695         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 696         if (xcr0 & ~valid_bits)
 697                 return 1;
 698
 699         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 700             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 701                 return 1;
 702
 703         if (xcr0 & XFEATURE_MASK_AVX512) {
 704                 if (!(xcr0 & XFEATURE_MASK_YMM))
 705                         return 1;
 706                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 707                         return 1;
 708         }
 709         vcpu->arch.xcr0 = xcr0;
 710
 711         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 712                 kvm_update_cpuid(vcpu);
 713         return 0;
 714 }
 715
 716 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 717 {
 718         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 719             __kvm_set_xcr(vcpu, index, xcr)) {
 720                 kvm_inject_gp(vcpu, 0);
 721                 return 1;
 722         }
 723         return 0;
 724 }
 725 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 726
 727 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 728 {
 729         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 730         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 731                                    X86_CR4_SMEP | X86_CR4_SMAP;
 732
 733         if (cr4 & CR4_RESERVED_BITS)
 734                 return 1;
 735
 736         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 737                 return 1;
 738
 739         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 740                 return 1;
 741
 742         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 743                 return 1;
 744
 745         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 746                 return 1;
 747
 748         if (is_long_mode(vcpu)) {
 749                 if (!(cr4 & X86_CR4_PAE))
 750                         return 1;
 751         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 752                    && ((cr4 ^ old_cr4) & pdptr_bits)
 753                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 754                                    kvm_read_cr3(vcpu)))
 755                 return 1;
 756
 757         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 758                 if (!guest_cpuid_has_pcid(vcpu))
 759                         return 1;
 760
 761                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 762                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_ASID_MASK) ||
 763                     !is_long_mode(vcpu))
 764                         return 1;
 765         }
 766
 767         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 768                 return 1;
 769
 770         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 771             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 772                 kvm_mmu_reset_context(vcpu);
 773
 774         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 775                 kvm_update_cpuid(vcpu);
 776
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 780
 781 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 782 {
 783 #ifdef CONFIG_X86_64
 784         cr3 &= ~CR3_PCID_INVD;
 785 #endif
 786
 787         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 788                 kvm_mmu_sync_roots(vcpu);
 789                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 790                 return 0;
 791         }
 792
 793         if (is_long_mode(vcpu)) {
 794                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 795                         return 1;
 796         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 797                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 798                 return 1;
 799
 800         vcpu->arch.cr3 = cr3;
 801         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 802         kvm_mmu_new_cr3(vcpu);
 803         return 0;
 804 }
 805 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 806
 807 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 808 {
 809         if (cr8 & CR8_RESERVED_BITS)
 810                 return 1;
 811         if (lapic_in_kernel(vcpu))
 812                 kvm_lapic_set_tpr(vcpu, cr8);
 813         else
 814                 vcpu->arch.cr8 = cr8;
 815         return 0;
 816 }
 817 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 818
 819 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 820 {
 821         if (lapic_in_kernel(vcpu))
 822                 return kvm_lapic_get_cr8(vcpu);
 823         else
 824                 return vcpu->arch.cr8;
 825 }
 826 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 827
 828 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 829 {
 830         int i;
 831
 832         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 833                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 834                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 835                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 836         }
 837 }
 838
 839 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 840 {
 841         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 842                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 843 }
 844
 845 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 846 {
 847         unsigned long dr7;
 848
 849         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 850                 dr7 = vcpu->arch.guest_debug_dr7;
 851         else
 852                 dr7 = vcpu->arch.dr7;
 853         kvm_x86_ops->set_dr7(vcpu, dr7);
 854         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 855         if (dr7 & DR7_BP_EN_MASK)
 856                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 857 }
 858
 859 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 860 {
 861         u64 fixed = DR6_FIXED_1;
 862
 863         if (!guest_cpuid_has_rtm(vcpu))
 864                 fixed |= DR6_RTM;
 865         return fixed;
 866 }
 867
 868 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 869 {
 870         switch (dr) {
 871         case 0 ... 3:
 872                 vcpu->arch.db[dr] = val;
 873                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 874                         vcpu->arch.eff_db[dr] = val;
 875                 break;
 876         case 4:
 877                 /* fall through */
 878         case 6:
 879                 if (val & 0xffffffff00000000ULL)
 880                         return -1; /* #GP */
 881                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 882                 kvm_update_dr6(vcpu);
 883                 break;
 884         case 5:
 885                 /* fall through */
 886         default: /* 7 */
 887                 if (val & 0xffffffff00000000ULL)
 888                         return -1; /* #GP */
 889                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 890                 kvm_update_dr7(vcpu);
 891                 break;
 892         }
 893
 894         return 0;
 895 }
 896
 897 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 898 {
 899         if (__kvm_set_dr(vcpu, dr, val)) {
 900                 kvm_inject_gp(vcpu, 0);
 901                 return 1;
 902         }
 903         return 0;
 904 }
 905 EXPORT_SYMBOL_GPL(kvm_set_dr);
 906
 907 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 908 {
 909         switch (dr) {
 910         case 0 ... 3:
 911                 *val = vcpu->arch.db[dr];
 912                 break;
 913         case 4:
 914                 /* fall through */
 915         case 6:
 916                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 917                         *val = vcpu->arch.dr6;
 918                 else
 919                         *val = kvm_x86_ops->get_dr6(vcpu);
 920                 break;
 921         case 5:
 922                 /* fall through */
 923         default: /* 7 */
 924                 *val = vcpu->arch.dr7;
 925                 break;
 926         }
 927         return 0;
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_get_dr);
 930
 931 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 932 {
 933         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 934         u64 data;
 935         int err;
 936
 937         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 938         if (err)
 939                 return err;
 940         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 941         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 942         return err;
 943 }
 944 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 945
 946 /*
 947  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 948  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 949  *
 950  * This list is modified at module load time to reflect the
 951  * capabilities of the host cpu. This capabilities test skips MSRs that are
 952  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 953  * may depend on host virtualization features rather than host cpu features.
 954  */
 955
 956 static u32 msrs_to_save[] = {
 957         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 958         MSR_STAR,
 959 #ifdef CONFIG_X86_64
 960         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 961 #endif
 962         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 963         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 964 };
 965
 966 static unsigned num_msrs_to_save;
 967
 968 static u32 emulated_msrs[] = {
 969         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 970         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 971         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 972         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 973         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 974         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 975         HV_X64_MSR_RESET,
 976         HV_X64_MSR_VP_INDEX,
 977         HV_X64_MSR_VP_RUNTIME,
 978         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 979         MSR_KVM_PV_EOI_EN,
 980
 981         MSR_IA32_TSC_ADJUST,
 982         MSR_IA32_TSCDEADLINE,
 983         MSR_IA32_MISC_ENABLE,
 984         MSR_IA32_MCG_STATUS,
 985         MSR_IA32_MCG_CTL,
 986         MSR_IA32_SMBASE,
 987 };
 988
 989 static unsigned num_emulated_msrs;
 990
 991 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 992 {
 993         if (efer & efer_reserved_bits)
 994                 return false;
 995
 996         if (efer & EFER_FFXSR) {
 997                 struct kvm_cpuid_entry2 *feat;
 998
 999                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1000                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1001                         return false;
1002         }
1003
1004         if (efer & EFER_SVME) {
1005                 struct kvm_cpuid_entry2 *feat;
1006
1007                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1008                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1009                         return false;
1010         }
1011
1012         return true;
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1015
1016 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1017 {
1018         u64 old_efer = vcpu->arch.efer;
1019
1020         if (!kvm_valid_efer(vcpu, efer))
1021                 return 1;
1022
1023         if (is_paging(vcpu)
1024             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1025                 return 1;
1026
1027         efer &= ~EFER_LMA;
1028         efer |= vcpu->arch.efer & EFER_LMA;
1029
1030         kvm_x86_ops->set_efer(vcpu, efer);
1031
1032         /* Update reserved bits */
1033         if ((efer ^ old_efer) & EFER_NX)
1034                 kvm_mmu_reset_context(vcpu);
1035
1036         return 0;
1037 }
1038
1039 void kvm_enable_efer_bits(u64 mask)
1040 {
1041        efer_reserved_bits &= ~mask;
1042 }
1043 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1044
1045 /*
1046  * Writes msr value into into the appropriate "register".
1047  * Returns 0 on success, non-0 otherwise.
1048  * Assumes vcpu_load() was already called.
1049  */
1050 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1051 {
1052         switch (msr->index) {
1053         case MSR_FS_BASE:
1054         case MSR_GS_BASE:
1055         case MSR_KERNEL_GS_BASE:
1056         case MSR_CSTAR:
1057         case MSR_LSTAR:
1058                 if (is_noncanonical_address(msr->data))
1059                         return 1;
1060                 break;
1061         case MSR_IA32_SYSENTER_EIP:
1062         case MSR_IA32_SYSENTER_ESP:
1063                 /*
1064                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1065                  * non-canonical address is written on Intel but not on
1066                  * AMD (which ignores the top 32-bits, because it does
1067                  * not implement 64-bit SYSENTER).
1068                  *
1069                  * 64-bit code should hence be able to write a non-canonical
1070                  * value on AMD.  Making the address canonical ensures that
1071                  * vmentry does not fail on Intel after writing a non-canonical
1072                  * value, and that something deterministic happens if the guest
1073                  * invokes 64-bit SYSENTER.
1074                  */
1075                 msr->data = get_canonical(msr->data);
1076         }
1077         return kvm_x86_ops->set_msr(vcpu, msr);
1078 }
1079 EXPORT_SYMBOL_GPL(kvm_set_msr);
1080
1081 /*
1082  * Adapt set_msr() to msr_io()'s calling convention
1083  */
1084 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1085 {
1086         struct msr_data msr;
1087         int r;
1088
1089         msr.index = index;
1090         msr.host_initiated = true;
1091         r = kvm_get_msr(vcpu, &msr);
1092         if (r)
1093                 return r;
1094
1095         *data = msr.data;
1096         return 0;
1097 }
1098
1099 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1100 {
1101         struct msr_data msr;
1102
1103         msr.data = *data;
1104         msr.index = index;
1105         msr.host_initiated = true;
1106         return kvm_set_msr(vcpu, &msr);
1107 }
1108
1109 #ifdef CONFIG_X86_64
1110 struct pvclock_gtod_data {
1111         seqcount_t      seq;
1112
1113         struct { /* extract of a clocksource struct */
1114                 int vclock_mode;
1115                 cycle_t cycle_last;
1116                 cycle_t mask;
1117                 u32     mult;
1118                 u32     shift;
1119         } clock;
1120
1121         u64             boot_ns;
1122         u64             nsec_base;
1123 };
1124
1125 static struct pvclock_gtod_data pvclock_gtod_data;
1126
1127 static void update_pvclock_gtod(struct timekeeper *tk)
1128 {
1129         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1130         u64 boot_ns;
1131
1132         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1133
1134         write_seqcount_begin(&vdata->seq);
1135
1136         /* copy pvclock gtod data */
1137         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1138         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1139         vdata->clock.mask               = tk->tkr_mono.mask;
1140         vdata->clock.mult               = tk->tkr_mono.mult;
1141         vdata->clock.shift              = tk->tkr_mono.shift;
1142
1143         vdata->boot_ns                  = boot_ns;
1144         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1145
1146         write_seqcount_end(&vdata->seq);
1147 }
1148 #endif
1149
1150 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1151 {
1152         /*
1153          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1154          * vcpu_enter_guest.  This function is only called from
1155          * the physical CPU that is running vcpu.
1156          */
1157         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1158 }
1159
1160 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1161 {
1162         int version;
1163         int r;
1164         struct pvclock_wall_clock wc;
1165         struct timespec boot;
1166
1167         if (!wall_clock)
1168                 return;
1169
1170         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1171         if (r)
1172                 return;
1173
1174         if (version & 1)
1175                 ++version;  /* first time write, random junk */
1176
1177         ++version;
1178
1179         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1180
1181         /*
1182          * The guest calculates current wall clock time by adding
1183          * system time (updated by kvm_guest_time_update below) to the
1184          * wall clock specified here.  guest system time equals host
1185          * system time for us, thus we must fill in host boot time here.
1186          */
1187         getboottime(&boot);
1188
1189         if (kvm->arch.kvmclock_offset) {
1190                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1191                 boot = timespec_sub(boot, ts);
1192         }
1193         wc.sec = boot.tv_sec;
1194         wc.nsec = boot.tv_nsec;
1195         wc.version = version;
1196
1197         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1198
1199         version++;
1200         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1201 }
1202
1203 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1204 {
1205         uint32_t quotient, remainder;
1206
1207         /* Don't try to replace with do_div(), this one calculates
1208          * "(dividend << 32) / divisor" */
1209         __asm__ ( "divl %4"
1210                   : "=a" (quotient), "=d" (remainder)
1211                   : "0" (0), "1" (dividend), "r" (divisor) );
1212         return quotient;
1213 }
1214
1215 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1216                                s8 *pshift, u32 *pmultiplier)
1217 {
1218         uint64_t scaled64;
1219         int32_t  shift = 0;
1220         uint64_t tps64;
1221         uint32_t tps32;
1222
1223         tps64 = base_khz * 1000LL;
1224         scaled64 = scaled_khz * 1000LL;
1225         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1226                 tps64 >>= 1;
1227                 shift--;
1228         }
1229
1230         tps32 = (uint32_t)tps64;
1231         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1232                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1233                         scaled64 >>= 1;
1234                 else
1235                         tps32 <<= 1;
1236                 shift++;
1237         }
1238
1239         *pshift = shift;
1240         *pmultiplier = div_frac(scaled64, tps32);
1241
1242         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1243                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1244 }
1245
1246 #ifdef CONFIG_X86_64
1247 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1248 #endif
1249
1250 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1251 static unsigned long max_tsc_khz;
1252
1253 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1254 {
1255         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1256                                    vcpu->arch.virtual_tsc_shift);
1257 }
1258
1259 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1260 {
1261         u64 v = (u64)khz * (1000000 + ppm);
1262         do_div(v, 1000000);
1263         return v;
1264 }
1265
1266 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1267 {
1268         u64 ratio;
1269
1270         /* Guest TSC same frequency as host TSC? */
1271         if (!scale) {
1272                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1273                 return 0;
1274         }
1275
1276         /* TSC scaling supported? */
1277         if (!kvm_has_tsc_control) {
1278                 if (user_tsc_khz > tsc_khz) {
1279                         vcpu->arch.tsc_catchup = 1;
1280                         vcpu->arch.tsc_always_catchup = 1;
1281                         return 0;
1282                 } else {
1283                         WARN(1, "user requested TSC rate below hardware speed\n");
1284                         return -1;
1285                 }
1286         }
1287
1288         /* TSC scaling required  - calculate ratio */
1289         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1290                                 user_tsc_khz, tsc_khz);
1291
1292         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1293                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1294                           user_tsc_khz);
1295                 return -1;
1296         }
1297
1298         vcpu->arch.tsc_scaling_ratio = ratio;
1299         return 0;
1300 }
1301
1302 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1303 {
1304         u32 thresh_lo, thresh_hi;
1305         int use_scaling = 0;
1306
1307         /* tsc_khz can be zero if TSC calibration fails */
1308         if (this_tsc_khz == 0) {
1309                 /* set tsc_scaling_ratio to a safe value */
1310                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1311                 return -1;
1312         }
1313
1314         /* Compute a scale to convert nanoseconds in TSC cycles */
1315         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1316                            &vcpu->arch.virtual_tsc_shift,
1317                            &vcpu->arch.virtual_tsc_mult);
1318         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1319
1320         /*
1321          * Compute the variation in TSC rate which is acceptable
1322          * within the range of tolerance and decide if the
1323          * rate being applied is within that bounds of the hardware
1324          * rate.  If so, no scaling or compensation need be done.
1325          */
1326         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1327         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1328         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1329                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1330                 use_scaling = 1;
1331         }
1332         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1333 }
1334
1335 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1336 {
1337         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1338                                       vcpu->arch.virtual_tsc_mult,
1339                                       vcpu->arch.virtual_tsc_shift);
1340         tsc += vcpu->arch.this_tsc_write;
1341         return tsc;
1342 }
1343
1344 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1345 {
1346 #ifdef CONFIG_X86_64
1347         bool vcpus_matched;
1348         struct kvm_arch *ka = &vcpu->kvm->arch;
1349         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1350
1351         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1352                          atomic_read(&vcpu->kvm->online_vcpus));
1353
1354         /*
1355          * Once the masterclock is enabled, always perform request in
1356          * order to update it.
1357          *
1358          * In order to enable masterclock, the host clocksource must be TSC
1359          * and the vcpus need to have matched TSCs.  When that happens,
1360          * perform request to enable masterclock.
1361          */
1362         if (ka->use_master_clock ||
1363             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1364                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1365
1366         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1367                             atomic_read(&vcpu->kvm->online_vcpus),
1368                             ka->use_master_clock, gtod->clock.vclock_mode);
1369 #endif
1370 }
1371
1372 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1373 {
1374         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1375         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1376 }
1377
1378 /*
1379  * Multiply tsc by a fixed point number represented by ratio.
1380  *
1381  * The most significant 64-N bits (mult) of ratio represent the
1382  * integral part of the fixed point number; the remaining N bits
1383  * (frac) represent the fractional part, ie. ratio represents a fixed
1384  * point number (mult + frac * 2^(-N)).
1385  *
1386  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1387  */
1388 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1389 {
1390         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1391 }
1392
1393 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1394 {
1395         u64 _tsc = tsc;
1396         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1397
1398         if (ratio != kvm_default_tsc_scaling_ratio)
1399                 _tsc = __scale_tsc(ratio, tsc);
1400
1401         return _tsc;
1402 }
1403 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1404
1405 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1406 {
1407         u64 tsc;
1408
1409         tsc = kvm_scale_tsc(vcpu, rdtsc());
1410
1411         return target_tsc - tsc;
1412 }
1413
1414 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1415 {
1416         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1417 }
1418 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1419
1420 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1421 {
1422         struct kvm *kvm = vcpu->kvm;
1423         u64 offset, ns, elapsed;
1424         unsigned long flags;
1425         s64 usdiff;
1426         bool matched;
1427         bool already_matched;
1428         u64 data = msr->data;
1429
1430         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1431         offset = kvm_compute_tsc_offset(vcpu, data);
1432         ns = get_kernel_ns();
1433         elapsed = ns - kvm->arch.last_tsc_nsec;
1434
1435         if (vcpu->arch.virtual_tsc_khz) {
1436                 int faulted = 0;
1437
1438                 /* n.b - signed multiplication and division required */
1439                 usdiff = data - kvm->arch.last_tsc_write;
1440 #ifdef CONFIG_X86_64
1441                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1442 #else
1443                 /* do_div() only does unsigned */
1444                 asm("1: idivl %[divisor]\n"
1445                     "2: xor %%edx, %%edx\n"
1446                     "   movl $0, %[faulted]\n"
1447                     "3:\n"
1448                     ".section .fixup,\"ax\"\n"
1449                     "4: movl $1, %[faulted]\n"
1450                     "   jmp  3b\n"
1451                     ".previous\n"
1452
1453                 _ASM_EXTABLE(1b, 4b)
1454
1455                 : "=A"(usdiff), [faulted] "=r" (faulted)
1456                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1457
1458 #endif
1459                 do_div(elapsed, 1000);
1460                 usdiff -= elapsed;
1461                 if (usdiff < 0)
1462                         usdiff = -usdiff;
1463
1464                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1465                 if (faulted)
1466                         usdiff = USEC_PER_SEC;
1467         } else
1468                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1469
1470         /*
1471          * Special case: TSC write with a small delta (1 second) of virtual
1472          * cycle time against real time is interpreted as an attempt to
1473          * synchronize the CPU.
1474          *
1475          * For a reliable TSC, we can match TSC offsets, and for an unstable
1476          * TSC, we add elapsed time in this computation.  We could let the
1477          * compensation code attempt to catch up if we fall behind, but
1478          * it's better to try to match offsets from the beginning.
1479          */
1480         if (usdiff < USEC_PER_SEC &&
1481             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1482                 if (!check_tsc_unstable()) {
1483                         offset = kvm->arch.cur_tsc_offset;
1484                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1485                 } else {
1486                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1487                         data += delta;
1488                         offset = kvm_compute_tsc_offset(vcpu, data);
1489                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1490                 }
1491                 matched = true;
1492                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1493         } else {
1494                 /*
1495                  * We split periods of matched TSC writes into generations.
1496                  * For each generation, we track the original measured
1497                  * nanosecond time, offset, and write, so if TSCs are in
1498                  * sync, we can match exact offset, and if not, we can match
1499                  * exact software computation in compute_guest_tsc()
1500                  *
1501                  * These values are tracked in kvm->arch.cur_xxx variables.
1502                  */
1503                 kvm->arch.cur_tsc_generation++;
1504                 kvm->arch.cur_tsc_nsec = ns;
1505                 kvm->arch.cur_tsc_write = data;
1506                 kvm->arch.cur_tsc_offset = offset;
1507                 matched = false;
1508                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509                          kvm->arch.cur_tsc_generation, data);
1510         }
1511
1512         /*
1513          * We also track th most recent recorded KHZ, write and time to
1514          * allow the matching interval to be extended at each write.
1515          */
1516         kvm->arch.last_tsc_nsec = ns;
1517         kvm->arch.last_tsc_write = data;
1518         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1519
1520         vcpu->arch.last_guest_tsc = data;
1521
1522         /* Keep track of which generation this VCPU has synchronized to */
1523         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1524         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1525         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1526
1527         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1528                 update_ia32_tsc_adjust_msr(vcpu, offset);
1529         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1530         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1531
1532         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1533         if (!matched) {
1534                 kvm->arch.nr_vcpus_matched_tsc = 0;
1535         } else if (!already_matched) {
1536                 kvm->arch.nr_vcpus_matched_tsc++;
1537         }
1538
1539         kvm_track_tsc_matching(vcpu);
1540         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1541 }
1542
1543 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1544
1545 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1546                                            s64 adjustment)
1547 {
1548         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1549 }
1550
1551 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1552 {
1553         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1554                 WARN_ON(adjustment < 0);
1555         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1556         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1557 }
1558
1559 #ifdef CONFIG_X86_64
1560
1561 static cycle_t read_tsc(void)
1562 {
1563         cycle_t ret = (cycle_t)rdtsc_ordered();
1564         u64 last = pvclock_gtod_data.clock.cycle_last;
1565
1566         if (likely(ret >= last))
1567                 return ret;
1568
1569         /*
1570          * GCC likes to generate cmov here, but this branch is extremely
1571          * predictable (it's just a funciton of time and the likely is
1572          * very likely) and there's a data dependence, so force GCC
1573          * to generate a branch instead.  I don't barrier() because
1574          * we don't actually need a barrier, and if this function
1575          * ever gets inlined it will generate worse code.
1576          */
1577         asm volatile ("");
1578         return last;
1579 }
1580
1581 static inline u64 vgettsc(cycle_t *cycle_now)
1582 {
1583         long v;
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585
1586         *cycle_now = read_tsc();
1587
1588         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1589         return v * gtod->clock.mult;
1590 }
1591
1592 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1593 {
1594         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1595         unsigned long seq;
1596         int mode;
1597         u64 ns;
1598
1599         do {
1600                 seq = read_seqcount_begin(&gtod->seq);
1601                 mode = gtod->clock.vclock_mode;
1602                 ns = gtod->nsec_base;
1603                 ns += vgettsc(cycle_now);
1604                 ns >>= gtod->clock.shift;
1605                 ns += gtod->boot_ns;
1606         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1607         *t = ns;
1608
1609         return mode;
1610 }
1611
1612 /* returns true if host is using tsc clocksource */
1613 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1614 {
1615         /* checked again under seqlock below */
1616         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1617                 return false;
1618
1619         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1620 }
1621 #endif
1622
1623 /*
1624  *
1625  * Assuming a stable TSC across physical CPUS, and a stable TSC
1626  * across virtual CPUs, the following condition is possible.
1627  * Each numbered line represents an event visible to both
1628  * CPUs at the next numbered event.
1629  *
1630  * "timespecX" represents host monotonic time. "tscX" represents
1631  * RDTSC value.
1632  *
1633  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1634  *
1635  * 1.  read timespec0,tsc0
1636  * 2.                                   | timespec1 = timespec0 + N
1637  *                                      | tsc1 = tsc0 + M
1638  * 3. transition to guest               | transition to guest
1639  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1640  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1641  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1642  *
1643  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1644  *
1645  *      - ret0 < ret1
1646  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1647  *              ...
1648  *      - 0 < N - M => M < N
1649  *
1650  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1651  * always the case (the difference between two distinct xtime instances
1652  * might be smaller then the difference between corresponding TSC reads,
1653  * when updating guest vcpus pvclock areas).
1654  *
1655  * To avoid that problem, do not allow visibility of distinct
1656  * system_timestamp/tsc_timestamp values simultaneously: use a master
1657  * copy of host monotonic time values. Update that master copy
1658  * in lockstep.
1659  *
1660  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1661  *
1662  */
1663
1664 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1665 {
1666 #ifdef CONFIG_X86_64
1667         struct kvm_arch *ka = &kvm->arch;
1668         int vclock_mode;
1669         bool host_tsc_clocksource, vcpus_matched;
1670
1671         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1672                         atomic_read(&kvm->online_vcpus));
1673
1674         /*
1675          * If the host uses TSC clock, then passthrough TSC as stable
1676          * to the guest.
1677          */
1678         host_tsc_clocksource = kvm_get_time_and_clockread(
1679                                         &ka->master_kernel_ns,
1680                                         &ka->master_cycle_now);
1681
1682         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1683                                 && !backwards_tsc_observed
1684                                 && !ka->boot_vcpu_runs_old_kvmclock;
1685
1686         if (ka->use_master_clock)
1687                 atomic_set(&kvm_guest_has_master_clock, 1);
1688
1689         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1690         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1691                                         vcpus_matched);
1692 #endif
1693 }
1694
1695 static void kvm_gen_update_masterclock(struct kvm *kvm)
1696 {
1697 #ifdef CONFIG_X86_64
1698         int i;
1699         struct kvm_vcpu *vcpu;
1700         struct kvm_arch *ka = &kvm->arch;
1701
1702         spin_lock(&ka->pvclock_gtod_sync_lock);
1703         kvm_make_mclock_inprogress_request(kvm);
1704         /* no guest entries from this point */
1705         pvclock_update_vm_gtod_copy(kvm);
1706
1707         kvm_for_each_vcpu(i, vcpu, kvm)
1708                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1709
1710         /* guest entries allowed */
1711         kvm_for_each_vcpu(i, vcpu, kvm)
1712                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1713
1714         spin_unlock(&ka->pvclock_gtod_sync_lock);
1715 #endif
1716 }
1717
1718 static int kvm_guest_time_update(struct kvm_vcpu *v)
1719 {
1720         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1721         struct kvm_vcpu_arch *vcpu = &v->arch;
1722         struct kvm_arch *ka = &v->kvm->arch;
1723         s64 kernel_ns;
1724         u64 tsc_timestamp, host_tsc;
1725         struct pvclock_vcpu_time_info guest_hv_clock;
1726         u8 pvclock_flags;
1727         bool use_master_clock;
1728
1729         kernel_ns = 0;
1730         host_tsc = 0;
1731
1732         /*
1733          * If the host uses TSC clock, then passthrough TSC as stable
1734          * to the guest.
1735          */
1736         spin_lock(&ka->pvclock_gtod_sync_lock);
1737         use_master_clock = ka->use_master_clock;
1738         if (use_master_clock) {
1739                 host_tsc = ka->master_cycle_now;
1740                 kernel_ns = ka->master_kernel_ns;
1741         }
1742         spin_unlock(&ka->pvclock_gtod_sync_lock);
1743
1744         /* Keep irq disabled to prevent changes to the clock */
1745         local_irq_save(flags);
1746         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1747         if (unlikely(this_tsc_khz == 0)) {
1748                 local_irq_restore(flags);
1749                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1750                 return 1;
1751         }
1752         if (!use_master_clock) {
1753                 host_tsc = rdtsc();
1754                 kernel_ns = get_kernel_ns();
1755         }
1756
1757         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1758
1759         /*
1760          * We may have to catch up the TSC to match elapsed wall clock
1761          * time for two reasons, even if kvmclock is used.
1762          *   1) CPU could have been running below the maximum TSC rate
1763          *   2) Broken TSC compensation resets the base at each VCPU
1764          *      entry to avoid unknown leaps of TSC even when running
1765          *      again on the same CPU.  This may cause apparent elapsed
1766          *      time to disappear, and the guest to stand still or run
1767          *      very slowly.
1768          */
1769         if (vcpu->tsc_catchup) {
1770                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1771                 if (tsc > tsc_timestamp) {
1772                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1773                         tsc_timestamp = tsc;
1774                 }
1775         }
1776
1777         local_irq_restore(flags);
1778
1779         if (!vcpu->pv_time_enabled)
1780                 return 0;
1781
1782         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1783                 tgt_tsc_khz = kvm_has_tsc_control ?
1784                         vcpu->virtual_tsc_khz : this_tsc_khz;
1785                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1786                                    &vcpu->hv_clock.tsc_shift,
1787                                    &vcpu->hv_clock.tsc_to_system_mul);
1788                 vcpu->hw_tsc_khz = this_tsc_khz;
1789         }
1790
1791         /* With all the info we got, fill in the values */
1792         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1793         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1794         vcpu->last_guest_tsc = tsc_timestamp;
1795
1796         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1797                 &guest_hv_clock, sizeof(guest_hv_clock))))
1798                 return 0;
1799
1800         /* This VCPU is paused, but it's legal for a guest to read another
1801          * VCPU's kvmclock, so we really have to follow the specification where
1802          * it says that version is odd if data is being modified, and even after
1803          * it is consistent.
1804          *
1805          * Version field updates must be kept separate.  This is because
1806          * kvm_write_guest_cached might use a "rep movs" instruction, and
1807          * writes within a string instruction are weakly ordered.  So there
1808          * are three writes overall.
1809          *
1810          * As a small optimization, only write the version field in the first
1811          * and third write.  The vcpu->pv_time cache is still valid, because the
1812          * version field is the first in the struct.
1813          */
1814         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1815
1816         if (guest_hv_clock.version & 1)
1817                 ++guest_hv_clock.version;  /* first time write, random junk */
1818
1819         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1820         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1821                                 &vcpu->hv_clock,
1822                                 sizeof(vcpu->hv_clock.version));
1823
1824         smp_wmb();
1825
1826         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1827         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1828
1829         if (vcpu->pvclock_set_guest_stopped_request) {
1830                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1831                 vcpu->pvclock_set_guest_stopped_request = false;
1832         }
1833
1834         /* If the host uses TSC clocksource, then it is stable */
1835         if (use_master_clock)
1836                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1837
1838         vcpu->hv_clock.flags = pvclock_flags;
1839
1840         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1841
1842         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1843                                 &vcpu->hv_clock,
1844                                 sizeof(vcpu->hv_clock));
1845
1846         smp_wmb();
1847
1848         vcpu->hv_clock.version++;
1849         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1850                                 &vcpu->hv_clock,
1851                                 sizeof(vcpu->hv_clock.version));
1852         return 0;
1853 }
1854
1855 /*
1856  * kvmclock updates which are isolated to a given vcpu, such as
1857  * vcpu->cpu migration, should not allow system_timestamp from
1858  * the rest of the vcpus to remain static. Otherwise ntp frequency
1859  * correction applies to one vcpu's system_timestamp but not
1860  * the others.
1861  *
1862  * So in those cases, request a kvmclock update for all vcpus.
1863  * We need to rate-limit these requests though, as they can
1864  * considerably slow guests that have a large number of vcpus.
1865  * The time for a remote vcpu to update its kvmclock is bound
1866  * by the delay we use to rate-limit the updates.
1867  */
1868
1869 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1870
1871 static void kvmclock_update_fn(struct work_struct *work)
1872 {
1873         int i;
1874         struct delayed_work *dwork = to_delayed_work(work);
1875         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1876                                            kvmclock_update_work);
1877         struct kvm *kvm = container_of(ka, struct kvm, arch);
1878         struct kvm_vcpu *vcpu;
1879
1880         kvm_for_each_vcpu(i, vcpu, kvm) {
1881                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1882                 kvm_vcpu_kick(vcpu);
1883         }
1884 }
1885
1886 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1887 {
1888         struct kvm *kvm = v->kvm;
1889
1890         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1891         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1892                                         KVMCLOCK_UPDATE_DELAY);
1893 }
1894
1895 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1896
1897 static void kvmclock_sync_fn(struct work_struct *work)
1898 {
1899         struct delayed_work *dwork = to_delayed_work(work);
1900         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1901                                            kvmclock_sync_work);
1902         struct kvm *kvm = container_of(ka, struct kvm, arch);
1903
1904         if (!kvmclock_periodic_sync)
1905                 return;
1906
1907         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1908         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1909                                         KVMCLOCK_SYNC_PERIOD);
1910 }
1911
1912 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1913 {
1914         u64 mcg_cap = vcpu->arch.mcg_cap;
1915         unsigned bank_num = mcg_cap & 0xff;
1916
1917         switch (msr) {
1918         case MSR_IA32_MCG_STATUS:
1919                 vcpu->arch.mcg_status = data;
1920                 break;
1921         case MSR_IA32_MCG_CTL:
1922                 if (!(mcg_cap & MCG_CTL_P))
1923                         return 1;
1924                 if (data != 0 && data != ~(u64)0)
1925                         return -1;
1926                 vcpu->arch.mcg_ctl = data;
1927                 break;
1928         default:
1929                 if (msr >= MSR_IA32_MC0_CTL &&
1930                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1931                         u32 offset = msr - MSR_IA32_MC0_CTL;
1932                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1933                          * some Linux kernels though clear bit 10 in bank 4 to
1934                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1935                          * this to avoid an uncatched #GP in the guest
1936                          */
1937                         if ((offset & 0x3) == 0 &&
1938                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1939                                 return -1;
1940                         vcpu->arch.mce_banks[offset] = data;
1941                         break;
1942                 }
1943                 return 1;
1944         }
1945         return 0;
1946 }
1947
1948 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1949 {
1950         struct kvm *kvm = vcpu->kvm;
1951         int lm = is_long_mode(vcpu);
1952         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1953                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1954         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1955                 : kvm->arch.xen_hvm_config.blob_size_32;
1956         u32 page_num = data & ~PAGE_MASK;
1957         u64 page_addr = data & PAGE_MASK;
1958         u8 *page;
1959         int r;
1960
1961         r = -E2BIG;
1962         if (page_num >= blob_size)
1963                 goto out;
1964         r = -ENOMEM;
1965         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1966         if (IS_ERR(page)) {
1967                 r = PTR_ERR(page);
1968                 goto out;
1969         }
1970         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1971                 goto out_free;
1972         r = 0;
1973 out_free:
1974         kfree(page);
1975 out:
1976         return r;
1977 }
1978
1979 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1980 {
1981         gpa_t gpa = data & ~0x3f;
1982
1983         /* Bits 2:5 are reserved, Should be zero */
1984         if (data & 0x3c)
1985                 return 1;
1986
1987         vcpu->arch.apf.msr_val = data;
1988
1989         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1990                 kvm_clear_async_pf_completion_queue(vcpu);
1991                 kvm_async_pf_hash_reset(vcpu);
1992                 return 0;
1993         }
1994
1995         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1996                                         sizeof(u32)))
1997                 return 1;
1998
1999         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2000         kvm_async_pf_wakeup_all(vcpu);
2001         return 0;
2002 }
2003
2004 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2005 {
2006         vcpu->arch.pv_time_enabled = false;
2007 }
2008
2009 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2010 {
2011         u64 delta;
2012
2013         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2014                 return;
2015
2016         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2017         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2018         vcpu->arch.st.accum_steal = delta;
2019 }
2020
2021 static void record_steal_time(struct kvm_vcpu *vcpu)
2022 {
2023         accumulate_steal_time(vcpu);
2024
2025         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2026                 return;
2027
2028         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2029                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2030                 return;
2031
2032         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2033         vcpu->arch.st.steal.version += 2;
2034         vcpu->arch.st.accum_steal = 0;
2035
2036         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2037                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2038 }
2039
2040 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2041 {
2042         bool pr = false;
2043         u32 msr = msr_info->index;
2044         u64 data = msr_info->data;
2045
2046         switch (msr) {
2047         case MSR_AMD64_NB_CFG:
2048         case MSR_IA32_UCODE_REV:
2049         case MSR_IA32_UCODE_WRITE:
2050         case MSR_VM_HSAVE_PA:
2051         case MSR_AMD64_PATCH_LOADER:
2052         case MSR_AMD64_BU_CFG2:
2053                 break;
2054
2055         case MSR_EFER:
2056                 return set_efer(vcpu, data);
2057         case MSR_K7_HWCR:
2058                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2059                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2060                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2061                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2062                 if (data != 0) {
2063                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2064                                     data);
2065                         return 1;
2066                 }
2067                 break;
2068         case MSR_FAM10H_MMIO_CONF_BASE:
2069                 if (data != 0) {
2070                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2071                                     "0x%llx\n", data);
2072                         return 1;
2073                 }
2074                 break;
2075         case MSR_IA32_DEBUGCTLMSR:
2076                 if (!data) {
2077                         /* We support the non-activated case already */
2078                         break;
2079                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2080                         /* Values other than LBR and BTF are vendor-specific,
2081                            thus reserved and should throw a #GP */
2082                         return 1;
2083                 }
2084                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2085                             __func__, data);
2086                 break;
2087         case 0x200 ... 0x2ff:
2088                 return kvm_mtrr_set_msr(vcpu, msr, data);
2089         case MSR_IA32_APICBASE:
2090                 return kvm_set_apic_base(vcpu, msr_info);
2091         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2092                 return kvm_x2apic_msr_write(vcpu, msr, data);
2093         case MSR_IA32_TSCDEADLINE:
2094                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2095                 break;
2096         case MSR_IA32_TSC_ADJUST:
2097                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2098                         if (!msr_info->host_initiated) {
2099                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2100                                 adjust_tsc_offset_guest(vcpu, adj);
2101                         }
2102                         vcpu->arch.ia32_tsc_adjust_msr = data;
2103                 }
2104                 break;
2105         case MSR_IA32_MISC_ENABLE:
2106                 vcpu->arch.ia32_misc_enable_msr = data;
2107                 break;
2108         case MSR_IA32_SMBASE:
2109                 if (!msr_info->host_initiated)
2110                         return 1;
2111                 vcpu->arch.smbase = data;
2112                 break;
2113         case MSR_KVM_WALL_CLOCK_NEW:
2114         case MSR_KVM_WALL_CLOCK:
2115                 vcpu->kvm->arch.wall_clock = data;
2116                 kvm_write_wall_clock(vcpu->kvm, data);
2117                 break;
2118         case MSR_KVM_SYSTEM_TIME_NEW:
2119         case MSR_KVM_SYSTEM_TIME: {
2120                 u64 gpa_offset;
2121                 struct kvm_arch *ka = &vcpu->kvm->arch;
2122
2123                 kvmclock_reset(vcpu);
2124
2125                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2126                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2127
2128                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2129                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2130                                         &vcpu->requests);
2131
2132                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2133                 }
2134
2135                 vcpu->arch.time = data;
2136                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2137
2138                 /* we verify if the enable bit is set... */
2139                 if (!(data & 1))
2140                         break;
2141
2142                 gpa_offset = data & ~(PAGE_MASK | 1);
2143
2144                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2145                      &vcpu->arch.pv_time, data & ~1ULL,
2146                      sizeof(struct pvclock_vcpu_time_info)))
2147                         vcpu->arch.pv_time_enabled = false;
2148                 else
2149                         vcpu->arch.pv_time_enabled = true;
2150
2151                 break;
2152         }
2153         case MSR_KVM_ASYNC_PF_EN:
2154                 if (kvm_pv_enable_async_pf(vcpu, data))
2155                         return 1;
2156                 break;
2157         case MSR_KVM_STEAL_TIME:
2158
2159                 if (unlikely(!sched_info_on()))
2160                         return 1;
2161
2162                 if (data & KVM_STEAL_RESERVED_MASK)
2163                         return 1;
2164
2165                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2166                                                 data & KVM_STEAL_VALID_BITS,
2167                                                 sizeof(struct kvm_steal_time)))
2168                         return 1;
2169
2170                 vcpu->arch.st.msr_val = data;
2171
2172                 if (!(data & KVM_MSR_ENABLED))
2173                         break;
2174
2175                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2176
2177                 break;
2178         case MSR_KVM_PV_EOI_EN:
2179                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2180                         return 1;
2181                 break;
2182
2183         case MSR_IA32_MCG_CTL:
2184         case MSR_IA32_MCG_STATUS:
2185         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2186                 return set_msr_mce(vcpu, msr, data);
2187
2188         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2189         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2190                 pr = true; /* fall through */
2191         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2192         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2193                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2194                         return kvm_pmu_set_msr(vcpu, msr_info);
2195
2196                 if (pr || data != 0)
2197                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2198                                     "0x%x data 0x%llx\n", msr, data);
2199                 break;
2200         case MSR_K7_CLK_CTL:
2201                 /*
2202                  * Ignore all writes to this no longer documented MSR.
2203                  * Writes are only relevant for old K7 processors,
2204                  * all pre-dating SVM, but a recommended workaround from
2205                  * AMD for these chips. It is possible to specify the
2206                  * affected processor models on the command line, hence
2207                  * the need to ignore the workaround.
2208                  */
2209                 break;
2210         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2211         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2212         case HV_X64_MSR_CRASH_CTL:
2213                 return kvm_hv_set_msr_common(vcpu, msr, data,
2214                                              msr_info->host_initiated);
2215         case MSR_IA32_BBL_CR_CTL3:
2216                 /* Drop writes to this legacy MSR -- see rdmsr
2217                  * counterpart for further detail.
2218                  */
2219                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2220                 break;
2221         case MSR_AMD64_OSVW_ID_LENGTH:
2222                 if (!guest_cpuid_has_osvw(vcpu))
2223                         return 1;
2224                 vcpu->arch.osvw.length = data;
2225                 break;
2226         case MSR_AMD64_OSVW_STATUS:
2227                 if (!guest_cpuid_has_osvw(vcpu))
2228                         return 1;
2229                 vcpu->arch.osvw.status = data;
2230                 break;
2231         default:
2232                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2233                         return xen_hvm_config(vcpu, data);
2234                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2235                         return kvm_pmu_set_msr(vcpu, msr_info);
2236                 if (!ignore_msrs) {
2237                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2238                                     msr, data);
2239                         return 1;
2240                 } else {
2241                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2242                                     msr, data);
2243                         break;
2244                 }
2245         }
2246         return 0;
2247 }
2248 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2249
2250
2251 /*
2252  * Reads an msr value (of 'msr_index') into 'pdata'.
2253  * Returns 0 on success, non-0 otherwise.
2254  * Assumes vcpu_load() was already called.
2255  */
2256 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2257 {
2258         return kvm_x86_ops->get_msr(vcpu, msr);
2259 }
2260 EXPORT_SYMBOL_GPL(kvm_get_msr);
2261
2262 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2263 {
2264         u64 data;
2265         u64 mcg_cap = vcpu->arch.mcg_cap;
2266         unsigned bank_num = mcg_cap & 0xff;
2267
2268         switch (msr) {
2269         case MSR_IA32_P5_MC_ADDR:
2270         case MSR_IA32_P5_MC_TYPE:
2271                 data = 0;
2272                 break;
2273         case MSR_IA32_MCG_CAP:
2274                 data = vcpu->arch.mcg_cap;
2275                 break;
2276         case MSR_IA32_MCG_CTL:
2277                 if (!(mcg_cap & MCG_CTL_P))
2278                         return 1;
2279                 data = vcpu->arch.mcg_ctl;
2280                 break;
2281         case MSR_IA32_MCG_STATUS:
2282                 data = vcpu->arch.mcg_status;
2283                 break;
2284         default:
2285                 if (msr >= MSR_IA32_MC0_CTL &&
2286                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2287                         u32 offset = msr - MSR_IA32_MC0_CTL;
2288                         data = vcpu->arch.mce_banks[offset];
2289                         break;
2290                 }
2291                 return 1;
2292         }
2293         *pdata = data;
2294         return 0;
2295 }
2296
2297 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2298 {
2299         switch (msr_info->index) {
2300         case MSR_IA32_PLATFORM_ID:
2301         case MSR_IA32_EBL_CR_POWERON:
2302         case MSR_IA32_DEBUGCTLMSR:
2303         case MSR_IA32_LASTBRANCHFROMIP:
2304         case MSR_IA32_LASTBRANCHTOIP:
2305         case MSR_IA32_LASTINTFROMIP:
2306         case MSR_IA32_LASTINTTOIP:
2307         case MSR_K8_SYSCFG:
2308         case MSR_K8_TSEG_ADDR:
2309         case MSR_K8_TSEG_MASK:
2310         case MSR_K7_HWCR:
2311         case MSR_VM_HSAVE_PA:
2312         case MSR_K8_INT_PENDING_MSG:
2313         case MSR_AMD64_NB_CFG:
2314         case MSR_FAM10H_MMIO_CONF_BASE:
2315         case MSR_AMD64_BU_CFG2:
2316                 msr_info->data = 0;
2317                 break;
2318         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2319         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2320         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2321         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2322                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2323                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2324                 msr_info->data = 0;
2325                 break;
2326         case MSR_IA32_UCODE_REV:
2327                 msr_info->data = 0x100000000ULL;
2328                 break;
2329         case MSR_MTRRcap:
2330         case 0x200 ... 0x2ff:
2331                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2332         case 0xcd: /* fsb frequency */
2333                 msr_info->data = 3;
2334                 break;
2335                 /*
2336                  * MSR_EBC_FREQUENCY_ID
2337                  * Conservative value valid for even the basic CPU models.
2338                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2339                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2340                  * and 266MHz for model 3, or 4. Set Core Clock
2341                  * Frequency to System Bus Frequency Ratio to 1 (bits
2342                  * 31:24) even though these are only valid for CPU
2343                  * models > 2, however guests may end up dividing or
2344                  * multiplying by zero otherwise.
2345                  */
2346         case MSR_EBC_FREQUENCY_ID:
2347                 msr_info->data = 1 << 24;
2348                 break;
2349         case MSR_IA32_APICBASE:
2350                 msr_info->data = kvm_get_apic_base(vcpu);
2351                 break;
2352         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2353                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2354                 break;
2355         case MSR_IA32_TSCDEADLINE:
2356                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2357                 break;
2358         case MSR_IA32_TSC_ADJUST:
2359                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2360                 break;
2361         case MSR_IA32_MISC_ENABLE:
2362                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2363                 break;
2364         case MSR_IA32_SMBASE:
2365                 if (!msr_info->host_initiated)
2366                         return 1;
2367                 msr_info->data = vcpu->arch.smbase;
2368                 break;
2369         case MSR_IA32_PERF_STATUS:
2370                 /* TSC increment by tick */
2371                 msr_info->data = 1000ULL;
2372                 /* CPU multiplier */
2373                 msr_info->data |= (((uint64_t)4ULL) << 40);
2374                 break;
2375         case MSR_EFER:
2376                 msr_info->data = vcpu->arch.efer;
2377                 break;
2378         case MSR_KVM_WALL_CLOCK:
2379         case MSR_KVM_WALL_CLOCK_NEW:
2380                 msr_info->data = vcpu->kvm->arch.wall_clock;
2381                 break;
2382         case MSR_KVM_SYSTEM_TIME:
2383         case MSR_KVM_SYSTEM_TIME_NEW:
2384                 msr_info->data = vcpu->arch.time;
2385                 break;
2386         case MSR_KVM_ASYNC_PF_EN:
2387                 msr_info->data = vcpu->arch.apf.msr_val;
2388                 break;
2389         case MSR_KVM_STEAL_TIME:
2390                 msr_info->data = vcpu->arch.st.msr_val;
2391                 break;
2392         case MSR_KVM_PV_EOI_EN:
2393                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2394                 break;
2395         case MSR_IA32_P5_MC_ADDR:
2396         case MSR_IA32_P5_MC_TYPE:
2397         case MSR_IA32_MCG_CAP:
2398         case MSR_IA32_MCG_CTL:
2399         case MSR_IA32_MCG_STATUS:
2400         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2401                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2402         case MSR_K7_CLK_CTL:
2403                 /*
2404                  * Provide expected ramp-up count for K7. All other
2405                  * are set to zero, indicating minimum divisors for
2406                  * every field.
2407                  *
2408                  * This prevents guest kernels on AMD host with CPU
2409                  * type 6, model 8 and higher from exploding due to
2410                  * the rdmsr failing.
2411                  */
2412                 msr_info->data = 0x20000000;
2413                 break;
2414         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2415         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2416         case HV_X64_MSR_CRASH_CTL:
2417                 return kvm_hv_get_msr_common(vcpu,
2418                                              msr_info->index, &msr_info->data);
2419                 break;
2420         case MSR_IA32_BBL_CR_CTL3:
2421                 /* This legacy MSR exists but isn't fully documented in current
2422                  * silicon.  It is however accessed by winxp in very narrow
2423                  * scenarios where it sets bit #19, itself documented as
2424                  * a "reserved" bit.  Best effort attempt to source coherent
2425                  * read data here should the balance of the register be
2426                  * interpreted by the guest:
2427                  *
2428                  * L2 cache control register 3: 64GB range, 256KB size,
2429                  * enabled, latency 0x1, configured
2430                  */
2431                 msr_info->data = 0xbe702111;
2432                 break;
2433         case MSR_AMD64_OSVW_ID_LENGTH:
2434                 if (!guest_cpuid_has_osvw(vcpu))
2435                         return 1;
2436                 msr_info->data = vcpu->arch.osvw.length;
2437                 break;
2438         case MSR_AMD64_OSVW_STATUS:
2439                 if (!guest_cpuid_has_osvw(vcpu))
2440                         return 1;
2441                 msr_info->data = vcpu->arch.osvw.status;
2442                 break;
2443         default:
2444                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2445                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2446                 if (!ignore_msrs) {
2447                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2448                         return 1;
2449                 } else {
2450                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2451                         msr_info->data = 0;
2452                 }
2453                 break;
2454         }
2455         return 0;
2456 }
2457 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2458
2459 /*
2460  * Read or write a bunch of msrs. All parameters are kernel addresses.
2461  *
2462  * @return number of msrs set successfully.
2463  */
2464 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2465                     struct kvm_msr_entry *entries,
2466                     int (*do_msr)(struct kvm_vcpu *vcpu,
2467                                   unsigned index, u64 *data))
2468 {
2469         int i, idx;
2470
2471         idx = srcu_read_lock(&vcpu->kvm->srcu);
2472         for (i = 0; i < msrs->nmsrs; ++i)
2473                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2474                         break;
2475         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2476
2477         return i;
2478 }
2479
2480 /*
2481  * Read or write a bunch of msrs. Parameters are user addresses.
2482  *
2483  * @return number of msrs set successfully.
2484  */
2485 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2486                   int (*do_msr)(struct kvm_vcpu *vcpu,
2487                                 unsigned index, u64 *data),
2488                   int writeback)
2489 {
2490         struct kvm_msrs msrs;
2491         struct kvm_msr_entry *entries;
2492         int r, n;
2493         unsigned size;
2494
2495         r = -EFAULT;
2496         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2497                 goto out;
2498
2499         r = -E2BIG;
2500         if (msrs.nmsrs >= MAX_IO_MSRS)
2501                 goto out;
2502
2503         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2504         entries = memdup_user(user_msrs->entries, size);
2505         if (IS_ERR(entries)) {
2506                 r = PTR_ERR(entries);
2507                 goto out;
2508         }
2509
2510         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2511         if (r < 0)
2512                 goto out_free;
2513
2514         r = -EFAULT;
2515         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2516                 goto out_free;
2517
2518         r = n;
2519
2520 out_free:
2521         kfree(entries);
2522 out:
2523         return r;
2524 }
2525
2526 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2527 {
2528         int r;
2529
2530         switch (ext) {
2531         case KVM_CAP_IRQCHIP:
2532         case KVM_CAP_HLT:
2533         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2534         case KVM_CAP_SET_TSS_ADDR:
2535         case KVM_CAP_EXT_CPUID:
2536         case KVM_CAP_EXT_EMUL_CPUID:
2537         case KVM_CAP_CLOCKSOURCE:
2538         case KVM_CAP_PIT:
2539         case KVM_CAP_NOP_IO_DELAY:
2540         case KVM_CAP_MP_STATE:
2541         case KVM_CAP_SYNC_MMU:
2542         case KVM_CAP_USER_NMI:
2543         case KVM_CAP_REINJECT_CONTROL:
2544         case KVM_CAP_IRQ_INJECT_STATUS:
2545         case KVM_CAP_IOEVENTFD:
2546         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2547         case KVM_CAP_PIT2:
2548         case KVM_CAP_PIT_STATE2:
2549         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2550         case KVM_CAP_XEN_HVM:
2551         case KVM_CAP_ADJUST_CLOCK:
2552         case KVM_CAP_VCPU_EVENTS:
2553         case KVM_CAP_HYPERV:
2554         case KVM_CAP_HYPERV_VAPIC:
2555         case KVM_CAP_HYPERV_SPIN:
2556         case KVM_CAP_PCI_SEGMENT:
2557         case KVM_CAP_DEBUGREGS:
2558         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2559         case KVM_CAP_XSAVE:
2560         case KVM_CAP_ASYNC_PF:
2561         case KVM_CAP_GET_TSC_KHZ:
2562         case KVM_CAP_KVMCLOCK_CTRL:
2563         case KVM_CAP_READONLY_MEM:
2564         case KVM_CAP_HYPERV_TIME:
2565         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2566         case KVM_CAP_TSC_DEADLINE_TIMER:
2567         case KVM_CAP_ENABLE_CAP_VM:
2568         case KVM_CAP_DISABLE_QUIRKS:
2569         case KVM_CAP_SET_BOOT_CPU_ID:
2570         case KVM_CAP_SPLIT_IRQCHIP:
2571 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2572         case KVM_CAP_ASSIGN_DEV_IRQ:
2573         case KVM_CAP_PCI_2_3:
2574 #endif
2575                 r = 1;
2576                 break;
2577         case KVM_CAP_X86_SMM:
2578                 /* SMBASE is usually relocated above 1M on modern chipsets,
2579                  * and SMM handlers might indeed rely on 4G segment limits,
2580                  * so do not report SMM to be available if real mode is
2581                  * emulated via vm86 mode.  Still, do not go to great lengths
2582                  * to avoid userspace's usage of the feature, because it is a
2583                  * fringe case that is not enabled except via specific settings
2584                  * of the module parameters.
2585                  */
2586                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2587                 break;
2588         case KVM_CAP_COALESCED_MMIO:
2589                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2590                 break;
2591         case KVM_CAP_VAPIC:
2592                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2593                 break;
2594         case KVM_CAP_NR_VCPUS:
2595                 r = KVM_SOFT_MAX_VCPUS;
2596                 break;
2597         case KVM_CAP_MAX_VCPUS:
2598                 r = KVM_MAX_VCPUS;
2599                 break;
2600         case KVM_CAP_NR_MEMSLOTS:
2601                 r = KVM_USER_MEM_SLOTS;
2602                 break;
2603         case KVM_CAP_PV_MMU:    /* obsolete */
2604                 r = 0;
2605                 break;
2606 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2607         case KVM_CAP_IOMMU:
2608                 r = iommu_present(&pci_bus_type);
2609                 break;
2610 #endif
2611         case KVM_CAP_MCE:
2612                 r = KVM_MAX_MCE_BANKS;
2613                 break;
2614         case KVM_CAP_XCRS:
2615                 r = cpu_has_xsave;
2616                 break;
2617         case KVM_CAP_TSC_CONTROL:
2618                 r = kvm_has_tsc_control;
2619                 break;
2620         default:
2621                 r = 0;
2622                 break;
2623         }
2624         return r;
2625
2626 }
2627
2628 long kvm_arch_dev_ioctl(struct file *filp,
2629                         unsigned int ioctl, unsigned long arg)
2630 {
2631         void __user *argp = (void __user *)arg;
2632         long r;
2633
2634         switch (ioctl) {
2635         case KVM_GET_MSR_INDEX_LIST: {
2636                 struct kvm_msr_list __user *user_msr_list = argp;
2637                 struct kvm_msr_list msr_list;
2638                 unsigned n;
2639
2640                 r = -EFAULT;
2641                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2642                         goto out;
2643                 n = msr_list.nmsrs;
2644                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2645                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2646                         goto out;
2647                 r = -E2BIG;
2648                 if (n < msr_list.nmsrs)
2649                         goto out;
2650                 r = -EFAULT;
2651                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2652                                  num_msrs_to_save * sizeof(u32)))
2653                         goto out;
2654                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2655                                  &emulated_msrs,
2656                                  num_emulated_msrs * sizeof(u32)))
2657                         goto out;
2658                 r = 0;
2659                 break;
2660         }
2661         case KVM_GET_SUPPORTED_CPUID:
2662         case KVM_GET_EMULATED_CPUID: {
2663                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2664                 struct kvm_cpuid2 cpuid;
2665
2666                 r = -EFAULT;
2667                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2668                         goto out;
2669
2670                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2671                                             ioctl);
2672                 if (r)
2673                         goto out;
2674
2675                 r = -EFAULT;
2676                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2677                         goto out;
2678                 r = 0;
2679                 break;
2680         }
2681         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2682                 u64 mce_cap;
2683
2684                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2685                 r = -EFAULT;
2686                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2687                         goto out;
2688                 r = 0;
2689                 break;
2690         }
2691         default:
2692                 r = -EINVAL;
2693         }
2694 out:
2695         return r;
2696 }
2697
2698 static void wbinvd_ipi(void *garbage)
2699 {
2700         wbinvd();
2701 }
2702
2703 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2704 {
2705         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2706 }
2707
2708 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2709 {
2710         /* Address WBINVD may be executed by guest */
2711         if (need_emulate_wbinvd(vcpu)) {
2712                 if (kvm_x86_ops->has_wbinvd_exit())
2713                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2714                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2715                         smp_call_function_single(vcpu->cpu,
2716                                         wbinvd_ipi, NULL, 1);
2717         }
2718
2719         kvm_x86_ops->vcpu_load(vcpu, cpu);
2720
2721         /* Apply any externally detected TSC adjustments (due to suspend) */
2722         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2723                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2724                 vcpu->arch.tsc_offset_adjustment = 0;
2725                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2726         }
2727
2728         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2729                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2730                                 rdtsc() - vcpu->arch.last_host_tsc;
2731                 if (tsc_delta < 0)
2732                         mark_tsc_unstable("KVM discovered backwards TSC");
2733                 if (check_tsc_unstable()) {
2734                         u64 offset = kvm_compute_tsc_offset(vcpu,
2735                                                 vcpu->arch.last_guest_tsc);
2736                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2737                         vcpu->arch.tsc_catchup = 1;
2738                 }
2739                 /*
2740                  * On a host with synchronized TSC, there is no need to update
2741                  * kvmclock on vcpu->cpu migration
2742                  */
2743                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2744                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2745                 if (vcpu->cpu != cpu)
2746                         kvm_migrate_timers(vcpu);
2747                 vcpu->cpu = cpu;
2748         }
2749
2750         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2751 }
2752
2753 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2754 {
2755         kvm_x86_ops->vcpu_put(vcpu);
2756         kvm_put_guest_fpu(vcpu);
2757         vcpu->arch.last_host_tsc = rdtsc();
2758         /*
2759          * If userspace has set any breakpoints or watchpoints, dr6 is restored
2760          * on every vmexit, but if not, we might have a stale dr6 from the
2761          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
2762          */
2763         set_debugreg(0, 6);
2764 }
2765
2766 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2767                                     struct kvm_lapic_state *s)
2768 {
2769         kvm_x86_ops->sync_pir_to_irr(vcpu);
2770         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2771
2772         return 0;
2773 }
2774
2775 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2776                                     struct kvm_lapic_state *s)
2777 {
2778         kvm_apic_post_state_restore(vcpu, s);
2779         update_cr8_intercept(vcpu);
2780
2781         return 0;
2782 }
2783
2784 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2785 {
2786         return (!lapic_in_kernel(vcpu) ||
2787                 kvm_apic_accept_pic_intr(vcpu));
2788 }
2789
2790 /*
2791  * if userspace requested an interrupt window, check that the
2792  * interrupt window is open.
2793  *
2794  * No need to exit to userspace if we already have an interrupt queued.
2795  */
2796 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2797 {
2798         return kvm_arch_interrupt_allowed(vcpu) &&
2799                 !kvm_cpu_has_interrupt(vcpu) &&
2800                 !kvm_event_needs_reinjection(vcpu) &&
2801                 kvm_cpu_accept_dm_intr(vcpu);
2802 }
2803
2804 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2805                                     struct kvm_interrupt *irq)
2806 {
2807         if (irq->irq >= KVM_NR_INTERRUPTS)
2808                 return -EINVAL;
2809
2810         if (!irqchip_in_kernel(vcpu->kvm)) {
2811                 kvm_queue_interrupt(vcpu, irq->irq, false);
2812                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2813                 return 0;
2814         }
2815
2816         /*
2817          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2818          * fail for in-kernel 8259.
2819          */
2820         if (pic_in_kernel(vcpu->kvm))
2821                 return -ENXIO;
2822
2823         if (vcpu->arch.pending_external_vector != -1)
2824                 return -EEXIST;
2825
2826         vcpu->arch.pending_external_vector = irq->irq;
2827         kvm_make_request(KVM_REQ_EVENT, vcpu);
2828         return 0;
2829 }
2830
2831 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2832 {
2833         kvm_inject_nmi(vcpu);
2834
2835         return 0;
2836 }
2837
2838 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2839 {
2840         kvm_make_request(KVM_REQ_SMI, vcpu);
2841
2842         return 0;
2843 }
2844
2845 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2846                                            struct kvm_tpr_access_ctl *tac)
2847 {
2848         if (tac->flags)
2849                 return -EINVAL;
2850         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2851         return 0;
2852 }
2853
2854 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2855                                         u64 mcg_cap)
2856 {
2857         int r;
2858         unsigned bank_num = mcg_cap & 0xff, bank;
2859
2860         r = -EINVAL;
2861         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2862                 goto out;
2863         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2864                 goto out;
2865         r = 0;
2866         vcpu->arch.mcg_cap = mcg_cap;
2867         /* Init IA32_MCG_CTL to all 1s */
2868         if (mcg_cap & MCG_CTL_P)
2869                 vcpu->arch.mcg_ctl = ~(u64)0;
2870         /* Init IA32_MCi_CTL to all 1s */
2871         for (bank = 0; bank < bank_num; bank++)
2872                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2873 out:
2874         return r;
2875 }
2876
2877 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2878                                       struct kvm_x86_mce *mce)
2879 {
2880         u64 mcg_cap = vcpu->arch.mcg_cap;
2881         unsigned bank_num = mcg_cap & 0xff;
2882         u64 *banks = vcpu->arch.mce_banks;
2883
2884         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2885                 return -EINVAL;
2886         /*
2887          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2888          * reporting is disabled
2889          */
2890         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2891             vcpu->arch.mcg_ctl != ~(u64)0)
2892                 return 0;
2893         banks += 4 * mce->bank;
2894         /*
2895          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2896          * reporting is disabled for the bank
2897          */
2898         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2899                 return 0;
2900         if (mce->status & MCI_STATUS_UC) {
2901                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2902                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2903                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2904                         return 0;
2905                 }
2906                 if (banks[1] & MCI_STATUS_VAL)
2907                         mce->status |= MCI_STATUS_OVER;
2908                 banks[2] = mce->addr;
2909                 banks[3] = mce->misc;
2910                 vcpu->arch.mcg_status = mce->mcg_status;
2911                 banks[1] = mce->status;
2912                 kvm_queue_exception(vcpu, MC_VECTOR);
2913         } else if (!(banks[1] & MCI_STATUS_VAL)
2914                    || !(banks[1] & MCI_STATUS_UC)) {
2915                 if (banks[1] & MCI_STATUS_VAL)
2916                         mce->status |= MCI_STATUS_OVER;
2917                 banks[2] = mce->addr;
2918                 banks[3] = mce->misc;
2919                 banks[1] = mce->status;
2920         } else
2921                 banks[1] |= MCI_STATUS_OVER;
2922         return 0;
2923 }
2924
2925 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2926                                                struct kvm_vcpu_events *events)
2927 {
2928         process_nmi(vcpu);
2929         events->exception.injected =
2930                 vcpu->arch.exception.pending &&
2931                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2932         events->exception.nr = vcpu->arch.exception.nr;
2933         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2934         events->exception.pad = 0;
2935         events->exception.error_code = vcpu->arch.exception.error_code;
2936
2937         events->interrupt.injected =
2938                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2939         events->interrupt.nr = vcpu->arch.interrupt.nr;
2940         events->interrupt.soft = 0;
2941         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2942
2943         events->nmi.injected = vcpu->arch.nmi_injected;
2944         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2945         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2946         events->nmi.pad = 0;
2947
2948         events->sipi_vector = 0; /* never valid when reporting to user space */
2949
2950         events->smi.smm = is_smm(vcpu);
2951         events->smi.pending = vcpu->arch.smi_pending;
2952         events->smi.smm_inside_nmi =
2953                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2954         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2955
2956         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2957                          | KVM_VCPUEVENT_VALID_SHADOW
2958                          | KVM_VCPUEVENT_VALID_SMM);
2959         memset(&events->reserved, 0, sizeof(events->reserved));
2960 }
2961
2962 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
2963
2964 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2965                                               struct kvm_vcpu_events *events)
2966 {
2967         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2968                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2969                               | KVM_VCPUEVENT_VALID_SHADOW
2970                               | KVM_VCPUEVENT_VALID_SMM))
2971                 return -EINVAL;
2972
2973         /* INITs are latched while in SMM */
2974         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
2975             (events->smi.smm || events->smi.pending) &&
2976             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
2977                 return -EINVAL;
2978
2979         process_nmi(vcpu);
2980         vcpu->arch.exception.pending = events->exception.injected;
2981         vcpu->arch.exception.nr = events->exception.nr;
2982         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2983         vcpu->arch.exception.error_code = events->exception.error_code;
2984
2985         vcpu->arch.interrupt.pending = events->interrupt.injected;
2986         vcpu->arch.interrupt.nr = events->interrupt.nr;
2987         vcpu->arch.interrupt.soft = events->interrupt.soft;
2988         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2989                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2990                                                   events->interrupt.shadow);
2991
2992         vcpu->arch.nmi_injected = events->nmi.injected;
2993         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2994                 vcpu->arch.nmi_pending = events->nmi.pending;
2995         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2996
2997         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2998             kvm_vcpu_has_lapic(vcpu))
2999                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3000
3001         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3002                 u32 hflags = vcpu->arch.hflags;
3003                 if (events->smi.smm)
3004                         hflags |= HF_SMM_MASK;
3005                 else
3006                         hflags &= ~HF_SMM_MASK;
3007                 kvm_set_hflags(vcpu, hflags);
3008
3009                 vcpu->arch.smi_pending = events->smi.pending;
3010                 if (events->smi.smm_inside_nmi)
3011                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3012                 else
3013                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3014                 if (kvm_vcpu_has_lapic(vcpu)) {
3015                         if (events->smi.latched_init)
3016                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3017                         else
3018                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3019                 }
3020         }
3021
3022         kvm_make_request(KVM_REQ_EVENT, vcpu);
3023
3024         return 0;
3025 }
3026
3027 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3028                                              struct kvm_debugregs *dbgregs)
3029 {
3030         unsigned long val;
3031
3032         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3033         kvm_get_dr(vcpu, 6, &val);
3034         dbgregs->dr6 = val;
3035         dbgregs->dr7 = vcpu->arch.dr7;
3036         dbgregs->flags = 0;
3037         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3038 }
3039
3040 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3041                                             struct kvm_debugregs *dbgregs)
3042 {
3043         if (dbgregs->flags)
3044                 return -EINVAL;
3045
3046         if (dbgregs->dr6 & ~0xffffffffull)
3047                 return -EINVAL;
3048         if (dbgregs->dr7 & ~0xffffffffull)
3049                 return -EINVAL;
3050
3051         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3052         kvm_update_dr0123(vcpu);
3053         vcpu->arch.dr6 = dbgregs->dr6;
3054         kvm_update_dr6(vcpu);
3055         vcpu->arch.dr7 = dbgregs->dr7;
3056         kvm_update_dr7(vcpu);
3057
3058         return 0;
3059 }
3060
3061 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3062
3063 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3064 {
3065         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3066         u64 xstate_bv = xsave->header.xfeatures;
3067         u64 valid;
3068
3069         /*
3070          * Copy legacy XSAVE area, to avoid complications with CPUID
3071          * leaves 0 and 1 in the loop below.
3072          */
3073         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3074
3075         /* Set XSTATE_BV */
3076         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3077         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3078
3079         /*
3080          * Copy each region from the possibly compacted offset to the
3081          * non-compacted offset.
3082          */
3083         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3084         while (valid) {
3085                 u64 feature = valid & -valid;
3086                 int index = fls64(feature) - 1;
3087                 void *src = get_xsave_addr(xsave, feature);
3088
3089                 if (src) {
3090                         u32 size, offset, ecx, edx;
3091                         cpuid_count(XSTATE_CPUID, index,
3092                                     &size, &offset, &ecx, &edx);
3093                         memcpy(dest + offset, src, size);
3094                 }
3095
3096                 valid -= feature;
3097         }
3098 }
3099
3100 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3101 {
3102         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3103         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3104         u64 valid;
3105
3106         /*
3107          * Copy legacy XSAVE area, to avoid complications with CPUID
3108          * leaves 0 and 1 in the loop below.
3109          */
3110         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3111
3112         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3113         xsave->header.xfeatures = xstate_bv;
3114         if (cpu_has_xsaves)
3115                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3116
3117         /*
3118          * Copy each region from the non-compacted offset to the
3119          * possibly compacted offset.
3120          */
3121         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3122         while (valid) {
3123                 u64 feature = valid & -valid;
3124                 int index = fls64(feature) - 1;
3125                 void *dest = get_xsave_addr(xsave, feature);
3126
3127                 if (dest) {
3128                         u32 size, offset, ecx, edx;
3129                         cpuid_count(XSTATE_CPUID, index,
3130                                     &size, &offset, &ecx, &edx);
3131                         memcpy(dest, src + offset, size);
3132                 }
3133
3134                 valid -= feature;
3135         }
3136 }
3137
3138 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3139                                          struct kvm_xsave *guest_xsave)
3140 {
3141         if (cpu_has_xsave) {
3142                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3143                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3144         } else {
3145                 memcpy(guest_xsave->region,
3146                         &vcpu->arch.guest_fpu.state.fxsave,
3147                         sizeof(struct fxregs_state));
3148                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3149                         XFEATURE_MASK_FPSSE;
3150         }
3151 }
3152
3153 #define XSAVE_MXCSR_OFFSET 24
3154
3155 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3156                                         struct kvm_xsave *guest_xsave)
3157 {
3158         u64 xstate_bv =
3159                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3160         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3161
3162         if (cpu_has_xsave) {
3163                 /*
3164                  * Here we allow setting states that are not present in
3165                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3166                  * with old userspace.
3167                  */
3168                 if (xstate_bv & ~kvm_supported_xcr0() ||
3169                         mxcsr & ~mxcsr_feature_mask)
3170                         return -EINVAL;
3171                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3172         } else {
3173                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3174                         mxcsr & ~mxcsr_feature_mask)
3175                         return -EINVAL;
3176                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3177                         guest_xsave->region, sizeof(struct fxregs_state));
3178         }
3179         return 0;
3180 }
3181
3182 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3183                                         struct kvm_xcrs *guest_xcrs)
3184 {
3185         if (!cpu_has_xsave) {
3186                 guest_xcrs->nr_xcrs = 0;
3187                 return;
3188         }
3189
3190         guest_xcrs->nr_xcrs = 1;
3191         guest_xcrs->flags = 0;
3192         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3193         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3194 }
3195
3196 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3197                                        struct kvm_xcrs *guest_xcrs)
3198 {
3199         int i, r = 0;
3200
3201         if (!cpu_has_xsave)
3202                 return -EINVAL;
3203
3204         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3205                 return -EINVAL;
3206
3207         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3208                 /* Only support XCR0 currently */
3209                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3210                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3211                                 guest_xcrs->xcrs[i].value);
3212                         break;
3213                 }
3214         if (r)
3215                 r = -EINVAL;
3216         return r;
3217 }
3218
3219 /*
3220  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3221  * stopped by the hypervisor.  This function will be called from the host only.
3222  * EINVAL is returned when the host attempts to set the flag for a guest that
3223  * does not support pv clocks.
3224  */
3225 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3226 {
3227         if (!vcpu->arch.pv_time_enabled)
3228                 return -EINVAL;
3229         vcpu->arch.pvclock_set_guest_stopped_request = true;
3230         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3231         return 0;
3232 }
3233
3234 long kvm_arch_vcpu_ioctl(struct file *filp,
3235                          unsigned int ioctl, unsigned long arg)
3236 {
3237         struct kvm_vcpu *vcpu = filp->private_data;
3238         void __user *argp = (void __user *)arg;
3239         int r;
3240         union {
3241                 struct kvm_lapic_state *lapic;
3242                 struct kvm_xsave *xsave;
3243                 struct kvm_xcrs *xcrs;
3244                 void *buffer;
3245         } u;
3246
3247         u.buffer = NULL;
3248         switch (ioctl) {
3249         case KVM_GET_LAPIC: {
3250                 r = -EINVAL;
3251                 if (!vcpu->arch.apic)
3252                         goto out;
3253                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3254
3255                 r = -ENOMEM;
3256                 if (!u.lapic)
3257                         goto out;
3258                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3259                 if (r)
3260                         goto out;
3261                 r = -EFAULT;
3262                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3263                         goto out;
3264                 r = 0;
3265                 break;
3266         }
3267         case KVM_SET_LAPIC: {
3268                 r = -EINVAL;
3269                 if (!vcpu->arch.apic)
3270                         goto out;
3271                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3272                 if (IS_ERR(u.lapic))
3273                         return PTR_ERR(u.lapic);
3274
3275                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3276                 break;
3277         }
3278         case KVM_INTERRUPT: {
3279                 struct kvm_interrupt irq;
3280
3281                 r = -EFAULT;
3282                 if (copy_from_user(&irq, argp, sizeof irq))
3283                         goto out;
3284                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3285                 break;
3286         }
3287         case KVM_NMI: {
3288                 r = kvm_vcpu_ioctl_nmi(vcpu);
3289                 break;
3290         }
3291         case KVM_SMI: {
3292                 r = kvm_vcpu_ioctl_smi(vcpu);
3293                 break;
3294         }
3295         case KVM_SET_CPUID: {
3296                 struct kvm_cpuid __user *cpuid_arg = argp;
3297                 struct kvm_cpuid cpuid;
3298
3299                 r = -EFAULT;
3300                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3301                         goto out;
3302                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3303                 break;
3304         }
3305         case KVM_SET_CPUID2: {
3306                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3307                 struct kvm_cpuid2 cpuid;
3308
3309                 r = -EFAULT;
3310                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3311                         goto out;
3312                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3313                                               cpuid_arg->entries);
3314                 break;
3315         }
3316         case KVM_GET_CPUID2: {
3317                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3318                 struct kvm_cpuid2 cpuid;
3319
3320                 r = -EFAULT;
3321                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3322                         goto out;
3323                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3324                                               cpuid_arg->entries);
3325                 if (r)
3326                         goto out;
3327                 r = -EFAULT;
3328                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3329                         goto out;
3330                 r = 0;
3331                 break;
3332         }
3333         case KVM_GET_MSRS:
3334                 r = msr_io(vcpu, argp, do_get_msr, 1);
3335                 break;
3336         case KVM_SET_MSRS:
3337                 r = msr_io(vcpu, argp, do_set_msr, 0);
3338                 break;
3339         case KVM_TPR_ACCESS_REPORTING: {
3340                 struct kvm_tpr_access_ctl tac;
3341
3342                 r = -EFAULT;
3343                 if (copy_from_user(&tac, argp, sizeof tac))
3344                         goto out;
3345                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3346                 if (r)
3347                         goto out;
3348                 r = -EFAULT;
3349                 if (copy_to_user(argp, &tac, sizeof tac))
3350                         goto out;
3351                 r = 0;
3352                 break;
3353         };
3354         case KVM_SET_VAPIC_ADDR: {
3355                 struct kvm_vapic_addr va;
3356                 int idx;
3357
3358                 r = -EINVAL;
3359                 if (!lapic_in_kernel(vcpu))
3360                         goto out;
3361                 r = -EFAULT;
3362                 if (copy_from_user(&va, argp, sizeof va))
3363                         goto out;
3364                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3365                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3366                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3367                 break;
3368         }
3369         case KVM_X86_SETUP_MCE: {
3370                 u64 mcg_cap;
3371
3372                 r = -EFAULT;
3373                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3374                         goto out;
3375                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3376                 break;
3377         }
3378         case KVM_X86_SET_MCE: {
3379                 struct kvm_x86_mce mce;
3380
3381                 r = -EFAULT;
3382                 if (copy_from_user(&mce, argp, sizeof mce))
3383                         goto out;
3384                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3385                 break;
3386         }
3387         case KVM_GET_VCPU_EVENTS: {
3388                 struct kvm_vcpu_events events;
3389
3390                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3391
3392                 r = -EFAULT;
3393                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3394                         break;
3395                 r = 0;
3396                 break;
3397         }
3398         case KVM_SET_VCPU_EVENTS: {
3399                 struct kvm_vcpu_events events;
3400
3401                 r = -EFAULT;
3402                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3403                         break;
3404
3405                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3406                 break;
3407         }
3408         case KVM_GET_DEBUGREGS: {
3409                 struct kvm_debugregs dbgregs;
3410
3411                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3412
3413                 r = -EFAULT;
3414                 if (copy_to_user(argp, &dbgregs,
3415                                  sizeof(struct kvm_debugregs)))
3416                         break;
3417                 r = 0;
3418                 break;
3419         }
3420         case KVM_SET_DEBUGREGS: {
3421                 struct kvm_debugregs dbgregs;
3422
3423                 r = -EFAULT;
3424                 if (copy_from_user(&dbgregs, argp,
3425                                    sizeof(struct kvm_debugregs)))
3426                         break;
3427
3428                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3429                 break;
3430         }
3431         case KVM_GET_XSAVE: {
3432                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3433                 r = -ENOMEM;
3434                 if (!u.xsave)
3435                         break;
3436
3437                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3438
3439                 r = -EFAULT;
3440                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3441                         break;
3442                 r = 0;
3443                 break;
3444         }
3445         case KVM_SET_XSAVE: {
3446                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3447                 if (IS_ERR(u.xsave))
3448                         return PTR_ERR(u.xsave);
3449
3450                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3451                 break;
3452         }
3453         case KVM_GET_XCRS: {
3454                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3455                 r = -ENOMEM;
3456                 if (!u.xcrs)
3457                         break;
3458
3459                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3460
3461                 r = -EFAULT;
3462                 if (copy_to_user(argp, u.xcrs,
3463                                  sizeof(struct kvm_xcrs)))
3464                         break;
3465                 r = 0;
3466                 break;
3467         }
3468         case KVM_SET_XCRS: {
3469                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3470                 if (IS_ERR(u.xcrs))
3471                         return PTR_ERR(u.xcrs);
3472
3473                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3474                 break;
3475         }
3476         case KVM_SET_TSC_KHZ: {
3477                 u32 user_tsc_khz;
3478
3479                 r = -EINVAL;
3480                 user_tsc_khz = (u32)arg;
3481
3482                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3483                         goto out;
3484
3485                 if (user_tsc_khz == 0)
3486                         user_tsc_khz = tsc_khz;
3487
3488                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3489                         r = 0;
3490
3491                 goto out;
3492         }
3493         case KVM_GET_TSC_KHZ: {
3494                 r = vcpu->arch.virtual_tsc_khz;
3495                 goto out;
3496         }
3497         case KVM_KVMCLOCK_CTRL: {
3498                 r = kvm_set_guest_paused(vcpu);
3499                 goto out;
3500         }
3501         default:
3502                 r = -EINVAL;
3503         }
3504 out:
3505         kfree(u.buffer);
3506         return r;
3507 }
3508
3509 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3510 {
3511         return VM_FAULT_SIGBUS;
3512 }
3513
3514 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3515 {
3516         int ret;
3517
3518         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3519                 return -EINVAL;
3520         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3521         return ret;
3522 }
3523
3524 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3525                                               u64 ident_addr)
3526 {
3527         kvm->arch.ept_identity_map_addr = ident_addr;
3528         return 0;
3529 }
3530
3531 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3532                                           u32 kvm_nr_mmu_pages)
3533 {
3534         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3535                 return -EINVAL;
3536
3537         mutex_lock(&kvm->slots_lock);
3538
3539         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3540         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3541
3542         mutex_unlock(&kvm->slots_lock);
3543         return 0;
3544 }
3545
3546 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3547 {
3548         return kvm->arch.n_max_mmu_pages;
3549 }
3550
3551 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3552 {
3553         int r;
3554
3555         r = 0;
3556         switch (chip->chip_id) {
3557         case KVM_IRQCHIP_PIC_MASTER:
3558                 memcpy(&chip->chip.pic,
3559                         &pic_irqchip(kvm)->pics[0],
3560                         sizeof(struct kvm_pic_state));
3561                 break;
3562         case KVM_IRQCHIP_PIC_SLAVE:
3563                 memcpy(&chip->chip.pic,
3564                         &pic_irqchip(kvm)->pics[1],
3565                         sizeof(struct kvm_pic_state));
3566                 break;
3567         case KVM_IRQCHIP_IOAPIC:
3568                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3569                 break;
3570         default:
3571                 r = -EINVAL;
3572                 break;
3573         }
3574         return r;
3575 }
3576
3577 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3578 {
3579         int r;
3580
3581         r = 0;
3582         switch (chip->chip_id) {
3583         case KVM_IRQCHIP_PIC_MASTER:
3584                 spin_lock(&pic_irqchip(kvm)->lock);
3585                 memcpy(&pic_irqchip(kvm)->pics[0],
3586                         &chip->chip.pic,
3587                         sizeof(struct kvm_pic_state));
3588                 spin_unlock(&pic_irqchip(kvm)->lock);
3589                 break;
3590         case KVM_IRQCHIP_PIC_SLAVE:
3591                 spin_lock(&pic_irqchip(kvm)->lock);
3592                 memcpy(&pic_irqchip(kvm)->pics[1],
3593                         &chip->chip.pic,
3594                         sizeof(struct kvm_pic_state));
3595                 spin_unlock(&pic_irqchip(kvm)->lock);
3596                 break;
3597         case KVM_IRQCHIP_IOAPIC:
3598                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3599                 break;
3600         default:
3601                 r = -EINVAL;
3602                 break;
3603         }
3604         kvm_pic_update_irq(pic_irqchip(kvm));
3605         return r;
3606 }
3607
3608 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3609 {
3610         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3611         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3612         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3613         return 0;
3614 }
3615
3616 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3617 {
3618         int i;
3619         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3620         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3621         for (i = 0; i < 3; i++)
3622                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3623         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3624         return 0;
3625 }
3626
3627 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3628 {
3629         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3630         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3631                 sizeof(ps->channels));
3632         ps->flags = kvm->arch.vpit->pit_state.flags;
3633         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3634         memset(&ps->reserved, 0, sizeof(ps->reserved));
3635         return 0;
3636 }
3637
3638 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3639 {
3640         int start = 0;
3641         int i;
3642         u32 prev_legacy, cur_legacy;
3643         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3644         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3645         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3646         if (!prev_legacy && cur_legacy)
3647                 start = 1;
3648         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3649                sizeof(kvm->arch.vpit->pit_state.channels));
3650         kvm->arch.vpit->pit_state.flags = ps->flags;
3651         for (i = 0; i < 3; i++)
3652                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3653                                    start && i == 0);
3654         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3655         return 0;
3656 }
3657
3658 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3659                                  struct kvm_reinject_control *control)
3660 {
3661         if (!kvm->arch.vpit)
3662                 return -ENXIO;
3663         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3664         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3665         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3666         return 0;
3667 }
3668
3669 /**
3670  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3671  * @kvm: kvm instance
3672  * @log: slot id and address to which we copy the log
3673  *
3674  * Steps 1-4 below provide general overview of dirty page logging. See
3675  * kvm_get_dirty_log_protect() function description for additional details.
3676  *
3677  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3678  * always flush the TLB (step 4) even if previous step failed  and the dirty
3679  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3680  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3681  * writes will be marked dirty for next log read.
3682  *
3683  *   1. Take a snapshot of the bit and clear it if needed.
3684  *   2. Write protect the corresponding page.
3685  *   3. Copy the snapshot to the userspace.
3686  *   4. Flush TLB's if needed.
3687  */
3688 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3689 {
3690         bool is_dirty = false;
3691         int r;
3692
3693         mutex_lock(&kvm->slots_lock);
3694
3695         /*
3696          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3697          */
3698         if (kvm_x86_ops->flush_log_dirty)
3699                 kvm_x86_ops->flush_log_dirty(kvm);
3700
3701         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3702
3703         /*
3704          * All the TLBs can be flushed out of mmu lock, see the comments in
3705          * kvm_mmu_slot_remove_write_access().
3706          */
3707         lockdep_assert_held(&kvm->slots_lock);
3708         if (is_dirty)
3709                 kvm_flush_remote_tlbs(kvm);
3710
3711         mutex_unlock(&kvm->slots_lock);
3712         return r;
3713 }
3714
3715 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3716                         bool line_status)
3717 {
3718         if (!irqchip_in_kernel(kvm))
3719                 return -ENXIO;
3720
3721         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3722                                         irq_event->irq, irq_event->level,
3723                                         line_status);
3724         return 0;
3725 }
3726
3727 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3728                                    struct kvm_enable_cap *cap)
3729 {
3730         int r;
3731
3732         if (cap->flags)
3733                 return -EINVAL;
3734
3735         switch (cap->cap) {
3736         case KVM_CAP_DISABLE_QUIRKS:
3737                 kvm->arch.disabled_quirks = cap->args[0];
3738                 r = 0;
3739                 break;
3740         case KVM_CAP_SPLIT_IRQCHIP: {
3741                 mutex_lock(&kvm->lock);
3742                 r = -EINVAL;
3743                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3744                         goto split_irqchip_unlock;
3745                 r = -EEXIST;
3746                 if (irqchip_in_kernel(kvm))
3747                         goto split_irqchip_unlock;
3748                 if (atomic_read(&kvm->online_vcpus))
3749                         goto split_irqchip_unlock;
3750                 r = kvm_setup_empty_irq_routing(kvm);
3751                 if (r)
3752                         goto split_irqchip_unlock;
3753                 /* Pairs with irqchip_in_kernel. */
3754                 smp_wmb();
3755                 kvm->arch.irqchip_split = true;
3756                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3757                 r = 0;
3758 split_irqchip_unlock:
3759                 mutex_unlock(&kvm->lock);
3760                 break;
3761         }
3762         default:
3763                 r = -EINVAL;
3764                 break;
3765         }
3766         return r;
3767 }
3768
3769 long kvm_arch_vm_ioctl(struct file *filp,
3770                        unsigned int ioctl, unsigned long arg)
3771 {
3772         struct kvm *kvm = filp->private_data;
3773         void __user *argp = (void __user *)arg;
3774         int r = -ENOTTY;
3775         /*
3776          * This union makes it completely explicit to gcc-3.x
3777          * that these two variables' stack usage should be
3778          * combined, not added together.
3779          */
3780         union {
3781                 struct kvm_pit_state ps;
3782                 struct kvm_pit_state2 ps2;
3783                 struct kvm_pit_config pit_config;
3784         } u;
3785
3786         switch (ioctl) {
3787         case KVM_SET_TSS_ADDR:
3788                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3789                 break;
3790         case KVM_SET_IDENTITY_MAP_ADDR: {
3791                 u64 ident_addr;
3792
3793                 r = -EFAULT;
3794                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3795                         goto out;
3796                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3797                 break;
3798         }
3799         case KVM_SET_NR_MMU_PAGES:
3800                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3801                 break;
3802         case KVM_GET_NR_MMU_PAGES:
3803                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3804                 break;
3805         case KVM_CREATE_IRQCHIP: {
3806                 struct kvm_pic *vpic;
3807
3808                 mutex_lock(&kvm->lock);
3809                 r = -EEXIST;
3810                 if (kvm->arch.vpic)
3811                         goto create_irqchip_unlock;
3812                 r = -EINVAL;
3813                 if (atomic_read(&kvm->online_vcpus))
3814                         goto create_irqchip_unlock;
3815                 r = -ENOMEM;
3816                 vpic = kvm_create_pic(kvm);
3817                 if (vpic) {
3818                         r = kvm_ioapic_init(kvm);
3819                         if (r) {
3820                                 mutex_lock(&kvm->slots_lock);
3821                                 kvm_destroy_pic(vpic);
3822                                 mutex_unlock(&kvm->slots_lock);
3823                                 goto create_irqchip_unlock;
3824                         }
3825                 } else
3826                         goto create_irqchip_unlock;
3827                 r = kvm_setup_default_irq_routing(kvm);
3828                 if (r) {
3829                         mutex_lock(&kvm->slots_lock);
3830                         mutex_lock(&kvm->irq_lock);
3831                         kvm_ioapic_destroy(kvm);
3832                         kvm_destroy_pic(vpic);
3833                         mutex_unlock(&kvm->irq_lock);
3834                         mutex_unlock(&kvm->slots_lock);
3835                         goto create_irqchip_unlock;
3836                 }
3837                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3838                 smp_wmb();
3839                 kvm->arch.vpic = vpic;
3840         create_irqchip_unlock:
3841                 mutex_unlock(&kvm->lock);
3842                 break;
3843         }
3844         case KVM_CREATE_PIT:
3845                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3846                 goto create_pit;
3847         case KVM_CREATE_PIT2:
3848                 r = -EFAULT;
3849                 if (copy_from_user(&u.pit_config, argp,
3850                                    sizeof(struct kvm_pit_config)))
3851                         goto out;
3852         create_pit:
3853                 mutex_lock(&kvm->slots_lock);
3854                 r = -EEXIST;
3855                 if (kvm->arch.vpit)
3856                         goto create_pit_unlock;
3857                 r = -ENOMEM;
3858                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3859                 if (kvm->arch.vpit)
3860                         r = 0;
3861         create_pit_unlock:
3862                 mutex_unlock(&kvm->slots_lock);
3863                 break;
3864         case KVM_GET_IRQCHIP: {
3865                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3866                 struct kvm_irqchip *chip;
3867
3868                 chip = memdup_user(argp, sizeof(*chip));
3869                 if (IS_ERR(chip)) {
3870                         r = PTR_ERR(chip);
3871                         goto out;
3872                 }
3873
3874                 r = -ENXIO;
3875                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3876                         goto get_irqchip_out;
3877                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3878                 if (r)
3879                         goto get_irqchip_out;
3880                 r = -EFAULT;
3881                 if (copy_to_user(argp, chip, sizeof *chip))
3882                         goto get_irqchip_out;
3883                 r = 0;
3884         get_irqchip_out:
3885                 kfree(chip);
3886                 break;
3887         }
3888         case KVM_SET_IRQCHIP: {
3889                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3890                 struct kvm_irqchip *chip;
3891
3892                 chip = memdup_user(argp, sizeof(*chip));
3893                 if (IS_ERR(chip)) {
3894                         r = PTR_ERR(chip);
3895                         goto out;
3896                 }
3897
3898                 r = -ENXIO;
3899                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3900                         goto set_irqchip_out;
3901                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3902                 if (r)
3903                         goto set_irqchip_out;
3904                 r = 0;
3905         set_irqchip_out:
3906                 kfree(chip);
3907                 break;
3908         }
3909         case KVM_GET_PIT: {
3910                 r = -EFAULT;
3911                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3912                         goto out;
3913                 r = -ENXIO;
3914                 if (!kvm->arch.vpit)
3915                         goto out;
3916                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3917                 if (r)
3918                         goto out;
3919                 r = -EFAULT;
3920                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3921                         goto out;
3922                 r = 0;
3923                 break;
3924         }
3925         case KVM_SET_PIT: {
3926                 r = -EFAULT;
3927                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3928                         goto out;
3929                 r = -ENXIO;
3930                 if (!kvm->arch.vpit)
3931                         goto out;
3932                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3933                 break;
3934         }
3935         case KVM_GET_PIT2: {
3936                 r = -ENXIO;
3937                 if (!kvm->arch.vpit)
3938                         goto out;
3939                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3940                 if (r)
3941                         goto out;
3942                 r = -EFAULT;
3943                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3944                         goto out;
3945                 r = 0;
3946                 break;
3947         }
3948         case KVM_SET_PIT2: {
3949                 r = -EFAULT;
3950                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3951                         goto out;
3952                 r = -ENXIO;
3953                 if (!kvm->arch.vpit)
3954                         goto out;
3955                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3956                 break;
3957         }
3958         case KVM_REINJECT_CONTROL: {
3959                 struct kvm_reinject_control control;
3960                 r =  -EFAULT;
3961                 if (copy_from_user(&control, argp, sizeof(control)))
3962                         goto out;
3963                 r = kvm_vm_ioctl_reinject(kvm, &control);
3964                 break;
3965         }
3966         case KVM_SET_BOOT_CPU_ID:
3967                 r = 0;
3968                 mutex_lock(&kvm->lock);
3969                 if (atomic_read(&kvm->online_vcpus) != 0)
3970                         r = -EBUSY;
3971                 else
3972                         kvm->arch.bsp_vcpu_id = arg;
3973                 mutex_unlock(&kvm->lock);
3974                 break;
3975         case KVM_XEN_HVM_CONFIG: {
3976                 r = -EFAULT;
3977                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3978                                    sizeof(struct kvm_xen_hvm_config)))
3979                         goto out;
3980                 r = -EINVAL;
3981                 if (kvm->arch.xen_hvm_config.flags)
3982                         goto out;
3983                 r = 0;
3984                 break;
3985         }
3986         case KVM_SET_CLOCK: {
3987                 struct kvm_clock_data user_ns;
3988                 u64 now_ns;
3989                 s64 delta;
3990
3991                 r = -EFAULT;
3992                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3993                         goto out;
3994
3995                 r = -EINVAL;
3996                 if (user_ns.flags)
3997                         goto out;
3998
3999                 r = 0;
4000                 local_irq_disable();
4001                 now_ns = get_kernel_ns();
4002                 delta = user_ns.clock - now_ns;
4003                 local_irq_enable();
4004                 kvm->arch.kvmclock_offset = delta;
4005                 kvm_gen_update_masterclock(kvm);
4006                 break;
4007         }
4008         case KVM_GET_CLOCK: {
4009                 struct kvm_clock_data user_ns;
4010                 u64 now_ns;
4011
4012                 local_irq_disable();
4013                 now_ns = get_kernel_ns();
4014                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4015                 local_irq_enable();
4016                 user_ns.flags = 0;
4017                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4018
4019                 r = -EFAULT;
4020                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4021                         goto out;
4022                 r = 0;
4023                 break;
4024         }
4025         case KVM_ENABLE_CAP: {
4026                 struct kvm_enable_cap cap;
4027
4028                 r = -EFAULT;
4029                 if (copy_from_user(&cap, argp, sizeof(cap)))
4030                         goto out;
4031                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4032                 break;
4033         }
4034         default:
4035                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4036         }
4037 out:
4038         return r;
4039 }
4040
4041 static void kvm_init_msr_list(void)
4042 {
4043         u32 dummy[2];
4044         unsigned i, j;
4045
4046         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4047                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4048                         continue;
4049
4050                 /*
4051                  * Even MSRs that are valid in the host may not be exposed
4052                  * to the guests in some cases.
4053                  */
4054                 switch (msrs_to_save[i]) {
4055                 case MSR_IA32_BNDCFGS:
4056                         if (!kvm_x86_ops->mpx_supported())
4057                                 continue;
4058                         break;
4059                 case MSR_TSC_AUX:
4060                         if (!kvm_x86_ops->rdtscp_supported())
4061                                 continue;
4062                         break;
4063                 default:
4064                         break;
4065                 }
4066
4067                 if (j < i)
4068                         msrs_to_save[j] = msrs_to_save[i];
4069                 j++;
4070         }
4071         num_msrs_to_save = j;
4072
4073         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4074                 switch (emulated_msrs[i]) {
4075                 case MSR_IA32_SMBASE:
4076                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4077                                 continue;
4078                         break;
4079                 default:
4080                         break;
4081                 }
4082
4083                 if (j < i)
4084                         emulated_msrs[j] = emulated_msrs[i];
4085                 j++;
4086         }
4087         num_emulated_msrs = j;
4088 }
4089
4090 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4091                            const void *v)
4092 {
4093         int handled = 0;
4094         int n;
4095
4096         do {
4097                 n = min(len, 8);
4098                 if (!(vcpu->arch.apic &&
4099                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4100                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4101                         break;
4102                 handled += n;
4103                 addr += n;
4104                 len -= n;
4105                 v += n;
4106         } while (len);
4107
4108         return handled;
4109 }
4110
4111 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4112 {
4113         int handled = 0;
4114         int n;
4115
4116         do {
4117                 n = min(len, 8);
4118                 if (!(vcpu->arch.apic &&
4119                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4120                                          addr, n, v))
4121                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4122                         break;
4123                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4124                 handled += n;
4125                 addr += n;
4126                 len -= n;
4127                 v += n;
4128         } while (len);
4129
4130         return handled;
4131 }
4132
4133 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4134                         struct kvm_segment *var, int seg)
4135 {
4136         kvm_x86_ops->set_segment(vcpu, var, seg);
4137 }
4138
4139 void kvm_get_segment(struct kvm_vcpu *vcpu,
4140                      struct kvm_segment *var, int seg)
4141 {
4142         kvm_x86_ops->get_segment(vcpu, var, seg);
4143 }
4144
4145 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4146                            struct x86_exception *exception)
4147 {
4148         gpa_t t_gpa;
4149
4150         BUG_ON(!mmu_is_nested(vcpu));
4151
4152         /* NPT walks are always user-walks */
4153         access |= PFERR_USER_MASK;
4154         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4155
4156         return t_gpa;
4157 }
4158
4159 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4160                               struct x86_exception *exception)
4161 {
4162         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4163         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4164 }
4165
4166  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4167                                 struct x86_exception *exception)
4168 {
4169         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4170         access |= PFERR_FETCH_MASK;
4171         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4172 }
4173
4174 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4175                                struct x86_exception *exception)
4176 {
4177         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4178         access |= PFERR_WRITE_MASK;
4179         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4180 }
4181
4182 /* uses this to access any guest's mapped memory without checking CPL */
4183 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4184                                 struct x86_exception *exception)
4185 {
4186         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4187 }
4188
4189 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4190                                       struct kvm_vcpu *vcpu, u32 access,
4191                                       struct x86_exception *exception)
4192 {
4193         void *data = val;
4194         int r = X86EMUL_CONTINUE;
4195
4196         while (bytes) {
4197                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4198                                                             exception);
4199                 unsigned offset = addr & (PAGE_SIZE-1);
4200                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4201                 int ret;
4202
4203                 if (gpa == UNMAPPED_GVA)
4204                         return X86EMUL_PROPAGATE_FAULT;
4205                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4206                                                offset, toread);
4207                 if (ret < 0) {
4208                         r = X86EMUL_IO_NEEDED;
4209                         goto out;
4210                 }
4211
4212                 bytes -= toread;
4213                 data += toread;
4214                 addr += toread;
4215         }
4216 out:
4217         return r;
4218 }
4219
4220 /* used for instruction fetching */
4221 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4222                                 gva_t addr, void *val, unsigned int bytes,
4223                                 struct x86_exception *exception)
4224 {
4225         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4226         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4227         unsigned offset;
4228         int ret;
4229
4230         /* Inline kvm_read_guest_virt_helper for speed.  */
4231         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4232                                                     exception);
4233         if (unlikely(gpa == UNMAPPED_GVA))
4234                 return X86EMUL_PROPAGATE_FAULT;
4235
4236         offset = addr & (PAGE_SIZE-1);
4237         if (WARN_ON(offset + bytes > PAGE_SIZE))
4238                 bytes = (unsigned)PAGE_SIZE - offset;
4239         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4240                                        offset, bytes);
4241         if (unlikely(ret < 0))
4242                 return X86EMUL_IO_NEEDED;
4243
4244         return X86EMUL_CONTINUE;
4245 }
4246
4247 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4248                                gva_t addr, void *val, unsigned int bytes,
4249                                struct x86_exception *exception)
4250 {
4251         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4252         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4253
4254         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4255                                           exception);
4256 }
4257 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4258
4259 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4260                                       gva_t addr, void *val, unsigned int bytes,
4261                                       struct x86_exception *exception)
4262 {
4263         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4264         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4265 }
4266
4267 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4268                 unsigned long addr, void *val, unsigned int bytes)
4269 {
4270         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4271         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4272
4273         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4274 }
4275
4276 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4277                                        gva_t addr, void *val,
4278                                        unsigned int bytes,
4279                                        struct x86_exception *exception)
4280 {
4281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4282         void *data = val;
4283         int r = X86EMUL_CONTINUE;
4284
4285         while (bytes) {
4286                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4287                                                              PFERR_WRITE_MASK,
4288                                                              exception);
4289                 unsigned offset = addr & (PAGE_SIZE-1);
4290                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4291                 int ret;
4292
4293                 if (gpa == UNMAPPED_GVA)
4294                         return X86EMUL_PROPAGATE_FAULT;
4295                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4296                 if (ret < 0) {
4297                         r = X86EMUL_IO_NEEDED;
4298                         goto out;
4299                 }
4300
4301                 bytes -= towrite;
4302                 data += towrite;
4303                 addr += towrite;
4304         }
4305 out:
4306         return r;
4307 }
4308 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4309
4310 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4311                                 gpa_t *gpa, struct x86_exception *exception,
4312                                 bool write)
4313 {
4314         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4315                 | (write ? PFERR_WRITE_MASK : 0);
4316
4317         if (vcpu_match_mmio_gva(vcpu, gva)
4318             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4319                                  vcpu->arch.access, access)) {
4320                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4321                                         (gva & (PAGE_SIZE - 1));
4322                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4323                 return 1;
4324         }
4325
4326         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4327
4328         if (*gpa == UNMAPPED_GVA)
4329                 return -1;
4330
4331         /* For APIC access vmexit */
4332         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4333                 return 1;
4334
4335         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4336                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4337                 return 1;
4338         }
4339
4340         return 0;
4341 }
4342
4343 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4344                         const void *val, int bytes)
4345 {
4346         int ret;
4347
4348         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4349         if (ret < 0)
4350                 return 0;
4351         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4352         return 1;
4353 }
4354
4355 struct read_write_emulator_ops {
4356         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4357                                   int bytes);
4358         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4359                                   void *val, int bytes);
4360         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4361                                int bytes, void *val);
4362         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4363                                     void *val, int bytes);
4364         bool write;
4365 };
4366
4367 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4368 {
4369         if (vcpu->mmio_read_completed) {
4370                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4371                                vcpu->mmio_fragments[0].gpa, val);
4372                 vcpu->mmio_read_completed = 0;
4373                 return 1;
4374         }
4375
4376         return 0;
4377 }
4378
4379 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4380                         void *val, int bytes)
4381 {
4382         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4383 }
4384
4385 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4386                          void *val, int bytes)
4387 {
4388         return emulator_write_phys(vcpu, gpa, val, bytes);
4389 }
4390
4391 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4392 {
4393         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4394         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4395 }
4396
4397 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4398                           void *val, int bytes)
4399 {
4400         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4401         return X86EMUL_IO_NEEDED;
4402 }
4403
4404 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4405                            void *val, int bytes)
4406 {
4407         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4408
4409         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4410         return X86EMUL_CONTINUE;
4411 }
4412
4413 static const struct read_write_emulator_ops read_emultor = {
4414         .read_write_prepare = read_prepare,
4415         .read_write_emulate = read_emulate,
4416         .read_write_mmio = vcpu_mmio_read,
4417         .read_write_exit_mmio = read_exit_mmio,
4418 };
4419
4420 static const struct read_write_emulator_ops write_emultor = {
4421         .read_write_emulate = write_emulate,
4422         .read_write_mmio = write_mmio,
4423         .read_write_exit_mmio = write_exit_mmio,
4424         .write = true,
4425 };
4426
4427 static int emulator_read_write_onepage(unsigned long addr, void *val,
4428                                        unsigned int bytes,
4429                                        struct x86_exception *exception,
4430                                        struct kvm_vcpu *vcpu,
4431                                        const struct read_write_emulator_ops *ops)
4432 {
4433         gpa_t gpa;
4434         int handled, ret;
4435         bool write = ops->write;
4436         struct kvm_mmio_fragment *frag;
4437
4438         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4439
4440         if (ret < 0)
4441                 return X86EMUL_PROPAGATE_FAULT;
4442
4443         /* For APIC access vmexit */
4444         if (ret)
4445                 goto mmio;
4446
4447         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4448                 return X86EMUL_CONTINUE;
4449
4450 mmio:
4451         /*
4452          * Is this MMIO handled locally?
4453          */
4454         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4455         if (handled == bytes)
4456                 return X86EMUL_CONTINUE;
4457
4458         gpa += handled;
4459         bytes -= handled;
4460         val += handled;
4461
4462         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4463         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4464         frag->gpa = gpa;
4465         frag->data = val;
4466         frag->len = bytes;
4467         return X86EMUL_CONTINUE;
4468 }
4469
4470 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4471                         unsigned long addr,
4472                         void *val, unsigned int bytes,
4473                         struct x86_exception *exception,
4474                         const struct read_write_emulator_ops *ops)
4475 {
4476         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4477         gpa_t gpa;
4478         int rc;
4479
4480         if (ops->read_write_prepare &&
4481                   ops->read_write_prepare(vcpu, val, bytes))
4482                 return X86EMUL_CONTINUE;
4483
4484         vcpu->mmio_nr_fragments = 0;
4485
4486         /* Crossing a page boundary? */
4487         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4488                 int now;
4489
4490                 now = -addr & ~PAGE_MASK;
4491                 rc = emulator_read_write_onepage(addr, val, now, exception,
4492                                                  vcpu, ops);
4493
4494                 if (rc != X86EMUL_CONTINUE)
4495                         return rc;
4496                 addr += now;
4497                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4498                         addr = (u32)addr;
4499                 val += now;
4500                 bytes -= now;
4501         }
4502
4503         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4504                                          vcpu, ops);
4505         if (rc != X86EMUL_CONTINUE)
4506                 return rc;
4507
4508         if (!vcpu->mmio_nr_fragments)
4509                 return rc;
4510
4511         gpa = vcpu->mmio_fragments[0].gpa;
4512
4513         vcpu->mmio_needed = 1;
4514         vcpu->mmio_cur_fragment = 0;
4515
4516         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4517         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4518         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4519         vcpu->run->mmio.phys_addr = gpa;
4520
4521         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4522 }
4523
4524 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4525                                   unsigned long addr,
4526                                   void *val,
4527                                   unsigned int bytes,
4528                                   struct x86_exception *exception)
4529 {
4530         return emulator_read_write(ctxt, addr, val, bytes,
4531                                    exception, &read_emultor);
4532 }
4533
4534 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4535                             unsigned long addr,
4536                             const void *val,
4537                             unsigned int bytes,
4538                             struct x86_exception *exception)
4539 {
4540         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4541                                    exception, &write_emultor);
4542 }
4543
4544 #define CMPXCHG_TYPE(t, ptr, old, new) \
4545         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4546
4547 #ifdef CONFIG_X86_64
4548 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4549 #else
4550 #  define CMPXCHG64(ptr, old, new) \
4551         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4552 #endif
4553
4554 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4555                                      unsigned long addr,
4556                                      const void *old,
4557                                      const void *new,
4558                                      unsigned int bytes,
4559                                      struct x86_exception *exception)
4560 {
4561         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4562         gpa_t gpa;
4563         struct page *page;
4564         char *kaddr;
4565         bool exchanged;
4566
4567         /* guests cmpxchg8b have to be emulated atomically */
4568         if (bytes > 8 || (bytes & (bytes - 1)))
4569                 goto emul_write;
4570
4571         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4572
4573         if (gpa == UNMAPPED_GVA ||
4574             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4575                 goto emul_write;
4576
4577         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4578                 goto emul_write;
4579
4580         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4581         if (is_error_page(page))
4582                 goto emul_write;
4583
4584         kaddr = kmap_atomic(page);
4585         kaddr += offset_in_page(gpa);
4586         switch (bytes) {
4587         case 1:
4588                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4589                 break;
4590         case 2:
4591                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4592                 break;
4593         case 4:
4594                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4595                 break;
4596         case 8:
4597                 exchanged = CMPXCHG64(kaddr, old, new);
4598                 break;
4599         default:
4600                 BUG();
4601         }
4602         kunmap_atomic(kaddr);
4603         kvm_release_page_dirty(page);
4604
4605         if (!exchanged)
4606                 return X86EMUL_CMPXCHG_FAILED;
4607
4608         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4609         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4610
4611         return X86EMUL_CONTINUE;
4612
4613 emul_write:
4614         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4615
4616         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4617 }
4618
4619 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4620 {
4621         int r = 0, i;
4622
4623         for (i = 0; i < vcpu->arch.pio.count; i++) {
4624                 if (vcpu->arch.pio.in)
4625                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4626                                             vcpu->arch.pio.size, pd);
4627                 else
4628                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4629                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4630                                              pd);
4631                 if (r)
4632                         break;
4633                 pd += vcpu->arch.pio.size;
4634         }
4635         return r;
4636 }
4637
4638 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4639                                unsigned short port, void *val,
4640                                unsigned int count, bool in)
4641 {
4642         vcpu->arch.pio.port = port;
4643         vcpu->arch.pio.in = in;
4644         vcpu->arch.pio.count  = count;
4645         vcpu->arch.pio.size = size;
4646
4647         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4648                 vcpu->arch.pio.count = 0;
4649                 return 1;
4650         }
4651
4652         vcpu->run->exit_reason = KVM_EXIT_IO;
4653         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4654         vcpu->run->io.size = size;
4655         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4656         vcpu->run->io.count = count;
4657         vcpu->run->io.port = port;
4658
4659         return 0;
4660 }
4661
4662 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4663                                     int size, unsigned short port, void *val,
4664                                     unsigned int count)
4665 {
4666         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4667         int ret;
4668
4669         if (vcpu->arch.pio.count)
4670                 goto data_avail;
4671
4672         memset(vcpu->arch.pio_data, 0, size * count);
4673
4674         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4675         if (ret) {
4676 data_avail:
4677                 memcpy(val, vcpu->arch.pio_data, size * count);
4678                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4679                 vcpu->arch.pio.count = 0;
4680                 return 1;
4681         }
4682
4683         return 0;
4684 }
4685
4686 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4687                                      int size, unsigned short port,
4688                                      const void *val, unsigned int count)
4689 {
4690         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4691
4692         memcpy(vcpu->arch.pio_data, val, size * count);
4693         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4694         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4695 }
4696
4697 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4698 {
4699         return kvm_x86_ops->get_segment_base(vcpu, seg);
4700 }
4701
4702 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4703 {
4704         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4705 }
4706
4707 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4708 {
4709         if (!need_emulate_wbinvd(vcpu))
4710                 return X86EMUL_CONTINUE;
4711
4712         if (kvm_x86_ops->has_wbinvd_exit()) {
4713                 int cpu = get_cpu();
4714
4715                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4716                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4717                                 wbinvd_ipi, NULL, 1);
4718                 put_cpu();
4719                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4720         } else
4721                 wbinvd();
4722         return X86EMUL_CONTINUE;
4723 }
4724
4725 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4726 {
4727         kvm_x86_ops->skip_emulated_instruction(vcpu);
4728         return kvm_emulate_wbinvd_noskip(vcpu);
4729 }
4730 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4731
4732
4733
4734 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4735 {
4736         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4737 }
4738
4739 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4740                            unsigned long *dest)
4741 {
4742         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4743 }
4744
4745 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4746                            unsigned long value)
4747 {
4748
4749         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4750 }
4751
4752 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4753 {
4754         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4755 }
4756
4757 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4758 {
4759         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4760         unsigned long value;
4761
4762         switch (cr) {
4763         case 0:
4764                 value = kvm_read_cr0(vcpu);
4765                 break;
4766         case 2:
4767                 value = vcpu->arch.cr2;
4768                 break;
4769         case 3:
4770                 value = kvm_read_cr3(vcpu);
4771                 break;
4772         case 4:
4773                 value = kvm_read_cr4(vcpu);
4774                 break;
4775         case 8:
4776                 value = kvm_get_cr8(vcpu);
4777                 break;
4778         default:
4779                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4780                 return 0;
4781         }
4782
4783         return value;
4784 }
4785
4786 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4787 {
4788         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4789         int res = 0;
4790
4791         switch (cr) {
4792         case 0:
4793                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4794                 break;
4795         case 2:
4796                 vcpu->arch.cr2 = val;
4797                 break;
4798         case 3:
4799                 res = kvm_set_cr3(vcpu, val);
4800                 break;
4801         case 4:
4802                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4803                 break;
4804         case 8:
4805                 res = kvm_set_cr8(vcpu, val);
4806                 break;
4807         default:
4808                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4809                 res = -1;
4810         }
4811
4812         return res;
4813 }
4814
4815 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4816 {
4817         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4818 }
4819
4820 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4821 {
4822         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4823 }
4824
4825 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4826 {
4827         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4828 }
4829
4830 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4831 {
4832         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4833 }
4834
4835 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4836 {
4837         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4838 }
4839
4840 static unsigned long emulator_get_cached_segment_base(
4841         struct x86_emulate_ctxt *ctxt, int seg)
4842 {
4843         return get_segment_base(emul_to_vcpu(ctxt), seg);
4844 }
4845
4846 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4847                                  struct desc_struct *desc, u32 *base3,
4848                                  int seg)
4849 {
4850         struct kvm_segment var;
4851
4852         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4853         *selector = var.selector;
4854
4855         if (var.unusable) {
4856                 memset(desc, 0, sizeof(*desc));
4857                 if (base3)
4858                         *base3 = 0;
4859                 return false;
4860         }
4861
4862         if (var.g)
4863                 var.limit >>= 12;
4864         set_desc_limit(desc, var.limit);
4865         set_desc_base(desc, (unsigned long)var.base);
4866 #ifdef CONFIG_X86_64
4867         if (base3)
4868                 *base3 = var.base >> 32;
4869 #endif
4870         desc->type = var.type;
4871         desc->s = var.s;
4872         desc->dpl = var.dpl;
4873         desc->p = var.present;
4874         desc->avl = var.avl;
4875         desc->l = var.l;
4876         desc->d = var.db;
4877         desc->g = var.g;
4878
4879         return true;
4880 }
4881
4882 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4883                                  struct desc_struct *desc, u32 base3,
4884                                  int seg)
4885 {
4886         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4887         struct kvm_segment var;
4888
4889         var.selector = selector;
4890         var.base = get_desc_base(desc);
4891 #ifdef CONFIG_X86_64
4892         var.base |= ((u64)base3) << 32;
4893 #endif
4894         var.limit = get_desc_limit(desc);
4895         if (desc->g)
4896                 var.limit = (var.limit << 12) | 0xfff;
4897         var.type = desc->type;
4898         var.dpl = desc->dpl;
4899         var.db = desc->d;
4900         var.s = desc->s;
4901         var.l = desc->l;
4902         var.g = desc->g;
4903         var.avl = desc->avl;
4904         var.present = desc->p;
4905         var.unusable = !var.present;
4906         var.padding = 0;
4907
4908         kvm_set_segment(vcpu, &var, seg);
4909         return;
4910 }
4911
4912 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4913                             u32 msr_index, u64 *pdata)
4914 {
4915         struct msr_data msr;
4916         int r;
4917
4918         msr.index = msr_index;
4919         msr.host_initiated = false;
4920         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4921         if (r)
4922                 return r;
4923
4924         *pdata = msr.data;
4925         return 0;
4926 }
4927
4928 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4929                             u32 msr_index, u64 data)
4930 {
4931         struct msr_data msr;
4932
4933         msr.data = data;
4934         msr.index = msr_index;
4935         msr.host_initiated = false;
4936         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4937 }
4938
4939 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4940 {
4941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4942
4943         return vcpu->arch.smbase;
4944 }
4945
4946 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4947 {
4948         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4949
4950         vcpu->arch.smbase = smbase;
4951 }
4952
4953 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4954                               u32 pmc)
4955 {
4956         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4957 }
4958
4959 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4960                              u32 pmc, u64 *pdata)
4961 {
4962         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4963 }
4964
4965 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4966 {
4967         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4968 }
4969
4970 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4971 {
4972         preempt_disable();
4973         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4974         /*
4975          * CR0.TS may reference the host fpu state, not the guest fpu state,
4976          * so it may be clear at this point.
4977          */
4978         clts();
4979 }
4980
4981 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4982 {
4983         preempt_enable();
4984 }
4985
4986 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4987                               struct x86_instruction_info *info,
4988                               enum x86_intercept_stage stage)
4989 {
4990         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4991 }
4992
4993 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4994                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4995 {
4996         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4997 }
4998
4999 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5000 {
5001         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5002 }
5003
5004 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5005 {
5006         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5007 }
5008
5009 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5010 {
5011         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5012 }
5013
5014 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5015 {
5016         return emul_to_vcpu(ctxt)->arch.hflags;
5017 }
5018
5019 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5020 {
5021         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5022 }
5023
5024 static const struct x86_emulate_ops emulate_ops = {
5025         .read_gpr            = emulator_read_gpr,
5026         .write_gpr           = emulator_write_gpr,
5027         .read_std            = kvm_read_guest_virt_system,
5028         .write_std           = kvm_write_guest_virt_system,
5029         .read_phys           = kvm_read_guest_phys_system,
5030         .fetch               = kvm_fetch_guest_virt,
5031         .read_emulated       = emulator_read_emulated,
5032         .write_emulated      = emulator_write_emulated,
5033         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5034         .invlpg              = emulator_invlpg,
5035         .pio_in_emulated     = emulator_pio_in_emulated,
5036         .pio_out_emulated    = emulator_pio_out_emulated,
5037         .get_segment         = emulator_get_segment,
5038         .set_segment         = emulator_set_segment,
5039         .get_cached_segment_base = emulator_get_cached_segment_base,
5040         .get_gdt             = emulator_get_gdt,
5041         .get_idt             = emulator_get_idt,
5042         .set_gdt             = emulator_set_gdt,
5043         .set_idt             = emulator_set_idt,
5044         .get_cr              = emulator_get_cr,
5045         .set_cr              = emulator_set_cr,
5046         .cpl                 = emulator_get_cpl,
5047         .get_dr              = emulator_get_dr,
5048         .set_dr              = emulator_set_dr,
5049         .get_smbase          = emulator_get_smbase,
5050         .set_smbase          = emulator_set_smbase,
5051         .set_msr             = emulator_set_msr,
5052         .get_msr             = emulator_get_msr,
5053         .check_pmc           = emulator_check_pmc,
5054         .read_pmc            = emulator_read_pmc,
5055         .halt                = emulator_halt,
5056         .wbinvd              = emulator_wbinvd,
5057         .fix_hypercall       = emulator_fix_hypercall,
5058         .get_fpu             = emulator_get_fpu,
5059         .put_fpu             = emulator_put_fpu,
5060         .intercept           = emulator_intercept,
5061         .get_cpuid           = emulator_get_cpuid,
5062         .set_nmi_mask        = emulator_set_nmi_mask,
5063         .get_hflags          = emulator_get_hflags,
5064         .set_hflags          = emulator_set_hflags,
5065 };
5066
5067 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5068 {
5069         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5070         /*
5071          * an sti; sti; sequence only disable interrupts for the first
5072          * instruction. So, if the last instruction, be it emulated or
5073          * not, left the system with the INT_STI flag enabled, it
5074          * means that the last instruction is an sti. We should not
5075          * leave the flag on in this case. The same goes for mov ss
5076          */
5077         if (int_shadow & mask)
5078                 mask = 0;
5079         if (unlikely(int_shadow || mask)) {
5080                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5081                 if (!mask)
5082                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5083         }
5084 }
5085
5086 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5087 {
5088         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5089         if (ctxt->exception.vector == PF_VECTOR)
5090                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5091
5092         if (ctxt->exception.error_code_valid)
5093                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5094                                       ctxt->exception.error_code);
5095         else
5096                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5097         return false;
5098 }
5099
5100 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5101 {
5102         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5103         int cs_db, cs_l;
5104
5105         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5106
5107         ctxt->eflags = kvm_get_rflags(vcpu);
5108         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5109
5110         ctxt->eip = kvm_rip_read(vcpu);
5111         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5112                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5113                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5114                      cs_db                              ? X86EMUL_MODE_PROT32 :
5115                                                           X86EMUL_MODE_PROT16;
5116         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5117         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5118         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5119
5120         init_decode_cache(ctxt);
5121         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5122 }
5123
5124 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5125 {
5126         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5127         int ret;
5128
5129         init_emulate_ctxt(vcpu);
5130
5131         ctxt->op_bytes = 2;
5132         ctxt->ad_bytes = 2;
5133         ctxt->_eip = ctxt->eip + inc_eip;
5134         ret = emulate_int_real(ctxt, irq);
5135
5136         if (ret != X86EMUL_CONTINUE)
5137                 return EMULATE_FAIL;
5138
5139         ctxt->eip = ctxt->_eip;
5140         kvm_rip_write(vcpu, ctxt->eip);
5141         kvm_set_rflags(vcpu, ctxt->eflags);
5142
5143         if (irq == NMI_VECTOR)
5144                 vcpu->arch.nmi_pending = 0;
5145         else
5146                 vcpu->arch.interrupt.pending = false;
5147
5148         return EMULATE_DONE;
5149 }
5150 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5151
5152 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5153 {
5154         int r = EMULATE_DONE;
5155
5156         ++vcpu->stat.insn_emulation_fail;
5157         trace_kvm_emulate_insn_failed(vcpu);
5158         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5159                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5160                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5161                 vcpu->run->internal.ndata = 0;
5162                 r = EMULATE_USER_EXIT;
5163         }
5164         kvm_queue_exception(vcpu, UD_VECTOR);
5165
5166         return r;
5167 }
5168
5169 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5170                                   bool write_fault_to_shadow_pgtable,
5171                                   int emulation_type)
5172 {
5173         gpa_t gpa = cr2;
5174         pfn_t pfn;
5175
5176         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5177                 return false;
5178
5179         if (!vcpu->arch.mmu.direct_map) {
5180                 /*
5181                  * Write permission should be allowed since only
5182                  * write access need to be emulated.
5183                  */
5184                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5185
5186                 /*
5187                  * If the mapping is invalid in guest, let cpu retry
5188                  * it to generate fault.
5189                  */
5190                 if (gpa == UNMAPPED_GVA)
5191                         return true;
5192         }
5193
5194         /*
5195          * Do not retry the unhandleable instruction if it faults on the
5196          * readonly host memory, otherwise it will goto a infinite loop:
5197          * retry instruction -> write #PF -> emulation fail -> retry
5198          * instruction -> ...
5199          */
5200         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5201
5202         /*
5203          * If the instruction failed on the error pfn, it can not be fixed,
5204          * report the error to userspace.
5205          */
5206         if (is_error_noslot_pfn(pfn))
5207                 return false;
5208
5209         kvm_release_pfn_clean(pfn);
5210
5211         /* The instructions are well-emulated on direct mmu. */
5212         if (vcpu->arch.mmu.direct_map) {
5213                 unsigned int indirect_shadow_pages;
5214
5215                 spin_lock(&vcpu->kvm->mmu_lock);
5216                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5217                 spin_unlock(&vcpu->kvm->mmu_lock);
5218
5219                 if (indirect_shadow_pages)
5220                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5221
5222                 return true;
5223         }
5224
5225         /*
5226          * if emulation was due to access to shadowed page table
5227          * and it failed try to unshadow page and re-enter the
5228          * guest to let CPU execute the instruction.
5229          */
5230         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5231
5232         /*
5233          * If the access faults on its page table, it can not
5234          * be fixed by unprotecting shadow page and it should
5235          * be reported to userspace.
5236          */
5237         return !write_fault_to_shadow_pgtable;
5238 }
5239
5240 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5241                               unsigned long cr2,  int emulation_type)
5242 {
5243         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5244         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5245
5246         last_retry_eip = vcpu->arch.last_retry_eip;
5247         last_retry_addr = vcpu->arch.last_retry_addr;
5248
5249         /*
5250          * If the emulation is caused by #PF and it is non-page_table
5251          * writing instruction, it means the VM-EXIT is caused by shadow
5252          * page protected, we can zap the shadow page and retry this
5253          * instruction directly.
5254          *
5255          * Note: if the guest uses a non-page-table modifying instruction
5256          * on the PDE that points to the instruction, then we will unmap
5257          * the instruction and go to an infinite loop. So, we cache the
5258          * last retried eip and the last fault address, if we meet the eip
5259          * and the address again, we can break out of the potential infinite
5260          * loop.
5261          */
5262         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5263
5264         if (!(emulation_type & EMULTYPE_RETRY))
5265                 return false;
5266
5267         if (x86_page_table_writing_insn(ctxt))
5268                 return false;
5269
5270         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5271                 return false;
5272
5273         vcpu->arch.last_retry_eip = ctxt->eip;
5274         vcpu->arch.last_retry_addr = cr2;
5275
5276         if (!vcpu->arch.mmu.direct_map)
5277                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5278
5279         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5280
5281         return true;
5282 }
5283
5284 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5285 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5286
5287 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5288 {
5289         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5290                 /* This is a good place to trace that we are exiting SMM.  */
5291                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5292
5293                 if (unlikely(vcpu->arch.smi_pending)) {
5294                         kvm_make_request(KVM_REQ_SMI, vcpu);
5295                         vcpu->arch.smi_pending = 0;
5296                 } else {
5297                         /* Process a latched INIT, if any.  */
5298                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5299                 }
5300         }
5301
5302         kvm_mmu_reset_context(vcpu);
5303 }
5304
5305 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5306 {
5307         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5308
5309         vcpu->arch.hflags = emul_flags;
5310
5311         if (changed & HF_SMM_MASK)
5312                 kvm_smm_changed(vcpu);
5313 }
5314
5315 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5316                                 unsigned long *db)
5317 {
5318         u32 dr6 = 0;
5319         int i;
5320         u32 enable, rwlen;
5321
5322         enable = dr7;
5323         rwlen = dr7 >> 16;
5324         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5325                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5326                         dr6 |= (1 << i);
5327         return dr6;
5328 }
5329
5330 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5331 {
5332         struct kvm_run *kvm_run = vcpu->run;
5333
5334         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5335                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5336                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5337                 kvm_run->debug.arch.exception = DB_VECTOR;
5338                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5339                 *r = EMULATE_USER_EXIT;
5340         } else {
5341                 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5342                 /*
5343                  * "Certain debug exceptions may clear bit 0-3.  The
5344                  * remaining contents of the DR6 register are never
5345                  * cleared by the processor".
5346                  */
5347                 vcpu->arch.dr6 &= ~15;
5348                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5349                 kvm_queue_exception(vcpu, DB_VECTOR);
5350         }
5351 }
5352
5353 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5354 {
5355         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5356             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5357                 struct kvm_run *kvm_run = vcpu->run;
5358                 unsigned long eip = kvm_get_linear_rip(vcpu);
5359                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5360                                            vcpu->arch.guest_debug_dr7,
5361                                            vcpu->arch.eff_db);
5362
5363                 if (dr6 != 0) {
5364                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5365                         kvm_run->debug.arch.pc = eip;
5366                         kvm_run->debug.arch.exception = DB_VECTOR;
5367                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5368                         *r = EMULATE_USER_EXIT;
5369                         return true;
5370                 }
5371         }
5372
5373         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5374             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5375                 unsigned long eip = kvm_get_linear_rip(vcpu);
5376                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5377                                            vcpu->arch.dr7,
5378                                            vcpu->arch.db);
5379
5380                 if (dr6 != 0) {
5381                         vcpu->arch.dr6 &= ~15;
5382                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5383                         kvm_queue_exception(vcpu, DB_VECTOR);
5384                         *r = EMULATE_DONE;
5385                         return true;
5386                 }
5387         }
5388
5389         return false;
5390 }
5391
5392 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5393                             unsigned long cr2,
5394                             int emulation_type,
5395                             void *insn,
5396                             int insn_len)
5397 {
5398         int r;
5399         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5400         bool writeback = true;
5401         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5402
5403         /*
5404          * Clear write_fault_to_shadow_pgtable here to ensure it is
5405          * never reused.
5406          */
5407         vcpu->arch.write_fault_to_shadow_pgtable = false;
5408         kvm_clear_exception_queue(vcpu);
5409
5410         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5411                 init_emulate_ctxt(vcpu);
5412
5413                 /*
5414                  * We will reenter on the same instruction since
5415                  * we do not set complete_userspace_io.  This does not
5416                  * handle watchpoints yet, those would be handled in
5417                  * the emulate_ops.
5418                  */
5419                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5420                         return r;
5421
5422                 ctxt->interruptibility = 0;
5423                 ctxt->have_exception = false;
5424                 ctxt->exception.vector = -1;
5425                 ctxt->perm_ok = false;
5426
5427                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5428
5429                 r = x86_decode_insn(ctxt, insn, insn_len);
5430
5431                 trace_kvm_emulate_insn_start(vcpu);
5432                 ++vcpu->stat.insn_emulation;
5433                 if (r != EMULATION_OK)  {
5434                         if (emulation_type & EMULTYPE_TRAP_UD)
5435                                 return EMULATE_FAIL;
5436                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5437                                                 emulation_type))
5438                                 return EMULATE_DONE;
5439                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
5440                                 return EMULATE_DONE;
5441                         if (emulation_type & EMULTYPE_SKIP)
5442                                 return EMULATE_FAIL;
5443                         return handle_emulation_failure(vcpu);
5444                 }
5445         }
5446
5447         if (emulation_type & EMULTYPE_SKIP) {
5448                 kvm_rip_write(vcpu, ctxt->_eip);
5449                 if (ctxt->eflags & X86_EFLAGS_RF)
5450                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5451                 return EMULATE_DONE;
5452         }
5453
5454         if (retry_instruction(ctxt, cr2, emulation_type))
5455                 return EMULATE_DONE;
5456
5457         /* this is needed for vmware backdoor interface to work since it
5458            changes registers values  during IO operation */
5459         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5460                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5461                 emulator_invalidate_register_cache(ctxt);
5462         }
5463
5464 restart:
5465         r = x86_emulate_insn(ctxt);
5466
5467         if (r == EMULATION_INTERCEPTED)
5468                 return EMULATE_DONE;
5469
5470         if (r == EMULATION_FAILED) {
5471                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5472                                         emulation_type))
5473                         return EMULATE_DONE;
5474
5475                 return handle_emulation_failure(vcpu);
5476         }
5477
5478         if (ctxt->have_exception) {
5479                 r = EMULATE_DONE;
5480                 if (inject_emulated_exception(vcpu))
5481                         return r;
5482         } else if (vcpu->arch.pio.count) {
5483                 if (!vcpu->arch.pio.in) {
5484                         /* FIXME: return into emulator if single-stepping.  */
5485                         vcpu->arch.pio.count = 0;
5486                 } else {
5487                         writeback = false;
5488                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5489                 }
5490                 r = EMULATE_USER_EXIT;
5491         } else if (vcpu->mmio_needed) {
5492                 if (!vcpu->mmio_is_write)
5493                         writeback = false;
5494                 r = EMULATE_USER_EXIT;
5495                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5496         } else if (r == EMULATION_RESTART)
5497                 goto restart;
5498         else
5499                 r = EMULATE_DONE;
5500
5501         if (writeback) {
5502                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5503                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5504                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5505                 kvm_rip_write(vcpu, ctxt->eip);
5506                 if (r == EMULATE_DONE &&
5507                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5508                         kvm_vcpu_do_singlestep(vcpu, &r);
5509                 if (!ctxt->have_exception ||
5510                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5511                         __kvm_set_rflags(vcpu, ctxt->eflags);
5512
5513                 /*
5514                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5515                  * do nothing, and it will be requested again as soon as
5516                  * the shadow expires.  But we still need to check here,
5517                  * because POPF has no interrupt shadow.
5518                  */
5519                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5520                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5521         } else
5522                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5523
5524         return r;
5525 }
5526 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5527
5528 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5529 {
5530         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5531         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5532                                             size, port, &val, 1);
5533         /* do not return to emulator after return from userspace */
5534         vcpu->arch.pio.count = 0;
5535         return ret;
5536 }
5537 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5538
5539 static void tsc_bad(void *info)
5540 {
5541         __this_cpu_write(cpu_tsc_khz, 0);
5542 }
5543
5544 static void tsc_khz_changed(void *data)
5545 {
5546         struct cpufreq_freqs *freq = data;
5547         unsigned long khz = 0;
5548
5549         if (data)
5550                 khz = freq->new;
5551         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5552                 khz = cpufreq_quick_get(raw_smp_processor_id());
5553         if (!khz)
5554                 khz = tsc_khz;
5555         __this_cpu_write(cpu_tsc_khz, khz);
5556 }
5557
5558 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5559                                      void *data)
5560 {
5561         struct cpufreq_freqs *freq = data;
5562         struct kvm *kvm;
5563         struct kvm_vcpu *vcpu;
5564         int i, send_ipi = 0;
5565
5566         /*
5567          * We allow guests to temporarily run on slowing clocks,
5568          * provided we notify them after, or to run on accelerating
5569          * clocks, provided we notify them before.  Thus time never
5570          * goes backwards.
5571          *
5572          * However, we have a problem.  We can't atomically update
5573          * the frequency of a given CPU from this function; it is
5574          * merely a notifier, which can be called from any CPU.
5575          * Changing the TSC frequency at arbitrary points in time
5576          * requires a recomputation of local variables related to
5577          * the TSC for each VCPU.  We must flag these local variables
5578          * to be updated and be sure the update takes place with the
5579          * new frequency before any guests proceed.
5580          *
5581          * Unfortunately, the combination of hotplug CPU and frequency
5582          * change creates an intractable locking scenario; the order
5583          * of when these callouts happen is undefined with respect to
5584          * CPU hotplug, and they can race with each other.  As such,
5585          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5586          * undefined; you can actually have a CPU frequency change take
5587          * place in between the computation of X and the setting of the
5588          * variable.  To protect against this problem, all updates of
5589          * the per_cpu tsc_khz variable are done in an interrupt
5590          * protected IPI, and all callers wishing to update the value
5591          * must wait for a synchronous IPI to complete (which is trivial
5592          * if the caller is on the CPU already).  This establishes the
5593          * necessary total order on variable updates.
5594          *
5595          * Note that because a guest time update may take place
5596          * anytime after the setting of the VCPU's request bit, the
5597          * correct TSC value must be set before the request.  However,
5598          * to ensure the update actually makes it to any guest which
5599          * starts running in hardware virtualization between the set
5600          * and the acquisition of the spinlock, we must also ping the
5601          * CPU after setting the request bit.
5602          *
5603          */
5604
5605         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5606                 return 0;
5607         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5608                 return 0;
5609
5610         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5611
5612         spin_lock(&kvm_lock);
5613         list_for_each_entry(kvm, &vm_list, vm_list) {
5614                 kvm_for_each_vcpu(i, vcpu, kvm) {
5615                         if (vcpu->cpu != freq->cpu)
5616                                 continue;
5617                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5618                         if (vcpu->cpu != smp_processor_id())
5619                                 send_ipi = 1;
5620                 }
5621         }
5622         spin_unlock(&kvm_lock);
5623
5624         if (freq->old < freq->new && send_ipi) {
5625                 /*
5626                  * We upscale the frequency.  Must make the guest
5627                  * doesn't see old kvmclock values while running with
5628                  * the new frequency, otherwise we risk the guest sees
5629                  * time go backwards.
5630                  *
5631                  * In case we update the frequency for another cpu
5632                  * (which might be in guest context) send an interrupt
5633                  * to kick the cpu out of guest context.  Next time
5634                  * guest context is entered kvmclock will be updated,
5635                  * so the guest will not see stale values.
5636                  */
5637                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5638         }
5639         return 0;
5640 }
5641
5642 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5643         .notifier_call  = kvmclock_cpufreq_notifier
5644 };
5645
5646 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5647                                         unsigned long action, void *hcpu)
5648 {
5649         unsigned int cpu = (unsigned long)hcpu;
5650
5651         switch (action) {
5652                 case CPU_ONLINE:
5653                 case CPU_DOWN_FAILED:
5654                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5655                         break;
5656                 case CPU_DOWN_PREPARE:
5657                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5658                         break;
5659         }
5660         return NOTIFY_OK;
5661 }
5662
5663 static struct notifier_block kvmclock_cpu_notifier_block = {
5664         .notifier_call  = kvmclock_cpu_notifier,
5665         .priority = -INT_MAX
5666 };
5667
5668 static void kvm_timer_init(void)
5669 {
5670         int cpu;
5671
5672         max_tsc_khz = tsc_khz;
5673
5674         cpu_notifier_register_begin();
5675         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5676 #ifdef CONFIG_CPU_FREQ
5677                 struct cpufreq_policy policy;
5678                 memset(&policy, 0, sizeof(policy));
5679                 cpu = get_cpu();
5680                 cpufreq_get_policy(&policy, cpu);
5681                 if (policy.cpuinfo.max_freq)
5682                         max_tsc_khz = policy.cpuinfo.max_freq;
5683                 put_cpu();
5684 #endif
5685                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5686                                           CPUFREQ_TRANSITION_NOTIFIER);
5687         }
5688         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5689         for_each_online_cpu(cpu)
5690                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5691
5692         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5693         cpu_notifier_register_done();
5694
5695 }
5696
5697 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5698
5699 int kvm_is_in_guest(void)
5700 {
5701         return __this_cpu_read(current_vcpu) != NULL;
5702 }
5703
5704 static int kvm_is_user_mode(void)
5705 {
5706         int user_mode = 3;
5707
5708         if (__this_cpu_read(current_vcpu))
5709                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5710
5711         return user_mode != 0;
5712 }
5713
5714 static unsigned long kvm_get_guest_ip(void)
5715 {
5716         unsigned long ip = 0;
5717
5718         if (__this_cpu_read(current_vcpu))
5719                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5720
5721         return ip;
5722 }
5723
5724 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5725         .is_in_guest            = kvm_is_in_guest,
5726         .is_user_mode           = kvm_is_user_mode,
5727         .get_guest_ip           = kvm_get_guest_ip,
5728 };
5729
5730 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5731 {
5732         __this_cpu_write(current_vcpu, vcpu);
5733 }
5734 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5735
5736 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5737 {
5738         __this_cpu_write(current_vcpu, NULL);
5739 }
5740 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5741
5742 static void kvm_set_mmio_spte_mask(void)
5743 {
5744         u64 mask;
5745         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5746
5747         /*
5748          * Set the reserved bits and the present bit of an paging-structure
5749          * entry to generate page fault with PFER.RSV = 1.
5750          */
5751          /* Mask the reserved physical address bits. */
5752         mask = rsvd_bits(maxphyaddr, 51);
5753
5754         /* Bit 62 is always reserved for 32bit host. */
5755         mask |= 0x3ull << 62;
5756
5757         /* Set the present bit. */
5758         mask |= 1ull;
5759
5760 #ifdef CONFIG_X86_64
5761         /*
5762          * If reserved bit is not supported, clear the present bit to disable
5763          * mmio page fault.
5764          */
5765         if (maxphyaddr == 52)
5766                 mask &= ~1ull;
5767 #endif
5768
5769         kvm_mmu_set_mmio_spte_mask(mask);
5770 }
5771
5772 #ifdef CONFIG_X86_64
5773 static void pvclock_gtod_update_fn(struct work_struct *work)
5774 {
5775         struct kvm *kvm;
5776
5777         struct kvm_vcpu *vcpu;
5778         int i;
5779
5780         spin_lock(&kvm_lock);
5781         list_for_each_entry(kvm, &vm_list, vm_list)
5782                 kvm_for_each_vcpu(i, vcpu, kvm)
5783                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5784         atomic_set(&kvm_guest_has_master_clock, 0);
5785         spin_unlock(&kvm_lock);
5786 }
5787
5788 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5789
5790 /*
5791  * Notification about pvclock gtod data update.
5792  */
5793 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5794                                void *priv)
5795 {
5796         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5797         struct timekeeper *tk = priv;
5798
5799         update_pvclock_gtod(tk);
5800
5801         /* disable master clock if host does not trust, or does not
5802          * use, TSC clocksource
5803          */
5804         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5805             atomic_read(&kvm_guest_has_master_clock) != 0)
5806                 queue_work(system_long_wq, &pvclock_gtod_work);
5807
5808         return 0;
5809 }
5810
5811 static struct notifier_block pvclock_gtod_notifier = {
5812         .notifier_call = pvclock_gtod_notify,
5813 };
5814 #endif
5815
5816 int kvm_arch_init(void *opaque)
5817 {
5818         int r;
5819         struct kvm_x86_ops *ops = opaque;
5820
5821         if (kvm_x86_ops) {
5822                 printk(KERN_ERR "kvm: already loaded the other module\n");
5823                 r = -EEXIST;
5824                 goto out;
5825         }
5826
5827         if (!ops->cpu_has_kvm_support()) {
5828                 printk(KERN_ERR "kvm: no hardware support\n");
5829                 r = -EOPNOTSUPP;
5830                 goto out;
5831         }
5832         if (ops->disabled_by_bios()) {
5833                 printk(KERN_ERR "kvm: disabled by bios\n");
5834                 r = -EOPNOTSUPP;
5835                 goto out;
5836         }
5837
5838         r = -ENOMEM;
5839         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5840         if (!shared_msrs) {
5841                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5842                 goto out;
5843         }
5844
5845         r = kvm_mmu_module_init();
5846         if (r)
5847                 goto out_free_percpu;
5848
5849         kvm_set_mmio_spte_mask();
5850
5851         kvm_x86_ops = ops;
5852
5853         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5854                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5855
5856         kvm_timer_init();
5857
5858         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5859
5860         if (cpu_has_xsave)
5861                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5862
5863         kvm_lapic_init();
5864 #ifdef CONFIG_X86_64
5865         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5866 #endif
5867
5868         return 0;
5869
5870 out_free_percpu:
5871         free_percpu(shared_msrs);
5872 out:
5873         return r;
5874 }
5875
5876 void kvm_arch_exit(void)
5877 {
5878         kvm_lapic_exit();
5879         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5880
5881         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5882                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5883                                             CPUFREQ_TRANSITION_NOTIFIER);
5884         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5885 #ifdef CONFIG_X86_64
5886         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5887 #endif
5888         kvm_x86_ops = NULL;
5889         kvm_mmu_module_exit();
5890         free_percpu(shared_msrs);
5891 }
5892
5893 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5894 {
5895         ++vcpu->stat.halt_exits;
5896         if (lapic_in_kernel(vcpu)) {
5897                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5898                 return 1;
5899         } else {
5900                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5901                 return 0;
5902         }
5903 }
5904 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5905
5906 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5907 {
5908         kvm_x86_ops->skip_emulated_instruction(vcpu);
5909         return kvm_vcpu_halt(vcpu);
5910 }
5911 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5912
5913 /*
5914  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5915  *
5916  * @apicid - apicid of vcpu to be kicked.
5917  */
5918 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5919 {
5920         struct kvm_lapic_irq lapic_irq;
5921
5922         lapic_irq.shorthand = 0;
5923         lapic_irq.dest_mode = 0;
5924         lapic_irq.dest_id = apicid;
5925         lapic_irq.msi_redir_hint = false;
5926
5927         lapic_irq.delivery_mode = APIC_DM_REMRD;
5928         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5929 }
5930
5931 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5932 {
5933         unsigned long nr, a0, a1, a2, a3, ret;
5934         int op_64_bit, r = 1;
5935
5936         kvm_x86_ops->skip_emulated_instruction(vcpu);
5937
5938         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5939                 return kvm_hv_hypercall(vcpu);
5940
5941         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5942         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5943         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5944         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5945         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5946
5947         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5948
5949         op_64_bit = is_64_bit_mode(vcpu);
5950         if (!op_64_bit) {
5951                 nr &= 0xFFFFFFFF;
5952                 a0 &= 0xFFFFFFFF;
5953                 a1 &= 0xFFFFFFFF;
5954                 a2 &= 0xFFFFFFFF;
5955                 a3 &= 0xFFFFFFFF;
5956         }
5957
5958         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5959                 ret = -KVM_EPERM;
5960                 goto out;
5961         }
5962
5963         switch (nr) {
5964         case KVM_HC_VAPIC_POLL_IRQ:
5965                 ret = 0;
5966                 break;
5967         case KVM_HC_KICK_CPU:
5968                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5969                 ret = 0;
5970                 break;
5971         default:
5972                 ret = -KVM_ENOSYS;
5973                 break;
5974         }
5975 out:
5976         if (!op_64_bit)
5977                 ret = (u32)ret;
5978         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5979         ++vcpu->stat.hypercalls;
5980         return r;
5981 }
5982 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5983
5984 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5985 {
5986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5987         char instruction[3];
5988         unsigned long rip = kvm_rip_read(vcpu);
5989
5990         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5991
5992         return emulator_write_emulated(ctxt, rip, instruction, 3,
5993                 &ctxt->exception);
5994 }
5995
5996 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5997 {
5998         return vcpu->run->request_interrupt_window &&
5999                 likely(!pic_in_kernel(vcpu->kvm));
6000 }
6001
6002 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6003 {
6004         struct kvm_run *kvm_run = vcpu->run;
6005
6006         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6007         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6008         kvm_run->cr8 = kvm_get_cr8(vcpu);
6009         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6010         kvm_run->ready_for_interrupt_injection =
6011                 pic_in_kernel(vcpu->kvm) ||
6012                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6013 }
6014
6015 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6016 {
6017         int max_irr, tpr;
6018
6019         if (!kvm_x86_ops->update_cr8_intercept)
6020                 return;
6021
6022         if (!vcpu->arch.apic)
6023                 return;
6024
6025         if (!vcpu->arch.apic->vapic_addr)
6026                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6027         else
6028                 max_irr = -1;
6029
6030         if (max_irr != -1)
6031                 max_irr >>= 4;
6032
6033         tpr = kvm_lapic_get_cr8(vcpu);
6034
6035         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6036 }
6037
6038 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6039 {
6040         int r;
6041
6042         /* try to reinject previous events if any */
6043         if (vcpu->arch.exception.pending) {
6044                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6045                                         vcpu->arch.exception.has_error_code,
6046                                         vcpu->arch.exception.error_code);
6047
6048                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6049                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6050                                              X86_EFLAGS_RF);
6051
6052                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6053                     (vcpu->arch.dr7 & DR7_GD)) {
6054                         vcpu->arch.dr7 &= ~DR7_GD;
6055                         kvm_update_dr7(vcpu);
6056                 }
6057
6058                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6059                                           vcpu->arch.exception.has_error_code,
6060                                           vcpu->arch.exception.error_code,
6061                                           vcpu->arch.exception.reinject);
6062                 return 0;
6063         }
6064
6065         if (vcpu->arch.nmi_injected) {
6066                 kvm_x86_ops->set_nmi(vcpu);
6067                 return 0;
6068         }
6069
6070         if (vcpu->arch.interrupt.pending) {
6071                 kvm_x86_ops->set_irq(vcpu);
6072                 return 0;
6073         }
6074
6075         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6076                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6077                 if (r != 0)
6078                         return r;
6079         }
6080
6081         /* try to inject new event if pending */
6082         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6083                 --vcpu->arch.nmi_pending;
6084                 vcpu->arch.nmi_injected = true;
6085                 kvm_x86_ops->set_nmi(vcpu);
6086         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6087                 /*
6088                  * Because interrupts can be injected asynchronously, we are
6089                  * calling check_nested_events again here to avoid a race condition.
6090                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6091                  * proposal and current concerns.  Perhaps we should be setting
6092                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6093                  */
6094                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6095                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6096                         if (r != 0)
6097                                 return r;
6098                 }
6099                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6100                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6101                                             false);
6102                         kvm_x86_ops->set_irq(vcpu);
6103                 }
6104         }
6105         return 0;
6106 }
6107
6108 static void process_nmi(struct kvm_vcpu *vcpu)
6109 {
6110         unsigned limit = 2;
6111
6112         /*
6113          * x86 is limited to one NMI running, and one NMI pending after it.
6114          * If an NMI is already in progress, limit further NMIs to just one.
6115          * Otherwise, allow two (and we'll inject the first one immediately).
6116          */
6117         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6118                 limit = 1;
6119
6120         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6121         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6122         kvm_make_request(KVM_REQ_EVENT, vcpu);
6123 }
6124
6125 #define put_smstate(type, buf, offset, val)                       \
6126         *(type *)((buf) + (offset) - 0x7e00) = val
6127
6128 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6129 {
6130         u32 flags = 0;
6131         flags |= seg->g       << 23;
6132         flags |= seg->db      << 22;
6133         flags |= seg->l       << 21;
6134         flags |= seg->avl     << 20;
6135         flags |= seg->present << 15;
6136         flags |= seg->dpl     << 13;
6137         flags |= seg->s       << 12;
6138         flags |= seg->type    << 8;
6139         return flags;
6140 }
6141
6142 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6143 {
6144         struct kvm_segment seg;
6145         int offset;
6146
6147         kvm_get_segment(vcpu, &seg, n);
6148         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6149
6150         if (n < 3)
6151                 offset = 0x7f84 + n * 12;
6152         else
6153                 offset = 0x7f2c + (n - 3) * 12;
6154
6155         put_smstate(u32, buf, offset + 8, seg.base);
6156         put_smstate(u32, buf, offset + 4, seg.limit);
6157         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6158 }
6159
6160 #ifdef CONFIG_X86_64
6161 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6162 {
6163         struct kvm_segment seg;
6164         int offset;
6165         u16 flags;
6166
6167         kvm_get_segment(vcpu, &seg, n);
6168         offset = 0x7e00 + n * 16;
6169
6170         flags = process_smi_get_segment_flags(&seg) >> 8;
6171         put_smstate(u16, buf, offset, seg.selector);
6172         put_smstate(u16, buf, offset + 2, flags);
6173         put_smstate(u32, buf, offset + 4, seg.limit);
6174         put_smstate(u64, buf, offset + 8, seg.base);
6175 }
6176 #endif
6177
6178 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6179 {
6180         struct desc_ptr dt;
6181         struct kvm_segment seg;
6182         unsigned long val;
6183         int i;
6184
6185         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6186         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6187         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6188         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6189
6190         for (i = 0; i < 8; i++)
6191                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6192
6193         kvm_get_dr(vcpu, 6, &val);
6194         put_smstate(u32, buf, 0x7fcc, (u32)val);
6195         kvm_get_dr(vcpu, 7, &val);
6196         put_smstate(u32, buf, 0x7fc8, (u32)val);
6197
6198         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6199         put_smstate(u32, buf, 0x7fc4, seg.selector);
6200         put_smstate(u32, buf, 0x7f64, seg.base);
6201         put_smstate(u32, buf, 0x7f60, seg.limit);
6202         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6203
6204         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6205         put_smstate(u32, buf, 0x7fc0, seg.selector);
6206         put_smstate(u32, buf, 0x7f80, seg.base);
6207         put_smstate(u32, buf, 0x7f7c, seg.limit);
6208         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6209
6210         kvm_x86_ops->get_gdt(vcpu, &dt);
6211         put_smstate(u32, buf, 0x7f74, dt.address);
6212         put_smstate(u32, buf, 0x7f70, dt.size);
6213
6214         kvm_x86_ops->get_idt(vcpu, &dt);
6215         put_smstate(u32, buf, 0x7f58, dt.address);
6216         put_smstate(u32, buf, 0x7f54, dt.size);
6217
6218         for (i = 0; i < 6; i++)
6219                 process_smi_save_seg_32(vcpu, buf, i);
6220
6221         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6222
6223         /* revision id */
6224         put_smstate(u32, buf, 0x7efc, 0x00020000);
6225         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6226 }
6227
6228 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6229 {
6230 #ifdef CONFIG_X86_64
6231         struct desc_ptr dt;
6232         struct kvm_segment seg;
6233         unsigned long val;
6234         int i;
6235
6236         for (i = 0; i < 16; i++)
6237                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6238
6239         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6240         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6241
6242         kvm_get_dr(vcpu, 6, &val);
6243         put_smstate(u64, buf, 0x7f68, val);
6244         kvm_get_dr(vcpu, 7, &val);
6245         put_smstate(u64, buf, 0x7f60, val);
6246
6247         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6248         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6249         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6250
6251         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6252
6253         /* revision id */
6254         put_smstate(u32, buf, 0x7efc, 0x00020064);
6255
6256         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6257
6258         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6259         put_smstate(u16, buf, 0x7e90, seg.selector);
6260         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6261         put_smstate(u32, buf, 0x7e94, seg.limit);
6262         put_smstate(u64, buf, 0x7e98, seg.base);
6263
6264         kvm_x86_ops->get_idt(vcpu, &dt);
6265         put_smstate(u32, buf, 0x7e84, dt.size);
6266         put_smstate(u64, buf, 0x7e88, dt.address);
6267
6268         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6269         put_smstate(u16, buf, 0x7e70, seg.selector);
6270         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6271         put_smstate(u32, buf, 0x7e74, seg.limit);
6272         put_smstate(u64, buf, 0x7e78, seg.base);
6273
6274         kvm_x86_ops->get_gdt(vcpu, &dt);
6275         put_smstate(u32, buf, 0x7e64, dt.size);
6276         put_smstate(u64, buf, 0x7e68, dt.address);
6277
6278         for (i = 0; i < 6; i++)
6279                 process_smi_save_seg_64(vcpu, buf, i);
6280 #else
6281         WARN_ON_ONCE(1);
6282 #endif
6283 }
6284
6285 static void process_smi(struct kvm_vcpu *vcpu)
6286 {
6287         struct kvm_segment cs, ds;
6288         struct desc_ptr dt;
6289         char buf[512];
6290         u32 cr0;
6291
6292         if (is_smm(vcpu)) {
6293                 vcpu->arch.smi_pending = true;
6294                 return;
6295         }
6296
6297         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6298         vcpu->arch.hflags |= HF_SMM_MASK;
6299         memset(buf, 0, 512);
6300         if (guest_cpuid_has_longmode(vcpu))
6301                 process_smi_save_state_64(vcpu, buf);
6302         else
6303                 process_smi_save_state_32(vcpu, buf);
6304
6305         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6306
6307         if (kvm_x86_ops->get_nmi_mask(vcpu))
6308                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6309         else
6310                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6311
6312         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6313         kvm_rip_write(vcpu, 0x8000);
6314
6315         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6316         kvm_x86_ops->set_cr0(vcpu, cr0);
6317         vcpu->arch.cr0 = cr0;
6318
6319         kvm_x86_ops->set_cr4(vcpu, 0);
6320
6321         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6322         dt.address = dt.size = 0;
6323         kvm_x86_ops->set_idt(vcpu, &dt);
6324
6325         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6326
6327         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6328         cs.base = vcpu->arch.smbase;
6329
6330         ds.selector = 0;
6331         ds.base = 0;
6332
6333         cs.limit    = ds.limit = 0xffffffff;
6334         cs.type     = ds.type = 0x3;
6335         cs.dpl      = ds.dpl = 0;
6336         cs.db       = ds.db = 0;
6337         cs.s        = ds.s = 1;
6338         cs.l        = ds.l = 0;
6339         cs.g        = ds.g = 1;
6340         cs.avl      = ds.avl = 0;
6341         cs.present  = ds.present = 1;
6342         cs.unusable = ds.unusable = 0;
6343         cs.padding  = ds.padding = 0;
6344
6345         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6346         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6347         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6348         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6349         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6350         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6351
6352         if (guest_cpuid_has_longmode(vcpu))
6353                 kvm_x86_ops->set_efer(vcpu, 0);
6354
6355         kvm_update_cpuid(vcpu);
6356         kvm_mmu_reset_context(vcpu);
6357 }
6358
6359 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6360 {
6361         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6362                 return;
6363
6364         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6365
6366         if (irqchip_split(vcpu->kvm))
6367                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6368         else {
6369                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6370                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6371         }
6372         kvm_x86_ops->load_eoi_exitmap(vcpu);
6373 }
6374
6375 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6376 {
6377         ++vcpu->stat.tlb_flush;
6378         kvm_x86_ops->tlb_flush(vcpu);
6379 }
6380
6381 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6382 {
6383         struct page *page = NULL;
6384
6385         if (!lapic_in_kernel(vcpu))
6386                 return;
6387
6388         if (!kvm_x86_ops->set_apic_access_page_addr)
6389                 return;
6390
6391         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6392         if (is_error_page(page))
6393                 return;
6394         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6395
6396         /*
6397          * Do not pin apic access page in memory, the MMU notifier
6398          * will call us again if it is migrated or swapped out.
6399          */
6400         put_page(page);
6401 }
6402 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6403
6404 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6405                                            unsigned long address)
6406 {
6407         /*
6408          * The physical address of apic access page is stored in the VMCS.
6409          * Update it when it becomes invalid.
6410          */
6411         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6412                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6413 }
6414
6415 /*
6416  * Returns 1 to let vcpu_run() continue the guest execution loop without
6417  * exiting to the userspace.  Otherwise, the value will be returned to the
6418  * userspace.
6419  */
6420 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6421 {
6422         int r;
6423         bool req_int_win =
6424                 dm_request_for_irq_injection(vcpu) &&
6425                 kvm_cpu_accept_dm_intr(vcpu);
6426
6427         bool req_immediate_exit = false;
6428
6429         if (vcpu->requests) {
6430                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6431                         kvm_mmu_unload(vcpu);
6432                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6433                         __kvm_migrate_timers(vcpu);
6434                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6435                         kvm_gen_update_masterclock(vcpu->kvm);
6436                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6437                         kvm_gen_kvmclock_update(vcpu);
6438                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6439                         r = kvm_guest_time_update(vcpu);
6440                         if (unlikely(r))
6441                                 goto out;
6442                 }
6443                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6444                         kvm_mmu_sync_roots(vcpu);
6445                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6446                         kvm_vcpu_flush_tlb(vcpu);
6447                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6448                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6449                         r = 0;
6450                         goto out;
6451                 }
6452                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6453                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6454                         r = 0;
6455                         goto out;
6456                 }
6457                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6458                         vcpu->fpu_active = 0;
6459                         kvm_x86_ops->fpu_deactivate(vcpu);
6460                 }
6461                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6462                         /* Page is swapped out. Do synthetic halt */
6463                         vcpu->arch.apf.halted = true;
6464                         r = 1;
6465                         goto out;
6466                 }
6467                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6468                         record_steal_time(vcpu);
6469                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6470                         process_smi(vcpu);
6471                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6472                         process_nmi(vcpu);
6473                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6474                         kvm_pmu_handle_event(vcpu);
6475                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6476                         kvm_pmu_deliver_pmi(vcpu);
6477                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6478                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6479                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6480                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6481                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6482                                 vcpu->run->eoi.vector =
6483                                                 vcpu->arch.pending_ioapic_eoi;
6484                                 r = 0;
6485                                 goto out;
6486                         }
6487                 }
6488                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6489                         vcpu_scan_ioapic(vcpu);
6490                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6491                         kvm_vcpu_reload_apic_access_page(vcpu);
6492                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6493                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6494                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6495                         r = 0;
6496                         goto out;
6497                 }
6498                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6499                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6500                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6501                         r = 0;
6502                         goto out;
6503                 }
6504         }
6505
6506         /*
6507          * KVM_REQ_EVENT is not set when posted interrupts are set by
6508          * VT-d hardware, so we have to update RVI unconditionally.
6509          */
6510         if (kvm_lapic_enabled(vcpu)) {
6511                 /*
6512                  * Update architecture specific hints for APIC
6513                  * virtual interrupt delivery.
6514                  */
6515                 if (kvm_x86_ops->hwapic_irr_update)
6516                         kvm_x86_ops->hwapic_irr_update(vcpu,
6517                                 kvm_lapic_find_highest_irr(vcpu));
6518         }
6519
6520         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6521                 kvm_apic_accept_events(vcpu);
6522                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6523                         r = 1;
6524                         goto out;
6525                 }
6526
6527                 if (inject_pending_event(vcpu, req_int_win) != 0)
6528                         req_immediate_exit = true;
6529                 /* enable NMI/IRQ window open exits if needed */
6530                 else {
6531                         if (vcpu->arch.nmi_pending)
6532                                 kvm_x86_ops->enable_nmi_window(vcpu);
6533                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6534                                 kvm_x86_ops->enable_irq_window(vcpu);
6535                 }
6536
6537                 if (kvm_lapic_enabled(vcpu)) {
6538                         update_cr8_intercept(vcpu);
6539                         kvm_lapic_sync_to_vapic(vcpu);
6540                 }
6541         }
6542
6543         r = kvm_mmu_reload(vcpu);
6544         if (unlikely(r)) {
6545                 goto cancel_injection;
6546         }
6547
6548         preempt_disable();
6549
6550         kvm_x86_ops->prepare_guest_switch(vcpu);
6551         if (vcpu->fpu_active)
6552                 kvm_load_guest_fpu(vcpu);
6553         vcpu->mode = IN_GUEST_MODE;
6554
6555         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6556
6557         /* We should set ->mode before check ->requests,
6558          * see the comment in make_all_cpus_request.
6559          */
6560         smp_mb__after_srcu_read_unlock();
6561
6562         local_irq_disable();
6563
6564         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6565             || need_resched() || signal_pending(current)) {
6566                 vcpu->mode = OUTSIDE_GUEST_MODE;
6567                 smp_wmb();
6568                 local_irq_enable();
6569                 preempt_enable();
6570                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6571                 r = 1;
6572                 goto cancel_injection;
6573         }
6574
6575         kvm_load_guest_xcr0(vcpu);
6576
6577         if (req_immediate_exit)
6578                 smp_send_reschedule(vcpu->cpu);
6579
6580         trace_kvm_entry(vcpu->vcpu_id);
6581         wait_lapic_expire(vcpu);
6582         __kvm_guest_enter();
6583
6584         if (unlikely(vcpu->arch.switch_db_regs)) {
6585                 set_debugreg(0, 7);
6586                 set_debugreg(vcpu->arch.eff_db[0], 0);
6587                 set_debugreg(vcpu->arch.eff_db[1], 1);
6588                 set_debugreg(vcpu->arch.eff_db[2], 2);
6589                 set_debugreg(vcpu->arch.eff_db[3], 3);
6590                 set_debugreg(vcpu->arch.dr6, 6);
6591                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6592         }
6593
6594         kvm_x86_ops->run(vcpu);
6595
6596         /*
6597          * Do this here before restoring debug registers on the host.  And
6598          * since we do this before handling the vmexit, a DR access vmexit
6599          * can (a) read the correct value of the debug registers, (b) set
6600          * KVM_DEBUGREG_WONT_EXIT again.
6601          */
6602         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6603                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6604                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6605                 kvm_update_dr0123(vcpu);
6606                 kvm_update_dr6(vcpu);
6607                 kvm_update_dr7(vcpu);
6608                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6609         }
6610
6611         /*
6612          * If the guest has used debug registers, at least dr7
6613          * will be disabled while returning to the host.
6614          * If we don't have active breakpoints in the host, we don't
6615          * care about the messed up debug address registers. But if
6616          * we have some of them active, restore the old state.
6617          */
6618         if (hw_breakpoint_active())
6619                 hw_breakpoint_restore();
6620
6621         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6622
6623         vcpu->mode = OUTSIDE_GUEST_MODE;
6624         smp_wmb();
6625
6626         kvm_put_guest_xcr0(vcpu);
6627
6628         /* Interrupt is enabled by handle_external_intr() */
6629         kvm_x86_ops->handle_external_intr(vcpu);
6630
6631         ++vcpu->stat.exits;
6632
6633         /*
6634          * We must have an instruction between local_irq_enable() and
6635          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6636          * the interrupt shadow.  The stat.exits increment will do nicely.
6637          * But we need to prevent reordering, hence this barrier():
6638          */
6639         barrier();
6640
6641         kvm_guest_exit();
6642
6643         preempt_enable();
6644
6645         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6646
6647         /*
6648          * Profile KVM exit RIPs:
6649          */
6650         if (unlikely(prof_on == KVM_PROFILING)) {
6651                 unsigned long rip = kvm_rip_read(vcpu);
6652                 profile_hit(KVM_PROFILING, (void *)rip);
6653         }
6654
6655         if (unlikely(vcpu->arch.tsc_always_catchup))
6656                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6657
6658         if (vcpu->arch.apic_attention)
6659                 kvm_lapic_sync_from_vapic(vcpu);
6660
6661         r = kvm_x86_ops->handle_exit(vcpu);
6662         return r;
6663
6664 cancel_injection:
6665         kvm_x86_ops->cancel_injection(vcpu);
6666         if (unlikely(vcpu->arch.apic_attention))
6667                 kvm_lapic_sync_from_vapic(vcpu);
6668 out:
6669         return r;
6670 }
6671
6672 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6673 {
6674         if (!kvm_arch_vcpu_runnable(vcpu) &&
6675             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6676                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6677                 kvm_vcpu_block(vcpu);
6678                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6679
6680                 if (kvm_x86_ops->post_block)
6681                         kvm_x86_ops->post_block(vcpu);
6682
6683                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6684                         return 1;
6685         }
6686
6687         kvm_apic_accept_events(vcpu);
6688         switch(vcpu->arch.mp_state) {
6689         case KVM_MP_STATE_HALTED:
6690                 vcpu->arch.pv.pv_unhalted = false;
6691                 vcpu->arch.mp_state =
6692                         KVM_MP_STATE_RUNNABLE;
6693         case KVM_MP_STATE_RUNNABLE:
6694                 vcpu->arch.apf.halted = false;
6695                 break;
6696         case KVM_MP_STATE_INIT_RECEIVED:
6697                 break;
6698         default:
6699                 return -EINTR;
6700                 break;
6701         }
6702         return 1;
6703 }
6704
6705 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6706 {
6707         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6708                 !vcpu->arch.apf.halted);
6709 }
6710
6711 static int vcpu_run(struct kvm_vcpu *vcpu)
6712 {
6713         int r;
6714         struct kvm *kvm = vcpu->kvm;
6715
6716         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6717
6718         for (;;) {
6719                 if (kvm_vcpu_running(vcpu)) {
6720                         r = vcpu_enter_guest(vcpu);
6721                 } else {
6722                         r = vcpu_block(kvm, vcpu);
6723                 }
6724
6725                 if (r <= 0)
6726                         break;
6727
6728                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6729                 if (kvm_cpu_has_pending_timer(vcpu))
6730                         kvm_inject_pending_timer_irqs(vcpu);
6731
6732                 if (dm_request_for_irq_injection(vcpu) &&
6733                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6734                         r = 0;
6735                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6736                         ++vcpu->stat.request_irq_exits;
6737                         break;
6738                 }
6739
6740                 kvm_check_async_pf_completion(vcpu);
6741
6742                 if (signal_pending(current)) {
6743                         r = -EINTR;
6744                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6745                         ++vcpu->stat.signal_exits;
6746                         break;
6747                 }
6748                 if (need_resched()) {
6749                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6750                         cond_resched();
6751                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6752                 }
6753         }
6754
6755         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6756
6757         return r;
6758 }
6759
6760 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6761 {
6762         int r;
6763         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6764         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6765         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6766         if (r != EMULATE_DONE)
6767                 return 0;
6768         return 1;
6769 }
6770
6771 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6772 {
6773         BUG_ON(!vcpu->arch.pio.count);
6774
6775         return complete_emulated_io(vcpu);
6776 }
6777
6778 /*
6779  * Implements the following, as a state machine:
6780  *
6781  * read:
6782  *   for each fragment
6783  *     for each mmio piece in the fragment
6784  *       write gpa, len
6785  *       exit
6786  *       copy data
6787  *   execute insn
6788  *
6789  * write:
6790  *   for each fragment
6791  *     for each mmio piece in the fragment
6792  *       write gpa, len
6793  *       copy data
6794  *       exit
6795  */
6796 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6797 {
6798         struct kvm_run *run = vcpu->run;
6799         struct kvm_mmio_fragment *frag;
6800         unsigned len;
6801
6802         BUG_ON(!vcpu->mmio_needed);
6803
6804         /* Complete previous fragment */
6805         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6806         len = min(8u, frag->len);
6807         if (!vcpu->mmio_is_write)
6808                 memcpy(frag->data, run->mmio.data, len);
6809
6810         if (frag->len <= 8) {
6811                 /* Switch to the next fragment. */
6812                 frag++;
6813                 vcpu->mmio_cur_fragment++;
6814         } else {
6815                 /* Go forward to the next mmio piece. */
6816                 frag->data += len;
6817                 frag->gpa += len;
6818                 frag->len -= len;
6819         }
6820
6821         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6822                 vcpu->mmio_needed = 0;
6823
6824                 /* FIXME: return into emulator if single-stepping.  */
6825                 if (vcpu->mmio_is_write)
6826                         return 1;
6827                 vcpu->mmio_read_completed = 1;
6828                 return complete_emulated_io(vcpu);
6829         }
6830
6831         run->exit_reason = KVM_EXIT_MMIO;
6832         run->mmio.phys_addr = frag->gpa;
6833         if (vcpu->mmio_is_write)
6834                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6835         run->mmio.len = min(8u, frag->len);
6836         run->mmio.is_write = vcpu->mmio_is_write;
6837         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6838         return 0;
6839 }
6840
6841
6842 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6843 {
6844         struct fpu *fpu = &current->thread.fpu;
6845         int r;
6846         sigset_t sigsaved;
6847
6848         fpu__activate_curr(fpu);
6849
6850         if (vcpu->sigset_active)
6851                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6852
6853         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6854                 kvm_vcpu_block(vcpu);
6855                 kvm_apic_accept_events(vcpu);
6856                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6857                 r = -EAGAIN;
6858                 goto out;
6859         }
6860
6861         /* re-sync apic's tpr */
6862         if (!lapic_in_kernel(vcpu)) {
6863                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6864                         r = -EINVAL;
6865                         goto out;
6866                 }
6867         }
6868
6869         if (unlikely(vcpu->arch.complete_userspace_io)) {
6870                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6871                 vcpu->arch.complete_userspace_io = NULL;
6872                 r = cui(vcpu);
6873                 if (r <= 0)
6874                         goto out;
6875         } else
6876                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6877
6878         r = vcpu_run(vcpu);
6879
6880 out:
6881         post_kvm_run_save(vcpu);
6882         if (vcpu->sigset_active)
6883                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6884
6885         return r;
6886 }
6887
6888 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6889 {
6890         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6891                 /*
6892                  * We are here if userspace calls get_regs() in the middle of
6893                  * instruction emulation. Registers state needs to be copied
6894                  * back from emulation context to vcpu. Userspace shouldn't do
6895                  * that usually, but some bad designed PV devices (vmware
6896                  * backdoor interface) need this to work
6897                  */
6898                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6899                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6900         }
6901         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6902         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6903         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6904         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6905         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6906         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6907         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6908         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6909 #ifdef CONFIG_X86_64
6910         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6911         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6912         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6913         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6914         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6915         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6916         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6917         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6918 #endif
6919
6920         regs->rip = kvm_rip_read(vcpu);
6921         regs->rflags = kvm_get_rflags(vcpu);
6922
6923         return 0;
6924 }
6925
6926 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6927 {
6928         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6929         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6930
6931         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6932         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6933         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6934         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6935         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6936         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6937         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6938         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6939 #ifdef CONFIG_X86_64
6940         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6941         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6942         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6943         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6944         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6945         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6946         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6947         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6948 #endif
6949
6950         kvm_rip_write(vcpu, regs->rip);
6951         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
6952
6953         vcpu->arch.exception.pending = false;
6954
6955         kvm_make_request(KVM_REQ_EVENT, vcpu);
6956
6957         return 0;
6958 }
6959
6960 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6961 {
6962         struct kvm_segment cs;
6963
6964         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6965         *db = cs.db;
6966         *l = cs.l;
6967 }
6968 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6969
6970 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6971                                   struct kvm_sregs *sregs)
6972 {
6973         struct desc_ptr dt;
6974
6975         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6976         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6977         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6978         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6979         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6980         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6981
6982         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6983         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6984
6985         kvm_x86_ops->get_idt(vcpu, &dt);
6986         sregs->idt.limit = dt.size;
6987         sregs->idt.base = dt.address;
6988         kvm_x86_ops->get_gdt(vcpu, &dt);
6989         sregs->gdt.limit = dt.size;
6990         sregs->gdt.base = dt.address;
6991
6992         sregs->cr0 = kvm_read_cr0(vcpu);
6993         sregs->cr2 = vcpu->arch.cr2;
6994         sregs->cr3 = kvm_read_cr3(vcpu);
6995         sregs->cr4 = kvm_read_cr4(vcpu);
6996         sregs->cr8 = kvm_get_cr8(vcpu);
6997         sregs->efer = vcpu->arch.efer;
6998         sregs->apic_base = kvm_get_apic_base(vcpu);
6999
7000         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7001
7002         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7003                 set_bit(vcpu->arch.interrupt.nr,
7004                         (unsigned long *)sregs->interrupt_bitmap);
7005
7006         return 0;
7007 }
7008
7009 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7010                                     struct kvm_mp_state *mp_state)
7011 {
7012         kvm_apic_accept_events(vcpu);
7013         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7014                                         vcpu->arch.pv.pv_unhalted)
7015                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7016         else
7017                 mp_state->mp_state = vcpu->arch.mp_state;
7018
7019         return 0;
7020 }
7021
7022 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7023                                     struct kvm_mp_state *mp_state)
7024 {
7025         if (!kvm_vcpu_has_lapic(vcpu) &&
7026             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7027                 return -EINVAL;
7028
7029         /* INITs are latched while in SMM */
7030         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7031             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7032              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7033                 return -EINVAL;
7034
7035         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7036                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7037                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7038         } else
7039                 vcpu->arch.mp_state = mp_state->mp_state;
7040         kvm_make_request(KVM_REQ_EVENT, vcpu);
7041         return 0;
7042 }
7043
7044 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7045                     int reason, bool has_error_code, u32 error_code)
7046 {
7047         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7048         int ret;
7049
7050         init_emulate_ctxt(vcpu);
7051
7052         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7053                                    has_error_code, error_code);
7054
7055         if (ret)
7056                 return EMULATE_FAIL;
7057
7058         kvm_rip_write(vcpu, ctxt->eip);
7059         kvm_set_rflags(vcpu, ctxt->eflags);
7060         kvm_make_request(KVM_REQ_EVENT, vcpu);
7061         return EMULATE_DONE;
7062 }
7063 EXPORT_SYMBOL_GPL(kvm_task_switch);
7064
7065 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7066                                   struct kvm_sregs *sregs)
7067 {
7068         struct msr_data apic_base_msr;
7069         int mmu_reset_needed = 0;
7070         int pending_vec, max_bits, idx;
7071         struct desc_ptr dt;
7072
7073         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7074                 return -EINVAL;
7075
7076         dt.size = sregs->idt.limit;
7077         dt.address = sregs->idt.base;
7078         kvm_x86_ops->set_idt(vcpu, &dt);
7079         dt.size = sregs->gdt.limit;
7080         dt.address = sregs->gdt.base;
7081         kvm_x86_ops->set_gdt(vcpu, &dt);
7082
7083         vcpu->arch.cr2 = sregs->cr2;
7084         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7085         vcpu->arch.cr3 = sregs->cr3;
7086         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7087
7088         kvm_set_cr8(vcpu, sregs->cr8);
7089
7090         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7091         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7092         apic_base_msr.data = sregs->apic_base;
7093         apic_base_msr.host_initiated = true;
7094         kvm_set_apic_base(vcpu, &apic_base_msr);
7095
7096         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7097         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7098         vcpu->arch.cr0 = sregs->cr0;
7099
7100         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7101         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7102         if (sregs->cr4 & X86_CR4_OSXSAVE)
7103                 kvm_update_cpuid(vcpu);
7104
7105         idx = srcu_read_lock(&vcpu->kvm->srcu);
7106         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7107                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7108                 mmu_reset_needed = 1;
7109         }
7110         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7111
7112         if (mmu_reset_needed)
7113                 kvm_mmu_reset_context(vcpu);
7114
7115         max_bits = KVM_NR_INTERRUPTS;
7116         pending_vec = find_first_bit(
7117                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7118         if (pending_vec < max_bits) {
7119                 kvm_queue_interrupt(vcpu, pending_vec, false);
7120                 pr_debug("Set back pending irq %d\n", pending_vec);
7121         }
7122
7123         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7124         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7125         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7126         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7127         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7128         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7129
7130         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7131         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7132
7133         update_cr8_intercept(vcpu);
7134
7135         /* Older userspace won't unhalt the vcpu on reset. */
7136         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7137             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7138             !is_protmode(vcpu))
7139                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7140
7141         kvm_make_request(KVM_REQ_EVENT, vcpu);
7142
7143         return 0;
7144 }
7145
7146 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7147                                         struct kvm_guest_debug *dbg)
7148 {
7149         unsigned long rflags;
7150         int i, r;
7151
7152         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7153                 r = -EBUSY;
7154                 if (vcpu->arch.exception.pending)
7155                         goto out;
7156                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7157                         kvm_queue_exception(vcpu, DB_VECTOR);
7158                 else
7159                         kvm_queue_exception(vcpu, BP_VECTOR);
7160         }
7161
7162         /*
7163          * Read rflags as long as potentially injected trace flags are still
7164          * filtered out.
7165          */
7166         rflags = kvm_get_rflags(vcpu);
7167
7168         vcpu->guest_debug = dbg->control;
7169         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7170                 vcpu->guest_debug = 0;
7171
7172         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7173                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7174                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7175                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7176         } else {
7177                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7178                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7179         }
7180         kvm_update_dr7(vcpu);
7181
7182         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7183                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7184                         get_segment_base(vcpu, VCPU_SREG_CS);
7185
7186         /*
7187          * Trigger an rflags update that will inject or remove the trace
7188          * flags.
7189          */
7190         kvm_set_rflags(vcpu, rflags);
7191
7192         kvm_x86_ops->update_bp_intercept(vcpu);
7193
7194         r = 0;
7195
7196 out:
7197
7198         return r;
7199 }
7200
7201 /*
7202  * Translate a guest virtual address to a guest physical address.
7203  */
7204 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7205                                     struct kvm_translation *tr)
7206 {
7207         unsigned long vaddr = tr->linear_address;
7208         gpa_t gpa;
7209         int idx;
7210
7211         idx = srcu_read_lock(&vcpu->kvm->srcu);
7212         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7213         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7214         tr->physical_address = gpa;
7215         tr->valid = gpa != UNMAPPED_GVA;
7216         tr->writeable = 1;
7217         tr->usermode = 0;
7218
7219         return 0;
7220 }
7221
7222 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7223 {
7224         struct fxregs_state *fxsave =
7225                         &vcpu->arch.guest_fpu.state.fxsave;
7226
7227         memcpy(fpu->fpr, fxsave->st_space, 128);
7228         fpu->fcw = fxsave->cwd;
7229         fpu->fsw = fxsave->swd;
7230         fpu->ftwx = fxsave->twd;
7231         fpu->last_opcode = fxsave->fop;
7232         fpu->last_ip = fxsave->rip;
7233         fpu->last_dp = fxsave->rdp;
7234         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7235
7236         return 0;
7237 }
7238
7239 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7240 {
7241         struct fxregs_state *fxsave =
7242                         &vcpu->arch.guest_fpu.state.fxsave;
7243
7244         memcpy(fxsave->st_space, fpu->fpr, 128);
7245         fxsave->cwd = fpu->fcw;
7246         fxsave->swd = fpu->fsw;
7247         fxsave->twd = fpu->ftwx;
7248         fxsave->fop = fpu->last_opcode;
7249         fxsave->rip = fpu->last_ip;
7250         fxsave->rdp = fpu->last_dp;
7251         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7252
7253         return 0;
7254 }
7255
7256 static void fx_init(struct kvm_vcpu *vcpu)
7257 {
7258         fpstate_init(&vcpu->arch.guest_fpu.state);
7259         if (cpu_has_xsaves)
7260                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7261                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7262
7263         /*
7264          * Ensure guest xcr0 is valid for loading
7265          */
7266         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7267
7268         vcpu->arch.cr0 |= X86_CR0_ET;
7269 }
7270
7271 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7272 {
7273         if (vcpu->guest_fpu_loaded)
7274                 return;
7275
7276         /*
7277          * Restore all possible states in the guest,
7278          * and assume host would use all available bits.
7279          * Guest xcr0 would be loaded later.
7280          */
7281         vcpu->guest_fpu_loaded = 1;
7282         __kernel_fpu_begin();
7283         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7284         trace_kvm_fpu(1);
7285 }
7286
7287 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7288 {
7289         if (!vcpu->guest_fpu_loaded) {
7290                 vcpu->fpu_counter = 0;
7291                 return;
7292         }
7293
7294         vcpu->guest_fpu_loaded = 0;
7295         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7296         __kernel_fpu_end();
7297         ++vcpu->stat.fpu_reload;
7298         /*
7299          * If using eager FPU mode, or if the guest is a frequent user
7300          * of the FPU, just leave the FPU active for next time.
7301          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7302          * the FPU in bursts will revert to loading it on demand.
7303          */
7304         if (!vcpu->arch.eager_fpu) {
7305                 if (++vcpu->fpu_counter < 5)
7306                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7307         }
7308         trace_kvm_fpu(0);
7309 }
7310
7311 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7312 {
7313         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7314
7315         kvmclock_reset(vcpu);
7316
7317         kvm_x86_ops->vcpu_free(vcpu);
7318         free_cpumask_var(wbinvd_dirty_mask);
7319 }
7320
7321 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7322                                                 unsigned int id)
7323 {
7324         struct kvm_vcpu *vcpu;
7325
7326         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7327                 printk_once(KERN_WARNING
7328                 "kvm: SMP vm created on host with unstable TSC; "
7329                 "guest TSC will not be reliable\n");
7330
7331         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7332
7333         return vcpu;
7334 }
7335
7336 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7337 {
7338         int r;
7339
7340         kvm_vcpu_mtrr_init(vcpu);
7341         r = vcpu_load(vcpu);
7342         if (r)
7343                 return r;
7344         kvm_vcpu_reset(vcpu, false);
7345         kvm_mmu_setup(vcpu);
7346         vcpu_put(vcpu);
7347         return r;
7348 }
7349
7350 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7351 {
7352         struct msr_data msr;
7353         struct kvm *kvm = vcpu->kvm;
7354
7355         if (vcpu_load(vcpu))
7356                 return;
7357         msr.data = 0x0;
7358         msr.index = MSR_IA32_TSC;
7359         msr.host_initiated = true;
7360         kvm_write_tsc(vcpu, &msr);
7361         vcpu_put(vcpu);
7362
7363         if (!kvmclock_periodic_sync)
7364                 return;
7365
7366         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7367                                         KVMCLOCK_SYNC_PERIOD);
7368 }
7369
7370 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7371 {
7372         int r;
7373         vcpu->arch.apf.msr_val = 0;
7374
7375         r = vcpu_load(vcpu);
7376         BUG_ON(r);
7377         kvm_mmu_unload(vcpu);
7378         vcpu_put(vcpu);
7379
7380         kvm_x86_ops->vcpu_free(vcpu);
7381 }
7382
7383 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7384 {
7385         vcpu->arch.hflags = 0;
7386
7387         atomic_set(&vcpu->arch.nmi_queued, 0);
7388         vcpu->arch.nmi_pending = 0;
7389         vcpu->arch.nmi_injected = false;
7390         kvm_clear_interrupt_queue(vcpu);
7391         kvm_clear_exception_queue(vcpu);
7392
7393         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7394         kvm_update_dr0123(vcpu);
7395         vcpu->arch.dr6 = DR6_INIT;
7396         kvm_update_dr6(vcpu);
7397         vcpu->arch.dr7 = DR7_FIXED_1;
7398         kvm_update_dr7(vcpu);
7399
7400         vcpu->arch.cr2 = 0;
7401
7402         kvm_make_request(KVM_REQ_EVENT, vcpu);
7403         vcpu->arch.apf.msr_val = 0;
7404         vcpu->arch.st.msr_val = 0;
7405
7406         kvmclock_reset(vcpu);
7407
7408         kvm_clear_async_pf_completion_queue(vcpu);
7409         kvm_async_pf_hash_reset(vcpu);
7410         vcpu->arch.apf.halted = false;
7411
7412         if (!init_event) {
7413                 kvm_pmu_reset(vcpu);
7414                 vcpu->arch.smbase = 0x30000;
7415         }
7416
7417         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7418         vcpu->arch.regs_avail = ~0;
7419         vcpu->arch.regs_dirty = ~0;
7420
7421         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7422 }
7423
7424 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7425 {
7426         struct kvm_segment cs;
7427
7428         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7429         cs.selector = vector << 8;
7430         cs.base = vector << 12;
7431         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7432         kvm_rip_write(vcpu, 0);
7433 }
7434
7435 int kvm_arch_hardware_enable(void)
7436 {
7437         struct kvm *kvm;
7438         struct kvm_vcpu *vcpu;
7439         int i;
7440         int ret;
7441         u64 local_tsc;
7442         u64 max_tsc = 0;
7443         bool stable, backwards_tsc = false;
7444
7445         kvm_shared_msr_cpu_online();
7446         ret = kvm_x86_ops->hardware_enable();
7447         if (ret != 0)
7448                 return ret;
7449
7450         local_tsc = rdtsc();
7451         stable = !check_tsc_unstable();
7452         list_for_each_entry(kvm, &vm_list, vm_list) {
7453                 kvm_for_each_vcpu(i, vcpu, kvm) {
7454                         if (!stable && vcpu->cpu == smp_processor_id())
7455                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7456                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7457                                 backwards_tsc = true;
7458                                 if (vcpu->arch.last_host_tsc > max_tsc)
7459                                         max_tsc = vcpu->arch.last_host_tsc;
7460                         }
7461                 }
7462         }
7463
7464         /*
7465          * Sometimes, even reliable TSCs go backwards.  This happens on
7466          * platforms that reset TSC during suspend or hibernate actions, but
7467          * maintain synchronization.  We must compensate.  Fortunately, we can
7468          * detect that condition here, which happens early in CPU bringup,
7469          * before any KVM threads can be running.  Unfortunately, we can't
7470          * bring the TSCs fully up to date with real time, as we aren't yet far
7471          * enough into CPU bringup that we know how much real time has actually
7472          * elapsed; our helper function, get_kernel_ns() will be using boot
7473          * variables that haven't been updated yet.
7474          *
7475          * So we simply find the maximum observed TSC above, then record the
7476          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7477          * the adjustment will be applied.  Note that we accumulate
7478          * adjustments, in case multiple suspend cycles happen before some VCPU
7479          * gets a chance to run again.  In the event that no KVM threads get a
7480          * chance to run, we will miss the entire elapsed period, as we'll have
7481          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7482          * loose cycle time.  This isn't too big a deal, since the loss will be
7483          * uniform across all VCPUs (not to mention the scenario is extremely
7484          * unlikely). It is possible that a second hibernate recovery happens
7485          * much faster than a first, causing the observed TSC here to be
7486          * smaller; this would require additional padding adjustment, which is
7487          * why we set last_host_tsc to the local tsc observed here.
7488          *
7489          * N.B. - this code below runs only on platforms with reliable TSC,
7490          * as that is the only way backwards_tsc is set above.  Also note
7491          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7492          * have the same delta_cyc adjustment applied if backwards_tsc
7493          * is detected.  Note further, this adjustment is only done once,
7494          * as we reset last_host_tsc on all VCPUs to stop this from being
7495          * called multiple times (one for each physical CPU bringup).
7496          *
7497          * Platforms with unreliable TSCs don't have to deal with this, they
7498          * will be compensated by the logic in vcpu_load, which sets the TSC to
7499          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7500          * guarantee that they stay in perfect synchronization.
7501          */
7502         if (backwards_tsc) {
7503                 u64 delta_cyc = max_tsc - local_tsc;
7504                 backwards_tsc_observed = true;
7505                 list_for_each_entry(kvm, &vm_list, vm_list) {
7506                         kvm_for_each_vcpu(i, vcpu, kvm) {
7507                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7508                                 vcpu->arch.last_host_tsc = local_tsc;
7509                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7510                         }
7511
7512                         /*
7513                          * We have to disable TSC offset matching.. if you were
7514                          * booting a VM while issuing an S4 host suspend....
7515                          * you may have some problem.  Solving this issue is
7516                          * left as an exercise to the reader.
7517                          */
7518                         kvm->arch.last_tsc_nsec = 0;
7519                         kvm->arch.last_tsc_write = 0;
7520                 }
7521
7522         }
7523         return 0;
7524 }
7525
7526 void kvm_arch_hardware_disable(void)
7527 {
7528         kvm_x86_ops->hardware_disable();
7529         drop_user_return_notifiers();
7530 }
7531
7532 int kvm_arch_hardware_setup(void)
7533 {
7534         int r;
7535
7536         r = kvm_x86_ops->hardware_setup();
7537         if (r != 0)
7538                 return r;
7539
7540         if (kvm_has_tsc_control) {
7541                 /*
7542                  * Make sure the user can only configure tsc_khz values that
7543                  * fit into a signed integer.
7544                  * A min value is not calculated needed because it will always
7545                  * be 1 on all machines.
7546                  */
7547                 u64 max = min(0x7fffffffULL,
7548                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7549                 kvm_max_guest_tsc_khz = max;
7550
7551                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7552         }
7553
7554         kvm_init_msr_list();
7555         return 0;
7556 }
7557
7558 void kvm_arch_hardware_unsetup(void)
7559 {
7560         kvm_x86_ops->hardware_unsetup();
7561 }
7562
7563 void kvm_arch_check_processor_compat(void *rtn)
7564 {
7565         kvm_x86_ops->check_processor_compatibility(rtn);
7566 }
7567
7568 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7569 {
7570         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7571 }
7572 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7573
7574 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7575 {
7576         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7577 }
7578
7579 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7580 {
7581         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7582 }
7583
7584 struct static_key kvm_no_apic_vcpu __read_mostly;
7585
7586 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7587 {
7588         struct page *page;
7589         struct kvm *kvm;
7590         int r;
7591
7592         BUG_ON(vcpu->kvm == NULL);
7593         kvm = vcpu->kvm;
7594
7595         vcpu->arch.pv.pv_unhalted = false;
7596         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7597         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7598                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7599         else
7600                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7601
7602         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7603         if (!page) {
7604                 r = -ENOMEM;
7605                 goto fail;
7606         }
7607         vcpu->arch.pio_data = page_address(page);
7608
7609         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7610
7611         r = kvm_mmu_create(vcpu);
7612         if (r < 0)
7613                 goto fail_free_pio_data;
7614
7615         if (irqchip_in_kernel(kvm)) {
7616                 r = kvm_create_lapic(vcpu);
7617                 if (r < 0)
7618                         goto fail_mmu_destroy;
7619         } else
7620                 static_key_slow_inc(&kvm_no_apic_vcpu);
7621
7622         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7623                                        GFP_KERNEL);
7624         if (!vcpu->arch.mce_banks) {
7625                 r = -ENOMEM;
7626                 goto fail_free_lapic;
7627         }
7628         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7629
7630         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7631                 r = -ENOMEM;
7632                 goto fail_free_mce_banks;
7633         }
7634
7635         fx_init(vcpu);
7636
7637         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7638         vcpu->arch.pv_time_enabled = false;
7639
7640         vcpu->arch.guest_supported_xcr0 = 0;
7641         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7642
7643         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7644
7645         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7646
7647         kvm_async_pf_hash_reset(vcpu);
7648         kvm_pmu_init(vcpu);
7649
7650         vcpu->arch.pending_external_vector = -1;
7651
7652         return 0;
7653
7654 fail_free_mce_banks:
7655         kfree(vcpu->arch.mce_banks);
7656 fail_free_lapic:
7657         kvm_free_lapic(vcpu);
7658 fail_mmu_destroy:
7659         kvm_mmu_destroy(vcpu);
7660 fail_free_pio_data:
7661         free_page((unsigned long)vcpu->arch.pio_data);
7662 fail:
7663         return r;
7664 }
7665
7666 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7667 {
7668         int idx;
7669
7670         kvm_pmu_destroy(vcpu);
7671         kfree(vcpu->arch.mce_banks);
7672         kvm_free_lapic(vcpu);
7673         idx = srcu_read_lock(&vcpu->kvm->srcu);
7674         kvm_mmu_destroy(vcpu);
7675         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7676         free_page((unsigned long)vcpu->arch.pio_data);
7677         if (!lapic_in_kernel(vcpu))
7678                 static_key_slow_dec(&kvm_no_apic_vcpu);
7679 }
7680
7681 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7682 {
7683         kvm_x86_ops->sched_in(vcpu, cpu);
7684 }
7685
7686 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7687 {
7688         if (type)
7689                 return -EINVAL;
7690
7691         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7692         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7693         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7694         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7695         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7696
7697         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7698         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7699         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7700         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7701                 &kvm->arch.irq_sources_bitmap);
7702
7703         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7704         mutex_init(&kvm->arch.apic_map_lock);
7705         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7706
7707         pvclock_update_vm_gtod_copy(kvm);
7708
7709         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7710         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7711
7712         return 0;
7713 }
7714
7715 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7716 {
7717         int r;
7718         r = vcpu_load(vcpu);
7719         BUG_ON(r);
7720         kvm_mmu_unload(vcpu);
7721         vcpu_put(vcpu);
7722 }
7723
7724 static void kvm_free_vcpus(struct kvm *kvm)
7725 {
7726         unsigned int i;
7727         struct kvm_vcpu *vcpu;
7728
7729         /*
7730          * Unpin any mmu pages first.
7731          */
7732         kvm_for_each_vcpu(i, vcpu, kvm) {
7733                 kvm_clear_async_pf_completion_queue(vcpu);
7734                 kvm_unload_vcpu_mmu(vcpu);
7735         }
7736         kvm_for_each_vcpu(i, vcpu, kvm)
7737                 kvm_arch_vcpu_free(vcpu);
7738
7739         mutex_lock(&kvm->lock);
7740         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7741                 kvm->vcpus[i] = NULL;
7742
7743         atomic_set(&kvm->online_vcpus, 0);
7744         mutex_unlock(&kvm->lock);
7745 }
7746
7747 void kvm_arch_sync_events(struct kvm *kvm)
7748 {
7749         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7750         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7751         kvm_free_all_assigned_devices(kvm);
7752         kvm_free_pit(kvm);
7753 }
7754
7755 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7756 {
7757         int i, r;
7758         unsigned long hva;
7759         struct kvm_memslots *slots = kvm_memslots(kvm);
7760         struct kvm_memory_slot *slot, old;
7761
7762         /* Called with kvm->slots_lock held.  */
7763         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7764                 return -EINVAL;
7765
7766         slot = id_to_memslot(slots, id);
7767         if (size) {
7768                 if (WARN_ON(slot->npages))
7769                         return -EEXIST;
7770
7771                 /*
7772                  * MAP_SHARED to prevent internal slot pages from being moved
7773                  * by fork()/COW.
7774                  */
7775                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7776                               MAP_SHARED | MAP_ANONYMOUS, 0);
7777                 if (IS_ERR((void *)hva))
7778                         return PTR_ERR((void *)hva);
7779         } else {
7780                 if (!slot->npages)
7781                         return 0;
7782
7783                 hva = 0;
7784         }
7785
7786         old = *slot;
7787         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7788                 struct kvm_userspace_memory_region m;
7789
7790                 m.slot = id | (i << 16);
7791                 m.flags = 0;
7792                 m.guest_phys_addr = gpa;
7793                 m.userspace_addr = hva;
7794                 m.memory_size = size;
7795                 r = __kvm_set_memory_region(kvm, &m);
7796                 if (r < 0)
7797                         return r;
7798         }
7799
7800         if (!size) {
7801                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7802                 WARN_ON(r < 0);
7803         }
7804
7805         return 0;
7806 }
7807 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7808
7809 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7810 {
7811         int r;
7812
7813         mutex_lock(&kvm->slots_lock);
7814         r = __x86_set_memory_region(kvm, id, gpa, size);
7815         mutex_unlock(&kvm->slots_lock);
7816
7817         return r;
7818 }
7819 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7820
7821 void kvm_arch_destroy_vm(struct kvm *kvm)
7822 {
7823         if (current->mm == kvm->mm) {
7824                 /*
7825                  * Free memory regions allocated on behalf of userspace,
7826                  * unless the the memory map has changed due to process exit
7827                  * or fd copying.
7828                  */
7829                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7830                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7831                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7832         }
7833         kvm_iommu_unmap_guest(kvm);
7834         kfree(kvm->arch.vpic);
7835         kfree(kvm->arch.vioapic);
7836         kvm_free_vcpus(kvm);
7837         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7838 }
7839
7840 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7841                            struct kvm_memory_slot *dont)
7842 {
7843         int i;
7844
7845         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7846                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7847                         kvfree(free->arch.rmap[i]);
7848                         free->arch.rmap[i] = NULL;
7849                 }
7850                 if (i == 0)
7851                         continue;
7852
7853                 if (!dont || free->arch.lpage_info[i - 1] !=
7854                              dont->arch.lpage_info[i - 1]) {
7855                         kvfree(free->arch.lpage_info[i - 1]);
7856                         free->arch.lpage_info[i - 1] = NULL;
7857                 }
7858         }
7859 }
7860
7861 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7862                             unsigned long npages)
7863 {
7864         int i;
7865
7866         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7867                 unsigned long ugfn;
7868                 int lpages;
7869                 int level = i + 1;
7870
7871                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7872                                       slot->base_gfn, level) + 1;
7873
7874                 slot->arch.rmap[i] =
7875                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7876                 if (!slot->arch.rmap[i])
7877                         goto out_free;
7878                 if (i == 0)
7879                         continue;
7880
7881                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7882                                         sizeof(*slot->arch.lpage_info[i - 1]));
7883                 if (!slot->arch.lpage_info[i - 1])
7884                         goto out_free;
7885
7886                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7887                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7888                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7889                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7890                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7891                 /*
7892                  * If the gfn and userspace address are not aligned wrt each
7893                  * other, or if explicitly asked to, disable large page
7894                  * support for this slot
7895                  */
7896                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7897                     !kvm_largepages_enabled()) {
7898                         unsigned long j;
7899
7900                         for (j = 0; j < lpages; ++j)
7901                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7902                 }
7903         }
7904
7905         return 0;
7906
7907 out_free:
7908         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7909                 kvfree(slot->arch.rmap[i]);
7910                 slot->arch.rmap[i] = NULL;
7911                 if (i == 0)
7912                         continue;
7913
7914                 kvfree(slot->arch.lpage_info[i - 1]);
7915                 slot->arch.lpage_info[i - 1] = NULL;
7916         }
7917         return -ENOMEM;
7918 }
7919
7920 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7921 {
7922         /*
7923          * memslots->generation has been incremented.
7924          * mmio generation may have reached its maximum value.
7925          */
7926         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7927 }
7928
7929 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7930                                 struct kvm_memory_slot *memslot,
7931                                 const struct kvm_userspace_memory_region *mem,
7932                                 enum kvm_mr_change change)
7933 {
7934         return 0;
7935 }
7936
7937 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7938                                      struct kvm_memory_slot *new)
7939 {
7940         /* Still write protect RO slot */
7941         if (new->flags & KVM_MEM_READONLY) {
7942                 kvm_mmu_slot_remove_write_access(kvm, new);
7943                 return;
7944         }
7945
7946         /*
7947          * Call kvm_x86_ops dirty logging hooks when they are valid.
7948          *
7949          * kvm_x86_ops->slot_disable_log_dirty is called when:
7950          *
7951          *  - KVM_MR_CREATE with dirty logging is disabled
7952          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7953          *
7954          * The reason is, in case of PML, we need to set D-bit for any slots
7955          * with dirty logging disabled in order to eliminate unnecessary GPA
7956          * logging in PML buffer (and potential PML buffer full VMEXT). This
7957          * guarantees leaving PML enabled during guest's lifetime won't have
7958          * any additonal overhead from PML when guest is running with dirty
7959          * logging disabled for memory slots.
7960          *
7961          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7962          * to dirty logging mode.
7963          *
7964          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7965          *
7966          * In case of write protect:
7967          *
7968          * Write protect all pages for dirty logging.
7969          *
7970          * All the sptes including the large sptes which point to this
7971          * slot are set to readonly. We can not create any new large
7972          * spte on this slot until the end of the logging.
7973          *
7974          * See the comments in fast_page_fault().
7975          */
7976         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7977                 if (kvm_x86_ops->slot_enable_log_dirty)
7978                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7979                 else
7980                         kvm_mmu_slot_remove_write_access(kvm, new);
7981         } else {
7982                 if (kvm_x86_ops->slot_disable_log_dirty)
7983                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7984         }
7985 }
7986
7987 void kvm_arch_commit_memory_region(struct kvm *kvm,
7988                                 const struct kvm_userspace_memory_region *mem,
7989                                 const struct kvm_memory_slot *old,
7990                                 const struct kvm_memory_slot *new,
7991                                 enum kvm_mr_change change)
7992 {
7993         int nr_mmu_pages = 0;
7994
7995         if (!kvm->arch.n_requested_mmu_pages)
7996                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7997
7998         if (nr_mmu_pages)
7999                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8000
8001         /*
8002          * Dirty logging tracks sptes in 4k granularity, meaning that large
8003          * sptes have to be split.  If live migration is successful, the guest
8004          * in the source machine will be destroyed and large sptes will be
8005          * created in the destination. However, if the guest continues to run
8006          * in the source machine (for example if live migration fails), small
8007          * sptes will remain around and cause bad performance.
8008          *
8009          * Scan sptes if dirty logging has been stopped, dropping those
8010          * which can be collapsed into a single large-page spte.  Later
8011          * page faults will create the large-page sptes.
8012          */
8013         if ((change != KVM_MR_DELETE) &&
8014                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8015                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8016                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8017
8018         /*
8019          * Set up write protection and/or dirty logging for the new slot.
8020          *
8021          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8022          * been zapped so no dirty logging staff is needed for old slot. For
8023          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8024          * new and it's also covered when dealing with the new slot.
8025          *
8026          * FIXME: const-ify all uses of struct kvm_memory_slot.
8027          */
8028         if (change != KVM_MR_DELETE)
8029                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8030 }
8031
8032 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8033 {
8034         kvm_mmu_invalidate_zap_all_pages(kvm);
8035 }
8036
8037 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8038                                    struct kvm_memory_slot *slot)
8039 {
8040         kvm_mmu_invalidate_zap_all_pages(kvm);
8041 }
8042
8043 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8044 {
8045         if (!list_empty_careful(&vcpu->async_pf.done))
8046                 return true;
8047
8048         if (kvm_apic_has_events(vcpu))
8049                 return true;
8050
8051         if (vcpu->arch.pv.pv_unhalted)
8052                 return true;
8053
8054         if (atomic_read(&vcpu->arch.nmi_queued))
8055                 return true;
8056
8057         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8058                 return true;
8059
8060         if (kvm_arch_interrupt_allowed(vcpu) &&
8061             kvm_cpu_has_interrupt(vcpu))
8062                 return true;
8063
8064         return false;
8065 }
8066
8067 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8068 {
8069         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8070                 kvm_x86_ops->check_nested_events(vcpu, false);
8071
8072         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8073 }
8074
8075 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8076 {
8077         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8078 }
8079
8080 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8081 {
8082         return kvm_x86_ops->interrupt_allowed(vcpu);
8083 }
8084
8085 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8086 {
8087         if (is_64_bit_mode(vcpu))
8088                 return kvm_rip_read(vcpu);
8089         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8090                      kvm_rip_read(vcpu));
8091 }
8092 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8093
8094 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8095 {
8096         return kvm_get_linear_rip(vcpu) == linear_rip;
8097 }
8098 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8099
8100 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8101 {
8102         unsigned long rflags;
8103
8104         rflags = kvm_x86_ops->get_rflags(vcpu);
8105         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8106                 rflags &= ~X86_EFLAGS_TF;
8107         return rflags;
8108 }
8109 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8110
8111 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8112 {
8113         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8114             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8115                 rflags |= X86_EFLAGS_TF;
8116         kvm_x86_ops->set_rflags(vcpu, rflags);
8117 }
8118
8119 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8120 {
8121         __kvm_set_rflags(vcpu, rflags);
8122         kvm_make_request(KVM_REQ_EVENT, vcpu);
8123 }
8124 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8125
8126 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8127 {
8128         int r;
8129
8130         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8131               work->wakeup_all)
8132                 return;
8133
8134         r = kvm_mmu_reload(vcpu);
8135         if (unlikely(r))
8136                 return;
8137
8138         if (!vcpu->arch.mmu.direct_map &&
8139               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8140                 return;
8141
8142         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8143 }
8144
8145 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8146 {
8147         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8148 }
8149
8150 static inline u32 kvm_async_pf_next_probe(u32 key)
8151 {
8152         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8153 }
8154
8155 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8156 {
8157         u32 key = kvm_async_pf_hash_fn(gfn);
8158
8159         while (vcpu->arch.apf.gfns[key] != ~0)
8160                 key = kvm_async_pf_next_probe(key);
8161
8162         vcpu->arch.apf.gfns[key] = gfn;
8163 }
8164
8165 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8166 {
8167         int i;
8168         u32 key = kvm_async_pf_hash_fn(gfn);
8169
8170         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8171                      (vcpu->arch.apf.gfns[key] != gfn &&
8172                       vcpu->arch.apf.gfns[key] != ~0); i++)
8173                 key = kvm_async_pf_next_probe(key);
8174
8175         return key;
8176 }
8177
8178 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8179 {
8180         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8181 }
8182
8183 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8184 {
8185         u32 i, j, k;
8186
8187         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8188         while (true) {
8189                 vcpu->arch.apf.gfns[i] = ~0;
8190                 do {
8191                         j = kvm_async_pf_next_probe(j);
8192                         if (vcpu->arch.apf.gfns[j] == ~0)
8193                                 return;
8194                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8195                         /*
8196                          * k lies cyclically in ]i,j]
8197                          * |    i.k.j |
8198                          * |....j i.k.| or  |.k..j i...|
8199                          */
8200                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8201                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8202                 i = j;
8203         }
8204 }
8205
8206 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8207 {
8208
8209         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8210                                       sizeof(val));
8211 }
8212
8213 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8214                                      struct kvm_async_pf *work)
8215 {
8216         struct x86_exception fault;
8217
8218         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8219         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8220
8221         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8222             (vcpu->arch.apf.send_user_only &&
8223              kvm_x86_ops->get_cpl(vcpu) == 0))
8224                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8225         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8226                 fault.vector = PF_VECTOR;
8227                 fault.error_code_valid = true;
8228                 fault.error_code = 0;
8229                 fault.nested_page_fault = false;
8230                 fault.address = work->arch.token;
8231                 kvm_inject_page_fault(vcpu, &fault);
8232         }
8233 }
8234
8235 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8236                                  struct kvm_async_pf *work)
8237 {
8238         struct x86_exception fault;
8239
8240         if (work->wakeup_all)
8241                 work->arch.token = ~0; /* broadcast wakeup */
8242         else
8243                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8244         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8245
8246         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8247             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8248                 fault.vector = PF_VECTOR;
8249                 fault.error_code_valid = true;
8250                 fault.error_code = 0;
8251                 fault.nested_page_fault = false;
8252                 fault.address = work->arch.token;
8253                 kvm_inject_page_fault(vcpu, &fault);
8254         }
8255         vcpu->arch.apf.halted = false;
8256         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8257 }
8258
8259 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8260 {
8261         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8262                 return true;
8263         else
8264                 return kvm_can_do_async_pf(vcpu);
8265 }
8266
8267 void kvm_arch_start_assignment(struct kvm *kvm)
8268 {
8269         atomic_inc(&kvm->arch.assigned_device_count);
8270 }
8271 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8272
8273 void kvm_arch_end_assignment(struct kvm *kvm)
8274 {
8275         atomic_dec(&kvm->arch.assigned_device_count);
8276 }
8277 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8278
8279 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8280 {
8281         return atomic_read(&kvm->arch.assigned_device_count);
8282 }
8283 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8284
8285 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8286 {
8287         atomic_inc(&kvm->arch.noncoherent_dma_count);
8288 }
8289 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8290
8291 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8292 {
8293         atomic_dec(&kvm->arch.noncoherent_dma_count);
8294 }
8295 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8296
8297 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8298 {
8299         return atomic_read(&kvm->arch.noncoherent_dma_count);
8300 }
8301 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8302
8303 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8304                                       struct irq_bypass_producer *prod)
8305 {
8306         struct kvm_kernel_irqfd *irqfd =
8307                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8308
8309         if (kvm_x86_ops->update_pi_irte) {
8310                 irqfd->producer = prod;
8311                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8312                                 prod->irq, irqfd->gsi, 1);
8313         }
8314
8315         return -EINVAL;
8316 }
8317
8318 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8319                                       struct irq_bypass_producer *prod)
8320 {
8321         int ret;
8322         struct kvm_kernel_irqfd *irqfd =
8323                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8324
8325         if (!kvm_x86_ops->update_pi_irte) {
8326                 WARN_ON(irqfd->producer != NULL);
8327                 return;
8328         }
8329
8330         WARN_ON(irqfd->producer != prod);
8331         irqfd->producer = NULL;
8332
8333         /*
8334          * When producer of consumer is unregistered, we change back to
8335          * remapped mode, so we can re-use the current implementation
8336          * when the irq is masked/disabed or the consumer side (KVM
8337          * int this case doesn't want to receive the interrupts.
8338         */
8339         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8340         if (ret)
8341                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8342                        " fails: %d\n", irqfd->consumer.token, ret);
8343 }
8344
8345 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8346                                    uint32_t guest_irq, bool set)
8347 {
8348         if (!kvm_x86_ops->update_pi_irte)
8349                 return -EINVAL;
8350
8351         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8352 }
8353
8354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8359 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8360 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8361 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8362 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8363 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8364 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8365 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8366 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8367 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8368 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8369 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8370 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);