drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         /* Clear L2 header checks, which would prevent BPDUs
 130          * from being received.
 131          */
 132         reg &= ~RXCHK_L2_HDR_DIS;
 133         if (priv->rx_chk_en)
 134                 reg |= RXCHK_EN;
 135         else
 136                 reg &= ~RXCHK_EN;
 137
 138         /* If UniMAC forwards CRC, we need to skip over it to get
 139          * a valid CHK bit to be set in the per-packet status word
 140          */
 141         if (priv->rx_chk_en && priv->crc_fwd)
 142                 reg |= RXCHK_SKIP_FCS;
 143         else
 144                 reg &= ~RXCHK_SKIP_FCS;
 145
 146         /* If Broadcom tags are enabled (e.g: using a switch), make
 147          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 148          * tag after the Ethernet MAC Source Address.
 149          */
 150         if (netdev_uses_dsa(dev))
 151                 reg |= RXCHK_BRCM_TAG_EN;
 152         else
 153                 reg &= ~RXCHK_BRCM_TAG_EN;
 154
 155         rxchk_writel(priv, reg, RXCHK_CONTROL);
 156
 157         return 0;
 158 }
 159
 160 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 161                                    netdev_features_t wanted)
 162 {
 163         struct bcm_sysport_priv *priv = netdev_priv(dev);
 164         u32 reg;
 165
 166         /* Hardware transmit checksum requires us to enable the Transmit status
 167          * block prepended to the packet contents
 168          */
 169         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 170         reg = tdma_readl(priv, TDMA_CONTROL);
 171         if (priv->tsb_en)
 172                 reg |= TSB_EN;
 173         else
 174                 reg &= ~TSB_EN;
 175         tdma_writel(priv, reg, TDMA_CONTROL);
 176
 177         return 0;
 178 }
 179
 180 static int bcm_sysport_set_features(struct net_device *dev,
 181                                     netdev_features_t features)
 182 {
 183         netdev_features_t changed = features ^ dev->features;
 184         netdev_features_t wanted = dev->wanted_features;
 185         int ret = 0;
 186
 187         if (changed & NETIF_F_RXCSUM)
 188                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 189         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 190                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 191
 192         return ret;
 193 }
 194
 195 /* Hardware counters must be kept in sync because the order/offset
 196  * is important here (order in structure declaration = order in hardware)
 197  */
 198 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 199         /* general stats */
 200         STAT_NETDEV(rx_packets),
 201         STAT_NETDEV(tx_packets),
 202         STAT_NETDEV(rx_bytes),
 203         STAT_NETDEV(tx_bytes),
 204         STAT_NETDEV(rx_errors),
 205         STAT_NETDEV(tx_errors),
 206         STAT_NETDEV(rx_dropped),
 207         STAT_NETDEV(tx_dropped),
 208         STAT_NETDEV(multicast),
 209         /* UniMAC RSV counters */
 210         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 211         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 212         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 213         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 214         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 215         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 216         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 217         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 218         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 219         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 220         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 221         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 222         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 223         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 224         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 225         STAT_MIB_RX("rx_control", mib.rx.cf),
 226         STAT_MIB_RX("rx_pause", mib.rx.pf),
 227         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 228         STAT_MIB_RX("rx_align", mib.rx.aln),
 229         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 230         STAT_MIB_RX("rx_code", mib.rx.cde),
 231         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 232         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 233         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 234         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 235         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 236         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 237         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 238         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 239         /* UniMAC TSV counters */
 240         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 241         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 242         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 243         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 244         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 245         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 246         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 247         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 248         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 249         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 250         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 251         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 252         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 253         STAT_MIB_TX("tx_pause", mib.tx.pf),
 254         STAT_MIB_TX("tx_control", mib.tx.cf),
 255         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 256         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 257         STAT_MIB_TX("tx_defer", mib.tx.drf),
 258         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 259         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 260         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 261         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 262         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 263         STAT_MIB_TX("tx_frags", mib.tx.frg),
 264         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 265         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 266         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 267         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 268         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 269         /* UniMAC RUNT counters */
 270         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 271         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 272         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 273         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 274         /* RXCHK misc statistics */
 275         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 276         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 277                    RXCHK_OTHER_DISC_CNTR),
 278         /* RBUF misc statistics */
 279         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 280         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 281         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 282         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 283         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 284 };
 285
 286 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 287
 288 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 289                                     struct ethtool_drvinfo *info)
 290 {
 291         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 292         strlcpy(info->version, "0.1", sizeof(info->version));
 293         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 294 }
 295
 296 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 297 {
 298         struct bcm_sysport_priv *priv = netdev_priv(dev);
 299
 300         return priv->msg_enable;
 301 }
 302
 303 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 304 {
 305         struct bcm_sysport_priv *priv = netdev_priv(dev);
 306
 307         priv->msg_enable = enable;
 308 }
 309
 310 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 311 {
 312         switch (string_set) {
 313         case ETH_SS_STATS:
 314                 return BCM_SYSPORT_STATS_LEN;
 315         default:
 316                 return -EOPNOTSUPP;
 317         }
 318 }
 319
 320 static void bcm_sysport_get_strings(struct net_device *dev,
 321                                     u32 stringset, u8 *data)
 322 {
 323         int i;
 324
 325         switch (stringset) {
 326         case ETH_SS_STATS:
 327                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 328                         memcpy(data + i * ETH_GSTRING_LEN,
 329                                bcm_sysport_gstrings_stats[i].stat_string,
 330                                ETH_GSTRING_LEN);
 331                 }
 332                 break;
 333         default:
 334                 break;
 335         }
 336 }
 337
 338 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 339 {
 340         int i, j = 0;
 341
 342         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 343                 const struct bcm_sysport_stats *s;
 344                 u8 offset = 0;
 345                 u32 val = 0;
 346                 char *p;
 347
 348                 s = &bcm_sysport_gstrings_stats[i];
 349                 switch (s->type) {
 350                 case BCM_SYSPORT_STAT_NETDEV:
 351                 case BCM_SYSPORT_STAT_SOFT:
 352                         continue;
 353                 case BCM_SYSPORT_STAT_MIB_RX:
 354                 case BCM_SYSPORT_STAT_MIB_TX:
 355                 case BCM_SYSPORT_STAT_RUNT:
 356                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 357                                 offset = UMAC_MIB_STAT_OFFSET;
 358                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 359                         break;
 360                 case BCM_SYSPORT_STAT_RXCHK:
 361                         val = rxchk_readl(priv, s->reg_offset);
 362                         if (val == ~0)
 363                                 rxchk_writel(priv, 0, s->reg_offset);
 364                         break;
 365                 case BCM_SYSPORT_STAT_RBUF:
 366                         val = rbuf_readl(priv, s->reg_offset);
 367                         if (val == ~0)
 368                                 rbuf_writel(priv, 0, s->reg_offset);
 369                         break;
 370                 }
 371
 372                 j += s->stat_sizeof;
 373                 p = (char *)priv + s->stat_offset;
 374                 *(u32 *)p = val;
 375         }
 376
 377         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 378 }
 379
 380 static void bcm_sysport_get_stats(struct net_device *dev,
 381                                   struct ethtool_stats *stats, u64 *data)
 382 {
 383         struct bcm_sysport_priv *priv = netdev_priv(dev);
 384         int i;
 385
 386         if (netif_running(dev))
 387                 bcm_sysport_update_mib_counters(priv);
 388
 389         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 390                 const struct bcm_sysport_stats *s;
 391                 char *p;
 392
 393                 s = &bcm_sysport_gstrings_stats[i];
 394                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 395                         p = (char *)&dev->stats;
 396                 else
 397                         p = (char *)priv;
 398                 p += s->stat_offset;
 399                 data[i] = *(u32 *)p;
 400         }
 401 }
 402
 403 static void bcm_sysport_get_wol(struct net_device *dev,
 404                                 struct ethtool_wolinfo *wol)
 405 {
 406         struct bcm_sysport_priv *priv = netdev_priv(dev);
 407
 408         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 409         wol->wolopts = priv->wolopts;
 410
 411         if (!(priv->wolopts & WAKE_MAGICSECURE))
 412                 return;
 413
 414         memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
 415 }
 416
 417 static int bcm_sysport_set_wol(struct net_device *dev,
 418                                struct ethtool_wolinfo *wol)
 419 {
 420         struct bcm_sysport_priv *priv = netdev_priv(dev);
 421         struct device *kdev = &priv->pdev->dev;
 422         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 423
 424         if (!device_can_wakeup(kdev))
 425                 return -ENOTSUPP;
 426
 427         if (wol->wolopts & ~supported)
 428                 return -EINVAL;
 429
 430         if (wol->wolopts & WAKE_MAGICSECURE)
 431                 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
 432
 433         /* Flag the device and relevant IRQ as wakeup capable */
 434         if (wol->wolopts) {
 435                 device_set_wakeup_enable(kdev, 1);
 436                 if (priv->wol_irq_disabled)
 437                         enable_irq_wake(priv->wol_irq);
 438                 priv->wol_irq_disabled = 0;
 439         } else {
 440                 device_set_wakeup_enable(kdev, 0);
 441                 /* Avoid unbalanced disable_irq_wake calls */
 442                 if (!priv->wol_irq_disabled)
 443                         disable_irq_wake(priv->wol_irq);
 444                 priv->wol_irq_disabled = 1;
 445         }
 446
 447         priv->wolopts = wol->wolopts;
 448
 449         return 0;
 450 }
 451
 452 static int bcm_sysport_get_coalesce(struct net_device *dev,
 453                                     struct ethtool_coalesce *ec)
 454 {
 455         struct bcm_sysport_priv *priv = netdev_priv(dev);
 456         u32 reg;
 457
 458         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 459
 460         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 461         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 462
 463         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 464
 465         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 466         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 467
 468         return 0;
 469 }
 470
 471 static int bcm_sysport_set_coalesce(struct net_device *dev,
 472                                     struct ethtool_coalesce *ec)
 473 {
 474         struct bcm_sysport_priv *priv = netdev_priv(dev);
 475         unsigned int i;
 476         u32 reg;
 477
 478         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 479          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 480          * to fit in the RING_TIMEOUT_MASK (16 bits).
 481          */
 482         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 483             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 484             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 485             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 486                 return -EINVAL;
 487
 488         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 489             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
 490                 return -EINVAL;
 491
 492         for (i = 0; i < dev->num_tx_queues; i++) {
 493                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
 494                 reg &= ~(RING_INTR_THRESH_MASK |
 495                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 496                 reg |= ec->tx_max_coalesced_frames;
 497                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 498                          RING_TIMEOUT_SHIFT;
 499                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
 500         }
 501
 502         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 503         reg &= ~(RDMA_INTR_THRESH_MASK |
 504                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 505         reg |= ec->rx_max_coalesced_frames;
 506         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
 507                             RDMA_TIMEOUT_SHIFT;
 508         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 509
 510         return 0;
 511 }
 512
 513 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 514 {
 515         dev_kfree_skb_any(cb->skb);
 516         cb->skb = NULL;
 517         dma_unmap_addr_set(cb, dma_addr, 0);
 518 }
 519
 520 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 521                                              struct bcm_sysport_cb *cb)
 522 {
 523         struct device *kdev = &priv->pdev->dev;
 524         struct net_device *ndev = priv->netdev;
 525         struct sk_buff *skb, *rx_skb;
 526         dma_addr_t mapping;
 527
 528         /* Allocate a new SKB for a new packet */
 529         skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 530         if (!skb) {
 531                 priv->mib.alloc_rx_buff_failed++;
 532                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 533                 return NULL;
 534         }
 535
 536         mapping = dma_map_single(kdev, skb->data,
 537                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 538         if (dma_mapping_error(kdev, mapping)) {
 539                 priv->mib.rx_dma_failed++;
 540                 dev_kfree_skb_any(skb);
 541                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 542                 return NULL;
 543         }
 544
 545         /* Grab the current SKB on the ring */
 546         rx_skb = cb->skb;
 547         if (likely(rx_skb))
 548                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 549                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 550
 551         /* Put the new SKB on the ring */
 552         cb->skb = skb;
 553         dma_unmap_addr_set(cb, dma_addr, mapping);
 554         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 555
 556         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 557
 558         /* Return the current SKB to the caller */
 559         return rx_skb;
 560 }
 561
 562 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 563 {
 564         struct bcm_sysport_cb *cb;
 565         struct sk_buff *skb;
 566         unsigned int i;
 567
 568         for (i = 0; i < priv->num_rx_bds; i++) {
 569                 cb = &priv->rx_cbs[i];
 570                 skb = bcm_sysport_rx_refill(priv, cb);
 571                 if (skb)
 572                         dev_kfree_skb(skb);
 573                 if (!cb->skb)
 574                         return -ENOMEM;
 575         }
 576
 577         return 0;
 578 }
 579
 580 /* Poll the hardware for up to budget packets to process */
 581 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 582                                         unsigned int budget)
 583 {
 584         struct net_device *ndev = priv->netdev;
 585         unsigned int processed = 0, to_process;
 586         struct bcm_sysport_cb *cb;
 587         struct sk_buff *skb;
 588         unsigned int p_index;
 589         u16 len, status;
 590         struct bcm_rsb *rsb;
 591
 592         /* Determine how much we should process since last call */
 593         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 594         p_index &= RDMA_PROD_INDEX_MASK;
 595
 596         if (p_index < priv->rx_c_index)
 597                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 598                         priv->rx_c_index + p_index;
 599         else
 600                 to_process = p_index - priv->rx_c_index;
 601
 602         netif_dbg(priv, rx_status, ndev,
 603                   "p_index=%d rx_c_index=%d to_process=%d\n",
 604                   p_index, priv->rx_c_index, to_process);
 605
 606         while ((processed < to_process) && (processed < budget)) {
 607                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 608                 skb = bcm_sysport_rx_refill(priv, cb);
 609
 610
 611                 /* We do not have a backing SKB, so we do not a corresponding
 612                  * DMA mapping for this incoming packet since
 613                  * bcm_sysport_rx_refill always either has both skb and mapping
 614                  * or none.
 615                  */
 616                 if (unlikely(!skb)) {
 617                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 618                         ndev->stats.rx_dropped++;
 619                         ndev->stats.rx_errors++;
 620                         goto next;
 621                 }
 622
 623                 /* Extract the Receive Status Block prepended */
 624                 rsb = (struct bcm_rsb *)skb->data;
 625                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 626                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 627                           DESC_STATUS_MASK;
 628
 629                 netif_dbg(priv, rx_status, ndev,
 630                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 631                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 632                           len, status);
 633
 634                 if (unlikely(len > RX_BUF_LENGTH)) {
 635                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 636                         ndev->stats.rx_length_errors++;
 637                         ndev->stats.rx_errors++;
 638                         dev_kfree_skb_any(skb);
 639                         goto next;
 640                 }
 641
 642                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 643                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 644                         ndev->stats.rx_dropped++;
 645                         ndev->stats.rx_errors++;
 646                         dev_kfree_skb_any(skb);
 647                         goto next;
 648                 }
 649
 650                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 651                         netif_err(priv, rx_err, ndev, "error packet\n");
 652                         if (status & RX_STATUS_OVFLOW)
 653                                 ndev->stats.rx_over_errors++;
 654                         ndev->stats.rx_dropped++;
 655                         ndev->stats.rx_errors++;
 656                         dev_kfree_skb_any(skb);
 657                         goto next;
 658                 }
 659
 660                 skb_put(skb, len);
 661
 662                 /* Hardware validated our checksum */
 663                 if (likely(status & DESC_L4_CSUM))
 664                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 665
 666                 /* Hardware pre-pends packets with 2bytes before Ethernet
 667                  * header plus we have the Receive Status Block, strip off all
 668                  * of this from the SKB.
 669                  */
 670                 skb_pull(skb, sizeof(*rsb) + 2);
 671                 len -= (sizeof(*rsb) + 2);
 672
 673                 /* UniMAC may forward CRC */
 674                 if (priv->crc_fwd) {
 675                         skb_trim(skb, len - ETH_FCS_LEN);
 676                         len -= ETH_FCS_LEN;
 677                 }
 678
 679                 skb->protocol = eth_type_trans(skb, ndev);
 680                 ndev->stats.rx_packets++;
 681                 ndev->stats.rx_bytes += len;
 682
 683                 napi_gro_receive(&priv->napi, skb);
 684 next:
 685                 processed++;
 686                 priv->rx_read_ptr++;
 687
 688                 if (priv->rx_read_ptr == priv->num_rx_bds)
 689                         priv->rx_read_ptr = 0;
 690         }
 691
 692         return processed;
 693 }
 694
 695 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 696                                        struct bcm_sysport_cb *cb,
 697                                        unsigned int *bytes_compl,
 698                                        unsigned int *pkts_compl)
 699 {
 700         struct device *kdev = &priv->pdev->dev;
 701         struct net_device *ndev = priv->netdev;
 702
 703         if (cb->skb) {
 704                 ndev->stats.tx_bytes += cb->skb->len;
 705                 *bytes_compl += cb->skb->len;
 706                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 707                                  dma_unmap_len(cb, dma_len),
 708                                  DMA_TO_DEVICE);
 709                 ndev->stats.tx_packets++;
 710                 (*pkts_compl)++;
 711                 bcm_sysport_free_cb(cb);
 712         /* SKB fragment */
 713         } else if (dma_unmap_addr(cb, dma_addr)) {
 714                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 715                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 716                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 717                 dma_unmap_addr_set(cb, dma_addr, 0);
 718         }
 719 }
 720
 721 /* Reclaim queued SKBs for transmission completion, lockless version */
 722 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 723                                              struct bcm_sysport_tx_ring *ring)
 724 {
 725         struct net_device *ndev = priv->netdev;
 726         unsigned int pkts_compl = 0, bytes_compl = 0;
 727         unsigned int txbds_processed = 0;
 728         struct bcm_sysport_cb *cb;
 729         unsigned int txbds_ready;
 730         unsigned int c_index;
 731         u32 hw_ind;
 732
 733         /* Compute how many descriptors have been processed since last call */
 734         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 735         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 736         txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
 737
 738         netif_dbg(priv, tx_done, ndev,
 739                   "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
 740                   ring->index, ring->c_index, c_index, txbds_ready);
 741
 742         while (txbds_processed < txbds_ready) {
 743                 cb = &ring->cbs[ring->clean_index];
 744                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 745
 746                 ring->desc_count++;
 747                 txbds_processed++;
 748
 749                 if (likely(ring->clean_index < ring->size - 1))
 750                         ring->clean_index++;
 751                 else
 752                         ring->clean_index = 0;
 753         }
 754
 755         ring->c_index = c_index;
 756
 757         netif_dbg(priv, tx_done, ndev,
 758                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 759                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 760
 761         return pkts_compl;
 762 }
 763
 764 /* Locked version of the per-ring TX reclaim routine */
 765 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 766                                            struct bcm_sysport_tx_ring *ring)
 767 {
 768         struct netdev_queue *txq;
 769         unsigned int released;
 770         unsigned long flags;
 771
 772         txq = netdev_get_tx_queue(priv->netdev, ring->index);
 773
 774         spin_lock_irqsave(&ring->lock, flags);
 775         released = __bcm_sysport_tx_reclaim(priv, ring);
 776         if (released)
 777                 netif_tx_wake_queue(txq);
 778
 779         spin_unlock_irqrestore(&ring->lock, flags);
 780
 781         return released;
 782 }
 783
 784 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
 785 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
 786                                  struct bcm_sysport_tx_ring *ring)
 787 {
 788         unsigned long flags;
 789
 790         spin_lock_irqsave(&ring->lock, flags);
 791         __bcm_sysport_tx_reclaim(priv, ring);
 792         spin_unlock_irqrestore(&ring->lock, flags);
 793 }
 794
 795 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 796 {
 797         struct bcm_sysport_tx_ring *ring =
 798                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 799         unsigned int work_done = 0;
 800
 801         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 802
 803         if (work_done == 0) {
 804                 napi_complete(napi);
 805                 /* re-enable TX interrupt */
 806                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 807
 808                 return 0;
 809         }
 810
 811         return budget;
 812 }
 813
 814 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 815 {
 816         unsigned int q;
 817
 818         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 819                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 820 }
 821
 822 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 823 {
 824         struct bcm_sysport_priv *priv =
 825                 container_of(napi, struct bcm_sysport_priv, napi);
 826         unsigned int work_done = 0;
 827
 828         work_done = bcm_sysport_desc_rx(priv, budget);
 829
 830         priv->rx_c_index += work_done;
 831         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 832         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 833
 834         if (work_done < budget) {
 835                 napi_complete(napi);
 836                 /* re-enable RX interrupts */
 837                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 838         }
 839
 840         return work_done;
 841 }
 842
 843 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 844 {
 845         u32 reg;
 846
 847         /* Clear the MagicPacket detection logic */
 848         reg = umac_readl(priv, UMAC_MPD_CTRL);
 849         reg &= ~MPD_EN;
 850         umac_writel(priv, reg, UMAC_MPD_CTRL);
 851
 852         reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS);
 853         if (reg & INTRL2_0_MPD)
 854                 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n");
 855
 856         if (reg & INTRL2_0_BRCM_MATCH_TAG) {
 857                 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) &
 858                                   RXCHK_BRCM_TAG_MATCH_MASK;
 859                 netdev_info(priv->netdev,
 860                             "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg);
 861         }
 862
 863         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 864 }
 865
 866 /* RX and misc interrupt routine */
 867 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 868 {
 869         struct net_device *dev = dev_id;
 870         struct bcm_sysport_priv *priv = netdev_priv(dev);
 871
 872         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 873                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 874         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 875
 876         if (unlikely(priv->irq0_stat == 0)) {
 877                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 878                 return IRQ_NONE;
 879         }
 880
 881         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 882                 if (likely(napi_schedule_prep(&priv->napi))) {
 883                         /* disable RX interrupts */
 884                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 885                         __napi_schedule(&priv->napi);
 886                 }
 887         }
 888
 889         /* TX ring is full, perform a full reclaim since we do not know
 890          * which one would trigger this interrupt
 891          */
 892         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 893                 bcm_sysport_tx_reclaim_all(priv);
 894
 895         return IRQ_HANDLED;
 896 }
 897
 898 /* TX interrupt service routine */
 899 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 900 {
 901         struct net_device *dev = dev_id;
 902         struct bcm_sysport_priv *priv = netdev_priv(dev);
 903         struct bcm_sysport_tx_ring *txr;
 904         unsigned int ring;
 905
 906         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 907                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 908         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 909
 910         if (unlikely(priv->irq1_stat == 0)) {
 911                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 912                 return IRQ_NONE;
 913         }
 914
 915         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 916                 if (!(priv->irq1_stat & BIT(ring)))
 917                         continue;
 918
 919                 txr = &priv->tx_rings[ring];
 920
 921                 if (likely(napi_schedule_prep(&txr->napi))) {
 922                         intrl2_1_mask_set(priv, BIT(ring));
 923                         __napi_schedule(&txr->napi);
 924                 }
 925         }
 926
 927         return IRQ_HANDLED;
 928 }
 929
 930 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 931 {
 932         struct bcm_sysport_priv *priv = dev_id;
 933
 934         pm_wakeup_event(&priv->pdev->dev, 0);
 935
 936         return IRQ_HANDLED;
 937 }
 938
 939 #ifdef CONFIG_NET_POLL_CONTROLLER
 940 static void bcm_sysport_poll_controller(struct net_device *dev)
 941 {
 942         struct bcm_sysport_priv *priv = netdev_priv(dev);
 943
 944         disable_irq(priv->irq0);
 945         bcm_sysport_rx_isr(priv->irq0, priv);
 946         enable_irq(priv->irq0);
 947
 948         disable_irq(priv->irq1);
 949         bcm_sysport_tx_isr(priv->irq1, priv);
 950         enable_irq(priv->irq1);
 951 }
 952 #endif
 953
 954 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
 955                                               struct net_device *dev)
 956 {
 957         struct sk_buff *nskb;
 958         struct bcm_tsb *tsb;
 959         u32 csum_info;
 960         u8 ip_proto;
 961         u16 csum_start;
 962         u16 ip_ver;
 963
 964         /* Re-allocate SKB if needed */
 965         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 966                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 967                 dev_kfree_skb(skb);
 968                 if (!nskb) {
 969                         dev->stats.tx_errors++;
 970                         dev->stats.tx_dropped++;
 971                         return NULL;
 972                 }
 973                 skb = nskb;
 974         }
 975
 976         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 977         /* Zero-out TSB by default */
 978         memset(tsb, 0, sizeof(*tsb));
 979
 980         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 981                 ip_ver = htons(skb->protocol);
 982                 switch (ip_ver) {
 983                 case ETH_P_IP:
 984                         ip_proto = ip_hdr(skb)->protocol;
 985                         break;
 986                 case ETH_P_IPV6:
 987                         ip_proto = ipv6_hdr(skb)->nexthdr;
 988                         break;
 989                 default:
 990                         return skb;
 991                 }
 992
 993                 /* Get the checksum offset and the L4 (transport) offset */
 994                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 995                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 996                 csum_info |= (csum_start << L4_PTR_SHIFT);
 997
 998                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 999                         csum_info |= L4_LENGTH_VALID;
1000                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1001                                 csum_info |= L4_UDP;
1002                 } else {
1003                         csum_info = 0;
1004                 }
1005
1006                 tsb->l4_ptr_dest_map = csum_info;
1007         }
1008
1009         return skb;
1010 }
1011
1012 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1013                                     struct net_device *dev)
1014 {
1015         struct bcm_sysport_priv *priv = netdev_priv(dev);
1016         struct device *kdev = &priv->pdev->dev;
1017         struct bcm_sysport_tx_ring *ring;
1018         struct bcm_sysport_cb *cb;
1019         struct netdev_queue *txq;
1020         struct dma_desc *desc;
1021         unsigned int skb_len;
1022         unsigned long flags;
1023         dma_addr_t mapping;
1024         u32 len_status;
1025         u16 queue;
1026         int ret;
1027
1028         queue = skb_get_queue_mapping(skb);
1029         txq = netdev_get_tx_queue(dev, queue);
1030         ring = &priv->tx_rings[queue];
1031
1032         /* lock against tx reclaim in BH context and TX ring full interrupt */
1033         spin_lock_irqsave(&ring->lock, flags);
1034         if (unlikely(ring->desc_count == 0)) {
1035                 netif_tx_stop_queue(txq);
1036                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1037                 ret = NETDEV_TX_BUSY;
1038                 goto out;
1039         }
1040
1041         /* The Ethernet switch we are interfaced with needs packets to be at
1042          * least 64 bytes (including FCS) otherwise they will be discarded when
1043          * they enter the switch port logic. When Broadcom tags are enabled, we
1044          * need to make sure that packets are at least 68 bytes
1045          * (including FCS and tag) because the length verification is done after
1046          * the Broadcom tag is stripped off the ingress packet.
1047          */
1048         if (skb_put_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1049                 ret = NETDEV_TX_OK;
1050                 goto out;
1051         }
1052
1053         /* Insert TSB and checksum infos */
1054         if (priv->tsb_en) {
1055                 skb = bcm_sysport_insert_tsb(skb, dev);
1056                 if (!skb) {
1057                         ret = NETDEV_TX_OK;
1058                         goto out;
1059                 }
1060         }
1061
1062         skb_len = skb->len;
1063
1064         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1065         if (dma_mapping_error(kdev, mapping)) {
1066                 priv->mib.tx_dma_failed++;
1067                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1068                           skb->data, skb_len);
1069                 ret = NETDEV_TX_OK;
1070                 goto out;
1071         }
1072
1073         /* Remember the SKB for future freeing */
1074         cb = &ring->cbs[ring->curr_desc];
1075         cb->skb = skb;
1076         dma_unmap_addr_set(cb, dma_addr, mapping);
1077         dma_unmap_len_set(cb, dma_len, skb_len);
1078
1079         /* Fetch a descriptor entry from our pool */
1080         desc = ring->desc_cpu;
1081
1082         desc->addr_lo = lower_32_bits(mapping);
1083         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1084         len_status |= (skb_len << DESC_LEN_SHIFT);
1085         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1086                        DESC_STATUS_SHIFT;
1087         if (skb->ip_summed == CHECKSUM_PARTIAL)
1088                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1089
1090         ring->curr_desc++;
1091         if (ring->curr_desc == ring->size)
1092                 ring->curr_desc = 0;
1093         ring->desc_count--;
1094
1095         /* Ensure write completion of the descriptor status/length
1096          * in DRAM before the System Port WRITE_PORT register latches
1097          * the value
1098          */
1099         wmb();
1100         desc->addr_status_len = len_status;
1101         wmb();
1102
1103         /* Write this descriptor address to the RING write port */
1104         tdma_port_write_desc_addr(priv, desc, ring->index);
1105
1106         /* Check ring space and update SW control flow */
1107         if (ring->desc_count == 0)
1108                 netif_tx_stop_queue(txq);
1109
1110         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1111                   ring->index, ring->desc_count, ring->curr_desc);
1112
1113         ret = NETDEV_TX_OK;
1114 out:
1115         spin_unlock_irqrestore(&ring->lock, flags);
1116         return ret;
1117 }
1118
1119 static void bcm_sysport_tx_timeout(struct net_device *dev)
1120 {
1121         netdev_warn(dev, "transmit timeout!\n");
1122
1123         dev->trans_start = jiffies;
1124         dev->stats.tx_errors++;
1125
1126         netif_tx_wake_all_queues(dev);
1127 }
1128
1129 /* phylib adjust link callback */
1130 static void bcm_sysport_adj_link(struct net_device *dev)
1131 {
1132         struct bcm_sysport_priv *priv = netdev_priv(dev);
1133         struct phy_device *phydev = priv->phydev;
1134         unsigned int changed = 0;
1135         u32 cmd_bits = 0, reg;
1136
1137         if (priv->old_link != phydev->link) {
1138                 changed = 1;
1139                 priv->old_link = phydev->link;
1140         }
1141
1142         if (priv->old_duplex != phydev->duplex) {
1143                 changed = 1;
1144                 priv->old_duplex = phydev->duplex;
1145         }
1146
1147         switch (phydev->speed) {
1148         case SPEED_2500:
1149                 cmd_bits = CMD_SPEED_2500;
1150                 break;
1151         case SPEED_1000:
1152                 cmd_bits = CMD_SPEED_1000;
1153                 break;
1154         case SPEED_100:
1155                 cmd_bits = CMD_SPEED_100;
1156                 break;
1157         case SPEED_10:
1158                 cmd_bits = CMD_SPEED_10;
1159                 break;
1160         default:
1161                 break;
1162         }
1163         cmd_bits <<= CMD_SPEED_SHIFT;
1164
1165         if (phydev->duplex == DUPLEX_HALF)
1166                 cmd_bits |= CMD_HD_EN;
1167
1168         if (priv->old_pause != phydev->pause) {
1169                 changed = 1;
1170                 priv->old_pause = phydev->pause;
1171         }
1172
1173         if (!phydev->pause)
1174                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1175
1176         if (!changed)
1177                 return;
1178
1179         if (phydev->link) {
1180                 reg = umac_readl(priv, UMAC_CMD);
1181                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1182                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1183                         CMD_TX_PAUSE_IGNORE);
1184                 reg |= cmd_bits;
1185                 umac_writel(priv, reg, UMAC_CMD);
1186         }
1187
1188         phy_print_status(priv->phydev);
1189 }
1190
1191 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1192                                     unsigned int index)
1193 {
1194         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1195         struct device *kdev = &priv->pdev->dev;
1196         size_t size;
1197         void *p;
1198         u32 reg;
1199
1200         /* Simple descriptors partitioning for now */
1201         size = 256;
1202
1203         /* We just need one DMA descriptor which is DMA-able, since writing to
1204          * the port will allocate a new descriptor in its internal linked-list
1205          */
1206         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1207                                 GFP_KERNEL);
1208         if (!p) {
1209                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1210                 return -ENOMEM;
1211         }
1212
1213         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1214         if (!ring->cbs) {
1215                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1216                 return -ENOMEM;
1217         }
1218
1219         /* Initialize SW view of the ring */
1220         spin_lock_init(&ring->lock);
1221         ring->priv = priv;
1222         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1223         ring->index = index;
1224         ring->size = size;
1225         ring->clean_index = 0;
1226         ring->alloc_size = ring->size;
1227         ring->desc_cpu = p;
1228         ring->desc_count = ring->size;
1229         ring->curr_desc = 0;
1230
1231         /* Initialize HW ring */
1232         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1233         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1234         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1235         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1236         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1237         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1238
1239         /* Program the number of descriptors as MAX_THRESHOLD and half of
1240          * its size for the hysteresis trigger
1241          */
1242         tdma_writel(priv, ring->size |
1243                         1 << RING_HYST_THRESH_SHIFT,
1244                         TDMA_DESC_RING_MAX_HYST(index));
1245
1246         /* Enable the ring queue in the arbiter */
1247         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1248         reg |= (1 << index);
1249         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1250
1251         napi_enable(&ring->napi);
1252
1253         netif_dbg(priv, hw, priv->netdev,
1254                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1255                   ring->size, ring->desc_cpu);
1256
1257         return 0;
1258 }
1259
1260 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1261                                      unsigned int index)
1262 {
1263         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1264         struct device *kdev = &priv->pdev->dev;
1265         u32 reg;
1266
1267         /* Caller should stop the TDMA engine */
1268         reg = tdma_readl(priv, TDMA_STATUS);
1269         if (!(reg & TDMA_DISABLED))
1270                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1271
1272         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1273          * fail, so by checking this pointer we know whether the TX ring was
1274          * fully initialized or not.
1275          */
1276         if (!ring->cbs)
1277                 return;
1278
1279         napi_disable(&ring->napi);
1280         netif_napi_del(&ring->napi);
1281
1282         bcm_sysport_tx_clean(priv, ring);
1283
1284         kfree(ring->cbs);
1285         ring->cbs = NULL;
1286
1287         if (ring->desc_dma) {
1288                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1289                                   ring->desc_cpu, ring->desc_dma);
1290                 ring->desc_dma = 0;
1291         }
1292         ring->size = 0;
1293         ring->alloc_size = 0;
1294
1295         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1296 }
1297
1298 /* RDMA helper */
1299 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1300                                   unsigned int enable)
1301 {
1302         unsigned int timeout = 1000;
1303         u32 reg;
1304
1305         reg = rdma_readl(priv, RDMA_CONTROL);
1306         if (enable)
1307                 reg |= RDMA_EN;
1308         else
1309                 reg &= ~RDMA_EN;
1310         rdma_writel(priv, reg, RDMA_CONTROL);
1311
1312         /* Poll for RMDA disabling completion */
1313         do {
1314                 reg = rdma_readl(priv, RDMA_STATUS);
1315                 if (!!(reg & RDMA_DISABLED) == !enable)
1316                         return 0;
1317                 usleep_range(1000, 2000);
1318         } while (timeout-- > 0);
1319
1320         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1321
1322         return -ETIMEDOUT;
1323 }
1324
1325 /* TDMA helper */
1326 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1327                                   unsigned int enable)
1328 {
1329         unsigned int timeout = 1000;
1330         u32 reg;
1331
1332         reg = tdma_readl(priv, TDMA_CONTROL);
1333         if (enable)
1334                 reg |= TDMA_EN;
1335         else
1336                 reg &= ~TDMA_EN;
1337         tdma_writel(priv, reg, TDMA_CONTROL);
1338
1339         /* Poll for TMDA disabling completion */
1340         do {
1341                 reg = tdma_readl(priv, TDMA_STATUS);
1342                 if (!!(reg & TDMA_DISABLED) == !enable)
1343                         return 0;
1344
1345                 usleep_range(1000, 2000);
1346         } while (timeout-- > 0);
1347
1348         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1349
1350         return -ETIMEDOUT;
1351 }
1352
1353 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1354 {
1355         struct bcm_sysport_cb *cb;
1356         u32 reg;
1357         int ret;
1358         int i;
1359
1360         /* Initialize SW view of the RX ring */
1361         priv->num_rx_bds = NUM_RX_DESC;
1362         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1363         priv->rx_c_index = 0;
1364         priv->rx_read_ptr = 0;
1365         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1366                                 GFP_KERNEL);
1367         if (!priv->rx_cbs) {
1368                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1369                 return -ENOMEM;
1370         }
1371
1372         for (i = 0; i < priv->num_rx_bds; i++) {
1373                 cb = priv->rx_cbs + i;
1374                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1375         }
1376
1377         ret = bcm_sysport_alloc_rx_bufs(priv);
1378         if (ret) {
1379                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1380                 return ret;
1381         }
1382
1383         /* Initialize HW, ensure RDMA is disabled */
1384         reg = rdma_readl(priv, RDMA_STATUS);
1385         if (!(reg & RDMA_DISABLED))
1386                 rdma_enable_set(priv, 0);
1387
1388         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1389         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1390         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1391         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1392         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1393                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1394         /* Operate the queue in ring mode */
1395         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1396         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1397         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1398         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1399
1400         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1401
1402         netif_dbg(priv, hw, priv->netdev,
1403                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1404                   priv->num_rx_bds, priv->rx_bds);
1405
1406         return 0;
1407 }
1408
1409 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1410 {
1411         struct bcm_sysport_cb *cb;
1412         unsigned int i;
1413         u32 reg;
1414
1415         /* Caller should ensure RDMA is disabled */
1416         reg = rdma_readl(priv, RDMA_STATUS);
1417         if (!(reg & RDMA_DISABLED))
1418                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1419
1420         for (i = 0; i < priv->num_rx_bds; i++) {
1421                 cb = &priv->rx_cbs[i];
1422                 if (dma_unmap_addr(cb, dma_addr))
1423                         dma_unmap_single(&priv->pdev->dev,
1424                                          dma_unmap_addr(cb, dma_addr),
1425                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1426                 bcm_sysport_free_cb(cb);
1427         }
1428
1429         kfree(priv->rx_cbs);
1430         priv->rx_cbs = NULL;
1431
1432         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1433 }
1434
1435 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1436 {
1437         struct bcm_sysport_priv *priv = netdev_priv(dev);
1438         u32 reg;
1439
1440         reg = umac_readl(priv, UMAC_CMD);
1441         if (dev->flags & IFF_PROMISC)
1442                 reg |= CMD_PROMISC;
1443         else
1444                 reg &= ~CMD_PROMISC;
1445         umac_writel(priv, reg, UMAC_CMD);
1446
1447         /* No support for ALLMULTI */
1448         if (dev->flags & IFF_ALLMULTI)
1449                 return;
1450 }
1451
1452 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1453                                    u32 mask, unsigned int enable)
1454 {
1455         u32 reg;
1456
1457         reg = umac_readl(priv, UMAC_CMD);
1458         if (enable)
1459                 reg |= mask;
1460         else
1461                 reg &= ~mask;
1462         umac_writel(priv, reg, UMAC_CMD);
1463
1464         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1465          * to be processed (1 msec).
1466          */
1467         if (enable == 0)
1468                 usleep_range(1000, 2000);
1469 }
1470
1471 static inline void umac_reset(struct bcm_sysport_priv *priv)
1472 {
1473         u32 reg;
1474
1475         reg = umac_readl(priv, UMAC_CMD);
1476         reg |= CMD_SW_RESET;
1477         umac_writel(priv, reg, UMAC_CMD);
1478         udelay(10);
1479         reg = umac_readl(priv, UMAC_CMD);
1480         reg &= ~CMD_SW_RESET;
1481         umac_writel(priv, reg, UMAC_CMD);
1482 }
1483
1484 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1485                              unsigned char *addr)
1486 {
1487         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1488                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1489         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1490 }
1491
1492 static void topctrl_flush(struct bcm_sysport_priv *priv)
1493 {
1494         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1495         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1496         mdelay(1);
1497         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1498         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1499 }
1500
1501 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1502 {
1503         struct bcm_sysport_priv *priv = netdev_priv(dev);
1504         struct sockaddr *addr = p;
1505
1506         if (!is_valid_ether_addr(addr->sa_data))
1507                 return -EINVAL;
1508
1509         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1510
1511         /* interface is disabled, changes to MAC will be reflected on next
1512          * open call
1513          */
1514         if (!netif_running(dev))
1515                 return 0;
1516
1517         umac_set_hw_addr(priv, dev->dev_addr);
1518
1519         return 0;
1520 }
1521
1522 static void bcm_sysport_netif_start(struct net_device *dev)
1523 {
1524         struct bcm_sysport_priv *priv = netdev_priv(dev);
1525
1526         /* Enable NAPI */
1527         napi_enable(&priv->napi);
1528
1529         /* Enable RX interrupt and TX ring full interrupt */
1530         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1531
1532         phy_start(priv->phydev);
1533
1534         /* Enable TX interrupts for the 32 TXQs */
1535         intrl2_1_mask_clear(priv, 0xffffffff);
1536
1537         /* Last call before we start the real business */
1538         netif_tx_start_all_queues(dev);
1539 }
1540
1541 static void rbuf_init(struct bcm_sysport_priv *priv)
1542 {
1543         u32 reg;
1544
1545         reg = rbuf_readl(priv, RBUF_CONTROL);
1546         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1547         rbuf_writel(priv, reg, RBUF_CONTROL);
1548 }
1549
1550 static int bcm_sysport_open(struct net_device *dev)
1551 {
1552         struct bcm_sysport_priv *priv = netdev_priv(dev);
1553         unsigned int i;
1554         int ret;
1555
1556         /* Reset UniMAC */
1557         umac_reset(priv);
1558
1559         /* Flush TX and RX FIFOs at TOPCTRL level */
1560         topctrl_flush(priv);
1561
1562         /* Disable the UniMAC RX/TX */
1563         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1564
1565         /* Enable RBUF 2bytes alignment and Receive Status Block */
1566         rbuf_init(priv);
1567
1568         /* Set maximum frame length */
1569         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1570
1571         /* Set MAC address */
1572         umac_set_hw_addr(priv, dev->dev_addr);
1573
1574         /* Read CRC forward */
1575         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1576
1577         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1578                                         0, priv->phy_interface);
1579         if (!priv->phydev) {
1580                 netdev_err(dev, "could not attach to PHY\n");
1581                 return -ENODEV;
1582         }
1583
1584         /* Reset house keeping link status */
1585         priv->old_duplex = -1;
1586         priv->old_link = -1;
1587         priv->old_pause = -1;
1588
1589         /* mask all interrupts and request them */
1590         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1591         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1592         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1593         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1594         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1595         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1596
1597         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1598         if (ret) {
1599                 netdev_err(dev, "failed to request RX interrupt\n");
1600                 goto out_phy_disconnect;
1601         }
1602
1603         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1604         if (ret) {
1605                 netdev_err(dev, "failed to request TX interrupt\n");
1606                 goto out_free_irq0;
1607         }
1608
1609         /* Initialize both hardware and software ring */
1610         for (i = 0; i < dev->num_tx_queues; i++) {
1611                 ret = bcm_sysport_init_tx_ring(priv, i);
1612                 if (ret) {
1613                         netdev_err(dev, "failed to initialize TX ring %d\n",
1614                                    i);
1615                         goto out_free_tx_ring;
1616                 }
1617         }
1618
1619         /* Initialize linked-list */
1620         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1621
1622         /* Initialize RX ring */
1623         ret = bcm_sysport_init_rx_ring(priv);
1624         if (ret) {
1625                 netdev_err(dev, "failed to initialize RX ring\n");
1626                 goto out_free_rx_ring;
1627         }
1628
1629         /* Turn on RDMA */
1630         ret = rdma_enable_set(priv, 1);
1631         if (ret)
1632                 goto out_free_rx_ring;
1633
1634         /* Turn on TDMA */
1635         ret = tdma_enable_set(priv, 1);
1636         if (ret)
1637                 goto out_clear_rx_int;
1638
1639         /* Turn on UniMAC TX/RX */
1640         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1641
1642         bcm_sysport_netif_start(dev);
1643
1644         return 0;
1645
1646 out_clear_rx_int:
1647         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1648 out_free_rx_ring:
1649         bcm_sysport_fini_rx_ring(priv);
1650 out_free_tx_ring:
1651         for (i = 0; i < dev->num_tx_queues; i++)
1652                 bcm_sysport_fini_tx_ring(priv, i);
1653         free_irq(priv->irq1, dev);
1654 out_free_irq0:
1655         free_irq(priv->irq0, dev);
1656 out_phy_disconnect:
1657         phy_disconnect(priv->phydev);
1658         return ret;
1659 }
1660
1661 static void bcm_sysport_netif_stop(struct net_device *dev)
1662 {
1663         struct bcm_sysport_priv *priv = netdev_priv(dev);
1664
1665         /* stop all software from updating hardware */
1666         netif_tx_stop_all_queues(dev);
1667         napi_disable(&priv->napi);
1668         phy_stop(priv->phydev);
1669
1670         /* mask all interrupts */
1671         intrl2_0_mask_set(priv, 0xffffffff);
1672         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1673         intrl2_1_mask_set(priv, 0xffffffff);
1674         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1675 }
1676
1677 static int bcm_sysport_stop(struct net_device *dev)
1678 {
1679         struct bcm_sysport_priv *priv = netdev_priv(dev);
1680         unsigned int i;
1681         int ret;
1682
1683         bcm_sysport_netif_stop(dev);
1684
1685         /* Disable UniMAC RX */
1686         umac_enable_set(priv, CMD_RX_EN, 0);
1687
1688         ret = tdma_enable_set(priv, 0);
1689         if (ret) {
1690                 netdev_err(dev, "timeout disabling RDMA\n");
1691                 return ret;
1692         }
1693
1694         /* Wait for a maximum packet size to be drained */
1695         usleep_range(2000, 3000);
1696
1697         ret = rdma_enable_set(priv, 0);
1698         if (ret) {
1699                 netdev_err(dev, "timeout disabling TDMA\n");
1700                 return ret;
1701         }
1702
1703         /* Disable UniMAC TX */
1704         umac_enable_set(priv, CMD_TX_EN, 0);
1705
1706         /* Free RX/TX rings SW structures */
1707         for (i = 0; i < dev->num_tx_queues; i++)
1708                 bcm_sysport_fini_tx_ring(priv, i);
1709         bcm_sysport_fini_rx_ring(priv);
1710
1711         free_irq(priv->irq0, dev);
1712         free_irq(priv->irq1, dev);
1713
1714         /* Disconnect from PHY */
1715         phy_disconnect(priv->phydev);
1716
1717         return 0;
1718 }
1719
1720 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1721         .get_settings           = bcm_sysport_get_settings,
1722         .set_settings           = bcm_sysport_set_settings,
1723         .get_drvinfo            = bcm_sysport_get_drvinfo,
1724         .get_msglevel           = bcm_sysport_get_msglvl,
1725         .set_msglevel           = bcm_sysport_set_msglvl,
1726         .get_link               = ethtool_op_get_link,
1727         .get_strings            = bcm_sysport_get_strings,
1728         .get_ethtool_stats      = bcm_sysport_get_stats,
1729         .get_sset_count         = bcm_sysport_get_sset_count,
1730         .get_wol                = bcm_sysport_get_wol,
1731         .set_wol                = bcm_sysport_set_wol,
1732         .get_coalesce           = bcm_sysport_get_coalesce,
1733         .set_coalesce           = bcm_sysport_set_coalesce,
1734 };
1735
1736 static const struct net_device_ops bcm_sysport_netdev_ops = {
1737         .ndo_start_xmit         = bcm_sysport_xmit,
1738         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1739         .ndo_open               = bcm_sysport_open,
1740         .ndo_stop               = bcm_sysport_stop,
1741         .ndo_set_features       = bcm_sysport_set_features,
1742         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1743         .ndo_set_mac_address    = bcm_sysport_change_mac,
1744 #ifdef CONFIG_NET_POLL_CONTROLLER
1745         .ndo_poll_controller    = bcm_sysport_poll_controller,
1746 #endif
1747 };
1748
1749 #define REV_FMT "v%2x.%02x"
1750
1751 static int bcm_sysport_probe(struct platform_device *pdev)
1752 {
1753         struct bcm_sysport_priv *priv;
1754         struct device_node *dn;
1755         struct net_device *dev;
1756         const void *macaddr;
1757         struct resource *r;
1758         u32 txq, rxq;
1759         int ret;
1760
1761         dn = pdev->dev.of_node;
1762         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1763
1764         /* Read the Transmit/Receive Queue properties */
1765         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1766                 txq = TDMA_NUM_RINGS;
1767         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1768                 rxq = 1;
1769
1770         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1771         if (!dev)
1772                 return -ENOMEM;
1773
1774         /* Initialize private members */
1775         priv = netdev_priv(dev);
1776
1777         priv->irq0 = platform_get_irq(pdev, 0);
1778         priv->irq1 = platform_get_irq(pdev, 1);
1779         priv->wol_irq = platform_get_irq(pdev, 2);
1780         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1781                 dev_err(&pdev->dev, "invalid interrupts\n");
1782                 ret = -EINVAL;
1783                 goto err;
1784         }
1785
1786         priv->base = devm_ioremap_resource(&pdev->dev, r);
1787         if (IS_ERR(priv->base)) {
1788                 ret = PTR_ERR(priv->base);
1789                 goto err;
1790         }
1791
1792         priv->netdev = dev;
1793         priv->pdev = pdev;
1794
1795         priv->phy_interface = of_get_phy_mode(dn);
1796         /* Default to GMII interface mode */
1797         if ((int)priv->phy_interface < 0)
1798                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1799
1800         /* In the case of a fixed PHY, the DT node associated
1801          * to the PHY is the Ethernet MAC DT node.
1802          */
1803         if (of_phy_is_fixed_link(dn)) {
1804                 ret = of_phy_register_fixed_link(dn);
1805                 if (ret) {
1806                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1807                         goto err;
1808                 }
1809
1810                 priv->phy_dn = dn;
1811         }
1812
1813         /* Initialize netdevice members */
1814         macaddr = of_get_mac_address(dn);
1815         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1816                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1817                 eth_hw_addr_random(dev);
1818         } else {
1819                 ether_addr_copy(dev->dev_addr, macaddr);
1820         }
1821
1822         SET_NETDEV_DEV(dev, &pdev->dev);
1823         dev_set_drvdata(&pdev->dev, dev);
1824         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1825         dev->netdev_ops = &bcm_sysport_netdev_ops;
1826         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1827
1828         /* HW supported features, none enabled by default */
1829         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1830                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1831
1832         /* Request the WOL interrupt and advertise suspend if available */
1833         priv->wol_irq_disabled = 1;
1834         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1835                                bcm_sysport_wol_isr, 0, dev->name, priv);
1836         if (!ret)
1837                 device_set_wakeup_capable(&pdev->dev, 1);
1838
1839         /* Set the needed headroom once and for all */
1840         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1841         dev->needed_headroom += sizeof(struct bcm_tsb);
1842
1843         /* libphy will adjust the link state accordingly */
1844         netif_carrier_off(dev);
1845
1846         ret = register_netdev(dev);
1847         if (ret) {
1848                 dev_err(&pdev->dev, "failed to register net_device\n");
1849                 goto err;
1850         }
1851
1852         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1853         dev_info(&pdev->dev,
1854                  "Broadcom SYSTEMPORT" REV_FMT
1855                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1856                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1857                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1858
1859         return 0;
1860 err:
1861         free_netdev(dev);
1862         return ret;
1863 }
1864
1865 static int bcm_sysport_remove(struct platform_device *pdev)
1866 {
1867         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1868
1869         /* Not much to do, ndo_close has been called
1870          * and we use managed allocations
1871          */
1872         unregister_netdev(dev);
1873         free_netdev(dev);
1874         dev_set_drvdata(&pdev->dev, NULL);
1875
1876         return 0;
1877 }
1878
1879 #ifdef CONFIG_PM_SLEEP
1880 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1881 {
1882         struct net_device *ndev = priv->netdev;
1883         unsigned int timeout = 1000;
1884         u32 reg;
1885
1886         reg = umac_readl(priv, UMAC_MPD_CTRL);
1887         reg |= MPD_EN;
1888         reg &= ~PSW_EN;
1889         if (priv->wolopts & WAKE_MAGICSECURE) {
1890                 /* Program the SecureOn password */
1891                 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
1892                             UMAC_PSW_MS);
1893                 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
1894                             UMAC_PSW_LS);
1895                 reg |= PSW_EN;
1896         }
1897         umac_writel(priv, reg, UMAC_MPD_CTRL);
1898
1899         /* Make sure RBUF entered WoL mode as result */
1900         do {
1901                 reg = rbuf_readl(priv, RBUF_STATUS);
1902                 if (reg & RBUF_WOL_MODE)
1903                         break;
1904
1905                 udelay(10);
1906         } while (timeout-- > 0);
1907
1908         /* Do not leave the UniMAC RBUF matching only MPD packets */
1909         if (!timeout) {
1910                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1911                 reg &= ~MPD_EN;
1912                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1913                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1914                 return -ETIMEDOUT;
1915         }
1916
1917         /* UniMAC receive needs to be turned on */
1918         umac_enable_set(priv, CMD_RX_EN, 1);
1919
1920         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1921
1922         return 0;
1923 }
1924
1925 static int bcm_sysport_suspend(struct device *d)
1926 {
1927         struct net_device *dev = dev_get_drvdata(d);
1928         struct bcm_sysport_priv *priv = netdev_priv(dev);
1929         unsigned int i;
1930         int ret = 0;
1931         u32 reg;
1932
1933         if (!netif_running(dev))
1934                 return 0;
1935
1936         bcm_sysport_netif_stop(dev);
1937
1938         phy_suspend(priv->phydev);
1939
1940         netif_device_detach(dev);
1941
1942         /* Disable UniMAC RX */
1943         umac_enable_set(priv, CMD_RX_EN, 0);
1944
1945         ret = rdma_enable_set(priv, 0);
1946         if (ret) {
1947                 netdev_err(dev, "RDMA timeout!\n");
1948                 return ret;
1949         }
1950
1951         /* Disable RXCHK if enabled */
1952         if (priv->rx_chk_en) {
1953                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1954                 reg &= ~RXCHK_EN;
1955                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1956         }
1957
1958         /* Flush RX pipe */
1959         if (!priv->wolopts)
1960                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1961
1962         ret = tdma_enable_set(priv, 0);
1963         if (ret) {
1964                 netdev_err(dev, "TDMA timeout!\n");
1965                 return ret;
1966         }
1967
1968         /* Wait for a packet boundary */
1969         usleep_range(2000, 3000);
1970
1971         umac_enable_set(priv, CMD_TX_EN, 0);
1972
1973         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1974
1975         /* Free RX/TX rings SW structures */
1976         for (i = 0; i < dev->num_tx_queues; i++)
1977                 bcm_sysport_fini_tx_ring(priv, i);
1978         bcm_sysport_fini_rx_ring(priv);
1979
1980         /* Get prepared for Wake-on-LAN */
1981         if (device_may_wakeup(d) && priv->wolopts)
1982                 ret = bcm_sysport_suspend_to_wol(priv);
1983
1984         return ret;
1985 }
1986
1987 static int bcm_sysport_resume(struct device *d)
1988 {
1989         struct net_device *dev = dev_get_drvdata(d);
1990         struct bcm_sysport_priv *priv = netdev_priv(dev);
1991         unsigned int i;
1992         u32 reg;
1993         int ret;
1994
1995         if (!netif_running(dev))
1996                 return 0;
1997
1998         umac_reset(priv);
1999
2000         /* Disable the UniMAC RX/TX */
2001         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
2002
2003         /* We may have been suspended and never received a WOL event that
2004          * would turn off MPD detection, take care of that now
2005          */
2006         bcm_sysport_resume_from_wol(priv);
2007
2008         /* Initialize both hardware and software ring */
2009         for (i = 0; i < dev->num_tx_queues; i++) {
2010                 ret = bcm_sysport_init_tx_ring(priv, i);
2011                 if (ret) {
2012                         netdev_err(dev, "failed to initialize TX ring %d\n",
2013                                    i);
2014                         goto out_free_tx_rings;
2015                 }
2016         }
2017
2018         /* Initialize linked-list */
2019         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2020
2021         /* Initialize RX ring */
2022         ret = bcm_sysport_init_rx_ring(priv);
2023         if (ret) {
2024                 netdev_err(dev, "failed to initialize RX ring\n");
2025                 goto out_free_rx_ring;
2026         }
2027
2028         netif_device_attach(dev);
2029
2030         /* RX pipe enable */
2031         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2032
2033         ret = rdma_enable_set(priv, 1);
2034         if (ret) {
2035                 netdev_err(dev, "failed to enable RDMA\n");
2036                 goto out_free_rx_ring;
2037         }
2038
2039         /* Enable rxhck */
2040         if (priv->rx_chk_en) {
2041                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2042                 reg |= RXCHK_EN;
2043                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2044         }
2045
2046         rbuf_init(priv);
2047
2048         /* Set maximum frame length */
2049         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2050
2051         /* Set MAC address */
2052         umac_set_hw_addr(priv, dev->dev_addr);
2053
2054         umac_enable_set(priv, CMD_RX_EN, 1);
2055
2056         /* TX pipe enable */
2057         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2058
2059         umac_enable_set(priv, CMD_TX_EN, 1);
2060
2061         ret = tdma_enable_set(priv, 1);
2062         if (ret) {
2063                 netdev_err(dev, "TDMA timeout!\n");
2064                 goto out_free_rx_ring;
2065         }
2066
2067         phy_resume(priv->phydev);
2068
2069         bcm_sysport_netif_start(dev);
2070
2071         return 0;
2072
2073 out_free_rx_ring:
2074         bcm_sysport_fini_rx_ring(priv);
2075 out_free_tx_rings:
2076         for (i = 0; i < dev->num_tx_queues; i++)
2077                 bcm_sysport_fini_tx_ring(priv, i);
2078         return ret;
2079 }
2080 #endif
2081
2082 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2083                 bcm_sysport_suspend, bcm_sysport_resume);
2084
2085 static const struct of_device_id bcm_sysport_of_match[] = {
2086         { .compatible = "brcm,systemport-v1.00" },
2087         { .compatible = "brcm,systemport" },
2088         { /* sentinel */ }
2089 };
2090 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2091
2092 static struct platform_driver bcm_sysport_driver = {
2093         .probe  = bcm_sysport_probe,
2094         .remove = bcm_sysport_remove,
2095         .driver =  {
2096                 .name = "brcm-systemport",
2097                 .of_match_table = bcm_sysport_of_match,
2098                 .pm = &bcm_sysport_pm_ops,
2099         },
2100 };
2101 module_platform_driver(bcm_sysport_driver);
2102
2103 MODULE_AUTHOR("Broadcom Corporation");
2104 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2105 MODULE_ALIAS("platform:brcm-systemport");
2106 MODULE_LICENSE("GPL");