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[sagit-ice-cold/kernel_xiaomi_msm8998.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29
30 /* Information for net-next */
31 #define NETNEXT_VERSION         "08"
32
33 /* Information for net */
34 #define NET_VERSION             "3"
35
36 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
40
41 #define R8152_PHY_ID            32
42
43 #define PLA_IDR                 0xc000
44 #define PLA_RCR                 0xc010
45 #define PLA_RMS                 0xc016
46 #define PLA_RXFIFO_CTRL0        0xc0a0
47 #define PLA_RXFIFO_CTRL1        0xc0a4
48 #define PLA_RXFIFO_CTRL2        0xc0a8
49 #define PLA_DMY_REG0            0xc0b0
50 #define PLA_FMC                 0xc0b4
51 #define PLA_CFG_WOL             0xc0b6
52 #define PLA_TEREDO_CFG          0xc0bc
53 #define PLA_MAR                 0xcd00
54 #define PLA_BACKUP              0xd000
55 #define PAL_BDC_CR              0xd1a0
56 #define PLA_TEREDO_TIMER        0xd2cc
57 #define PLA_REALWOW_TIMER       0xd2e8
58 #define PLA_LEDSEL              0xdd90
59 #define PLA_LED_FEATURE         0xdd92
60 #define PLA_PHYAR               0xde00
61 #define PLA_BOOT_CTRL           0xe004
62 #define PLA_GPHY_INTR_IMR       0xe022
63 #define PLA_EEE_CR              0xe040
64 #define PLA_EEEP_CR             0xe080
65 #define PLA_MAC_PWR_CTRL        0xe0c0
66 #define PLA_MAC_PWR_CTRL2       0xe0ca
67 #define PLA_MAC_PWR_CTRL3       0xe0cc
68 #define PLA_MAC_PWR_CTRL4       0xe0ce
69 #define PLA_WDT6_CTRL           0xe428
70 #define PLA_TCR0                0xe610
71 #define PLA_TCR1                0xe612
72 #define PLA_MTPS                0xe615
73 #define PLA_TXFIFO_CTRL         0xe618
74 #define PLA_RSTTALLY            0xe800
75 #define PLA_CR                  0xe813
76 #define PLA_CRWECR              0xe81c
77 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5             0xe822
80 #define PLA_PHY_PWR             0xe84c
81 #define PLA_OOB_CTRL            0xe84f
82 #define PLA_CPCR                0xe854
83 #define PLA_MISC_0              0xe858
84 #define PLA_MISC_1              0xe85a
85 #define PLA_OCP_GPHY_BASE       0xe86c
86 #define PLA_TALLYCNT            0xe890
87 #define PLA_SFF_STS_7           0xe8de
88 #define PLA_PHYSTATUS           0xe908
89 #define PLA_BP_BA               0xfc26
90 #define PLA_BP_0                0xfc28
91 #define PLA_BP_1                0xfc2a
92 #define PLA_BP_2                0xfc2c
93 #define PLA_BP_3                0xfc2e
94 #define PLA_BP_4                0xfc30
95 #define PLA_BP_5                0xfc32
96 #define PLA_BP_6                0xfc34
97 #define PLA_BP_7                0xfc36
98 #define PLA_BP_EN               0xfc38
99
100 #define USB_USB2PHY             0xb41e
101 #define USB_SSPHYLINK2          0xb428
102 #define USB_U2P3_CTRL           0xb460
103 #define USB_CSR_DUMMY1          0xb464
104 #define USB_CSR_DUMMY2          0xb466
105 #define USB_DEV_STAT            0xb808
106 #define USB_CONNECT_TIMER       0xcbf8
107 #define USB_BURST_SIZE          0xcfc0
108 #define USB_USB_CTRL            0xd406
109 #define USB_PHY_CTRL            0xd408
110 #define USB_TX_AGG              0xd40a
111 #define USB_RX_BUF_TH           0xd40c
112 #define USB_USB_TIMER           0xd428
113 #define USB_RX_EARLY_TIMEOUT    0xd42c
114 #define USB_RX_EARLY_SIZE       0xd42e
115 #define USB_PM_CTRL_STATUS      0xd432
116 #define USB_TX_DMA              0xd434
117 #define USB_TOLERANCE           0xd490
118 #define USB_LPM_CTRL            0xd41a
119 #define USB_UPS_CTRL            0xd800
120 #define USB_MISC_0              0xd81a
121 #define USB_POWER_CUT           0xd80a
122 #define USB_AFE_CTRL2           0xd824
123 #define USB_WDT11_CTRL          0xe43c
124 #define USB_BP_BA               0xfc26
125 #define USB_BP_0                0xfc28
126 #define USB_BP_1                0xfc2a
127 #define USB_BP_2                0xfc2c
128 #define USB_BP_3                0xfc2e
129 #define USB_BP_4                0xfc30
130 #define USB_BP_5                0xfc32
131 #define USB_BP_6                0xfc34
132 #define USB_BP_7                0xfc36
133 #define USB_BP_EN               0xfc38
134
135 /* OCP Registers */
136 #define OCP_ALDPS_CONFIG        0x2010
137 #define OCP_EEE_CONFIG1         0x2080
138 #define OCP_EEE_CONFIG2         0x2092
139 #define OCP_EEE_CONFIG3         0x2094
140 #define OCP_BASE_MII            0xa400
141 #define OCP_EEE_AR              0xa41a
142 #define OCP_EEE_DATA            0xa41c
143 #define OCP_PHY_STATUS          0xa420
144 #define OCP_POWER_CFG           0xa430
145 #define OCP_EEE_CFG             0xa432
146 #define OCP_SRAM_ADDR           0xa436
147 #define OCP_SRAM_DATA           0xa438
148 #define OCP_DOWN_SPEED          0xa442
149 #define OCP_EEE_ABLE            0xa5c4
150 #define OCP_EEE_ADV             0xa5d0
151 #define OCP_EEE_LPABLE          0xa5d2
152 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
153 #define OCP_ADC_CFG             0xbc06
154
155 /* SRAM Register */
156 #define SRAM_LPF_CFG            0x8012
157 #define SRAM_10M_AMP1           0x8080
158 #define SRAM_10M_AMP2           0x8082
159 #define SRAM_IMPEDANCE          0x8084
160
161 /* PLA_RCR */
162 #define RCR_AAP                 0x00000001
163 #define RCR_APM                 0x00000002
164 #define RCR_AM                  0x00000004
165 #define RCR_AB                  0x00000008
166 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
167
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL      0x00080002
170 #define RXFIFO_THR1_OOB         0x01800003
171
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL        0x00000060
174 #define RXFIFO_THR2_HIGH        0x00000038
175 #define RXFIFO_THR2_OOB         0x0000004a
176 #define RXFIFO_THR2_NORMAL      0x00a0
177
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL        0x00000078
180 #define RXFIFO_THR3_HIGH        0x00000048
181 #define RXFIFO_THR3_OOB         0x0000005a
182 #define RXFIFO_THR3_NORMAL      0x0110
183
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL       0x00400008
186 #define TXFIFO_THR_NORMAL2      0x01000008
187
188 /* PLA_DMY_REG0 */
189 #define ECM_ALDPS               0x0002
190
191 /* PLA_FMC */
192 #define FMC_FCR_MCU_EN          0x0001
193
194 /* PLA_EEEP_CR */
195 #define EEEP_CR_EEEP_TX         0x0002
196
197 /* PLA_WDT6_CTRL */
198 #define WDT6_SET_MODE           0x0010
199
200 /* PLA_TCR0 */
201 #define TCR0_TX_EMPTY           0x0800
202 #define TCR0_AUTO_FIFO          0x0080
203
204 /* PLA_TCR1 */
205 #define VERSION_MASK            0x7cf0
206
207 /* PLA_MTPS */
208 #define MTPS_JUMBO              (12 * 1024 / 64)
209 #define MTPS_DEFAULT            (6 * 1024 / 64)
210
211 /* PLA_RSTTALLY */
212 #define TALLY_RESET             0x0001
213
214 /* PLA_CR */
215 #define CR_RST                  0x10
216 #define CR_RE                   0x08
217 #define CR_TE                   0x04
218
219 /* PLA_CRWECR */
220 #define CRWECR_NORAML           0x00
221 #define CRWECR_CONFIG           0xc0
222
223 /* PLA_OOB_CTRL */
224 #define NOW_IS_OOB              0x80
225 #define TXFIFO_EMPTY            0x20
226 #define RXFIFO_EMPTY            0x10
227 #define LINK_LIST_READY         0x02
228 #define DIS_MCU_CLROOB          0x01
229 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
230
231 /* PLA_MISC_1 */
232 #define RXDY_GATED_EN           0x0008
233
234 /* PLA_SFF_STS_7 */
235 #define RE_INIT_LL              0x8000
236 #define MCU_BORW_EN             0x4000
237
238 /* PLA_CPCR */
239 #define CPCR_RX_VLAN            0x0040
240
241 /* PLA_CFG_WOL */
242 #define MAGIC_EN                0x0001
243
244 /* PLA_TEREDO_CFG */
245 #define TEREDO_SEL              0x8000
246 #define TEREDO_WAKE_MASK        0x7f00
247 #define TEREDO_RS_EVENT_MASK    0x00fe
248 #define OOB_TEREDO_EN           0x0001
249
250 /* PAL_BDC_CR */
251 #define ALDPS_PROXY_MODE        0x0001
252
253 /* PLA_CONFIG34 */
254 #define LINK_ON_WAKE_EN         0x0010
255 #define LINK_OFF_WAKE_EN        0x0008
256
257 /* PLA_CONFIG5 */
258 #define BWF_EN                  0x0040
259 #define MWF_EN                  0x0020
260 #define UWF_EN                  0x0010
261 #define LAN_WAKE_EN             0x0002
262
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK           0x0700
265
266 /* PLA_PHY_PWR */
267 #define TX_10M_IDLE_EN          0x0080
268 #define PFM_PWM_SWITCH          0x0040
269
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN         0x00004000
272 #define MCU_CLK_RATIO           0x07010f07
273 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO       0x0f87
275
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO         0x8007
278
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN      0x0100
281 #define SUSPEND_SPDWN_EN        0x0004
282 #define U1U2_SPDWN_EN           0x0002
283 #define L1_SPDWN_EN             0x0001
284
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN        0x1000
287 #define RXDV_SPDWN_EN           0x0800
288 #define TX10MIDLE_EN            0x0100
289 #define TP100_SPDWN_EN          0x0020
290 #define TP500_SPDWN_EN          0x0010
291 #define TP1000_SPDWN_EN         0x0008
292 #define EEE_SPDWN_EN            0x0001
293
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK            0x0001
296 #define SPEED_DOWN_MSK          0x0002
297 #define SPDWN_RXDV_MSK          0x0004
298 #define SPDWN_LINKCHG_MSK       0x0008
299
300 /* PLA_PHYAR */
301 #define PHYAR_FLAG              0x80000000
302
303 /* PLA_EEE_CR */
304 #define EEE_RX_EN               0x0001
305 #define EEE_TX_EN               0x0002
306
307 /* PLA_BOOT_CTRL */
308 #define AUTOLOAD_DONE           0x0002
309
310 /* USB_USB2PHY */
311 #define USB2PHY_SUSPEND         0x0001
312 #define USB2PHY_L1              0x0002
313
314 /* USB_SSPHYLINK2 */
315 #define pwd_dn_scale_mask       0x3ffe
316 #define pwd_dn_scale(x)         ((x) << 1)
317
318 /* USB_CSR_DUMMY1 */
319 #define DYNAMIC_BURST           0x0001
320
321 /* USB_CSR_DUMMY2 */
322 #define EP4_FULL_FC             0x0001
323
324 /* USB_DEV_STAT */
325 #define STAT_SPEED_MASK         0x0006
326 #define STAT_SPEED_HIGH         0x0000
327 #define STAT_SPEED_FULL         0x0002
328
329 /* USB_TX_AGG */
330 #define TX_AGG_MAX_THRESHOLD    0x03
331
332 /* USB_RX_BUF_TH */
333 #define RX_THR_SUPPER           0x0c350180
334 #define RX_THR_HIGH             0x7a120180
335 #define RX_THR_SLOW             0xffff0180
336
337 /* USB_TX_DMA */
338 #define TEST_MODE_DISABLE       0x00000001
339 #define TX_SIZE_ADJUST1         0x00000100
340
341 /* USB_UPS_CTRL */
342 #define POWER_CUT               0x0100
343
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE         0x0001
346
347 /* USB_USB_CTRL */
348 #define RX_AGG_DISABLE          0x0010
349 #define RX_ZERO_EN              0x0080
350
351 /* USB_U2P3_CTRL */
352 #define U2P3_ENABLE             0x0001
353
354 /* USB_POWER_CUT */
355 #define PWR_EN                  0x0001
356 #define PHASE2_EN               0x0008
357
358 /* USB_MISC_0 */
359 #define PCUT_STATUS             0x0001
360
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER           85000U
363 #define COALESCE_HIGH           250000U
364 #define COALESCE_SLOW           524280U
365
366 /* USB_WDT11_CTRL */
367 #define TIMER11_EN              0x0001
368
369 /* USB_LPM_CTRL */
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK          0x0c
374 #define LPM_TIMER_500MS         0x04    /* 500 ms */
375 #define LPM_TIMER_500US         0x0c    /* 500 us */
376 #define ROK_EXIT_LPM            0x02
377
378 /* USB_AFE_CTRL2 */
379 #define SEN_VAL_MASK            0xf800
380 #define SEN_VAL_NORMAL          0xa000
381 #define SEL_RXIDLE              0x0100
382
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE               0x8000
385 #define ENPDNPS                 0x0200
386 #define LINKENA                 0x0100
387 #define DIS_SDSAVE              0x0010
388
389 /* OCP_PHY_STATUS */
390 #define PHY_STAT_MASK           0x0007
391 #define PHY_STAT_LAN_ON         3
392 #define PHY_STAT_PWRDN          5
393
394 /* OCP_POWER_CFG */
395 #define EEE_CLKDIV_EN           0x8000
396 #define EN_ALDPS                0x0004
397 #define EN_10M_PLLOFF           0x0001
398
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP      0x8000
401 #define RG_MATCLR_EN            0x4000
402 #define EEE_10_CAP              0x2000
403 #define EEE_NWAY_EN             0x1000
404 #define TX_QUIET_EN             0x0200
405 #define RX_QUIET_EN             0x0100
406 #define sd_rise_time_mask       0x0070
407 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP      0x0008
409 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
410
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN          0x0400
414 #define RG_LDVQUIET_EN          0x0200
415 #define RG_CKRSEL               0x0020
416 #define RG_EEEPRG_EN            0x0010
417
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask           0xff80
420 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
421 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
422 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
423
424 /* OCP_EEE_AR */
425 /* bit[15:14] function */
426 #define FUN_ADDR                0x0000
427 #define FUN_DATA                0x4000
428 /* bit[4:0] device addr */
429
430 /* OCP_EEE_CFG */
431 #define CTAP_SHORT_EN           0x0040
432 #define EEE10_EN                0x0010
433
434 /* OCP_DOWN_SPEED */
435 #define EN_10M_BGOFF            0x0080
436
437 /* OCP_PHY_STATE */
438 #define TXDIS_STATE             0x01
439 #define ABD_STATE               0x02
440
441 /* OCP_ADC_CFG */
442 #define CKADSEL_L               0x0100
443 #define ADC_EN                  0x0080
444 #define EN_EMI_L                0x0040
445
446 /* SRAM_LPF_CFG */
447 #define LPF_AUTO_TUNE           0x8000
448
449 /* SRAM_10M_AMP1 */
450 #define GDAC_IB_UPALL           0x0008
451
452 /* SRAM_10M_AMP2 */
453 #define AMP_DN                  0x0200
454
455 /* SRAM_IMPEDANCE */
456 #define RX_DRIVING_MASK         0x6000
457
458 enum rtl_register_content {
459         _1000bps        = 0x10,
460         _100bps         = 0x08,
461         _10bps          = 0x04,
462         LINK_STATUS     = 0x02,
463         FULL_DUP        = 0x01,
464 };
465
466 #define RTL8152_MAX_TX          4
467 #define RTL8152_MAX_RX          10
468 #define INTBUFSIZE              2
469 #define CRC_SIZE                4
470 #define TX_ALIGN                4
471 #define RX_ALIGN                8
472
473 #define INTR_LINK               0x0004
474
475 #define RTL8152_REQT_READ       0xc0
476 #define RTL8152_REQT_WRITE      0x40
477 #define RTL8152_REQ_GET_REGS    0x05
478 #define RTL8152_REQ_SET_REGS    0x05
479
480 #define BYTE_EN_DWORD           0xff
481 #define BYTE_EN_WORD            0x33
482 #define BYTE_EN_BYTE            0x11
483 #define BYTE_EN_SIX_BYTES       0x3f
484 #define BYTE_EN_START_MASK      0x0f
485 #define BYTE_EN_END_MASK        0xf0
486
487 #define RTL8153_MAX_PACKET      9216 /* 9K */
488 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS             RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT      (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT     64
493
494 /* rtl8152 flags */
495 enum rtl8152_flags {
496         RTL8152_UNPLUG = 0,
497         RTL8152_SET_RX_MODE,
498         WORK_ENABLE,
499         RTL8152_LINK_CHG,
500         SELECTIVE_SUSPEND,
501         PHY_RESET,
502         SCHEDULE_NAPI,
503 };
504
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK               0x0bda
507 #define VENDOR_ID_SAMSUNG               0x04e8
508 #define VENDOR_ID_LENOVO                0x17ef
509 #define VENDOR_ID_LINKSYS               0x13b1
510 #define VENDOR_ID_NVIDIA                0x0955
511
512 #define MCU_TYPE_PLA                    0x0100
513 #define MCU_TYPE_USB                    0x0000
514
515 struct tally_counter {
516         __le64  tx_packets;
517         __le64  rx_packets;
518         __le64  tx_errors;
519         __le32  rx_errors;
520         __le16  rx_missed;
521         __le16  align_errors;
522         __le32  tx_one_collision;
523         __le32  tx_multi_collision;
524         __le64  rx_unicast;
525         __le64  rx_broadcast;
526         __le32  rx_multicast;
527         __le16  tx_aborted;
528         __le16  tx_underrun;
529 };
530
531 struct rx_desc {
532         __le32 opts1;
533 #define RX_LEN_MASK                     0x7fff
534
535         __le32 opts2;
536 #define RD_UDP_CS                       BIT(23)
537 #define RD_TCP_CS                       BIT(22)
538 #define RD_IPV6_CS                      BIT(20)
539 #define RD_IPV4_CS                      BIT(19)
540
541         __le32 opts3;
542 #define IPF                             BIT(23) /* IP checksum fail */
543 #define UDPF                            BIT(22) /* UDP checksum fail */
544 #define TCPF                            BIT(21) /* TCP checksum fail */
545 #define RX_VLAN_TAG                     BIT(16)
546
547         __le32 opts4;
548         __le32 opts5;
549         __le32 opts6;
550 };
551
552 struct tx_desc {
553         __le32 opts1;
554 #define TX_FS                   BIT(31) /* First segment of a packet */
555 #define TX_LS                   BIT(30) /* Final segment of a packet */
556 #define GTSENDV4                BIT(28)
557 #define GTSENDV6                BIT(27)
558 #define GTTCPHO_SHIFT           18
559 #define GTTCPHO_MAX             0x7fU
560 #define TX_LEN_MAX              0x3ffffU
561
562         __le32 opts2;
563 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
564 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
565 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
566 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
567 #define MSS_SHIFT               17
568 #define MSS_MAX                 0x7ffU
569 #define TCPHO_SHIFT             17
570 #define TCPHO_MAX               0x7ffU
571 #define TX_VLAN_TAG             BIT(16)
572 };
573
574 struct r8152;
575
576 struct rx_agg {
577         struct list_head list;
578         struct urb *urb;
579         struct r8152 *context;
580         void *buffer;
581         void *head;
582 };
583
584 struct tx_agg {
585         struct list_head list;
586         struct urb *urb;
587         struct r8152 *context;
588         void *buffer;
589         void *head;
590         u32 skb_num;
591         u32 skb_len;
592 };
593
594 struct r8152 {
595         unsigned long flags;
596         struct usb_device *udev;
597         struct napi_struct napi;
598         struct usb_interface *intf;
599         struct net_device *netdev;
600         struct urb *intr_urb;
601         struct tx_agg tx_info[RTL8152_MAX_TX];
602         struct rx_agg rx_info[RTL8152_MAX_RX];
603         struct list_head rx_done, tx_free;
604         struct sk_buff_head tx_queue, rx_queue;
605         spinlock_t rx_lock, tx_lock;
606         struct delayed_work schedule;
607         struct mii_if_info mii;
608         struct mutex control;   /* use for hw setting */
609 #ifdef CONFIG_PM_SLEEP
610         struct notifier_block pm_notifier;
611 #endif
612
613         struct rtl_ops {
614                 void (*init)(struct r8152 *);
615                 int (*enable)(struct r8152 *);
616                 void (*disable)(struct r8152 *);
617                 void (*up)(struct r8152 *);
618                 void (*down)(struct r8152 *);
619                 void (*unload)(struct r8152 *);
620                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
621                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
622                 bool (*in_nway)(struct r8152 *);
623         } rtl_ops;
624
625         int intr_interval;
626         u32 saved_wolopts;
627         u32 msg_enable;
628         u32 tx_qlen;
629         u32 coalesce;
630         u16 ocp_base;
631         u8 *intr_buff;
632         u8 version;
633 };
634
635 enum rtl_version {
636         RTL_VER_UNKNOWN = 0,
637         RTL_VER_01,
638         RTL_VER_02,
639         RTL_VER_03,
640         RTL_VER_04,
641         RTL_VER_05,
642         RTL_VER_06,
643         RTL_VER_MAX
644 };
645
646 enum tx_csum_stat {
647         TX_CSUM_SUCCESS = 0,
648         TX_CSUM_TSO,
649         TX_CSUM_NONE
650 };
651
652 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
653  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
654  */
655 static const int multicast_filter_limit = 32;
656 static unsigned int agg_buf_sz = 16384;
657
658 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
659                                  VLAN_ETH_HLEN - VLAN_HLEN)
660
661 static
662 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
663 {
664         int ret;
665         void *tmp;
666
667         tmp = kmalloc(size, GFP_KERNEL);
668         if (!tmp)
669                 return -ENOMEM;
670
671         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
672                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
673                               value, index, tmp, size, 500);
674         if (ret < 0)
675                 memset(data, 0xff, size);
676         else
677                 memcpy(data, tmp, size);
678
679         kfree(tmp);
680
681         return ret;
682 }
683
684 static
685 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
686 {
687         int ret;
688         void *tmp;
689
690         tmp = kmemdup(data, size, GFP_KERNEL);
691         if (!tmp)
692                 return -ENOMEM;
693
694         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
695                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
696                               value, index, tmp, size, 500);
697
698         kfree(tmp);
699
700         return ret;
701 }
702
703 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
704                             void *data, u16 type)
705 {
706         u16 limit = 64;
707         int ret = 0;
708
709         if (test_bit(RTL8152_UNPLUG, &tp->flags))
710                 return -ENODEV;
711
712         /* both size and indix must be 4 bytes align */
713         if ((size & 3) || !size || (index & 3) || !data)
714                 return -EPERM;
715
716         if ((u32)index + (u32)size > 0xffff)
717                 return -EPERM;
718
719         while (size) {
720                 if (size > limit) {
721                         ret = get_registers(tp, index, type, limit, data);
722                         if (ret < 0)
723                                 break;
724
725                         index += limit;
726                         data += limit;
727                         size -= limit;
728                 } else {
729                         ret = get_registers(tp, index, type, size, data);
730                         if (ret < 0)
731                                 break;
732
733                         index += size;
734                         data += size;
735                         size = 0;
736                         break;
737                 }
738         }
739
740         if (ret == -ENODEV)
741                 set_bit(RTL8152_UNPLUG, &tp->flags);
742
743         return ret;
744 }
745
746 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
747                              u16 size, void *data, u16 type)
748 {
749         int ret;
750         u16 byteen_start, byteen_end, byen;
751         u16 limit = 512;
752
753         if (test_bit(RTL8152_UNPLUG, &tp->flags))
754                 return -ENODEV;
755
756         /* both size and indix must be 4 bytes align */
757         if ((size & 3) || !size || (index & 3) || !data)
758                 return -EPERM;
759
760         if ((u32)index + (u32)size > 0xffff)
761                 return -EPERM;
762
763         byteen_start = byteen & BYTE_EN_START_MASK;
764         byteen_end = byteen & BYTE_EN_END_MASK;
765
766         byen = byteen_start | (byteen_start << 4);
767         ret = set_registers(tp, index, type | byen, 4, data);
768         if (ret < 0)
769                 goto error1;
770
771         index += 4;
772         data += 4;
773         size -= 4;
774
775         if (size) {
776                 size -= 4;
777
778                 while (size) {
779                         if (size > limit) {
780                                 ret = set_registers(tp, index,
781                                                     type | BYTE_EN_DWORD,
782                                                     limit, data);
783                                 if (ret < 0)
784                                         goto error1;
785
786                                 index += limit;
787                                 data += limit;
788                                 size -= limit;
789                         } else {
790                                 ret = set_registers(tp, index,
791                                                     type | BYTE_EN_DWORD,
792                                                     size, data);
793                                 if (ret < 0)
794                                         goto error1;
795
796                                 index += size;
797                                 data += size;
798                                 size = 0;
799                                 break;
800                         }
801                 }
802
803                 byen = byteen_end | (byteen_end >> 4);
804                 ret = set_registers(tp, index, type | byen, 4, data);
805                 if (ret < 0)
806                         goto error1;
807         }
808
809 error1:
810         if (ret == -ENODEV)
811                 set_bit(RTL8152_UNPLUG, &tp->flags);
812
813         return ret;
814 }
815
816 static inline
817 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
818 {
819         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
820 }
821
822 static inline
823 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
824 {
825         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
826 }
827
828 static inline
829 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
830 {
831         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
832 }
833
834 static inline
835 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
836 {
837         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
838 }
839
840 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
841 {
842         __le32 data;
843
844         generic_ocp_read(tp, index, sizeof(data), &data, type);
845
846         return __le32_to_cpu(data);
847 }
848
849 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
850 {
851         __le32 tmp = __cpu_to_le32(data);
852
853         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
854 }
855
856 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
857 {
858         u32 data;
859         __le32 tmp;
860         u8 shift = index & 2;
861
862         index &= ~3;
863
864         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
865
866         data = __le32_to_cpu(tmp);
867         data >>= (shift * 8);
868         data &= 0xffff;
869
870         return (u16)data;
871 }
872
873 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
874 {
875         u32 mask = 0xffff;
876         __le32 tmp;
877         u16 byen = BYTE_EN_WORD;
878         u8 shift = index & 2;
879
880         data &= mask;
881
882         if (index & 2) {
883                 byen <<= shift;
884                 mask <<= (shift * 8);
885                 data <<= (shift * 8);
886                 index &= ~3;
887         }
888
889         tmp = __cpu_to_le32(data);
890
891         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
892 }
893
894 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
895 {
896         u32 data;
897         __le32 tmp;
898         u8 shift = index & 3;
899
900         index &= ~3;
901
902         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
903
904         data = __le32_to_cpu(tmp);
905         data >>= (shift * 8);
906         data &= 0xff;
907
908         return (u8)data;
909 }
910
911 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
912 {
913         u32 mask = 0xff;
914         __le32 tmp;
915         u16 byen = BYTE_EN_BYTE;
916         u8 shift = index & 3;
917
918         data &= mask;
919
920         if (index & 3) {
921                 byen <<= shift;
922                 mask <<= (shift * 8);
923                 data <<= (shift * 8);
924                 index &= ~3;
925         }
926
927         tmp = __cpu_to_le32(data);
928
929         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
930 }
931
932 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
933 {
934         u16 ocp_base, ocp_index;
935
936         ocp_base = addr & 0xf000;
937         if (ocp_base != tp->ocp_base) {
938                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
939                 tp->ocp_base = ocp_base;
940         }
941
942         ocp_index = (addr & 0x0fff) | 0xb000;
943         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
944 }
945
946 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
947 {
948         u16 ocp_base, ocp_index;
949
950         ocp_base = addr & 0xf000;
951         if (ocp_base != tp->ocp_base) {
952                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
953                 tp->ocp_base = ocp_base;
954         }
955
956         ocp_index = (addr & 0x0fff) | 0xb000;
957         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
958 }
959
960 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
961 {
962         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
963 }
964
965 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
966 {
967         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
968 }
969
970 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
971 {
972         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
973         ocp_reg_write(tp, OCP_SRAM_DATA, data);
974 }
975
976 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
977 {
978         struct r8152 *tp = netdev_priv(netdev);
979         int ret;
980
981         if (test_bit(RTL8152_UNPLUG, &tp->flags))
982                 return -ENODEV;
983
984         if (phy_id != R8152_PHY_ID)
985                 return -EINVAL;
986
987         ret = r8152_mdio_read(tp, reg);
988
989         return ret;
990 }
991
992 static
993 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
994 {
995         struct r8152 *tp = netdev_priv(netdev);
996
997         if (test_bit(RTL8152_UNPLUG, &tp->flags))
998                 return;
999
1000         if (phy_id != R8152_PHY_ID)
1001                 return;
1002
1003         r8152_mdio_write(tp, reg, val);
1004 }
1005
1006 static int
1007 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1008
1009 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1010 {
1011         struct r8152 *tp = netdev_priv(netdev);
1012         struct sockaddr *addr = p;
1013         int ret = -EADDRNOTAVAIL;
1014
1015         if (!is_valid_ether_addr(addr->sa_data))
1016                 goto out1;
1017
1018         ret = usb_autopm_get_interface(tp->intf);
1019         if (ret < 0)
1020                 goto out1;
1021
1022         mutex_lock(&tp->control);
1023
1024         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1025
1026         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1027         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1028         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1029
1030         mutex_unlock(&tp->control);
1031
1032         usb_autopm_put_interface(tp->intf);
1033 out1:
1034         return ret;
1035 }
1036
1037 static int set_ethernet_addr(struct r8152 *tp)
1038 {
1039         struct net_device *dev = tp->netdev;
1040         struct sockaddr sa;
1041         int ret;
1042
1043         if (tp->version == RTL_VER_01)
1044                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1045         else
1046                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1047
1048         if (ret < 0) {
1049                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1050         } else if (!is_valid_ether_addr(sa.sa_data)) {
1051                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1052                           sa.sa_data);
1053                 eth_hw_addr_random(dev);
1054                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1055                 ret = rtl8152_set_mac_address(dev, &sa);
1056                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1057                            sa.sa_data);
1058         } else {
1059                 if (tp->version == RTL_VER_01)
1060                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1061                 else
1062                         ret = rtl8152_set_mac_address(dev, &sa);
1063         }
1064
1065         return ret;
1066 }
1067
1068 static void read_bulk_callback(struct urb *urb)
1069 {
1070         struct net_device *netdev;
1071         int status = urb->status;
1072         struct rx_agg *agg;
1073         struct r8152 *tp;
1074
1075         agg = urb->context;
1076         if (!agg)
1077                 return;
1078
1079         tp = agg->context;
1080         if (!tp)
1081                 return;
1082
1083         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1084                 return;
1085
1086         if (!test_bit(WORK_ENABLE, &tp->flags))
1087                 return;
1088
1089         netdev = tp->netdev;
1090
1091         /* When link down, the driver would cancel all bulks. */
1092         /* This avoid the re-submitting bulk */
1093         if (!netif_carrier_ok(netdev))
1094                 return;
1095
1096         usb_mark_last_busy(tp->udev);
1097
1098         switch (status) {
1099         case 0:
1100                 if (urb->actual_length < ETH_ZLEN)
1101                         break;
1102
1103                 spin_lock(&tp->rx_lock);
1104                 list_add_tail(&agg->list, &tp->rx_done);
1105                 spin_unlock(&tp->rx_lock);
1106                 napi_schedule(&tp->napi);
1107                 return;
1108         case -ESHUTDOWN:
1109                 set_bit(RTL8152_UNPLUG, &tp->flags);
1110                 netif_device_detach(tp->netdev);
1111                 return;
1112         case -ENOENT:
1113                 return; /* the urb is in unlink state */
1114         case -ETIME:
1115                 if (net_ratelimit())
1116                         netdev_warn(netdev, "maybe reset is needed?\n");
1117                 break;
1118         default:
1119                 if (net_ratelimit())
1120                         netdev_warn(netdev, "Rx status %d\n", status);
1121                 break;
1122         }
1123
1124         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1125 }
1126
1127 static void write_bulk_callback(struct urb *urb)
1128 {
1129         struct net_device_stats *stats;
1130         struct net_device *netdev;
1131         struct tx_agg *agg;
1132         struct r8152 *tp;
1133         int status = urb->status;
1134
1135         agg = urb->context;
1136         if (!agg)
1137                 return;
1138
1139         tp = agg->context;
1140         if (!tp)
1141                 return;
1142
1143         netdev = tp->netdev;
1144         stats = &netdev->stats;
1145         if (status) {
1146                 if (net_ratelimit())
1147                         netdev_warn(netdev, "Tx status %d\n", status);
1148                 stats->tx_errors += agg->skb_num;
1149         } else {
1150                 stats->tx_packets += agg->skb_num;
1151                 stats->tx_bytes += agg->skb_len;
1152         }
1153
1154         spin_lock(&tp->tx_lock);
1155         list_add_tail(&agg->list, &tp->tx_free);
1156         spin_unlock(&tp->tx_lock);
1157
1158         usb_autopm_put_interface_async(tp->intf);
1159
1160         if (!netif_carrier_ok(netdev))
1161                 return;
1162
1163         if (!test_bit(WORK_ENABLE, &tp->flags))
1164                 return;
1165
1166         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1167                 return;
1168
1169         if (!skb_queue_empty(&tp->tx_queue))
1170                 napi_schedule(&tp->napi);
1171 }
1172
1173 static void intr_callback(struct urb *urb)
1174 {
1175         struct r8152 *tp;
1176         __le16 *d;
1177         int status = urb->status;
1178         int res;
1179
1180         tp = urb->context;
1181         if (!tp)
1182                 return;
1183
1184         if (!test_bit(WORK_ENABLE, &tp->flags))
1185                 return;
1186
1187         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1188                 return;
1189
1190         switch (status) {
1191         case 0:                 /* success */
1192                 break;
1193         case -ECONNRESET:       /* unlink */
1194         case -ESHUTDOWN:
1195                 netif_device_detach(tp->netdev);
1196         case -ENOENT:
1197         case -EPROTO:
1198                 netif_info(tp, intr, tp->netdev,
1199                            "Stop submitting intr, status %d\n", status);
1200                 return;
1201         case -EOVERFLOW:
1202                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1203                 goto resubmit;
1204         /* -EPIPE:  should clear the halt */
1205         default:
1206                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1207                 goto resubmit;
1208         }
1209
1210         d = urb->transfer_buffer;
1211         if (INTR_LINK & __le16_to_cpu(d[0])) {
1212                 if (!netif_carrier_ok(tp->netdev)) {
1213                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1214                         schedule_delayed_work(&tp->schedule, 0);
1215                 }
1216         } else {
1217                 if (netif_carrier_ok(tp->netdev)) {
1218                         netif_stop_queue(tp->netdev);
1219                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1220                         schedule_delayed_work(&tp->schedule, 0);
1221                 }
1222         }
1223
1224 resubmit:
1225         res = usb_submit_urb(urb, GFP_ATOMIC);
1226         if (res == -ENODEV) {
1227                 set_bit(RTL8152_UNPLUG, &tp->flags);
1228                 netif_device_detach(tp->netdev);
1229         } else if (res) {
1230                 netif_err(tp, intr, tp->netdev,
1231                           "can't resubmit intr, status %d\n", res);
1232         }
1233 }
1234
1235 static inline void *rx_agg_align(void *data)
1236 {
1237         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1238 }
1239
1240 static inline void *tx_agg_align(void *data)
1241 {
1242         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1243 }
1244
1245 static void free_all_mem(struct r8152 *tp)
1246 {
1247         int i;
1248
1249         for (i = 0; i < RTL8152_MAX_RX; i++) {
1250                 usb_free_urb(tp->rx_info[i].urb);
1251                 tp->rx_info[i].urb = NULL;
1252
1253                 kfree(tp->rx_info[i].buffer);
1254                 tp->rx_info[i].buffer = NULL;
1255                 tp->rx_info[i].head = NULL;
1256         }
1257
1258         for (i = 0; i < RTL8152_MAX_TX; i++) {
1259                 usb_free_urb(tp->tx_info[i].urb);
1260                 tp->tx_info[i].urb = NULL;
1261
1262                 kfree(tp->tx_info[i].buffer);
1263                 tp->tx_info[i].buffer = NULL;
1264                 tp->tx_info[i].head = NULL;
1265         }
1266
1267         usb_free_urb(tp->intr_urb);
1268         tp->intr_urb = NULL;
1269
1270         kfree(tp->intr_buff);
1271         tp->intr_buff = NULL;
1272 }
1273
1274 static int alloc_all_mem(struct r8152 *tp)
1275 {
1276         struct net_device *netdev = tp->netdev;
1277         struct usb_interface *intf = tp->intf;
1278         struct usb_host_interface *alt = intf->cur_altsetting;
1279         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1280         struct urb *urb;
1281         int node, i;
1282         u8 *buf;
1283
1284         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1285
1286         spin_lock_init(&tp->rx_lock);
1287         spin_lock_init(&tp->tx_lock);
1288         INIT_LIST_HEAD(&tp->tx_free);
1289         INIT_LIST_HEAD(&tp->rx_done);
1290         skb_queue_head_init(&tp->tx_queue);
1291         skb_queue_head_init(&tp->rx_queue);
1292
1293         for (i = 0; i < RTL8152_MAX_RX; i++) {
1294                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1295                 if (!buf)
1296                         goto err1;
1297
1298                 if (buf != rx_agg_align(buf)) {
1299                         kfree(buf);
1300                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1301                                            node);
1302                         if (!buf)
1303                                 goto err1;
1304                 }
1305
1306                 urb = usb_alloc_urb(0, GFP_KERNEL);
1307                 if (!urb) {
1308                         kfree(buf);
1309                         goto err1;
1310                 }
1311
1312                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1313                 tp->rx_info[i].context = tp;
1314                 tp->rx_info[i].urb = urb;
1315                 tp->rx_info[i].buffer = buf;
1316                 tp->rx_info[i].head = rx_agg_align(buf);
1317         }
1318
1319         for (i = 0; i < RTL8152_MAX_TX; i++) {
1320                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1321                 if (!buf)
1322                         goto err1;
1323
1324                 if (buf != tx_agg_align(buf)) {
1325                         kfree(buf);
1326                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1327                                            node);
1328                         if (!buf)
1329                                 goto err1;
1330                 }
1331
1332                 urb = usb_alloc_urb(0, GFP_KERNEL);
1333                 if (!urb) {
1334                         kfree(buf);
1335                         goto err1;
1336                 }
1337
1338                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1339                 tp->tx_info[i].context = tp;
1340                 tp->tx_info[i].urb = urb;
1341                 tp->tx_info[i].buffer = buf;
1342                 tp->tx_info[i].head = tx_agg_align(buf);
1343
1344                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1345         }
1346
1347         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1348         if (!tp->intr_urb)
1349                 goto err1;
1350
1351         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1352         if (!tp->intr_buff)
1353                 goto err1;
1354
1355         tp->intr_interval = (int)ep_intr->desc.bInterval;
1356         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1357                          tp->intr_buff, INTBUFSIZE, intr_callback,
1358                          tp, tp->intr_interval);
1359
1360         return 0;
1361
1362 err1:
1363         free_all_mem(tp);
1364         return -ENOMEM;
1365 }
1366
1367 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1368 {
1369         struct tx_agg *agg = NULL;
1370         unsigned long flags;
1371
1372         if (list_empty(&tp->tx_free))
1373                 return NULL;
1374
1375         spin_lock_irqsave(&tp->tx_lock, flags);
1376         if (!list_empty(&tp->tx_free)) {
1377                 struct list_head *cursor;
1378
1379                 cursor = tp->tx_free.next;
1380                 list_del_init(cursor);
1381                 agg = list_entry(cursor, struct tx_agg, list);
1382         }
1383         spin_unlock_irqrestore(&tp->tx_lock, flags);
1384
1385         return agg;
1386 }
1387
1388 /* r8152_csum_workaround()
1389  * The hw limites the value the transport offset. When the offset is out of the
1390  * range, calculate the checksum by sw.
1391  */
1392 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1393                                   struct sk_buff_head *list)
1394 {
1395         if (skb_shinfo(skb)->gso_size) {
1396                 netdev_features_t features = tp->netdev->features;
1397                 struct sk_buff_head seg_list;
1398                 struct sk_buff *segs, *nskb;
1399
1400                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1401                 segs = skb_gso_segment(skb, features);
1402                 if (IS_ERR(segs) || !segs)
1403                         goto drop;
1404
1405                 __skb_queue_head_init(&seg_list);
1406
1407                 do {
1408                         nskb = segs;
1409                         segs = segs->next;
1410                         nskb->next = NULL;
1411                         __skb_queue_tail(&seg_list, nskb);
1412                 } while (segs);
1413
1414                 skb_queue_splice(&seg_list, list);
1415                 dev_kfree_skb(skb);
1416         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1417                 if (skb_checksum_help(skb) < 0)
1418                         goto drop;
1419
1420                 __skb_queue_head(list, skb);
1421         } else {
1422                 struct net_device_stats *stats;
1423
1424 drop:
1425                 stats = &tp->netdev->stats;
1426                 stats->tx_dropped++;
1427                 dev_kfree_skb(skb);
1428         }
1429 }
1430
1431 /* msdn_giant_send_check()
1432  * According to the document of microsoft, the TCP Pseudo Header excludes the
1433  * packet length for IPv6 TCP large packets.
1434  */
1435 static int msdn_giant_send_check(struct sk_buff *skb)
1436 {
1437         const struct ipv6hdr *ipv6h;
1438         struct tcphdr *th;
1439         int ret;
1440
1441         ret = skb_cow_head(skb, 0);
1442         if (ret)
1443                 return ret;
1444
1445         ipv6h = ipv6_hdr(skb);
1446         th = tcp_hdr(skb);
1447
1448         th->check = 0;
1449         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1450
1451         return ret;
1452 }
1453
1454 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1455 {
1456         if (skb_vlan_tag_present(skb)) {
1457                 u32 opts2;
1458
1459                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1460                 desc->opts2 |= cpu_to_le32(opts2);
1461         }
1462 }
1463
1464 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1465 {
1466         u32 opts2 = le32_to_cpu(desc->opts2);
1467
1468         if (opts2 & RX_VLAN_TAG)
1469                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1470                                        swab16(opts2 & 0xffff));
1471 }
1472
1473 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1474                          struct sk_buff *skb, u32 len, u32 transport_offset)
1475 {
1476         u32 mss = skb_shinfo(skb)->gso_size;
1477         u32 opts1, opts2 = 0;
1478         int ret = TX_CSUM_SUCCESS;
1479
1480         WARN_ON_ONCE(len > TX_LEN_MAX);
1481
1482         opts1 = len | TX_FS | TX_LS;
1483
1484         if (mss) {
1485                 if (transport_offset > GTTCPHO_MAX) {
1486                         netif_warn(tp, tx_err, tp->netdev,
1487                                    "Invalid transport offset 0x%x for TSO\n",
1488                                    transport_offset);
1489                         ret = TX_CSUM_TSO;
1490                         goto unavailable;
1491                 }
1492
1493                 switch (vlan_get_protocol(skb)) {
1494                 case htons(ETH_P_IP):
1495                         opts1 |= GTSENDV4;
1496                         break;
1497
1498                 case htons(ETH_P_IPV6):
1499                         if (msdn_giant_send_check(skb)) {
1500                                 ret = TX_CSUM_TSO;
1501                                 goto unavailable;
1502                         }
1503                         opts1 |= GTSENDV6;
1504                         break;
1505
1506                 default:
1507                         WARN_ON_ONCE(1);
1508                         break;
1509                 }
1510
1511                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1512                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1513         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1514                 u8 ip_protocol;
1515
1516                 if (transport_offset > TCPHO_MAX) {
1517                         netif_warn(tp, tx_err, tp->netdev,
1518                                    "Invalid transport offset 0x%x\n",
1519                                    transport_offset);
1520                         ret = TX_CSUM_NONE;
1521                         goto unavailable;
1522                 }
1523
1524                 switch (vlan_get_protocol(skb)) {
1525                 case htons(ETH_P_IP):
1526                         opts2 |= IPV4_CS;
1527                         ip_protocol = ip_hdr(skb)->protocol;
1528                         break;
1529
1530                 case htons(ETH_P_IPV6):
1531                         opts2 |= IPV6_CS;
1532                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1533                         break;
1534
1535                 default:
1536                         ip_protocol = IPPROTO_RAW;
1537                         break;
1538                 }
1539
1540                 if (ip_protocol == IPPROTO_TCP)
1541                         opts2 |= TCP_CS;
1542                 else if (ip_protocol == IPPROTO_UDP)
1543                         opts2 |= UDP_CS;
1544                 else
1545                         WARN_ON_ONCE(1);
1546
1547                 opts2 |= transport_offset << TCPHO_SHIFT;
1548         }
1549
1550         desc->opts2 = cpu_to_le32(opts2);
1551         desc->opts1 = cpu_to_le32(opts1);
1552
1553 unavailable:
1554         return ret;
1555 }
1556
1557 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1558 {
1559         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1560         int remain, ret;
1561         u8 *tx_data;
1562
1563         __skb_queue_head_init(&skb_head);
1564         spin_lock(&tx_queue->lock);
1565         skb_queue_splice_init(tx_queue, &skb_head);
1566         spin_unlock(&tx_queue->lock);
1567
1568         tx_data = agg->head;
1569         agg->skb_num = 0;
1570         agg->skb_len = 0;
1571         remain = agg_buf_sz;
1572
1573         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1574                 struct tx_desc *tx_desc;
1575                 struct sk_buff *skb;
1576                 unsigned int len;
1577                 u32 offset;
1578
1579                 skb = __skb_dequeue(&skb_head);
1580                 if (!skb)
1581                         break;
1582
1583                 len = skb->len + sizeof(*tx_desc);
1584
1585                 if (len > remain) {
1586                         __skb_queue_head(&skb_head, skb);
1587                         break;
1588                 }
1589
1590                 tx_data = tx_agg_align(tx_data);
1591                 tx_desc = (struct tx_desc *)tx_data;
1592
1593                 offset = (u32)skb_transport_offset(skb);
1594
1595                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1596                         r8152_csum_workaround(tp, skb, &skb_head);
1597                         continue;
1598                 }
1599
1600                 rtl_tx_vlan_tag(tx_desc, skb);
1601
1602                 tx_data += sizeof(*tx_desc);
1603
1604                 len = skb->len;
1605                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1606                         struct net_device_stats *stats = &tp->netdev->stats;
1607
1608                         stats->tx_dropped++;
1609                         dev_kfree_skb_any(skb);
1610                         tx_data -= sizeof(*tx_desc);
1611                         continue;
1612                 }
1613
1614                 tx_data += len;
1615                 agg->skb_len += len;
1616                 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1617
1618                 dev_kfree_skb_any(skb);
1619
1620                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1621         }
1622
1623         if (!skb_queue_empty(&skb_head)) {
1624                 spin_lock(&tx_queue->lock);
1625                 skb_queue_splice(&skb_head, tx_queue);
1626                 spin_unlock(&tx_queue->lock);
1627         }
1628
1629         netif_tx_lock(tp->netdev);
1630
1631         if (netif_queue_stopped(tp->netdev) &&
1632             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1633                 netif_wake_queue(tp->netdev);
1634
1635         netif_tx_unlock(tp->netdev);
1636
1637         ret = usb_autopm_get_interface_async(tp->intf);
1638         if (ret < 0)
1639                 goto out_tx_fill;
1640
1641         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1642                           agg->head, (int)(tx_data - (u8 *)agg->head),
1643                           (usb_complete_t)write_bulk_callback, agg);
1644
1645         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1646         if (ret < 0)
1647                 usb_autopm_put_interface_async(tp->intf);
1648
1649 out_tx_fill:
1650         return ret;
1651 }
1652
1653 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1654 {
1655         u8 checksum = CHECKSUM_NONE;
1656         u32 opts2, opts3;
1657
1658         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1659                 goto return_result;
1660
1661         opts2 = le32_to_cpu(rx_desc->opts2);
1662         opts3 = le32_to_cpu(rx_desc->opts3);
1663
1664         if (opts2 & RD_IPV4_CS) {
1665                 if (opts3 & IPF)
1666                         checksum = CHECKSUM_NONE;
1667                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1668                         checksum = CHECKSUM_NONE;
1669                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1670                         checksum = CHECKSUM_NONE;
1671                 else
1672                         checksum = CHECKSUM_UNNECESSARY;
1673         } else if (RD_IPV6_CS) {
1674                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1675                         checksum = CHECKSUM_UNNECESSARY;
1676                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1677                         checksum = CHECKSUM_UNNECESSARY;
1678         }
1679
1680 return_result:
1681         return checksum;
1682 }
1683
1684 static int rx_bottom(struct r8152 *tp, int budget)
1685 {
1686         unsigned long flags;
1687         struct list_head *cursor, *next, rx_queue;
1688         int ret = 0, work_done = 0;
1689
1690         if (!skb_queue_empty(&tp->rx_queue)) {
1691                 while (work_done < budget) {
1692                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1693                         struct net_device *netdev = tp->netdev;
1694                         struct net_device_stats *stats = &netdev->stats;
1695                         unsigned int pkt_len;
1696
1697                         if (!skb)
1698                                 break;
1699
1700                         pkt_len = skb->len;
1701                         napi_gro_receive(&tp->napi, skb);
1702                         work_done++;
1703                         stats->rx_packets++;
1704                         stats->rx_bytes += pkt_len;
1705                 }
1706         }
1707
1708         if (list_empty(&tp->rx_done))
1709                 goto out1;
1710
1711         INIT_LIST_HEAD(&rx_queue);
1712         spin_lock_irqsave(&tp->rx_lock, flags);
1713         list_splice_init(&tp->rx_done, &rx_queue);
1714         spin_unlock_irqrestore(&tp->rx_lock, flags);
1715
1716         list_for_each_safe(cursor, next, &rx_queue) {
1717                 struct rx_desc *rx_desc;
1718                 struct rx_agg *agg;
1719                 int len_used = 0;
1720                 struct urb *urb;
1721                 u8 *rx_data;
1722
1723                 list_del_init(cursor);
1724
1725                 agg = list_entry(cursor, struct rx_agg, list);
1726                 urb = agg->urb;
1727                 if (urb->actual_length < ETH_ZLEN)
1728                         goto submit;
1729
1730                 rx_desc = agg->head;
1731                 rx_data = agg->head;
1732                 len_used += sizeof(struct rx_desc);
1733
1734                 while (urb->actual_length > len_used) {
1735                         struct net_device *netdev = tp->netdev;
1736                         struct net_device_stats *stats = &netdev->stats;
1737                         unsigned int pkt_len;
1738                         struct sk_buff *skb;
1739
1740                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1741                         if (pkt_len < ETH_ZLEN)
1742                                 break;
1743
1744                         len_used += pkt_len;
1745                         if (urb->actual_length < len_used)
1746                                 break;
1747
1748                         pkt_len -= CRC_SIZE;
1749                         rx_data += sizeof(struct rx_desc);
1750
1751                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1752                         if (!skb) {
1753                                 stats->rx_dropped++;
1754                                 goto find_next_rx;
1755                         }
1756
1757                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1758                         memcpy(skb->data, rx_data, pkt_len);
1759                         skb_put(skb, pkt_len);
1760                         skb->protocol = eth_type_trans(skb, netdev);
1761                         rtl_rx_vlan_tag(rx_desc, skb);
1762                         if (work_done < budget) {
1763                                 napi_gro_receive(&tp->napi, skb);
1764                                 work_done++;
1765                                 stats->rx_packets++;
1766                                 stats->rx_bytes += pkt_len;
1767                         } else {
1768                                 __skb_queue_tail(&tp->rx_queue, skb);
1769                         }
1770
1771 find_next_rx:
1772                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1773                         rx_desc = (struct rx_desc *)rx_data;
1774                         len_used = (int)(rx_data - (u8 *)agg->head);
1775                         len_used += sizeof(struct rx_desc);
1776                 }
1777
1778 submit:
1779                 if (!ret) {
1780                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1781                 } else {
1782                         urb->actual_length = 0;
1783                         list_add_tail(&agg->list, next);
1784                 }
1785         }
1786
1787         if (!list_empty(&rx_queue)) {
1788                 spin_lock_irqsave(&tp->rx_lock, flags);
1789                 list_splice_tail(&rx_queue, &tp->rx_done);
1790                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1791         }
1792
1793 out1:
1794         return work_done;
1795 }
1796
1797 static void tx_bottom(struct r8152 *tp)
1798 {
1799         int res;
1800
1801         do {
1802                 struct tx_agg *agg;
1803
1804                 if (skb_queue_empty(&tp->tx_queue))
1805                         break;
1806
1807                 agg = r8152_get_tx_agg(tp);
1808                 if (!agg)
1809                         break;
1810
1811                 res = r8152_tx_agg_fill(tp, agg);
1812                 if (res) {
1813                         struct net_device *netdev = tp->netdev;
1814
1815                         if (res == -ENODEV) {
1816                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1817                                 netif_device_detach(netdev);
1818                         } else {
1819                                 struct net_device_stats *stats = &netdev->stats;
1820                                 unsigned long flags;
1821
1822                                 netif_warn(tp, tx_err, netdev,
1823                                            "failed tx_urb %d\n", res);
1824                                 stats->tx_dropped += agg->skb_num;
1825
1826                                 spin_lock_irqsave(&tp->tx_lock, flags);
1827                                 list_add_tail(&agg->list, &tp->tx_free);
1828                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1829                         }
1830                 }
1831         } while (res == 0);
1832 }
1833
1834 static void bottom_half(struct r8152 *tp)
1835 {
1836         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1837                 return;
1838
1839         if (!test_bit(WORK_ENABLE, &tp->flags))
1840                 return;
1841
1842         /* When link down, the driver would cancel all bulks. */
1843         /* This avoid the re-submitting bulk */
1844         if (!netif_carrier_ok(tp->netdev))
1845                 return;
1846
1847         clear_bit(SCHEDULE_NAPI, &tp->flags);
1848
1849         tx_bottom(tp);
1850 }
1851
1852 static int r8152_poll(struct napi_struct *napi, int budget)
1853 {
1854         struct r8152 *tp = container_of(napi, struct r8152, napi);
1855         int work_done;
1856
1857         work_done = rx_bottom(tp, budget);
1858         bottom_half(tp);
1859
1860         if (work_done < budget) {
1861                 napi_complete(napi);
1862                 if (!list_empty(&tp->rx_done))
1863                         napi_schedule(napi);
1864                 else if (!skb_queue_empty(&tp->tx_queue) &&
1865                          !list_empty(&tp->tx_free))
1866                         napi_schedule(napi);
1867         }
1868
1869         return work_done;
1870 }
1871
1872 static
1873 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1874 {
1875         int ret;
1876
1877         /* The rx would be stopped, so skip submitting */
1878         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1879             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1880                 return 0;
1881
1882         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1883                           agg->head, agg_buf_sz,
1884                           (usb_complete_t)read_bulk_callback, agg);
1885
1886         ret = usb_submit_urb(agg->urb, mem_flags);
1887         if (ret == -ENODEV) {
1888                 set_bit(RTL8152_UNPLUG, &tp->flags);
1889                 netif_device_detach(tp->netdev);
1890         } else if (ret) {
1891                 struct urb *urb = agg->urb;
1892                 unsigned long flags;
1893
1894                 urb->actual_length = 0;
1895                 spin_lock_irqsave(&tp->rx_lock, flags);
1896                 list_add_tail(&agg->list, &tp->rx_done);
1897                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1898
1899                 netif_err(tp, rx_err, tp->netdev,
1900                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1901
1902                 napi_schedule(&tp->napi);
1903         }
1904
1905         return ret;
1906 }
1907
1908 static void rtl_drop_queued_tx(struct r8152 *tp)
1909 {
1910         struct net_device_stats *stats = &tp->netdev->stats;
1911         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1912         struct sk_buff *skb;
1913
1914         if (skb_queue_empty(tx_queue))
1915                 return;
1916
1917         __skb_queue_head_init(&skb_head);
1918         spin_lock_bh(&tx_queue->lock);
1919         skb_queue_splice_init(tx_queue, &skb_head);
1920         spin_unlock_bh(&tx_queue->lock);
1921
1922         while ((skb = __skb_dequeue(&skb_head))) {
1923                 dev_kfree_skb(skb);
1924                 stats->tx_dropped++;
1925         }
1926 }
1927
1928 static void rtl8152_tx_timeout(struct net_device *netdev)
1929 {
1930         struct r8152 *tp = netdev_priv(netdev);
1931
1932         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1933
1934         usb_queue_reset_device(tp->intf);
1935 }
1936
1937 static void rtl8152_set_rx_mode(struct net_device *netdev)
1938 {
1939         struct r8152 *tp = netdev_priv(netdev);
1940
1941         if (netif_carrier_ok(netdev)) {
1942                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1943                 schedule_delayed_work(&tp->schedule, 0);
1944         }
1945 }
1946
1947 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1948 {
1949         struct r8152 *tp = netdev_priv(netdev);
1950         u32 mc_filter[2];       /* Multicast hash filter */
1951         __le32 tmp[2];
1952         u32 ocp_data;
1953
1954         netif_stop_queue(netdev);
1955         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1956         ocp_data &= ~RCR_ACPT_ALL;
1957         ocp_data |= RCR_AB | RCR_APM;
1958
1959         if (netdev->flags & IFF_PROMISC) {
1960                 /* Unconditionally log net taps. */
1961                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1962                 ocp_data |= RCR_AM | RCR_AAP;
1963                 mc_filter[1] = 0xffffffff;
1964                 mc_filter[0] = 0xffffffff;
1965         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1966                    (netdev->flags & IFF_ALLMULTI)) {
1967                 /* Too many to filter perfectly -- accept all multicasts. */
1968                 ocp_data |= RCR_AM;
1969                 mc_filter[1] = 0xffffffff;
1970                 mc_filter[0] = 0xffffffff;
1971         } else {
1972                 struct netdev_hw_addr *ha;
1973
1974                 mc_filter[1] = 0;
1975                 mc_filter[0] = 0;
1976                 netdev_for_each_mc_addr(ha, netdev) {
1977                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1978
1979                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1980                         ocp_data |= RCR_AM;
1981                 }
1982         }
1983
1984         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1985         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1986
1987         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1988         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1989         netif_wake_queue(netdev);
1990 }
1991
1992 static netdev_features_t
1993 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1994                        netdev_features_t features)
1995 {
1996         u32 mss = skb_shinfo(skb)->gso_size;
1997         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1998         int offset = skb_transport_offset(skb);
1999
2000         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2001                 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
2002         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2003                 features &= ~NETIF_F_GSO_MASK;
2004
2005         return features;
2006 }
2007
2008 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2009                                       struct net_device *netdev)
2010 {
2011         struct r8152 *tp = netdev_priv(netdev);
2012
2013         skb_tx_timestamp(skb);
2014
2015         skb_queue_tail(&tp->tx_queue, skb);
2016
2017         if (!list_empty(&tp->tx_free)) {
2018                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2019                         set_bit(SCHEDULE_NAPI, &tp->flags);
2020                         schedule_delayed_work(&tp->schedule, 0);
2021                 } else {
2022                         usb_mark_last_busy(tp->udev);
2023                         napi_schedule(&tp->napi);
2024                 }
2025         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2026                 netif_stop_queue(netdev);
2027         }
2028
2029         return NETDEV_TX_OK;
2030 }
2031
2032 static void r8152b_reset_packet_filter(struct r8152 *tp)
2033 {
2034         u32     ocp_data;
2035
2036         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2037         ocp_data &= ~FMC_FCR_MCU_EN;
2038         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2039         ocp_data |= FMC_FCR_MCU_EN;
2040         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2041 }
2042
2043 static void rtl8152_nic_reset(struct r8152 *tp)
2044 {
2045         int     i;
2046
2047         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2048
2049         for (i = 0; i < 1000; i++) {
2050                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2051                         break;
2052                 usleep_range(100, 400);
2053         }
2054 }
2055
2056 static void set_tx_qlen(struct r8152 *tp)
2057 {
2058         struct net_device *netdev = tp->netdev;
2059
2060         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2061                                     sizeof(struct tx_desc));
2062 }
2063
2064 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2065 {
2066         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2067 }
2068
2069 static void rtl_set_eee_plus(struct r8152 *tp)
2070 {
2071         u32 ocp_data;
2072         u8 speed;
2073
2074         speed = rtl8152_get_speed(tp);
2075         if (speed & _10bps) {
2076                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2077                 ocp_data |= EEEP_CR_EEEP_TX;
2078                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2079         } else {
2080                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2081                 ocp_data &= ~EEEP_CR_EEEP_TX;
2082                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2083         }
2084 }
2085
2086 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2087 {
2088         u32 ocp_data;
2089
2090         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2091         if (enable)
2092                 ocp_data |= RXDY_GATED_EN;
2093         else
2094                 ocp_data &= ~RXDY_GATED_EN;
2095         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2096 }
2097
2098 static int rtl_start_rx(struct r8152 *tp)
2099 {
2100         int i, ret = 0;
2101
2102         INIT_LIST_HEAD(&tp->rx_done);
2103         for (i = 0; i < RTL8152_MAX_RX; i++) {
2104                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2105                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2106                 if (ret)
2107                         break;
2108         }
2109
2110         if (ret && ++i < RTL8152_MAX_RX) {
2111                 struct list_head rx_queue;
2112                 unsigned long flags;
2113
2114                 INIT_LIST_HEAD(&rx_queue);
2115
2116                 do {
2117                         struct rx_agg *agg = &tp->rx_info[i++];
2118                         struct urb *urb = agg->urb;
2119
2120                         urb->actual_length = 0;
2121                         list_add_tail(&agg->list, &rx_queue);
2122                 } while (i < RTL8152_MAX_RX);
2123
2124                 spin_lock_irqsave(&tp->rx_lock, flags);
2125                 list_splice_tail(&rx_queue, &tp->rx_done);
2126                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2127         }
2128
2129         return ret;
2130 }
2131
2132 static int rtl_stop_rx(struct r8152 *tp)
2133 {
2134         int i;
2135
2136         for (i = 0; i < RTL8152_MAX_RX; i++)
2137                 usb_kill_urb(tp->rx_info[i].urb);
2138
2139         while (!skb_queue_empty(&tp->rx_queue))
2140                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2141
2142         return 0;
2143 }
2144
2145 static int rtl_enable(struct r8152 *tp)
2146 {
2147         u32 ocp_data;
2148
2149         r8152b_reset_packet_filter(tp);
2150
2151         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2152         ocp_data |= CR_RE | CR_TE;
2153         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2154
2155         rxdy_gated_en(tp, false);
2156
2157         return 0;
2158 }
2159
2160 static int rtl8152_enable(struct r8152 *tp)
2161 {
2162         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2163                 return -ENODEV;
2164
2165         set_tx_qlen(tp);
2166         rtl_set_eee_plus(tp);
2167
2168         return rtl_enable(tp);
2169 }
2170
2171 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2172 {
2173         u32 ocp_data = tp->coalesce / 8;
2174
2175         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2176 }
2177
2178 static void r8153_set_rx_early_size(struct r8152 *tp)
2179 {
2180         u32 mtu = tp->netdev->mtu;
2181         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2182
2183         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2184 }
2185
2186 static int rtl8153_enable(struct r8152 *tp)
2187 {
2188         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2189                 return -ENODEV;
2190
2191         usb_disable_lpm(tp->udev);
2192         set_tx_qlen(tp);
2193         rtl_set_eee_plus(tp);
2194         r8153_set_rx_early_timeout(tp);
2195         r8153_set_rx_early_size(tp);
2196
2197         return rtl_enable(tp);
2198 }
2199
2200 static void rtl_disable(struct r8152 *tp)
2201 {
2202         u32 ocp_data;
2203         int i;
2204
2205         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2206                 rtl_drop_queued_tx(tp);
2207                 return;
2208         }
2209
2210         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2211         ocp_data &= ~RCR_ACPT_ALL;
2212         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2213
2214         rtl_drop_queued_tx(tp);
2215
2216         for (i = 0; i < RTL8152_MAX_TX; i++)
2217                 usb_kill_urb(tp->tx_info[i].urb);
2218
2219         rxdy_gated_en(tp, true);
2220
2221         for (i = 0; i < 1000; i++) {
2222                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2223                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2224                         break;
2225                 usleep_range(1000, 2000);
2226         }
2227
2228         for (i = 0; i < 1000; i++) {
2229                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2230                         break;
2231                 usleep_range(1000, 2000);
2232         }
2233
2234         rtl_stop_rx(tp);
2235
2236         rtl8152_nic_reset(tp);
2237 }
2238
2239 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2240 {
2241         u32 ocp_data;
2242
2243         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2244         if (enable)
2245                 ocp_data |= POWER_CUT;
2246         else
2247                 ocp_data &= ~POWER_CUT;
2248         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2249
2250         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2251         ocp_data &= ~RESUME_INDICATE;
2252         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2253 }
2254
2255 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2256 {
2257         u32 ocp_data;
2258
2259         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2260         if (enable)
2261                 ocp_data |= CPCR_RX_VLAN;
2262         else
2263                 ocp_data &= ~CPCR_RX_VLAN;
2264         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2265 }
2266
2267 static int rtl8152_set_features(struct net_device *dev,
2268                                 netdev_features_t features)
2269 {
2270         netdev_features_t changed = features ^ dev->features;
2271         struct r8152 *tp = netdev_priv(dev);
2272         int ret;
2273
2274         ret = usb_autopm_get_interface(tp->intf);
2275         if (ret < 0)
2276                 goto out;
2277
2278         mutex_lock(&tp->control);
2279
2280         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2281                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2282                         rtl_rx_vlan_en(tp, true);
2283                 else
2284                         rtl_rx_vlan_en(tp, false);
2285         }
2286
2287         mutex_unlock(&tp->control);
2288
2289         usb_autopm_put_interface(tp->intf);
2290
2291 out:
2292         return ret;
2293 }
2294
2295 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2296
2297 static u32 __rtl_get_wol(struct r8152 *tp)
2298 {
2299         u32 ocp_data;
2300         u32 wolopts = 0;
2301
2302         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2303         if (!(ocp_data & LAN_WAKE_EN))
2304                 return 0;
2305
2306         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2307         if (ocp_data & LINK_ON_WAKE_EN)
2308                 wolopts |= WAKE_PHY;
2309
2310         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2311         if (ocp_data & UWF_EN)
2312                 wolopts |= WAKE_UCAST;
2313         if (ocp_data & BWF_EN)
2314                 wolopts |= WAKE_BCAST;
2315         if (ocp_data & MWF_EN)
2316                 wolopts |= WAKE_MCAST;
2317
2318         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2319         if (ocp_data & MAGIC_EN)
2320                 wolopts |= WAKE_MAGIC;
2321
2322         return wolopts;
2323 }
2324
2325 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2326 {
2327         u32 ocp_data;
2328
2329         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2330
2331         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2332         ocp_data &= ~LINK_ON_WAKE_EN;
2333         if (wolopts & WAKE_PHY)
2334                 ocp_data |= LINK_ON_WAKE_EN;
2335         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2336
2337         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2338         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2339         if (wolopts & WAKE_UCAST)
2340                 ocp_data |= UWF_EN;
2341         if (wolopts & WAKE_BCAST)
2342                 ocp_data |= BWF_EN;
2343         if (wolopts & WAKE_MCAST)
2344                 ocp_data |= MWF_EN;
2345         if (wolopts & WAKE_ANY)
2346                 ocp_data |= LAN_WAKE_EN;
2347         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2348
2349         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2350
2351         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2352         ocp_data &= ~MAGIC_EN;
2353         if (wolopts & WAKE_MAGIC)
2354                 ocp_data |= MAGIC_EN;
2355         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2356
2357         if (wolopts & WAKE_ANY)
2358                 device_set_wakeup_enable(&tp->udev->dev, true);
2359         else
2360                 device_set_wakeup_enable(&tp->udev->dev, false);
2361 }
2362
2363 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2364 {
2365         u8 u1u2[8];
2366
2367         if (enable)
2368                 memset(u1u2, 0xff, sizeof(u1u2));
2369         else
2370                 memset(u1u2, 0x00, sizeof(u1u2));
2371
2372         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2373 }
2374
2375 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2376 {
2377         u32 ocp_data;
2378
2379         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2380         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2381                 ocp_data |= U2P3_ENABLE;
2382         else
2383                 ocp_data &= ~U2P3_ENABLE;
2384         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2385 }
2386
2387 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2388 {
2389         u32 ocp_data;
2390
2391         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2392         if (enable)
2393                 ocp_data |= PWR_EN | PHASE2_EN;
2394         else
2395                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2396         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2397
2398         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2399         ocp_data &= ~PCUT_STATUS;
2400         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2401 }
2402
2403 static bool rtl_can_wakeup(struct r8152 *tp)
2404 {
2405         struct usb_device *udev = tp->udev;
2406
2407         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2408 }
2409
2410 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2411 {
2412         if (enable) {
2413                 u32 ocp_data;
2414
2415                 r8153_u1u2en(tp, false);
2416                 r8153_u2p3en(tp, false);
2417
2418                 __rtl_set_wol(tp, WAKE_ANY);
2419
2420                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2421
2422                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2423                 ocp_data |= LINK_OFF_WAKE_EN;
2424                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2425
2426                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2427         } else {
2428                 __rtl_set_wol(tp, tp->saved_wolopts);
2429                 r8153_u2p3en(tp, true);
2430                 r8153_u1u2en(tp, true);
2431         }
2432 }
2433
2434 static void rtl_phy_reset(struct r8152 *tp)
2435 {
2436         u16 data;
2437         int i;
2438
2439         data = r8152_mdio_read(tp, MII_BMCR);
2440
2441         /* don't reset again before the previous one complete */
2442         if (data & BMCR_RESET)
2443                 return;
2444
2445         data |= BMCR_RESET;
2446         r8152_mdio_write(tp, MII_BMCR, data);
2447
2448         for (i = 0; i < 50; i++) {
2449                 msleep(20);
2450                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2451                         break;
2452         }
2453 }
2454
2455 static void r8153_teredo_off(struct r8152 *tp)
2456 {
2457         u32 ocp_data;
2458
2459         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2460         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2461         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2462
2463         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2464         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2465         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2466 }
2467
2468 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2469 {
2470         if (enable) {
2471                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2472                                                     LINKENA | DIS_SDSAVE);
2473         } else {
2474                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2475                                                     DIS_SDSAVE);
2476                 msleep(20);
2477         }
2478 }
2479
2480 static void rtl8152_disable(struct r8152 *tp)
2481 {
2482         r8152_aldps_en(tp, false);
2483         rtl_disable(tp);
2484         r8152_aldps_en(tp, true);
2485 }
2486
2487 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2488 {
2489         u16 data;
2490
2491         data = r8152_mdio_read(tp, MII_BMCR);
2492         if (data & BMCR_PDOWN) {
2493                 data &= ~BMCR_PDOWN;
2494                 r8152_mdio_write(tp, MII_BMCR, data);
2495         }
2496
2497         set_bit(PHY_RESET, &tp->flags);
2498 }
2499
2500 static void r8152b_exit_oob(struct r8152 *tp)
2501 {
2502         u32 ocp_data;
2503         int i;
2504
2505         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2506         ocp_data &= ~RCR_ACPT_ALL;
2507         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2508
2509         rxdy_gated_en(tp, true);
2510         r8153_teredo_off(tp);
2511         r8152b_hw_phy_cfg(tp);
2512
2513         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2514         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2515
2516         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2517         ocp_data &= ~NOW_IS_OOB;
2518         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2519
2520         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2521         ocp_data &= ~MCU_BORW_EN;
2522         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2523
2524         for (i = 0; i < 1000; i++) {
2525                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2526                 if (ocp_data & LINK_LIST_READY)
2527                         break;
2528                 usleep_range(1000, 2000);
2529         }
2530
2531         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2532         ocp_data |= RE_INIT_LL;
2533         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2534
2535         for (i = 0; i < 1000; i++) {
2536                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2537                 if (ocp_data & LINK_LIST_READY)
2538                         break;
2539                 usleep_range(1000, 2000);
2540         }
2541
2542         rtl8152_nic_reset(tp);
2543
2544         /* rx share fifo credit full threshold */
2545         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2546
2547         if (tp->udev->speed == USB_SPEED_FULL ||
2548             tp->udev->speed == USB_SPEED_LOW) {
2549                 /* rx share fifo credit near full threshold */
2550                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2551                                 RXFIFO_THR2_FULL);
2552                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2553                                 RXFIFO_THR3_FULL);
2554         } else {
2555                 /* rx share fifo credit near full threshold */
2556                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2557                                 RXFIFO_THR2_HIGH);
2558                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2559                                 RXFIFO_THR3_HIGH);
2560         }
2561
2562         /* TX share fifo free credit full threshold */
2563         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2564
2565         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2566         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2567         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2568                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2569
2570         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2571
2572         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2573
2574         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2575         ocp_data |= TCR0_AUTO_FIFO;
2576         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2577 }
2578
2579 static void r8152b_enter_oob(struct r8152 *tp)
2580 {
2581         u32 ocp_data;
2582         int i;
2583
2584         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2585         ocp_data &= ~NOW_IS_OOB;
2586         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2587
2588         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2589         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2590         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2591
2592         rtl_disable(tp);
2593
2594         for (i = 0; i < 1000; i++) {
2595                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2596                 if (ocp_data & LINK_LIST_READY)
2597                         break;
2598                 usleep_range(1000, 2000);
2599         }
2600
2601         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2602         ocp_data |= RE_INIT_LL;
2603         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2604
2605         for (i = 0; i < 1000; i++) {
2606                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2607                 if (ocp_data & LINK_LIST_READY)
2608                         break;
2609                 usleep_range(1000, 2000);
2610         }
2611
2612         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2613
2614         rtl_rx_vlan_en(tp, true);
2615
2616         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2617         ocp_data |= ALDPS_PROXY_MODE;
2618         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2619
2620         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2621         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2622         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2623
2624         rxdy_gated_en(tp, false);
2625
2626         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2627         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2628         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2629 }
2630
2631 static void r8153_hw_phy_cfg(struct r8152 *tp)
2632 {
2633         u32 ocp_data;
2634         u16 data;
2635
2636         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2637             tp->version == RTL_VER_05)
2638                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2639
2640         data = r8152_mdio_read(tp, MII_BMCR);
2641         if (data & BMCR_PDOWN) {
2642                 data &= ~BMCR_PDOWN;
2643                 r8152_mdio_write(tp, MII_BMCR, data);
2644         }
2645
2646         if (tp->version == RTL_VER_03) {
2647                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2648                 data &= ~CTAP_SHORT_EN;
2649                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2650         }
2651
2652         data = ocp_reg_read(tp, OCP_POWER_CFG);
2653         data |= EEE_CLKDIV_EN;
2654         ocp_reg_write(tp, OCP_POWER_CFG, data);
2655
2656         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2657         data |= EN_10M_BGOFF;
2658         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2659         data = ocp_reg_read(tp, OCP_POWER_CFG);
2660         data |= EN_10M_PLLOFF;
2661         ocp_reg_write(tp, OCP_POWER_CFG, data);
2662         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2663
2664         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2665         ocp_data |= PFM_PWM_SWITCH;
2666         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2667
2668         /* Enable LPF corner auto tune */
2669         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2670
2671         /* Adjust 10M Amplitude */
2672         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2673         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2674
2675         set_bit(PHY_RESET, &tp->flags);
2676 }
2677
2678 static void r8153_first_init(struct r8152 *tp)
2679 {
2680         u32 ocp_data;
2681         int i;
2682
2683         rxdy_gated_en(tp, true);
2684         r8153_teredo_off(tp);
2685
2686         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2687         ocp_data &= ~RCR_ACPT_ALL;
2688         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2689
2690         r8153_hw_phy_cfg(tp);
2691
2692         rtl8152_nic_reset(tp);
2693
2694         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2695         ocp_data &= ~NOW_IS_OOB;
2696         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2697
2698         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2699         ocp_data &= ~MCU_BORW_EN;
2700         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2701
2702         for (i = 0; i < 1000; i++) {
2703                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2704                 if (ocp_data & LINK_LIST_READY)
2705                         break;
2706                 usleep_range(1000, 2000);
2707         }
2708
2709         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2710         ocp_data |= RE_INIT_LL;
2711         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2712
2713         for (i = 0; i < 1000; i++) {
2714                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2715                 if (ocp_data & LINK_LIST_READY)
2716                         break;
2717                 usleep_range(1000, 2000);
2718         }
2719
2720         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2721
2722         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2723         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2724
2725         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2726         ocp_data |= TCR0_AUTO_FIFO;
2727         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2728
2729         rtl8152_nic_reset(tp);
2730
2731         /* rx share fifo credit full threshold */
2732         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2733         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2734         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2735         /* TX share fifo free credit full threshold */
2736         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2737
2738         /* rx aggregation */
2739         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2740         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2741         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2742 }
2743
2744 static void r8153_enter_oob(struct r8152 *tp)
2745 {
2746         u32 ocp_data;
2747         int i;
2748
2749         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2750         ocp_data &= ~NOW_IS_OOB;
2751         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2752
2753         rtl_disable(tp);
2754
2755         for (i = 0; i < 1000; i++) {
2756                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2757                 if (ocp_data & LINK_LIST_READY)
2758                         break;
2759                 usleep_range(1000, 2000);
2760         }
2761
2762         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2763         ocp_data |= RE_INIT_LL;
2764         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2765
2766         for (i = 0; i < 1000; i++) {
2767                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2768                 if (ocp_data & LINK_LIST_READY)
2769                         break;
2770                 usleep_range(1000, 2000);
2771         }
2772
2773         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2774
2775         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2776         ocp_data &= ~TEREDO_WAKE_MASK;
2777         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2778
2779         rtl_rx_vlan_en(tp, true);
2780
2781         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2782         ocp_data |= ALDPS_PROXY_MODE;
2783         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2784
2785         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2786         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2787         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2788
2789         rxdy_gated_en(tp, false);
2790
2791         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2792         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2793         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2794 }
2795
2796 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2797 {
2798         u16 data;
2799
2800         data = ocp_reg_read(tp, OCP_POWER_CFG);
2801         if (enable) {
2802                 data |= EN_ALDPS;
2803                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2804         } else {
2805                 data &= ~EN_ALDPS;
2806                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2807                 msleep(20);
2808         }
2809 }
2810
2811 static void rtl8153_disable(struct r8152 *tp)
2812 {
2813         r8153_aldps_en(tp, false);
2814         rtl_disable(tp);
2815         r8153_aldps_en(tp, true);
2816         usb_enable_lpm(tp->udev);
2817 }
2818
2819 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2820 {
2821         u16 bmcr, anar, gbcr;
2822         int ret = 0;
2823
2824         cancel_delayed_work_sync(&tp->schedule);
2825         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2826         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2827                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2828         if (tp->mii.supports_gmii) {
2829                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2830                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2831         } else {
2832                 gbcr = 0;
2833         }
2834
2835         if (autoneg == AUTONEG_DISABLE) {
2836                 if (speed == SPEED_10) {
2837                         bmcr = 0;
2838                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2839                 } else if (speed == SPEED_100) {
2840                         bmcr = BMCR_SPEED100;
2841                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2842                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2843                         bmcr = BMCR_SPEED1000;
2844                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2845                 } else {
2846                         ret = -EINVAL;
2847                         goto out;
2848                 }
2849
2850                 if (duplex == DUPLEX_FULL)
2851                         bmcr |= BMCR_FULLDPLX;
2852         } else {
2853                 if (speed == SPEED_10) {
2854                         if (duplex == DUPLEX_FULL)
2855                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2856                         else
2857                                 anar |= ADVERTISE_10HALF;
2858                 } else if (speed == SPEED_100) {
2859                         if (duplex == DUPLEX_FULL) {
2860                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2861                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2862                         } else {
2863                                 anar |= ADVERTISE_10HALF;
2864                                 anar |= ADVERTISE_100HALF;
2865                         }
2866                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2867                         if (duplex == DUPLEX_FULL) {
2868                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2869                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2870                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2871                         } else {
2872                                 anar |= ADVERTISE_10HALF;
2873                                 anar |= ADVERTISE_100HALF;
2874                                 gbcr |= ADVERTISE_1000HALF;
2875                         }
2876                 } else {
2877                         ret = -EINVAL;
2878                         goto out;
2879                 }
2880
2881                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2882         }
2883
2884         if (test_bit(PHY_RESET, &tp->flags))
2885                 bmcr |= BMCR_RESET;
2886
2887         if (tp->mii.supports_gmii)
2888                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2889
2890         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2891         r8152_mdio_write(tp, MII_BMCR, bmcr);
2892
2893         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2894                 int i;
2895
2896                 for (i = 0; i < 50; i++) {
2897                         msleep(20);
2898                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2899                                 break;
2900                 }
2901         }
2902
2903 out:
2904         return ret;
2905 }
2906
2907 static void rtl8152_up(struct r8152 *tp)
2908 {
2909         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2910                 return;
2911
2912         r8152_aldps_en(tp, false);
2913         r8152b_exit_oob(tp);
2914         r8152_aldps_en(tp, true);
2915 }
2916
2917 static void rtl8152_down(struct r8152 *tp)
2918 {
2919         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2920                 rtl_drop_queued_tx(tp);
2921                 return;
2922         }
2923
2924         r8152_power_cut_en(tp, false);
2925         r8152_aldps_en(tp, false);
2926         r8152b_enter_oob(tp);
2927         r8152_aldps_en(tp, true);
2928 }
2929
2930 static void rtl8153_up(struct r8152 *tp)
2931 {
2932         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2933                 return;
2934
2935         r8153_u1u2en(tp, false);
2936         r8153_aldps_en(tp, false);
2937         r8153_first_init(tp);
2938         r8153_aldps_en(tp, true);
2939         r8153_u2p3en(tp, true);
2940         r8153_u1u2en(tp, true);
2941         usb_enable_lpm(tp->udev);
2942 }
2943
2944 static void rtl8153_down(struct r8152 *tp)
2945 {
2946         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2947                 rtl_drop_queued_tx(tp);
2948                 return;
2949         }
2950
2951         r8153_u1u2en(tp, false);
2952         r8153_u2p3en(tp, false);
2953         r8153_power_cut_en(tp, false);
2954         r8153_aldps_en(tp, false);
2955         r8153_enter_oob(tp);
2956         r8153_aldps_en(tp, true);
2957 }
2958
2959 static bool rtl8152_in_nway(struct r8152 *tp)
2960 {
2961         u16 nway_state;
2962
2963         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2964         tp->ocp_base = 0x2000;
2965         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2966         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2967
2968         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2969         if (nway_state & 0xc000)
2970                 return false;
2971         else
2972                 return true;
2973 }
2974
2975 static bool rtl8153_in_nway(struct r8152 *tp)
2976 {
2977         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2978
2979         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2980                 return false;
2981         else
2982                 return true;
2983 }
2984
2985 static void set_carrier(struct r8152 *tp)
2986 {
2987         struct net_device *netdev = tp->netdev;
2988         u8 speed;
2989
2990         speed = rtl8152_get_speed(tp);
2991
2992         if (speed & LINK_STATUS) {
2993                 if (!netif_carrier_ok(netdev)) {
2994                         tp->rtl_ops.enable(tp);
2995                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2996                         netif_stop_queue(netdev);
2997                         napi_disable(&tp->napi);
2998                         netif_carrier_on(netdev);
2999                         rtl_start_rx(tp);
3000                         napi_enable(&tp->napi);
3001                         netif_wake_queue(netdev);
3002                         netif_info(tp, link, netdev, "carrier on\n");
3003                 } else if (netif_queue_stopped(netdev) &&
3004                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3005                         netif_wake_queue(netdev);
3006                 }
3007         } else {
3008                 if (netif_carrier_ok(netdev)) {
3009                         netif_carrier_off(netdev);
3010                         napi_disable(&tp->napi);
3011                         tp->rtl_ops.disable(tp);
3012                         napi_enable(&tp->napi);
3013                         netif_info(tp, link, netdev, "carrier off\n");
3014                 }
3015         }
3016 }
3017
3018 static void rtl_work_func_t(struct work_struct *work)
3019 {
3020         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3021
3022         /* If the device is unplugged or !netif_running(), the workqueue
3023          * doesn't need to wake the device, and could return directly.
3024          */
3025         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3026                 return;
3027
3028         if (usb_autopm_get_interface(tp->intf) < 0)
3029                 return;
3030
3031         if (!test_bit(WORK_ENABLE, &tp->flags))
3032                 goto out1;
3033
3034         if (!mutex_trylock(&tp->control)) {
3035                 schedule_delayed_work(&tp->schedule, 0);
3036                 goto out1;
3037         }
3038
3039         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3040                 set_carrier(tp);
3041
3042         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3043                 _rtl8152_set_rx_mode(tp->netdev);
3044
3045         /* don't schedule napi before linking */
3046         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3047             netif_carrier_ok(tp->netdev))
3048                 napi_schedule(&tp->napi);
3049
3050         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3051                 rtl_phy_reset(tp);
3052
3053         mutex_unlock(&tp->control);
3054
3055 out1:
3056         usb_autopm_put_interface(tp->intf);
3057 }
3058
3059 #ifdef CONFIG_PM_SLEEP
3060 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3061                         void *data)
3062 {
3063         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3064
3065         switch (action) {
3066         case PM_HIBERNATION_PREPARE:
3067         case PM_SUSPEND_PREPARE:
3068                 usb_autopm_get_interface(tp->intf);
3069                 break;
3070
3071         case PM_POST_HIBERNATION:
3072         case PM_POST_SUSPEND:
3073                 usb_autopm_put_interface(tp->intf);
3074                 break;
3075
3076         case PM_POST_RESTORE:
3077         case PM_RESTORE_PREPARE:
3078         default:
3079                 break;
3080         }
3081
3082         return NOTIFY_DONE;
3083 }
3084 #endif
3085
3086 static int rtl8152_open(struct net_device *netdev)
3087 {
3088         struct r8152 *tp = netdev_priv(netdev);
3089         int res = 0;
3090
3091         res = alloc_all_mem(tp);
3092         if (res)
3093                 goto out;
3094
3095         netif_carrier_off(netdev);
3096
3097         res = usb_autopm_get_interface(tp->intf);
3098         if (res < 0) {
3099                 free_all_mem(tp);
3100                 goto out;
3101         }
3102
3103         mutex_lock(&tp->control);
3104
3105         tp->rtl_ops.up(tp);
3106
3107         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3108                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3109                           DUPLEX_FULL);
3110         netif_carrier_off(netdev);
3111         netif_start_queue(netdev);
3112         set_bit(WORK_ENABLE, &tp->flags);
3113
3114         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3115         if (res) {
3116                 if (res == -ENODEV)
3117                         netif_device_detach(tp->netdev);
3118                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3119                            res);
3120                 free_all_mem(tp);
3121         } else {
3122                 napi_enable(&tp->napi);
3123         }
3124
3125         mutex_unlock(&tp->control);
3126
3127         usb_autopm_put_interface(tp->intf);
3128 #ifdef CONFIG_PM_SLEEP
3129         tp->pm_notifier.notifier_call = rtl_notifier;
3130         register_pm_notifier(&tp->pm_notifier);
3131 #endif
3132
3133 out:
3134         return res;
3135 }
3136
3137 static int rtl8152_close(struct net_device *netdev)
3138 {
3139         struct r8152 *tp = netdev_priv(netdev);
3140         int res = 0;
3141
3142 #ifdef CONFIG_PM_SLEEP
3143         unregister_pm_notifier(&tp->pm_notifier);
3144 #endif
3145         if (!test_bit(RTL8152_UNPLUG, &tp->flags))
3146                 napi_disable(&tp->napi);
3147         clear_bit(WORK_ENABLE, &tp->flags);
3148         usb_kill_urb(tp->intr_urb);
3149         cancel_delayed_work_sync(&tp->schedule);
3150         netif_stop_queue(netdev);
3151
3152         res = usb_autopm_get_interface(tp->intf);
3153         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3154                 rtl_drop_queued_tx(tp);
3155                 rtl_stop_rx(tp);
3156         } else {
3157                 mutex_lock(&tp->control);
3158
3159                 tp->rtl_ops.down(tp);
3160
3161                 mutex_unlock(&tp->control);
3162
3163                 usb_autopm_put_interface(tp->intf);
3164         }
3165
3166         free_all_mem(tp);
3167
3168         return res;
3169 }
3170
3171 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3172 {
3173         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3174         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3175         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3176 }
3177
3178 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3179 {
3180         u16 data;
3181
3182         r8152_mmd_indirect(tp, dev, reg);
3183         data = ocp_reg_read(tp, OCP_EEE_DATA);
3184         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3185
3186         return data;
3187 }
3188
3189 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3190 {
3191         r8152_mmd_indirect(tp, dev, reg);
3192         ocp_reg_write(tp, OCP_EEE_DATA, data);
3193         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3194 }
3195
3196 static void r8152_eee_en(struct r8152 *tp, bool enable)
3197 {
3198         u16 config1, config2, config3;
3199         u32 ocp_data;
3200
3201         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3202         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3203         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3204         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3205
3206         if (enable) {
3207                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3208                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3209                 config1 |= sd_rise_time(1);
3210                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3211                 config3 |= fast_snr(42);
3212         } else {
3213                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3214                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3215                              RX_QUIET_EN);
3216                 config1 |= sd_rise_time(7);
3217                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3218                 config3 |= fast_snr(511);
3219         }
3220
3221         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3222         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3223         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3224         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3225 }
3226
3227 static void r8152b_enable_eee(struct r8152 *tp)
3228 {
3229         r8152_eee_en(tp, true);
3230         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3231 }
3232
3233 static void r8153_eee_en(struct r8152 *tp, bool enable)
3234 {
3235         u32 ocp_data;
3236         u16 config;
3237
3238         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3239         config = ocp_reg_read(tp, OCP_EEE_CFG);
3240
3241         if (enable) {
3242                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3243                 config |= EEE10_EN;
3244         } else {
3245                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3246                 config &= ~EEE10_EN;
3247         }
3248
3249         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3250         ocp_reg_write(tp, OCP_EEE_CFG, config);
3251 }
3252
3253 static void r8153_enable_eee(struct r8152 *tp)
3254 {
3255         r8153_eee_en(tp, true);
3256         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3257 }
3258
3259 static void r8152b_enable_fc(struct r8152 *tp)
3260 {
3261         u16 anar;
3262
3263         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3264         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3265         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3266 }
3267
3268 static void rtl_tally_reset(struct r8152 *tp)
3269 {
3270         u32 ocp_data;
3271
3272         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3273         ocp_data |= TALLY_RESET;
3274         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3275 }
3276
3277 static void r8152b_init(struct r8152 *tp)
3278 {
3279         u32 ocp_data;
3280
3281         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3282                 return;
3283
3284         r8152_aldps_en(tp, false);
3285
3286         if (tp->version == RTL_VER_01) {
3287                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3288                 ocp_data &= ~LED_MODE_MASK;
3289                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3290         }
3291
3292         r8152_power_cut_en(tp, false);
3293
3294         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3295         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3296         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3297         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3298         ocp_data &= ~MCU_CLK_RATIO_MASK;
3299         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3300         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3301         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3302                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3303         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3304
3305         r8152b_enable_eee(tp);
3306         r8152_aldps_en(tp, true);
3307         r8152b_enable_fc(tp);
3308         rtl_tally_reset(tp);
3309
3310         /* enable rx aggregation */
3311         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3312         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3313         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3314 }
3315
3316 static void r8153_init(struct r8152 *tp)
3317 {
3318         u32 ocp_data;
3319         int i;
3320
3321         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3322                 return;
3323
3324         r8153_aldps_en(tp, false);
3325         r8153_u1u2en(tp, false);
3326
3327         for (i = 0; i < 500; i++) {
3328                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3329                     AUTOLOAD_DONE)
3330                         break;
3331                 msleep(20);
3332         }
3333
3334         for (i = 0; i < 500; i++) {
3335                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3336                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3337                         break;
3338                 msleep(20);
3339         }
3340
3341         usb_disable_lpm(tp->udev);
3342         r8153_u2p3en(tp, false);
3343
3344         if (tp->version == RTL_VER_04) {
3345                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3346                 ocp_data &= ~pwd_dn_scale_mask;
3347                 ocp_data |= pwd_dn_scale(96);
3348                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3349
3350                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3351                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3352                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3353         } else if (tp->version == RTL_VER_05) {
3354                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3355                 ocp_data &= ~ECM_ALDPS;
3356                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3357
3358                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3359                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3360                         ocp_data &= ~DYNAMIC_BURST;
3361                 else
3362                         ocp_data |= DYNAMIC_BURST;
3363                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3364         } else if (tp->version == RTL_VER_06) {
3365                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3366                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3367                         ocp_data &= ~DYNAMIC_BURST;
3368                 else
3369                         ocp_data |= DYNAMIC_BURST;
3370                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3371         }
3372
3373         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3374         ocp_data |= EP4_FULL_FC;
3375         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3376
3377         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3378         ocp_data &= ~TIMER11_EN;
3379         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3380
3381         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3382         ocp_data &= ~LED_MODE_MASK;
3383         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3384
3385         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3386         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3387                 ocp_data |= LPM_TIMER_500MS;
3388         else
3389                 ocp_data |= LPM_TIMER_500US;
3390         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3391
3392         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3393         ocp_data &= ~SEN_VAL_MASK;
3394         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3395         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3396
3397         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3398
3399         r8153_power_cut_en(tp, false);
3400         r8153_u1u2en(tp, true);
3401
3402         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3403         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3404         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3405                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3406                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3407         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3408                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3409                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3410                        EEE_SPDWN_EN);
3411
3412         r8153_enable_eee(tp);
3413         r8153_aldps_en(tp, true);
3414         r8152b_enable_fc(tp);
3415         rtl_tally_reset(tp);
3416         r8153_u2p3en(tp, true);
3417 }
3418
3419 static int rtl8152_pre_reset(struct usb_interface *intf)
3420 {
3421         struct r8152 *tp = usb_get_intfdata(intf);
3422         struct net_device *netdev;
3423
3424         if (!tp)
3425                 return 0;
3426
3427         netdev = tp->netdev;
3428         if (!netif_running(netdev))
3429                 return 0;
3430
3431         netif_stop_queue(netdev);
3432         napi_disable(&tp->napi);
3433         clear_bit(WORK_ENABLE, &tp->flags);
3434         usb_kill_urb(tp->intr_urb);
3435         cancel_delayed_work_sync(&tp->schedule);
3436         if (netif_carrier_ok(netdev)) {
3437                 mutex_lock(&tp->control);
3438                 tp->rtl_ops.disable(tp);
3439                 mutex_unlock(&tp->control);
3440         }
3441
3442         return 0;
3443 }
3444
3445 static int rtl8152_post_reset(struct usb_interface *intf)
3446 {
3447         struct r8152 *tp = usb_get_intfdata(intf);
3448         struct net_device *netdev;
3449
3450         if (!tp)
3451                 return 0;
3452
3453         netdev = tp->netdev;
3454         if (!netif_running(netdev))
3455                 return 0;
3456
3457         set_bit(WORK_ENABLE, &tp->flags);
3458         if (netif_carrier_ok(netdev)) {
3459                 mutex_lock(&tp->control);
3460                 tp->rtl_ops.enable(tp);
3461                 rtl_start_rx(tp);
3462                 rtl8152_set_rx_mode(netdev);
3463                 mutex_unlock(&tp->control);
3464         }
3465
3466         napi_enable(&tp->napi);
3467         netif_wake_queue(netdev);
3468         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3469
3470         return 0;
3471 }
3472
3473 static bool delay_autosuspend(struct r8152 *tp)
3474 {
3475         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3476         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3477
3478         /* This means a linking change occurs and the driver doesn't detect it,
3479          * yet. If the driver has disabled tx/rx and hw is linking on, the
3480          * device wouldn't wake up by receiving any packet.
3481          */
3482         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3483                 return true;
3484
3485         /* If the linking down is occurred by nway, the device may miss the
3486          * linking change event. And it wouldn't wake when linking on.
3487          */
3488         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3489                 return true;
3490         else if (!skb_queue_empty(&tp->tx_queue))
3491                 return true;
3492         else
3493                 return false;
3494 }
3495
3496 static int rtl8152_rumtime_suspend(struct r8152 *tp)
3497 {
3498         struct net_device *netdev = tp->netdev;
3499         int ret = 0;
3500
3501         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3502                 u32 rcr = 0;
3503
3504                 if (delay_autosuspend(tp)) {
3505                         ret = -EBUSY;
3506                         goto out1;
3507                 }
3508
3509                 if (netif_carrier_ok(netdev)) {
3510                         u32 ocp_data;
3511
3512                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3513                         ocp_data = rcr & ~RCR_ACPT_ALL;
3514                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3515                         rxdy_gated_en(tp, true);
3516                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3517                                                  PLA_OOB_CTRL);
3518                         if (!(ocp_data & RXFIFO_EMPTY)) {
3519                                 rxdy_gated_en(tp, false);
3520                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3521                                 ret = -EBUSY;
3522                                 goto out1;
3523                         }
3524                 }
3525
3526                 clear_bit(WORK_ENABLE, &tp->flags);
3527                 usb_kill_urb(tp->intr_urb);
3528
3529                 rtl_runtime_suspend_enable(tp, true);
3530
3531                 if (netif_carrier_ok(netdev)) {
3532                         napi_disable(&tp->napi);
3533                         rtl_stop_rx(tp);
3534                         rxdy_gated_en(tp, false);
3535                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3536                         napi_enable(&tp->napi);
3537                 }
3538         }
3539
3540         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3541
3542 out1:
3543         return ret;
3544 }
3545
3546 static int rtl8152_system_suspend(struct r8152 *tp)
3547 {
3548         struct net_device *netdev = tp->netdev;
3549         int ret = 0;
3550
3551         netif_device_detach(netdev);
3552
3553         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3554                 clear_bit(WORK_ENABLE, &tp->flags);
3555                 usb_kill_urb(tp->intr_urb);
3556                 napi_disable(&tp->napi);
3557                 cancel_delayed_work_sync(&tp->schedule);
3558                 tp->rtl_ops.down(tp);
3559                 napi_enable(&tp->napi);
3560         }
3561
3562         return ret;
3563 }
3564
3565 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3566 {
3567         struct r8152 *tp = usb_get_intfdata(intf);
3568         int ret;
3569
3570         mutex_lock(&tp->control);
3571
3572         if (PMSG_IS_AUTO(message))
3573                 ret = rtl8152_rumtime_suspend(tp);
3574         else
3575                 ret = rtl8152_system_suspend(tp);
3576
3577         mutex_unlock(&tp->control);
3578
3579         return ret;
3580 }
3581
3582 static int rtl8152_resume(struct usb_interface *intf)
3583 {
3584         struct r8152 *tp = usb_get_intfdata(intf);
3585
3586         mutex_lock(&tp->control);
3587
3588         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3589                 tp->rtl_ops.init(tp);
3590                 netif_device_attach(tp->netdev);
3591         }
3592
3593         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3594                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3595                         rtl_runtime_suspend_enable(tp, false);
3596                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3597                         napi_disable(&tp->napi);
3598                         set_bit(WORK_ENABLE, &tp->flags);
3599
3600                         if (netif_carrier_ok(tp->netdev)) {
3601                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3602                                         rtl_start_rx(tp);
3603                                 } else {
3604                                         netif_carrier_off(tp->netdev);
3605                                         tp->rtl_ops.disable(tp);
3606                                         netif_info(tp, link, tp->netdev,
3607                                                    "linking down\n");
3608                                 }
3609                         }
3610
3611                         napi_enable(&tp->napi);
3612                 } else {
3613                         tp->rtl_ops.up(tp);
3614                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3615                                           tp->mii.supports_gmii ?
3616                                           SPEED_1000 : SPEED_100,
3617                                           DUPLEX_FULL);
3618                         netif_carrier_off(tp->netdev);
3619                         set_bit(WORK_ENABLE, &tp->flags);
3620                 }
3621                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3622         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3623                 if (tp->netdev->flags & IFF_UP)
3624                         rtl_runtime_suspend_enable(tp, false);
3625                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3626         }
3627
3628         mutex_unlock(&tp->control);
3629
3630         return 0;
3631 }
3632
3633 static int rtl8152_reset_resume(struct usb_interface *intf)
3634 {
3635         struct r8152 *tp = usb_get_intfdata(intf);
3636
3637         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3638         return rtl8152_resume(intf);
3639 }
3640
3641 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3642 {
3643         struct r8152 *tp = netdev_priv(dev);
3644
3645         if (usb_autopm_get_interface(tp->intf) < 0)
3646                 return;
3647
3648         if (!rtl_can_wakeup(tp)) {
3649                 wol->supported = 0;
3650                 wol->wolopts = 0;
3651         } else {
3652                 mutex_lock(&tp->control);
3653                 wol->supported = WAKE_ANY;
3654                 wol->wolopts = __rtl_get_wol(tp);
3655                 mutex_unlock(&tp->control);
3656         }
3657
3658         usb_autopm_put_interface(tp->intf);
3659 }
3660
3661 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3662 {
3663         struct r8152 *tp = netdev_priv(dev);
3664         int ret;
3665
3666         if (!rtl_can_wakeup(tp))
3667                 return -EOPNOTSUPP;
3668
3669         if (wol->wolopts & ~WAKE_ANY)
3670                 return -EINVAL;
3671
3672         ret = usb_autopm_get_interface(tp->intf);
3673         if (ret < 0)
3674                 goto out_set_wol;
3675
3676         mutex_lock(&tp->control);
3677
3678         __rtl_set_wol(tp, wol->wolopts);
3679         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3680
3681         mutex_unlock(&tp->control);
3682
3683         usb_autopm_put_interface(tp->intf);
3684
3685 out_set_wol:
3686         return ret;
3687 }
3688
3689 static u32 rtl8152_get_msglevel(struct net_device *dev)
3690 {
3691         struct r8152 *tp = netdev_priv(dev);
3692
3693         return tp->msg_enable;
3694 }
3695
3696 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3697 {
3698         struct r8152 *tp = netdev_priv(dev);
3699
3700         tp->msg_enable = value;
3701 }
3702
3703 static void rtl8152_get_drvinfo(struct net_device *netdev,
3704                                 struct ethtool_drvinfo *info)
3705 {
3706         struct r8152 *tp = netdev_priv(netdev);
3707
3708         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3709         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3710         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3711 }
3712
3713 static
3714 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3715 {
3716         struct r8152 *tp = netdev_priv(netdev);
3717         int ret;
3718
3719         if (!tp->mii.mdio_read)
3720                 return -EOPNOTSUPP;
3721
3722         ret = usb_autopm_get_interface(tp->intf);
3723         if (ret < 0)
3724                 goto out;
3725
3726         mutex_lock(&tp->control);
3727
3728         ret = mii_ethtool_gset(&tp->mii, cmd);
3729
3730         mutex_unlock(&tp->control);
3731
3732         usb_autopm_put_interface(tp->intf);
3733
3734 out:
3735         return ret;
3736 }
3737
3738 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3739 {
3740         struct r8152 *tp = netdev_priv(dev);
3741         int ret;
3742
3743         ret = usb_autopm_get_interface(tp->intf);
3744         if (ret < 0)
3745                 goto out;
3746
3747         mutex_lock(&tp->control);
3748
3749         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3750
3751         mutex_unlock(&tp->control);
3752
3753         usb_autopm_put_interface(tp->intf);
3754
3755 out:
3756         return ret;
3757 }
3758
3759 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3760         "tx_packets",
3761         "rx_packets",
3762         "tx_errors",
3763         "rx_errors",
3764         "rx_missed",
3765         "align_errors",
3766         "tx_single_collisions",
3767         "tx_multi_collisions",
3768         "rx_unicast",
3769         "rx_broadcast",
3770         "rx_multicast",
3771         "tx_aborted",
3772         "tx_underrun",
3773 };
3774
3775 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3776 {
3777         switch (sset) {
3778         case ETH_SS_STATS:
3779                 return ARRAY_SIZE(rtl8152_gstrings);
3780         default:
3781                 return -EOPNOTSUPP;
3782         }
3783 }
3784
3785 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3786                                       struct ethtool_stats *stats, u64 *data)
3787 {
3788         struct r8152 *tp = netdev_priv(dev);
3789         struct tally_counter tally;
3790
3791         if (usb_autopm_get_interface(tp->intf) < 0)
3792                 return;
3793
3794         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3795
3796         usb_autopm_put_interface(tp->intf);
3797
3798         data[0] = le64_to_cpu(tally.tx_packets);
3799         data[1] = le64_to_cpu(tally.rx_packets);
3800         data[2] = le64_to_cpu(tally.tx_errors);
3801         data[3] = le32_to_cpu(tally.rx_errors);
3802         data[4] = le16_to_cpu(tally.rx_missed);
3803         data[5] = le16_to_cpu(tally.align_errors);
3804         data[6] = le32_to_cpu(tally.tx_one_collision);
3805         data[7] = le32_to_cpu(tally.tx_multi_collision);
3806         data[8] = le64_to_cpu(tally.rx_unicast);
3807         data[9] = le64_to_cpu(tally.rx_broadcast);
3808         data[10] = le32_to_cpu(tally.rx_multicast);
3809         data[11] = le16_to_cpu(tally.tx_aborted);
3810         data[12] = le16_to_cpu(tally.tx_underrun);
3811 }
3812
3813 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3814 {
3815         switch (stringset) {
3816         case ETH_SS_STATS:
3817                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3818                 break;
3819         }
3820 }
3821
3822 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3823 {
3824         u32 ocp_data, lp, adv, supported = 0;
3825         u16 val;
3826
3827         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3828         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3829
3830         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3831         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3832
3833         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3834         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3835
3836         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3837         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3838
3839         eee->eee_enabled = !!ocp_data;
3840         eee->eee_active = !!(supported & adv & lp);
3841         eee->supported = supported;
3842         eee->advertised = adv;
3843         eee->lp_advertised = lp;
3844
3845         return 0;
3846 }
3847
3848 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3849 {
3850         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3851
3852         r8152_eee_en(tp, eee->eee_enabled);
3853
3854         if (!eee->eee_enabled)
3855                 val = 0;
3856
3857         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3858
3859         return 0;
3860 }
3861
3862 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3863 {
3864         u32 ocp_data, lp, adv, supported = 0;
3865         u16 val;
3866
3867         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3868         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3869
3870         val = ocp_reg_read(tp, OCP_EEE_ADV);
3871         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3872
3873         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3874         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3875
3876         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3877         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3878
3879         eee->eee_enabled = !!ocp_data;
3880         eee->eee_active = !!(supported & adv & lp);
3881         eee->supported = supported;
3882         eee->advertised = adv;
3883         eee->lp_advertised = lp;
3884
3885         return 0;
3886 }
3887
3888 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3889 {
3890         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3891
3892         r8153_eee_en(tp, eee->eee_enabled);
3893
3894         if (!eee->eee_enabled)
3895                 val = 0;
3896
3897         ocp_reg_write(tp, OCP_EEE_ADV, val);
3898
3899         return 0;
3900 }
3901
3902 static int
3903 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3904 {
3905         struct r8152 *tp = netdev_priv(net);
3906         int ret;
3907
3908         ret = usb_autopm_get_interface(tp->intf);
3909         if (ret < 0)
3910                 goto out;
3911
3912         mutex_lock(&tp->control);
3913
3914         ret = tp->rtl_ops.eee_get(tp, edata);
3915
3916         mutex_unlock(&tp->control);
3917
3918         usb_autopm_put_interface(tp->intf);
3919
3920 out:
3921         return ret;
3922 }
3923
3924 static int
3925 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3926 {
3927         struct r8152 *tp = netdev_priv(net);
3928         int ret;
3929
3930         ret = usb_autopm_get_interface(tp->intf);
3931         if (ret < 0)
3932                 goto out;
3933
3934         mutex_lock(&tp->control);
3935
3936         ret = tp->rtl_ops.eee_set(tp, edata);
3937         if (!ret)
3938                 ret = mii_nway_restart(&tp->mii);
3939
3940         mutex_unlock(&tp->control);
3941
3942         usb_autopm_put_interface(tp->intf);
3943
3944 out:
3945         return ret;
3946 }
3947
3948 static int rtl8152_nway_reset(struct net_device *dev)
3949 {
3950         struct r8152 *tp = netdev_priv(dev);
3951         int ret;
3952
3953         ret = usb_autopm_get_interface(tp->intf);
3954         if (ret < 0)
3955                 goto out;
3956
3957         mutex_lock(&tp->control);
3958
3959         ret = mii_nway_restart(&tp->mii);
3960
3961         mutex_unlock(&tp->control);
3962
3963         usb_autopm_put_interface(tp->intf);
3964
3965 out:
3966         return ret;
3967 }
3968
3969 static int rtl8152_get_coalesce(struct net_device *netdev,
3970                                 struct ethtool_coalesce *coalesce)
3971 {
3972         struct r8152 *tp = netdev_priv(netdev);
3973
3974         switch (tp->version) {
3975         case RTL_VER_01:
3976         case RTL_VER_02:
3977                 return -EOPNOTSUPP;
3978         default:
3979                 break;
3980         }
3981
3982         coalesce->rx_coalesce_usecs = tp->coalesce;
3983
3984         return 0;
3985 }
3986
3987 static int rtl8152_set_coalesce(struct net_device *netdev,
3988                                 struct ethtool_coalesce *coalesce)
3989 {
3990         struct r8152 *tp = netdev_priv(netdev);
3991         int ret;
3992
3993         switch (tp->version) {
3994         case RTL_VER_01:
3995         case RTL_VER_02:
3996                 return -EOPNOTSUPP;
3997         default:
3998                 break;
3999         }
4000
4001         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4002                 return -EINVAL;
4003
4004         ret = usb_autopm_get_interface(tp->intf);
4005         if (ret < 0)
4006                 return ret;
4007
4008         mutex_lock(&tp->control);
4009
4010         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4011                 tp->coalesce = coalesce->rx_coalesce_usecs;
4012
4013                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4014                         r8153_set_rx_early_timeout(tp);
4015         }
4016
4017         mutex_unlock(&tp->control);
4018
4019         usb_autopm_put_interface(tp->intf);
4020
4021         return ret;
4022 }
4023
4024 static struct ethtool_ops ops = {
4025         .get_drvinfo = rtl8152_get_drvinfo,
4026         .get_settings = rtl8152_get_settings,
4027         .set_settings = rtl8152_set_settings,
4028         .get_link = ethtool_op_get_link,
4029         .nway_reset = rtl8152_nway_reset,
4030         .get_msglevel = rtl8152_get_msglevel,
4031         .set_msglevel = rtl8152_set_msglevel,
4032         .get_wol = rtl8152_get_wol,
4033         .set_wol = rtl8152_set_wol,
4034         .get_strings = rtl8152_get_strings,
4035         .get_sset_count = rtl8152_get_sset_count,
4036         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4037         .get_coalesce = rtl8152_get_coalesce,
4038         .set_coalesce = rtl8152_set_coalesce,
4039         .get_eee = rtl_ethtool_get_eee,
4040         .set_eee = rtl_ethtool_set_eee,
4041 };
4042
4043 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4044 {
4045         struct r8152 *tp = netdev_priv(netdev);
4046         struct mii_ioctl_data *data = if_mii(rq);
4047         int res;
4048
4049         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4050                 return -ENODEV;
4051
4052         res = usb_autopm_get_interface(tp->intf);
4053         if (res < 0)
4054                 goto out;
4055
4056         switch (cmd) {
4057         case SIOCGMIIPHY:
4058                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4059                 break;
4060
4061         case SIOCGMIIREG:
4062                 mutex_lock(&tp->control);
4063                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4064                 mutex_unlock(&tp->control);
4065                 break;
4066
4067         case SIOCSMIIREG:
4068                 if (!capable(CAP_NET_ADMIN)) {
4069                         res = -EPERM;
4070                         break;
4071                 }
4072                 mutex_lock(&tp->control);
4073                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4074                 mutex_unlock(&tp->control);
4075                 break;
4076
4077         default:
4078                 res = -EOPNOTSUPP;
4079         }
4080
4081         usb_autopm_put_interface(tp->intf);
4082
4083 out:
4084         return res;
4085 }
4086
4087 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4088 {
4089         struct r8152 *tp = netdev_priv(dev);
4090         int ret;
4091
4092         switch (tp->version) {
4093         case RTL_VER_01:
4094         case RTL_VER_02:
4095                 return eth_change_mtu(dev, new_mtu);
4096         default:
4097                 break;
4098         }
4099
4100         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4101                 return -EINVAL;
4102
4103         ret = usb_autopm_get_interface(tp->intf);
4104         if (ret < 0)
4105                 return ret;
4106
4107         mutex_lock(&tp->control);
4108
4109         dev->mtu = new_mtu;
4110
4111         if (netif_running(dev) && netif_carrier_ok(dev))
4112                 r8153_set_rx_early_size(tp);
4113
4114         mutex_unlock(&tp->control);
4115
4116         usb_autopm_put_interface(tp->intf);
4117
4118         return ret;
4119 }
4120
4121 static const struct net_device_ops rtl8152_netdev_ops = {
4122         .ndo_open               = rtl8152_open,
4123         .ndo_stop               = rtl8152_close,
4124         .ndo_do_ioctl           = rtl8152_ioctl,
4125         .ndo_start_xmit         = rtl8152_start_xmit,
4126         .ndo_tx_timeout         = rtl8152_tx_timeout,
4127         .ndo_set_features       = rtl8152_set_features,
4128         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4129         .ndo_set_mac_address    = rtl8152_set_mac_address,
4130         .ndo_change_mtu         = rtl8152_change_mtu,
4131         .ndo_validate_addr      = eth_validate_addr,
4132         .ndo_features_check     = rtl8152_features_check,
4133 };
4134
4135 static void r8152b_get_version(struct r8152 *tp)
4136 {
4137         u32     ocp_data;
4138         u16     version;
4139
4140         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4141         version = (u16)(ocp_data & VERSION_MASK);
4142
4143         switch (version) {
4144         case 0x4c00:
4145                 tp->version = RTL_VER_01;
4146                 break;
4147         case 0x4c10:
4148                 tp->version = RTL_VER_02;
4149                 break;
4150         case 0x5c00:
4151                 tp->version = RTL_VER_03;
4152                 tp->mii.supports_gmii = 1;
4153                 break;
4154         case 0x5c10:
4155                 tp->version = RTL_VER_04;
4156                 tp->mii.supports_gmii = 1;
4157                 break;
4158         case 0x5c20:
4159                 tp->version = RTL_VER_05;
4160                 tp->mii.supports_gmii = 1;
4161                 break;
4162         case 0x5c30:
4163                 tp->version = RTL_VER_06;
4164                 tp->mii.supports_gmii = 1;
4165                 break;
4166         default:
4167                 netif_info(tp, probe, tp->netdev,
4168                            "Unknown version 0x%04x\n", version);
4169                 break;
4170         }
4171 }
4172
4173 static void rtl8152_unload(struct r8152 *tp)
4174 {
4175         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4176                 return;
4177
4178         if (tp->version != RTL_VER_01)
4179                 r8152_power_cut_en(tp, true);
4180 }
4181
4182 static void rtl8153_unload(struct r8152 *tp)
4183 {
4184         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4185                 return;
4186
4187         r8153_power_cut_en(tp, false);
4188 }
4189
4190 static int rtl_ops_init(struct r8152 *tp)
4191 {
4192         struct rtl_ops *ops = &tp->rtl_ops;
4193         int ret = 0;
4194
4195         switch (tp->version) {
4196         case RTL_VER_01:
4197         case RTL_VER_02:
4198                 ops->init               = r8152b_init;
4199                 ops->enable             = rtl8152_enable;
4200                 ops->disable            = rtl8152_disable;
4201                 ops->up                 = rtl8152_up;
4202                 ops->down               = rtl8152_down;
4203                 ops->unload             = rtl8152_unload;
4204                 ops->eee_get            = r8152_get_eee;
4205                 ops->eee_set            = r8152_set_eee;
4206                 ops->in_nway            = rtl8152_in_nway;
4207                 break;
4208
4209         case RTL_VER_03:
4210         case RTL_VER_04:
4211         case RTL_VER_05:
4212         case RTL_VER_06:
4213                 ops->init               = r8153_init;
4214                 ops->enable             = rtl8153_enable;
4215                 ops->disable            = rtl8153_disable;
4216                 ops->up                 = rtl8153_up;
4217                 ops->down               = rtl8153_down;
4218                 ops->unload             = rtl8153_unload;
4219                 ops->eee_get            = r8153_get_eee;
4220                 ops->eee_set            = r8153_set_eee;
4221                 ops->in_nway            = rtl8153_in_nway;
4222                 break;
4223
4224         default:
4225                 ret = -ENODEV;
4226                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4227                 break;
4228         }
4229
4230         return ret;
4231 }
4232
4233 static int rtl8152_probe(struct usb_interface *intf,
4234                          const struct usb_device_id *id)
4235 {
4236         struct usb_device *udev = interface_to_usbdev(intf);
4237         struct r8152 *tp;
4238         struct net_device *netdev;
4239         int ret;
4240
4241         if (udev->actconfig->desc.bConfigurationValue != 1) {
4242                 usb_driver_set_configuration(udev, 1);
4243                 return -ENODEV;
4244         }
4245
4246         if (intf->cur_altsetting->desc.bNumEndpoints < 3)
4247                 return -ENODEV;
4248
4249         usb_reset_device(udev);
4250         netdev = alloc_etherdev(sizeof(struct r8152));
4251         if (!netdev) {
4252                 dev_err(&intf->dev, "Out of memory\n");
4253                 return -ENOMEM;
4254         }
4255
4256         SET_NETDEV_DEV(netdev, &intf->dev);
4257         tp = netdev_priv(netdev);
4258         tp->msg_enable = 0x7FFF;
4259
4260         tp->udev = udev;
4261         tp->netdev = netdev;
4262         tp->intf = intf;
4263
4264         r8152b_get_version(tp);
4265         ret = rtl_ops_init(tp);
4266         if (ret)
4267                 goto out;
4268
4269         mutex_init(&tp->control);
4270         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4271
4272         netdev->netdev_ops = &rtl8152_netdev_ops;
4273         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4274
4275         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4276                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4277                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4278                             NETIF_F_HW_VLAN_CTAG_TX;
4279         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4280                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4281                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4282                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4283         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4284                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4285                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4286
4287         if (tp->version == RTL_VER_01) {
4288                 netdev->features &= ~NETIF_F_RXCSUM;
4289                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4290         }
4291
4292         netdev->ethtool_ops = &ops;
4293         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4294
4295         tp->mii.dev = netdev;
4296         tp->mii.mdio_read = read_mii_word;
4297         tp->mii.mdio_write = write_mii_word;
4298         tp->mii.phy_id_mask = 0x3f;
4299         tp->mii.reg_num_mask = 0x1f;
4300         tp->mii.phy_id = R8152_PHY_ID;
4301
4302         switch (udev->speed) {
4303         case USB_SPEED_SUPER:
4304                 tp->coalesce = COALESCE_SUPER;
4305                 break;
4306         case USB_SPEED_HIGH:
4307                 tp->coalesce = COALESCE_HIGH;
4308                 break;
4309         default:
4310                 tp->coalesce = COALESCE_SLOW;
4311                 break;
4312         }
4313
4314         intf->needs_remote_wakeup = 1;
4315
4316         tp->rtl_ops.init(tp);
4317         set_ethernet_addr(tp);
4318
4319         usb_set_intfdata(intf, tp);
4320         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4321
4322         ret = register_netdev(netdev);
4323         if (ret != 0) {
4324                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4325                 goto out1;
4326         }
4327
4328         if (!rtl_can_wakeup(tp))
4329                 __rtl_set_wol(tp, 0);
4330
4331         tp->saved_wolopts = __rtl_get_wol(tp);
4332         if (tp->saved_wolopts)
4333                 device_set_wakeup_enable(&udev->dev, true);
4334         else
4335                 device_set_wakeup_enable(&udev->dev, false);
4336
4337         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4338
4339         return 0;
4340
4341 out1:
4342         netif_napi_del(&tp->napi);
4343         usb_set_intfdata(intf, NULL);
4344 out:
4345         free_netdev(netdev);
4346         return ret;
4347 }
4348
4349 static void rtl8152_disconnect(struct usb_interface *intf)
4350 {
4351         struct r8152 *tp = usb_get_intfdata(intf);
4352
4353         usb_set_intfdata(intf, NULL);
4354         if (tp) {
4355                 struct usb_device *udev = tp->udev;
4356
4357                 if (udev->state == USB_STATE_NOTATTACHED)
4358                         set_bit(RTL8152_UNPLUG, &tp->flags);
4359
4360                 netif_napi_del(&tp->napi);
4361                 unregister_netdev(tp->netdev);
4362                 tp->rtl_ops.unload(tp);
4363                 free_netdev(tp->netdev);
4364         }
4365 }
4366
4367 #define REALTEK_USB_DEVICE(vend, prod)  \
4368         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4369                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4370         .idVendor = (vend), \
4371         .idProduct = (prod), \
4372         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4373 }, \
4374 { \
4375         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4376                        USB_DEVICE_ID_MATCH_DEVICE, \
4377         .idVendor = (vend), \
4378         .idProduct = (prod), \
4379         .bInterfaceClass = USB_CLASS_COMM, \
4380         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4381         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4382
4383 /* table of devices that work with this driver */
4384 static struct usb_device_id rtl8152_table[] = {
4385         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4386         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4387         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4388         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4389         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4390         {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
4391         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4392         {}
4393 };
4394
4395 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4396
4397 static struct usb_driver rtl8152_driver = {
4398         .name =         MODULENAME,
4399         .id_table =     rtl8152_table,
4400         .probe =        rtl8152_probe,
4401         .disconnect =   rtl8152_disconnect,
4402         .suspend =      rtl8152_suspend,
4403         .resume =       rtl8152_resume,
4404         .reset_resume = rtl8152_reset_resume,
4405         .pre_reset =    rtl8152_pre_reset,
4406         .post_reset =   rtl8152_post_reset,
4407         .supports_autosuspend = 1,
4408         .disable_hub_initiated_lpm = 1,
4409 };
4410
4411 module_usb_driver(rtl8152_driver);
4412
4413 MODULE_AUTHOR(DRIVER_AUTHOR);
4414 MODULE_DESCRIPTION(DRIVER_DESC);
4415 MODULE_LICENSE("GPL");