drivers/net/wireless/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/platform_data/brcmfmac-sdio.h>
  37 #include <linux/moduleparam.h>
  38 #include <asm/unaligned.h>
  39 #include <defs.h>
  40 #include <brcmu_wifi.h>
  41 #include <brcmu_utils.h>
  42 #include <brcm_hw_ids.h>
  43 #include <soc.h>
  44 #include "sdio.h"
  45 #include "chip.h"
  46 #include "firmware.h"
  47
  48 #define DCMD_RESP_TIMEOUT       2000    /* In milli second */
  49 #define CTL_DONE_TIMEOUT        2000    /* In milli second */
  50
  51 #ifdef DEBUG
  52
  53 #define BRCMF_TRAP_INFO_SIZE    80
  54
  55 #define CBUF_LEN        (128)
  56
  57 /* Device console log buffer state */
  58 #define CONSOLE_BUFFER_MAX      2024
  59
  60 struct rte_log_le {
  61         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  62         __le32 buf_size;
  63         __le32 idx;
  64         char *_buf_compat;      /* Redundant pointer for backward compat. */
  65 };
  66
  67 struct rte_console {
  68         /* Virtual UART
  69          * When there is no UART (e.g. Quickturn),
  70          * the host should write a complete
  71          * input line directly into cbuf and then write
  72          * the length into vcons_in.
  73          * This may also be used when there is a real UART
  74          * (at risk of conflicting with
  75          * the real UART).  vcons_out is currently unused.
  76          */
  77         uint vcons_in;
  78         uint vcons_out;
  79
  80         /* Output (logging) buffer
  81          * Console output is written to a ring buffer log_buf at index log_idx.
  82          * The host may read the output when it sees log_idx advance.
  83          * Output will be lost if the output wraps around faster than the host
  84          * polls.
  85          */
  86         struct rte_log_le log_le;
  87
  88         /* Console input line buffer
  89          * Characters are read one at a time into cbuf
  90          * until <CR> is received, then
  91          * the buffer is processed as a command line.
  92          * Also used for virtual UART.
  93          */
  94         uint cbuf_idx;
  95         char cbuf[CBUF_LEN];
  96 };
  97
  98 #endif                          /* DEBUG */
  99 #include <chipcommon.h>
 100
 101 #include "bus.h"
 102 #include "debug.h"
 103 #include "tracepoint.h"
 104
 105 #define TXQLEN          2048    /* bulk tx queue length */
 106 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 107 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 108 #define PRIOMASK        7
 109
 110 #define TXRETRIES       2       /* # of retries for tx frames */
 111
 112 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 113                                  one scheduling */
 114
 115 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 116                                  one scheduling */
 117
 118 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 119
 120 #define MEMBLOCK        2048    /* Block size used for downloading
 121                                  of dongle image */
 122 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 123                                  biggest possible glom */
 124
 125 #define BRCMF_FIRSTREAD (1 << 6)
 126
 127 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 128
 129 /* SBSDIO_DEVICE_CTL */
 130
 131 /* 1: device will assert busy signal when receiving CMD53 */
 132 #define SBSDIO_DEVCTL_SETBUSY           0x01
 133 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 134 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 135 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 136 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 137 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 138  * sdio bus power cycle to clear (rev 9) */
 139 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 140 /* Force SD->SB reset mapping (rev 11) */
 141 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 142 /*   Determined by CoreControl bit */
 143 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 144 /*   Force backplane reset */
 145 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 146 /*   Force no backplane reset */
 147 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 148
 149 /* direct(mapped) cis space */
 150
 151 /* MAPPED common CIS address */
 152 #define SBSDIO_CIS_BASE_COMMON          0x1000
 153 /* maximum bytes in one CIS */
 154 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 155 /* cis offset addr is < 17 bits */
 156 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 157
 158 /* manfid tuple length, include tuple, link bytes */
 159 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 160
 161 #define CORE_BUS_REG(base, field) \
 162                 (base + offsetof(struct sdpcmd_regs, field))
 163
 164 /* SDIO function 1 register CHIPCLKCSR */
 165 /* Force ALP request to backplane */
 166 #define SBSDIO_FORCE_ALP                0x01
 167 /* Force HT request to backplane */
 168 #define SBSDIO_FORCE_HT                 0x02
 169 /* Force ILP request to backplane */
 170 #define SBSDIO_FORCE_ILP                0x04
 171 /* Make ALP ready (power up xtal) */
 172 #define SBSDIO_ALP_AVAIL_REQ            0x08
 173 /* Make HT ready (power up PLL) */
 174 #define SBSDIO_HT_AVAIL_REQ             0x10
 175 /* Squelch clock requests from HW */
 176 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 177 /* Status: ALP is ready */
 178 #define SBSDIO_ALP_AVAIL                0x40
 179 /* Status: HT is ready */
 180 #define SBSDIO_HT_AVAIL                 0x80
 181 #define SBSDIO_CSR_MASK                 0x1F
 182 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 183 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 184 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 185 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 186 #define SBSDIO_CLKAV(regval, alponly) \
 187         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 188
 189 /* intstatus */
 190 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 191 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 192 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 193 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 194 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 195 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 196 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 197 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 198 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 199 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 200 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 201 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 202 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 203 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 204 #define I_PC            (1 << 10)       /* descriptor error */
 205 #define I_PD            (1 << 11)       /* data error */
 206 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 207 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 208 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 209 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 210 #define I_RI            (1 << 16)       /* Receive Interrupt */
 211 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 212 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 213 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 214 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 215 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 216 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 217 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 218 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 219 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 220 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 221 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 222 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 223
 224 /* corecontrol */
 225 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 226 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 227 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 228 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 229 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 230 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 231
 232 /* SDA_FRAMECTRL */
 233 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 234 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 235 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 236 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 237
 238 /*
 239  * Software allocation of To SB Mailbox resources
 240  */
 241
 242 /* tosbmailbox bits corresponding to intstatus bits */
 243 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 244 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 245 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 246 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 247
 248 /* tosbmailboxdata */
 249 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 250
 251 /*
 252  * Software allocation of To Host Mailbox resources
 253  */
 254
 255 /* intstatus bits */
 256 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 257 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 258 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 259 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 260
 261 /* tohostmailboxdata */
 262 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 263 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 264 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 265 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 266
 267 #define HMB_DATA_FCDATA_MASK    0xff000000
 268 #define HMB_DATA_FCDATA_SHIFT   24
 269
 270 #define HMB_DATA_VERSION_MASK   0x00ff0000
 271 #define HMB_DATA_VERSION_SHIFT  16
 272
 273 /*
 274  * Software-defined protocol header
 275  */
 276
 277 /* Current protocol version */
 278 #define SDPCM_PROT_VERSION      4
 279
 280 /*
 281  * Shared structure between dongle and the host.
 282  * The structure contains pointers to trap or assert information.
 283  */
 284 #define SDPCM_SHARED_VERSION       0x0003
 285 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 286 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 287 #define SDPCM_SHARED_ASSERT        0x0200
 288 #define SDPCM_SHARED_TRAP          0x0400
 289
 290 /* Space for header read, limit for data packets */
 291 #define MAX_HDR_READ    (1 << 6)
 292 #define MAX_RX_DATASZ   2048
 293
 294 /* Bump up limit on waiting for HT to account for first startup;
 295  * if the image is doing a CRC calculation before programming the PMU
 296  * for HT availability, it could take a couple hundred ms more, so
 297  * max out at a 1 second (1000000us).
 298  */
 299 #undef PMU_MAX_TRANSITION_DLY
 300 #define PMU_MAX_TRANSITION_DLY 1000000
 301
 302 /* Value for ChipClockCSR during initial setup */
 303 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 304                                         SBSDIO_ALP_AVAIL_REQ)
 305
 306 /* Flags for SDH calls */
 307 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 308
 309 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 310                                          * when idle
 311                                          */
 312 #define BRCMF_IDLE_INTERVAL     1
 313
 314 #define KSO_WAIT_US 50
 315 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 316
 317 /*
 318  * Conversion of 802.1D priority to precedence level
 319  */
 320 static uint prio2prec(u32 prio)
 321 {
 322         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 323                (prio^2) : prio;
 324 }
 325
 326 #ifdef DEBUG
 327 /* Device console log buffer state */
 328 struct brcmf_console {
 329         uint count;             /* Poll interval msec counter */
 330         uint log_addr;          /* Log struct address (fixed) */
 331         struct rte_log_le log_le;       /* Log struct (host copy) */
 332         uint bufsize;           /* Size of log buffer */
 333         u8 *buf;                /* Log buffer (host copy) */
 334         uint last;              /* Last buffer read index */
 335 };
 336
 337 struct brcmf_trap_info {
 338         __le32          type;
 339         __le32          epc;
 340         __le32          cpsr;
 341         __le32          spsr;
 342         __le32          r0;     /* a1 */
 343         __le32          r1;     /* a2 */
 344         __le32          r2;     /* a3 */
 345         __le32          r3;     /* a4 */
 346         __le32          r4;     /* v1 */
 347         __le32          r5;     /* v2 */
 348         __le32          r6;     /* v3 */
 349         __le32          r7;     /* v4 */
 350         __le32          r8;     /* v5 */
 351         __le32          r9;     /* sb/v6 */
 352         __le32          r10;    /* sl/v7 */
 353         __le32          r11;    /* fp/v8 */
 354         __le32          r12;    /* ip */
 355         __le32          r13;    /* sp */
 356         __le32          r14;    /* lr */
 357         __le32          pc;     /* r15 */
 358 };
 359 #endif                          /* DEBUG */
 360
 361 struct sdpcm_shared {
 362         u32 flags;
 363         u32 trap_addr;
 364         u32 assert_exp_addr;
 365         u32 assert_file_addr;
 366         u32 assert_line;
 367         u32 console_addr;       /* Address of struct rte_console */
 368         u32 msgtrace_addr;
 369         u8 tag[32];
 370         u32 brpt_addr;
 371 };
 372
 373 struct sdpcm_shared_le {
 374         __le32 flags;
 375         __le32 trap_addr;
 376         __le32 assert_exp_addr;
 377         __le32 assert_file_addr;
 378         __le32 assert_line;
 379         __le32 console_addr;    /* Address of struct rte_console */
 380         __le32 msgtrace_addr;
 381         u8 tag[32];
 382         __le32 brpt_addr;
 383 };
 384
 385 /* dongle SDIO bus specific header info */
 386 struct brcmf_sdio_hdrinfo {
 387         u8 seq_num;
 388         u8 channel;
 389         u16 len;
 390         u16 len_left;
 391         u16 len_nxtfrm;
 392         u8 dat_offset;
 393         bool lastfrm;
 394         u16 tail_pad;
 395 };
 396
 397 /*
 398  * hold counter variables
 399  */
 400 struct brcmf_sdio_count {
 401         uint intrcount;         /* Count of device interrupt callbacks */
 402         uint lastintrs;         /* Count as of last watchdog timer */
 403         uint pollcnt;           /* Count of active polls */
 404         uint regfails;          /* Count of R_REG failures */
 405         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 406         uint fcqueued;          /* Tx packets that got queued */
 407         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 408         uint rx_toolong;        /* Receive frames too long to receive */
 409         uint rxc_errors;        /* SDIO errors when reading control frames */
 410         uint rx_hdrfail;        /* SDIO errors on header reads */
 411         uint rx_badhdr;         /* Bad received headers (roosync?) */
 412         uint rx_badseq;         /* Mismatched rx sequence number */
 413         uint fc_rcvd;           /* Number of flow-control events received */
 414         uint fc_xoff;           /* Number which turned on flow-control */
 415         uint fc_xon;            /* Number which turned off flow-control */
 416         uint rxglomfail;        /* Failed deglom attempts */
 417         uint rxglomframes;      /* Number of glom frames (superframes) */
 418         uint rxglompkts;        /* Number of packets from glom frames */
 419         uint f2rxhdrs;          /* Number of header reads */
 420         uint f2rxdata;          /* Number of frame data reads */
 421         uint f2txdata;          /* Number of f2 frame writes */
 422         uint f1regdata;         /* Number of f1 register accesses */
 423         uint tickcnt;           /* Number of watchdog been schedule */
 424         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 425         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 426         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 427         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 428         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 429 };
 430
 431 /* misc chip info needed by some of the routines */
 432 /* Private data for SDIO bus interaction */
 433 struct brcmf_sdio {
 434         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 435         struct brcmf_chip *ci;  /* Chip info struct */
 436
 437         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 438         atomic_t intstatus;     /* Intstatus bits (events) pending */
 439         atomic_t fcstate;       /* State of dongle flow-control */
 440
 441         uint blocksize;         /* Block size of SDIO transfers */
 442         uint roundup;           /* Max roundup limit */
 443
 444         struct pktq txq;        /* Queue length used for flow-control */
 445         u8 flowcontrol; /* per prio flow control bitmask */
 446         u8 tx_seq;              /* Transmit sequence number (next) */
 447         u8 tx_max;              /* Maximum transmit sequence allowed */
 448
 449         u8 *hdrbuf;             /* buffer for handling rx frame */
 450         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 451         u8 rx_seq;              /* Receive sequence number (expected) */
 452         struct brcmf_sdio_hdrinfo cur_read;
 453                                 /* info of current read frame */
 454         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 455         bool rxpending;         /* Data frame pending in dongle */
 456
 457         uint rxbound;           /* Rx frames to read before resched */
 458         uint txbound;           /* Tx frames to send before resched */
 459         uint txminmax;
 460
 461         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 462         struct sk_buff_head glom; /* Packet list for glommed superframe */
 463         uint glomerr;           /* Glom packet read errors */
 464
 465         u8 *rxbuf;              /* Buffer for receiving control packets */
 466         uint rxblen;            /* Allocated length of rxbuf */
 467         u8 *rxctl;              /* Aligned pointer into rxbuf */
 468         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 469         uint rxlen;             /* Length of valid data in buffer */
 470         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 471
 472         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 473
 474         bool intr;              /* Use interrupts */
 475         bool poll;              /* Use polling */
 476         atomic_t ipend;         /* Device interrupt is pending */
 477         uint spurious;          /* Count of spurious interrupts */
 478         uint pollrate;          /* Ticks between device polls */
 479         uint polltick;          /* Tick counter */
 480
 481 #ifdef DEBUG
 482         uint console_interval;
 483         struct brcmf_console console;   /* Console output polling support */
 484         uint console_addr;      /* Console address from shared struct */
 485 #endif                          /* DEBUG */
 486
 487         uint clkstate;          /* State of sd and backplane clock(s) */
 488         s32 idletime;           /* Control for activity timeout */
 489         s32 idlecount;          /* Activity timeout counter */
 490         s32 idleclock;          /* How to set bus driver when idle */
 491         bool rxflow_mode;       /* Rx flow control mode */
 492         bool rxflow;            /* Is rx flow control on */
 493         bool alp_only;          /* Don't use HT clock (ALP only) */
 494
 495         u8 *ctrl_frame_buf;
 496         u16 ctrl_frame_len;
 497         bool ctrl_frame_stat;
 498         int ctrl_frame_err;
 499
 500         spinlock_t txq_lock;            /* protect bus->txq */
 501         wait_queue_head_t ctrl_wait;
 502         wait_queue_head_t dcmd_resp_wait;
 503
 504         struct timer_list timer;
 505         struct completion watchdog_wait;
 506         struct task_struct *watchdog_tsk;
 507         bool wd_timer_valid;
 508         uint save_ms;
 509
 510         struct workqueue_struct *brcmf_wq;
 511         struct work_struct datawork;
 512         bool dpc_triggered;
 513         bool dpc_running;
 514
 515         bool txoff;             /* Transmit flow-controlled */
 516         struct brcmf_sdio_count sdcnt;
 517         bool sr_enabled; /* SaveRestore enabled */
 518         bool sleeping;
 519
 520         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 521         bool txglom;            /* host tx glomming enable flag */
 522         u16 head_align;         /* buffer pointer alignment */
 523         u16 sgentry_align;      /* scatter-gather buffer alignment */
 524 };
 525
 526 /* clkstate */
 527 #define CLK_NONE        0
 528 #define CLK_SDONLY      1
 529 #define CLK_PENDING     2
 530 #define CLK_AVAIL       3
 531
 532 #ifdef DEBUG
 533 static int qcount[NUMPRIO];
 534 #endif                          /* DEBUG */
 535
 536 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 537
 538 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 539
 540 /* Retry count for register access failures */
 541 static const uint retry_limit = 2;
 542
 543 /* Limit on rounding up frames */
 544 static const uint max_roundup = 512;
 545
 546 #define ALIGNMENT  4
 547
 548 enum brcmf_sdio_frmtype {
 549         BRCMF_SDIO_FT_NORMAL,
 550         BRCMF_SDIO_FT_SUPER,
 551         BRCMF_SDIO_FT_SUB,
 552 };
 553
 554 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 555
 556 /* SDIO Pad drive strength to select value mappings */
 557 struct sdiod_drive_str {
 558         u8 strength;    /* Pad Drive Strength in mA */
 559         u8 sel;         /* Chip-specific select value */
 560 };
 561
 562 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 563 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 564         {32, 0x6},
 565         {26, 0x7},
 566         {22, 0x4},
 567         {16, 0x5},
 568         {12, 0x2},
 569         {8, 0x3},
 570         {4, 0x0},
 571         {0, 0x1}
 572 };
 573
 574 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 575 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 576         {6, 0x7},
 577         {5, 0x6},
 578         {4, 0x5},
 579         {3, 0x4},
 580         {2, 0x2},
 581         {1, 0x1},
 582         {0, 0x0}
 583 };
 584
 585 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 586 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 587         {3, 0x3},
 588         {2, 0x2},
 589         {1, 0x1},
 590         {0, 0x0} };
 591
 592 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 593 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 594         {16, 0x7},
 595         {12, 0x5},
 596         {8,  0x3},
 597         {4,  0x1}
 598 };
 599
 600 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 601 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 602 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 603 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 604 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 605 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 606 #define BCM43241B5_FIRMWARE_NAME        "brcm/brcmfmac43241b5-sdio.bin"
 607 #define BCM43241B5_NVRAM_NAME           "brcm/brcmfmac43241b5-sdio.txt"
 608 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 609 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 610 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 611 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 612 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 613 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 614 #define BCM43340_FIRMWARE_NAME          "brcm/brcmfmac43340-sdio.bin"
 615 #define BCM43340_NVRAM_NAME             "brcm/brcmfmac43340-sdio.txt"
 616 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 617 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 618 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 619 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 620 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 621 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 622 #define BCM43430_FIRMWARE_NAME          "brcm/brcmfmac43430-sdio.bin"
 623 #define BCM43430_NVRAM_NAME             "brcm/brcmfmac43430-sdio.txt"
 624 #define BCM43455_FIRMWARE_NAME          "brcm/brcmfmac43455-sdio.bin"
 625 #define BCM43455_NVRAM_NAME             "brcm/brcmfmac43455-sdio.txt"
 626 #define BCM4354_FIRMWARE_NAME           "brcm/brcmfmac4354-sdio.bin"
 627 #define BCM4354_NVRAM_NAME              "brcm/brcmfmac4354-sdio.txt"
 628
 629 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 630 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 631 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 632 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 633 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 634 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 635 MODULE_FIRMWARE(BCM43241B5_FIRMWARE_NAME);
 636 MODULE_FIRMWARE(BCM43241B5_NVRAM_NAME);
 637 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 638 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 639 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 640 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 641 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 642 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 643 MODULE_FIRMWARE(BCM43340_FIRMWARE_NAME);
 644 MODULE_FIRMWARE(BCM43340_NVRAM_NAME);
 645 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 646 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 647 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 648 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 649 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 650 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 651 MODULE_FIRMWARE(BCM43430_FIRMWARE_NAME);
 652 MODULE_FIRMWARE(BCM43430_NVRAM_NAME);
 653 MODULE_FIRMWARE(BCM43455_FIRMWARE_NAME);
 654 MODULE_FIRMWARE(BCM43455_NVRAM_NAME);
 655 MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
 656 MODULE_FIRMWARE(BCM4354_NVRAM_NAME);
 657
 658 struct brcmf_firmware_names {
 659         u32 chipid;
 660         u32 revmsk;
 661         const char *bin;
 662         const char *nv;
 663 };
 664
 665 enum brcmf_firmware_type {
 666         BRCMF_FIRMWARE_BIN,
 667         BRCMF_FIRMWARE_NVRAM
 668 };
 669
 670 #define BRCMF_FIRMWARE_NVRAM(name) \
 671         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 672
 673 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 674         { BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 675         { BRCM_CC_43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 676         { BRCM_CC_43241_CHIP_ID, 0x00000020, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 677         { BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, BRCMF_FIRMWARE_NVRAM(BCM43241B5) },
 678         { BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 679         { BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 680         { BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 681         { BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43340) },
 682         { BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 683         { BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 684         { BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
 685         { BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43430) },
 686         { BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, BRCMF_FIRMWARE_NVRAM(BCM43455) },
 687         { BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 688 };
 689
 690 static int brcmf_sdio_get_fwnames(struct brcmf_chip *ci,
 691                                   struct brcmf_sdio_dev *sdiodev)
 692 {
 693         int i;
 694         char end;
 695
 696         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 697                 if (brcmf_fwname_data[i].chipid == ci->chip &&
 698                     brcmf_fwname_data[i].revmsk & BIT(ci->chiprev))
 699                         break;
 700         }
 701
 702         if (i == ARRAY_SIZE(brcmf_fwname_data)) {
 703                 brcmf_err("Unknown chipid %d [%d]\n", ci->chip, ci->chiprev);
 704                 return -ENODEV;
 705         }
 706
 707         /* check if firmware path is provided by module parameter */
 708         if (brcmf_firmware_path[0] != '\0') {
 709                 strlcpy(sdiodev->fw_name, brcmf_firmware_path,
 710                         sizeof(sdiodev->fw_name));
 711                 strlcpy(sdiodev->nvram_name, brcmf_firmware_path,
 712                         sizeof(sdiodev->nvram_name));
 713
 714                 end = brcmf_firmware_path[strlen(brcmf_firmware_path) - 1];
 715                 if (end != '/') {
 716                         strlcat(sdiodev->fw_name, "/",
 717                                 sizeof(sdiodev->fw_name));
 718                         strlcat(sdiodev->nvram_name, "/",
 719                                 sizeof(sdiodev->nvram_name));
 720                 }
 721         }
 722         strlcat(sdiodev->fw_name, brcmf_fwname_data[i].bin,
 723                 sizeof(sdiodev->fw_name));
 724         strlcat(sdiodev->nvram_name, brcmf_fwname_data[i].nv,
 725                 sizeof(sdiodev->nvram_name));
 726
 727         return 0;
 728 }
 729
 730 static void pkt_align(struct sk_buff *p, int len, int align)
 731 {
 732         uint datalign;
 733         datalign = (unsigned long)(p->data);
 734         datalign = roundup(datalign, (align)) - datalign;
 735         if (datalign)
 736                 skb_pull(p, datalign);
 737         __skb_trim(p, len);
 738 }
 739
 740 /* To check if there's window offered */
 741 static bool data_ok(struct brcmf_sdio *bus)
 742 {
 743         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 744                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 745 }
 746
 747 /*
 748  * Reads a register in the SDIO hardware block. This block occupies a series of
 749  * adresses on the 32 bit backplane bus.
 750  */
 751 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 752 {
 753         struct brcmf_core *core;
 754         int ret;
 755
 756         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 757         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 758
 759         return ret;
 760 }
 761
 762 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 763 {
 764         struct brcmf_core *core;
 765         int ret;
 766
 767         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 768         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 769
 770         return ret;
 771 }
 772
 773 static int
 774 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 775 {
 776         u8 wr_val = 0, rd_val, cmp_val, bmask;
 777         int err = 0;
 778         int try_cnt = 0;
 779
 780         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 781
 782         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 783         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 784         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 785                           wr_val, &err);
 786
 787         if (on) {
 788                 /* device WAKEUP through KSO:
 789                  * write bit 0 & read back until
 790                  * both bits 0 (kso bit) & 1 (dev on status) are set
 791                  */
 792                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 793                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 794                 bmask = cmp_val;
 795                 usleep_range(2000, 3000);
 796         } else {
 797                 /* Put device to sleep, turn off KSO */
 798                 cmp_val = 0;
 799                 /* only check for bit0, bit1(dev on status) may not
 800                  * get cleared right away
 801                  */
 802                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 803         }
 804
 805         do {
 806                 /* reliable KSO bit set/clr:
 807                  * the sdiod sleep write access is synced to PMU 32khz clk
 808                  * just one write attempt may fail,
 809                  * read it back until it matches written value
 810                  */
 811                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 812                                            &err);
 813                 if (((rd_val & bmask) == cmp_val) && !err)
 814                         break;
 815
 816                 udelay(KSO_WAIT_US);
 817                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 818                                   wr_val, &err);
 819         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 820
 821         if (try_cnt > 2)
 822                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 823                           rd_val, err);
 824
 825         if (try_cnt > MAX_KSO_ATTEMPTS)
 826                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 827
 828         return err;
 829 }
 830
 831 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 832
 833 /* Turn backplane clock on or off */
 834 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 835 {
 836         int err;
 837         u8 clkctl, clkreq, devctl;
 838         unsigned long timeout;
 839
 840         brcmf_dbg(SDIO, "Enter\n");
 841
 842         clkctl = 0;
 843
 844         if (bus->sr_enabled) {
 845                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 846                 return 0;
 847         }
 848
 849         if (on) {
 850                 /* Request HT Avail */
 851                 clkreq =
 852                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 853
 854                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 855                                   clkreq, &err);
 856                 if (err) {
 857                         brcmf_err("HT Avail request error: %d\n", err);
 858                         return -EBADE;
 859                 }
 860
 861                 /* Check current status */
 862                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 863                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 864                 if (err) {
 865                         brcmf_err("HT Avail read error: %d\n", err);
 866                         return -EBADE;
 867                 }
 868
 869                 /* Go to pending and await interrupt if appropriate */
 870                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 871                         /* Allow only clock-available interrupt */
 872                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 873                                                    SBSDIO_DEVICE_CTL, &err);
 874                         if (err) {
 875                                 brcmf_err("Devctl error setting CA: %d\n",
 876                                           err);
 877                                 return -EBADE;
 878                         }
 879
 880                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 881                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 882                                           devctl, &err);
 883                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 884                         bus->clkstate = CLK_PENDING;
 885
 886                         return 0;
 887                 } else if (bus->clkstate == CLK_PENDING) {
 888                         /* Cancel CA-only interrupt filter */
 889                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 890                                                    SBSDIO_DEVICE_CTL, &err);
 891                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 892                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 893                                           devctl, &err);
 894                 }
 895
 896                 /* Otherwise, wait here (polling) for HT Avail */
 897                 timeout = jiffies +
 898                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 899                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 900                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 901                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 902                                                    &err);
 903                         if (time_after(jiffies, timeout))
 904                                 break;
 905                         else
 906                                 usleep_range(5000, 10000);
 907                 }
 908                 if (err) {
 909                         brcmf_err("HT Avail request error: %d\n", err);
 910                         return -EBADE;
 911                 }
 912                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 913                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 914                                   PMU_MAX_TRANSITION_DLY, clkctl);
 915                         return -EBADE;
 916                 }
 917
 918                 /* Mark clock available */
 919                 bus->clkstate = CLK_AVAIL;
 920                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 921
 922 #if defined(DEBUG)
 923                 if (!bus->alp_only) {
 924                         if (SBSDIO_ALPONLY(clkctl))
 925                                 brcmf_err("HT Clock should be on\n");
 926                 }
 927 #endif                          /* defined (DEBUG) */
 928
 929         } else {
 930                 clkreq = 0;
 931
 932                 if (bus->clkstate == CLK_PENDING) {
 933                         /* Cancel CA-only interrupt filter */
 934                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 935                                                    SBSDIO_DEVICE_CTL, &err);
 936                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 937                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 938                                           devctl, &err);
 939                 }
 940
 941                 bus->clkstate = CLK_SDONLY;
 942                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 943                                   clkreq, &err);
 944                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 945                 if (err) {
 946                         brcmf_err("Failed access turning clock off: %d\n",
 947                                   err);
 948                         return -EBADE;
 949                 }
 950         }
 951         return 0;
 952 }
 953
 954 /* Change idle/active SD state */
 955 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 956 {
 957         brcmf_dbg(SDIO, "Enter\n");
 958
 959         if (on)
 960                 bus->clkstate = CLK_SDONLY;
 961         else
 962                 bus->clkstate = CLK_NONE;
 963
 964         return 0;
 965 }
 966
 967 /* Transition SD and backplane clock readiness */
 968 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 969 {
 970 #ifdef DEBUG
 971         uint oldstate = bus->clkstate;
 972 #endif                          /* DEBUG */
 973
 974         brcmf_dbg(SDIO, "Enter\n");
 975
 976         /* Early exit if we're already there */
 977         if (bus->clkstate == target)
 978                 return 0;
 979
 980         switch (target) {
 981         case CLK_AVAIL:
 982                 /* Make sure SD clock is available */
 983                 if (bus->clkstate == CLK_NONE)
 984                         brcmf_sdio_sdclk(bus, true);
 985                 /* Now request HT Avail on the backplane */
 986                 brcmf_sdio_htclk(bus, true, pendok);
 987                 break;
 988
 989         case CLK_SDONLY:
 990                 /* Remove HT request, or bring up SD clock */
 991                 if (bus->clkstate == CLK_NONE)
 992                         brcmf_sdio_sdclk(bus, true);
 993                 else if (bus->clkstate == CLK_AVAIL)
 994                         brcmf_sdio_htclk(bus, false, false);
 995                 else
 996                         brcmf_err("request for %d -> %d\n",
 997                                   bus->clkstate, target);
 998                 break;
 999
1000         case CLK_NONE:
1001                 /* Make sure to remove HT request */
1002                 if (bus->clkstate == CLK_AVAIL)
1003                         brcmf_sdio_htclk(bus, false, false);
1004                 /* Now remove the SD clock */
1005                 brcmf_sdio_sdclk(bus, false);
1006                 break;
1007         }
1008 #ifdef DEBUG
1009         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
1010 #endif                          /* DEBUG */
1011
1012         return 0;
1013 }
1014
1015 static int
1016 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
1017 {
1018         int err = 0;
1019         u8 clkcsr;
1020
1021         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
1022                   (sleep ? "SLEEP" : "WAKE"),
1023                   (bus->sleeping ? "SLEEP" : "WAKE"));
1024
1025         /* If SR is enabled control bus state with KSO */
1026         if (bus->sr_enabled) {
1027                 /* Done if we're already in the requested state */
1028                 if (sleep == bus->sleeping)
1029                         goto end;
1030
1031                 /* Going to sleep */
1032                 if (sleep) {
1033                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
1034                                                    SBSDIO_FUNC1_CHIPCLKCSR,
1035                                                    &err);
1036                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
1037                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
1038                                 brcmf_sdiod_regwb(bus->sdiodev,
1039                                                   SBSDIO_FUNC1_CHIPCLKCSR,
1040                                                   SBSDIO_ALP_AVAIL_REQ, &err);
1041                         }
1042                         err = brcmf_sdio_kso_control(bus, false);
1043                 } else {
1044                         err = brcmf_sdio_kso_control(bus, true);
1045                 }
1046                 if (err) {
1047                         brcmf_err("error while changing bus sleep state %d\n",
1048                                   err);
1049                         goto done;
1050                 }
1051         }
1052
1053 end:
1054         /* control clocks */
1055         if (sleep) {
1056                 if (!bus->sr_enabled)
1057                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
1058         } else {
1059                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
1060                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
1061         }
1062         bus->sleeping = sleep;
1063         brcmf_dbg(SDIO, "new state %s\n",
1064                   (sleep ? "SLEEP" : "WAKE"));
1065 done:
1066         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
1067         return err;
1068
1069 }
1070
1071 #ifdef DEBUG
1072 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
1073 {
1074         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
1075 }
1076
1077 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
1078                                  struct sdpcm_shared *sh)
1079 {
1080         u32 addr = 0;
1081         int rv;
1082         u32 shaddr = 0;
1083         struct sdpcm_shared_le sh_le;
1084         __le32 addr_le;
1085
1086         sdio_claim_host(bus->sdiodev->func[1]);
1087         brcmf_sdio_bus_sleep(bus, false, false);
1088
1089         /*
1090          * Read last word in socram to determine
1091          * address of sdpcm_shared structure
1092          */
1093         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1094         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1095                 shaddr -= bus->ci->srsize;
1096         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1097                                (u8 *)&addr_le, 4);
1098         if (rv < 0)
1099                 goto fail;
1100
1101         /*
1102          * Check if addr is valid.
1103          * NVRAM length at the end of memory should have been overwritten.
1104          */
1105         addr = le32_to_cpu(addr_le);
1106         if (!brcmf_sdio_valid_shared_address(addr)) {
1107                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1108                 rv = -EINVAL;
1109                 goto fail;
1110         }
1111
1112         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1113
1114         /* Read hndrte_shared structure */
1115         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1116                                sizeof(struct sdpcm_shared_le));
1117         if (rv < 0)
1118                 goto fail;
1119
1120         sdio_release_host(bus->sdiodev->func[1]);
1121
1122         /* Endianness */
1123         sh->flags = le32_to_cpu(sh_le.flags);
1124         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1125         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1126         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1127         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1128         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1129         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1130
1131         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1132                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1133                           SDPCM_SHARED_VERSION,
1134                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1135                 return -EPROTO;
1136         }
1137         return 0;
1138
1139 fail:
1140         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1141                   rv, addr);
1142         sdio_release_host(bus->sdiodev->func[1]);
1143         return rv;
1144 }
1145
1146 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1147 {
1148         struct sdpcm_shared sh;
1149
1150         if (brcmf_sdio_readshared(bus, &sh) == 0)
1151                 bus->console_addr = sh.console_addr;
1152 }
1153 #else
1154 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1155 {
1156 }
1157 #endif /* DEBUG */
1158
1159 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1160 {
1161         u32 intstatus = 0;
1162         u32 hmb_data;
1163         u8 fcbits;
1164         int ret;
1165
1166         brcmf_dbg(SDIO, "Enter\n");
1167
1168         /* Read mailbox data and ack that we did so */
1169         ret = r_sdreg32(bus, &hmb_data,
1170                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1171
1172         if (ret == 0)
1173                 w_sdreg32(bus, SMB_INT_ACK,
1174                           offsetof(struct sdpcmd_regs, tosbmailbox));
1175         bus->sdcnt.f1regdata += 2;
1176
1177         /* Dongle recomposed rx frames, accept them again */
1178         if (hmb_data & HMB_DATA_NAKHANDLED) {
1179                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1180                           bus->rx_seq);
1181                 if (!bus->rxskip)
1182                         brcmf_err("unexpected NAKHANDLED!\n");
1183
1184                 bus->rxskip = false;
1185                 intstatus |= I_HMB_FRAME_IND;
1186         }
1187
1188         /*
1189          * DEVREADY does not occur with gSPI.
1190          */
1191         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1192                 bus->sdpcm_ver =
1193                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1194                     HMB_DATA_VERSION_SHIFT;
1195                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1196                         brcmf_err("Version mismatch, dongle reports %d, "
1197                                   "expecting %d\n",
1198                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1199                 else
1200                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1201                                   bus->sdpcm_ver);
1202
1203                 /*
1204                  * Retrieve console state address now that firmware should have
1205                  * updated it.
1206                  */
1207                 brcmf_sdio_get_console_addr(bus);
1208         }
1209
1210         /*
1211          * Flow Control has been moved into the RX headers and this out of band
1212          * method isn't used any more.
1213          * remaining backward compatible with older dongles.
1214          */
1215         if (hmb_data & HMB_DATA_FC) {
1216                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1217                                                         HMB_DATA_FCDATA_SHIFT;
1218
1219                 if (fcbits & ~bus->flowcontrol)
1220                         bus->sdcnt.fc_xoff++;
1221
1222                 if (bus->flowcontrol & ~fcbits)
1223                         bus->sdcnt.fc_xon++;
1224
1225                 bus->sdcnt.fc_rcvd++;
1226                 bus->flowcontrol = fcbits;
1227         }
1228
1229         /* Shouldn't be any others */
1230         if (hmb_data & ~(HMB_DATA_DEVREADY |
1231                          HMB_DATA_NAKHANDLED |
1232                          HMB_DATA_FC |
1233                          HMB_DATA_FWREADY |
1234                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1235                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1236                           hmb_data);
1237
1238         return intstatus;
1239 }
1240
1241 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1242 {
1243         uint retries = 0;
1244         u16 lastrbc;
1245         u8 hi, lo;
1246         int err;
1247
1248         brcmf_err("%sterminate frame%s\n",
1249                   abort ? "abort command, " : "",
1250                   rtx ? ", send NAK" : "");
1251
1252         if (abort)
1253                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1254
1255         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1256                           SFC_RF_TERM, &err);
1257         bus->sdcnt.f1regdata++;
1258
1259         /* Wait until the packet has been flushed (device/FIFO stable) */
1260         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1261                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1262                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1263                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1264                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1265                 bus->sdcnt.f1regdata += 2;
1266
1267                 if ((hi == 0) && (lo == 0))
1268                         break;
1269
1270                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1271                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1272                                   lastrbc, (hi << 8) + lo);
1273                 }
1274                 lastrbc = (hi << 8) + lo;
1275         }
1276
1277         if (!retries)
1278                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1279         else
1280                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1281
1282         if (rtx) {
1283                 bus->sdcnt.rxrtx++;
1284                 err = w_sdreg32(bus, SMB_NAK,
1285                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1286
1287                 bus->sdcnt.f1regdata++;
1288                 if (err == 0)
1289                         bus->rxskip = true;
1290         }
1291
1292         /* Clear partial in any case */
1293         bus->cur_read.len = 0;
1294 }
1295
1296 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1297 {
1298         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1299         u8 i, hi, lo;
1300
1301         /* On failure, abort the command and terminate the frame */
1302         brcmf_err("sdio error, abort command and terminate frame\n");
1303         bus->sdcnt.tx_sderrs++;
1304
1305         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1306         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1307         bus->sdcnt.f1regdata++;
1308
1309         for (i = 0; i < 3; i++) {
1310                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1311                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1312                 bus->sdcnt.f1regdata += 2;
1313                 if ((hi == 0) && (lo == 0))
1314                         break;
1315         }
1316 }
1317
1318 /* return total length of buffer chain */
1319 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1320 {
1321         struct sk_buff *p;
1322         uint total;
1323
1324         total = 0;
1325         skb_queue_walk(&bus->glom, p)
1326                 total += p->len;
1327         return total;
1328 }
1329
1330 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1331 {
1332         struct sk_buff *cur, *next;
1333
1334         skb_queue_walk_safe(&bus->glom, cur, next) {
1335                 skb_unlink(cur, &bus->glom);
1336                 brcmu_pkt_buf_free_skb(cur);
1337         }
1338 }
1339
1340 /**
1341  * brcmfmac sdio bus specific header
1342  * This is the lowest layer header wrapped on the packets transmitted between
1343  * host and WiFi dongle which contains information needed for SDIO core and
1344  * firmware
1345  *
1346  * It consists of 3 parts: hardware header, hardware extension header and
1347  * software header
1348  * hardware header (frame tag) - 4 bytes
1349  * Byte 0~1: Frame length
1350  * Byte 2~3: Checksum, bit-wise inverse of frame length
1351  * hardware extension header - 8 bytes
1352  * Tx glom mode only, N/A for Rx or normal Tx
1353  * Byte 0~1: Packet length excluding hw frame tag
1354  * Byte 2: Reserved
1355  * Byte 3: Frame flags, bit 0: last frame indication
1356  * Byte 4~5: Reserved
1357  * Byte 6~7: Tail padding length
1358  * software header - 8 bytes
1359  * Byte 0: Rx/Tx sequence number
1360  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1361  * Byte 2: Length of next data frame, reserved for Tx
1362  * Byte 3: Data offset
1363  * Byte 4: Flow control bits, reserved for Tx
1364  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1365  * Byte 6~7: Reserved
1366  */
1367 #define SDPCM_HWHDR_LEN                 4
1368 #define SDPCM_HWEXT_LEN                 8
1369 #define SDPCM_SWHDR_LEN                 8
1370 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1371 /* software header */
1372 #define SDPCM_SEQ_MASK                  0x000000ff
1373 #define SDPCM_SEQ_WRAP                  256
1374 #define SDPCM_CHANNEL_MASK              0x00000f00
1375 #define SDPCM_CHANNEL_SHIFT             8
1376 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1377 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1378 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1379 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1380 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1381 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1382 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1383 #define SDPCM_NEXTLEN_SHIFT             16
1384 #define SDPCM_DOFFSET_MASK              0xff000000
1385 #define SDPCM_DOFFSET_SHIFT             24
1386 #define SDPCM_FCMASK_MASK               0x000000ff
1387 #define SDPCM_WINDOW_MASK               0x0000ff00
1388 #define SDPCM_WINDOW_SHIFT              8
1389
1390 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1391 {
1392         u32 hdrvalue;
1393         hdrvalue = *(u32 *)swheader;
1394         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1395 }
1396
1397 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1398 {
1399         u32 hdrvalue;
1400         u8 ret;
1401
1402         hdrvalue = *(u32 *)swheader;
1403         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1404
1405         return (ret == SDPCM_EVENT_CHANNEL);
1406 }
1407
1408 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1409                               struct brcmf_sdio_hdrinfo *rd,
1410                               enum brcmf_sdio_frmtype type)
1411 {
1412         u16 len, checksum;
1413         u8 rx_seq, fc, tx_seq_max;
1414         u32 swheader;
1415
1416         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1417
1418         /* hw header */
1419         len = get_unaligned_le16(header);
1420         checksum = get_unaligned_le16(header + sizeof(u16));
1421         /* All zero means no more to read */
1422         if (!(len | checksum)) {
1423                 bus->rxpending = false;
1424                 return -ENODATA;
1425         }
1426         if ((u16)(~(len ^ checksum))) {
1427                 brcmf_err("HW header checksum error\n");
1428                 bus->sdcnt.rx_badhdr++;
1429                 brcmf_sdio_rxfail(bus, false, false);
1430                 return -EIO;
1431         }
1432         if (len < SDPCM_HDRLEN) {
1433                 brcmf_err("HW header length error\n");
1434                 return -EPROTO;
1435         }
1436         if (type == BRCMF_SDIO_FT_SUPER &&
1437             (roundup(len, bus->blocksize) != rd->len)) {
1438                 brcmf_err("HW superframe header length error\n");
1439                 return -EPROTO;
1440         }
1441         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1442                 brcmf_err("HW subframe header length error\n");
1443                 return -EPROTO;
1444         }
1445         rd->len = len;
1446
1447         /* software header */
1448         header += SDPCM_HWHDR_LEN;
1449         swheader = le32_to_cpu(*(__le32 *)header);
1450         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1451                 brcmf_err("Glom descriptor found in superframe head\n");
1452                 rd->len = 0;
1453                 return -EINVAL;
1454         }
1455         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1456         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1457         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1458             type != BRCMF_SDIO_FT_SUPER) {
1459                 brcmf_err("HW header length too long\n");
1460                 bus->sdcnt.rx_toolong++;
1461                 brcmf_sdio_rxfail(bus, false, false);
1462                 rd->len = 0;
1463                 return -EPROTO;
1464         }
1465         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1466                 brcmf_err("Wrong channel for superframe\n");
1467                 rd->len = 0;
1468                 return -EINVAL;
1469         }
1470         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1471             rd->channel != SDPCM_EVENT_CHANNEL) {
1472                 brcmf_err("Wrong channel for subframe\n");
1473                 rd->len = 0;
1474                 return -EINVAL;
1475         }
1476         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1477         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1478                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1479                 bus->sdcnt.rx_badhdr++;
1480                 brcmf_sdio_rxfail(bus, false, false);
1481                 rd->len = 0;
1482                 return -ENXIO;
1483         }
1484         if (rd->seq_num != rx_seq) {
1485                 brcmf_err("seq %d: sequence number error, expect %d\n",
1486                           rx_seq, rd->seq_num);
1487                 bus->sdcnt.rx_badseq++;
1488                 rd->seq_num = rx_seq;
1489         }
1490         /* no need to check the reset for subframe */
1491         if (type == BRCMF_SDIO_FT_SUB)
1492                 return 0;
1493         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1494         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1495                 /* only warm for NON glom packet */
1496                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1497                         brcmf_err("seq %d: next length error\n", rx_seq);
1498                 rd->len_nxtfrm = 0;
1499         }
1500         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1501         fc = swheader & SDPCM_FCMASK_MASK;
1502         if (bus->flowcontrol != fc) {
1503                 if (~bus->flowcontrol & fc)
1504                         bus->sdcnt.fc_xoff++;
1505                 if (bus->flowcontrol & ~fc)
1506                         bus->sdcnt.fc_xon++;
1507                 bus->sdcnt.fc_rcvd++;
1508                 bus->flowcontrol = fc;
1509         }
1510         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1511         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1512                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1513                 tx_seq_max = bus->tx_seq + 2;
1514         }
1515         bus->tx_max = tx_seq_max;
1516
1517         return 0;
1518 }
1519
1520 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1521 {
1522         *(__le16 *)header = cpu_to_le16(frm_length);
1523         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1524 }
1525
1526 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1527                               struct brcmf_sdio_hdrinfo *hd_info)
1528 {
1529         u32 hdrval;
1530         u8 hdr_offset;
1531
1532         brcmf_sdio_update_hwhdr(header, hd_info->len);
1533         hdr_offset = SDPCM_HWHDR_LEN;
1534
1535         if (bus->txglom) {
1536                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1537                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1538                 hdrval = (u16)hd_info->tail_pad << 16;
1539                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1540                 hdr_offset += SDPCM_HWEXT_LEN;
1541         }
1542
1543         hdrval = hd_info->seq_num;
1544         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1545                   SDPCM_CHANNEL_MASK;
1546         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1547                   SDPCM_DOFFSET_MASK;
1548         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1549         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1550         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1551 }
1552
1553 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1554 {
1555         u16 dlen, totlen;
1556         u8 *dptr, num = 0;
1557         u16 sublen;
1558         struct sk_buff *pfirst, *pnext;
1559
1560         int errcode;
1561         u8 doff, sfdoff;
1562
1563         struct brcmf_sdio_hdrinfo rd_new;
1564
1565         /* If packets, issue read(s) and send up packet chain */
1566         /* Return sequence numbers consumed? */
1567
1568         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1569                   bus->glomd, skb_peek(&bus->glom));
1570
1571         /* If there's a descriptor, generate the packet chain */
1572         if (bus->glomd) {
1573                 pfirst = pnext = NULL;
1574                 dlen = (u16) (bus->glomd->len);
1575                 dptr = bus->glomd->data;
1576                 if (!dlen || (dlen & 1)) {
1577                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1578                                   dlen);
1579                         dlen = 0;
1580                 }
1581
1582                 for (totlen = num = 0; dlen; num++) {
1583                         /* Get (and move past) next length */
1584                         sublen = get_unaligned_le16(dptr);
1585                         dlen -= sizeof(u16);
1586                         dptr += sizeof(u16);
1587                         if ((sublen < SDPCM_HDRLEN) ||
1588                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1589                                 brcmf_err("descriptor len %d bad: %d\n",
1590                                           num, sublen);
1591                                 pnext = NULL;
1592                                 break;
1593                         }
1594                         if (sublen % bus->sgentry_align) {
1595                                 brcmf_err("sublen %d not multiple of %d\n",
1596                                           sublen, bus->sgentry_align);
1597                         }
1598                         totlen += sublen;
1599
1600                         /* For last frame, adjust read len so total
1601                                  is a block multiple */
1602                         if (!dlen) {
1603                                 sublen +=
1604                                     (roundup(totlen, bus->blocksize) - totlen);
1605                                 totlen = roundup(totlen, bus->blocksize);
1606                         }
1607
1608                         /* Allocate/chain packet for next subframe */
1609                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1610                         if (pnext == NULL) {
1611                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1612                                           num, sublen);
1613                                 break;
1614                         }
1615                         skb_queue_tail(&bus->glom, pnext);
1616
1617                         /* Adhere to start alignment requirements */
1618                         pkt_align(pnext, sublen, bus->sgentry_align);
1619                 }
1620
1621                 /* If all allocations succeeded, save packet chain
1622                          in bus structure */
1623                 if (pnext) {
1624                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1625                                   totlen, num);
1626                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1627                             totlen != bus->cur_read.len) {
1628                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1629                                           bus->cur_read.len, totlen, rxseq);
1630                         }
1631                         pfirst = pnext = NULL;
1632                 } else {
1633                         brcmf_sdio_free_glom(bus);
1634                         num = 0;
1635                 }
1636
1637                 /* Done with descriptor packet */
1638                 brcmu_pkt_buf_free_skb(bus->glomd);
1639                 bus->glomd = NULL;
1640                 bus->cur_read.len = 0;
1641         }
1642
1643         /* Ok -- either we just generated a packet chain,
1644                  or had one from before */
1645         if (!skb_queue_empty(&bus->glom)) {
1646                 if (BRCMF_GLOM_ON()) {
1647                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1648                         skb_queue_walk(&bus->glom, pnext) {
1649                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1650                                           pnext, (u8 *) (pnext->data),
1651                                           pnext->len, pnext->len);
1652                         }
1653                 }
1654
1655                 pfirst = skb_peek(&bus->glom);
1656                 dlen = (u16) brcmf_sdio_glom_len(bus);
1657
1658                 /* Do an SDIO read for the superframe.  Configurable iovar to
1659                  * read directly into the chained packet, or allocate a large
1660                  * packet and and copy into the chain.
1661                  */
1662                 sdio_claim_host(bus->sdiodev->func[1]);
1663                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1664                                                  &bus->glom, dlen);
1665                 sdio_release_host(bus->sdiodev->func[1]);
1666                 bus->sdcnt.f2rxdata++;
1667
1668                 /* On failure, kill the superframe, allow a couple retries */
1669                 if (errcode < 0) {
1670                         brcmf_err("glom read of %d bytes failed: %d\n",
1671                                   dlen, errcode);
1672
1673                         sdio_claim_host(bus->sdiodev->func[1]);
1674                         if (bus->glomerr++ < 3) {
1675                                 brcmf_sdio_rxfail(bus, true, true);
1676                         } else {
1677                                 bus->glomerr = 0;
1678                                 brcmf_sdio_rxfail(bus, true, false);
1679                                 bus->sdcnt.rxglomfail++;
1680                                 brcmf_sdio_free_glom(bus);
1681                         }
1682                         sdio_release_host(bus->sdiodev->func[1]);
1683                         return 0;
1684                 }
1685
1686                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1687                                    pfirst->data, min_t(int, pfirst->len, 48),
1688                                    "SUPERFRAME:\n");
1689
1690                 rd_new.seq_num = rxseq;
1691                 rd_new.len = dlen;
1692                 sdio_claim_host(bus->sdiodev->func[1]);
1693                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1694                                              BRCMF_SDIO_FT_SUPER);
1695                 sdio_release_host(bus->sdiodev->func[1]);
1696                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1697
1698                 /* Remove superframe header, remember offset */
1699                 skb_pull(pfirst, rd_new.dat_offset);
1700                 sfdoff = rd_new.dat_offset;
1701                 num = 0;
1702
1703                 /* Validate all the subframe headers */
1704                 skb_queue_walk(&bus->glom, pnext) {
1705                         /* leave when invalid subframe is found */
1706                         if (errcode)
1707                                 break;
1708
1709                         rd_new.len = pnext->len;
1710                         rd_new.seq_num = rxseq++;
1711                         sdio_claim_host(bus->sdiodev->func[1]);
1712                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1713                                                      BRCMF_SDIO_FT_SUB);
1714                         sdio_release_host(bus->sdiodev->func[1]);
1715                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1716                                            pnext->data, 32, "subframe:\n");
1717
1718                         num++;
1719                 }
1720
1721                 if (errcode) {
1722                         /* Terminate frame on error, request
1723                                  a couple retries */
1724                         sdio_claim_host(bus->sdiodev->func[1]);
1725                         if (bus->glomerr++ < 3) {
1726                                 /* Restore superframe header space */
1727                                 skb_push(pfirst, sfdoff);
1728                                 brcmf_sdio_rxfail(bus, true, true);
1729                         } else {
1730                                 bus->glomerr = 0;
1731                                 brcmf_sdio_rxfail(bus, true, false);
1732                                 bus->sdcnt.rxglomfail++;
1733                                 brcmf_sdio_free_glom(bus);
1734                         }
1735                         sdio_release_host(bus->sdiodev->func[1]);
1736                         bus->cur_read.len = 0;
1737                         return 0;
1738                 }
1739
1740                 /* Basic SD framing looks ok - process each packet (header) */
1741
1742                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1743                         dptr = (u8 *) (pfirst->data);
1744                         sublen = get_unaligned_le16(dptr);
1745                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1746
1747                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1748                                            dptr, pfirst->len,
1749                                            "Rx Subframe Data:\n");
1750
1751                         __skb_trim(pfirst, sublen);
1752                         skb_pull(pfirst, doff);
1753
1754                         if (pfirst->len == 0) {
1755                                 skb_unlink(pfirst, &bus->glom);
1756                                 brcmu_pkt_buf_free_skb(pfirst);
1757                                 continue;
1758                         }
1759
1760                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1761                                            pfirst->data,
1762                                            min_t(int, pfirst->len, 32),
1763                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1764                                            bus->glom.qlen, pfirst, pfirst->data,
1765                                            pfirst->len, pfirst->next,
1766                                            pfirst->prev);
1767                         skb_unlink(pfirst, &bus->glom);
1768                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1769                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1770                         else
1771                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1772                                                false);
1773                         bus->sdcnt.rxglompkts++;
1774                 }
1775
1776                 bus->sdcnt.rxglomframes++;
1777         }
1778         return num;
1779 }
1780
1781 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1782                                      bool *pending)
1783 {
1784         DECLARE_WAITQUEUE(wait, current);
1785         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1786
1787         /* Wait until control frame is available */
1788         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1789         set_current_state(TASK_INTERRUPTIBLE);
1790
1791         while (!(*condition) && (!signal_pending(current) && timeout))
1792                 timeout = schedule_timeout(timeout);
1793
1794         if (signal_pending(current))
1795                 *pending = true;
1796
1797         set_current_state(TASK_RUNNING);
1798         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1799
1800         return timeout;
1801 }
1802
1803 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1804 {
1805         if (waitqueue_active(&bus->dcmd_resp_wait))
1806                 wake_up_interruptible(&bus->dcmd_resp_wait);
1807
1808         return 0;
1809 }
1810 static void
1811 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1812 {
1813         uint rdlen, pad;
1814         u8 *buf = NULL, *rbuf;
1815         int sdret;
1816
1817         brcmf_dbg(TRACE, "Enter\n");
1818
1819         if (bus->rxblen)
1820                 buf = vzalloc(bus->rxblen);
1821         if (!buf)
1822                 goto done;
1823
1824         rbuf = bus->rxbuf;
1825         pad = ((unsigned long)rbuf % bus->head_align);
1826         if (pad)
1827                 rbuf += (bus->head_align - pad);
1828
1829         /* Copy the already-read portion over */
1830         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1831         if (len <= BRCMF_FIRSTREAD)
1832                 goto gotpkt;
1833
1834         /* Raise rdlen to next SDIO block to avoid tail command */
1835         rdlen = len - BRCMF_FIRSTREAD;
1836         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1837                 pad = bus->blocksize - (rdlen % bus->blocksize);
1838                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1839                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1840                         rdlen += pad;
1841         } else if (rdlen % bus->head_align) {
1842                 rdlen += bus->head_align - (rdlen % bus->head_align);
1843         }
1844
1845         /* Drop if the read is too big or it exceeds our maximum */
1846         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1847                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1848                           rdlen, bus->sdiodev->bus_if->maxctl);
1849                 brcmf_sdio_rxfail(bus, false, false);
1850                 goto done;
1851         }
1852
1853         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1854                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1855                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1856                 bus->sdcnt.rx_toolong++;
1857                 brcmf_sdio_rxfail(bus, false, false);
1858                 goto done;
1859         }
1860
1861         /* Read remain of frame body */
1862         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1863         bus->sdcnt.f2rxdata++;
1864
1865         /* Control frame failures need retransmission */
1866         if (sdret < 0) {
1867                 brcmf_err("read %d control bytes failed: %d\n",
1868                           rdlen, sdret);
1869                 bus->sdcnt.rxc_errors++;
1870                 brcmf_sdio_rxfail(bus, true, true);
1871                 goto done;
1872         } else
1873                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1874
1875 gotpkt:
1876
1877         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1878                            buf, len, "RxCtrl:\n");
1879
1880         /* Point to valid data and indicate its length */
1881         spin_lock_bh(&bus->rxctl_lock);
1882         if (bus->rxctl) {
1883                 brcmf_err("last control frame is being processed.\n");
1884                 spin_unlock_bh(&bus->rxctl_lock);
1885                 vfree(buf);
1886                 goto done;
1887         }
1888         bus->rxctl = buf + doff;
1889         bus->rxctl_orig = buf;
1890         bus->rxlen = len - doff;
1891         spin_unlock_bh(&bus->rxctl_lock);
1892
1893 done:
1894         /* Awake any waiters */
1895         brcmf_sdio_dcmd_resp_wake(bus);
1896 }
1897
1898 /* Pad read to blocksize for efficiency */
1899 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1900 {
1901         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1902                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1903                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1904                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1905                         *rdlen += *pad;
1906         } else if (*rdlen % bus->head_align) {
1907                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1908         }
1909 }
1910
1911 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1912 {
1913         struct sk_buff *pkt;            /* Packet for event or data frames */
1914         u16 pad;                /* Number of pad bytes to read */
1915         uint rxleft = 0;        /* Remaining number of frames allowed */
1916         int ret;                /* Return code from calls */
1917         uint rxcount = 0;       /* Total frames read */
1918         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1919         u8 head_read = 0;
1920
1921         brcmf_dbg(TRACE, "Enter\n");
1922
1923         /* Not finished unless we encounter no more frames indication */
1924         bus->rxpending = true;
1925
1926         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1927              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1928              rd->seq_num++, rxleft--) {
1929
1930                 /* Handle glomming separately */
1931                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1932                         u8 cnt;
1933                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1934                                   bus->glomd, skb_peek(&bus->glom));
1935                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1936                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1937                         rd->seq_num += cnt - 1;
1938                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1939                         continue;
1940                 }
1941
1942                 rd->len_left = rd->len;
1943                 /* read header first for unknow frame length */
1944                 sdio_claim_host(bus->sdiodev->func[1]);
1945                 if (!rd->len) {
1946                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1947                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1948                         bus->sdcnt.f2rxhdrs++;
1949                         if (ret < 0) {
1950                                 brcmf_err("RXHEADER FAILED: %d\n",
1951                                           ret);
1952                                 bus->sdcnt.rx_hdrfail++;
1953                                 brcmf_sdio_rxfail(bus, true, true);
1954                                 sdio_release_host(bus->sdiodev->func[1]);
1955                                 continue;
1956                         }
1957
1958                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1959                                            bus->rxhdr, SDPCM_HDRLEN,
1960                                            "RxHdr:\n");
1961
1962                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1963                                                BRCMF_SDIO_FT_NORMAL)) {
1964                                 sdio_release_host(bus->sdiodev->func[1]);
1965                                 if (!bus->rxpending)
1966                                         break;
1967                                 else
1968                                         continue;
1969                         }
1970
1971                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1972                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1973                                                         rd->len,
1974                                                         rd->dat_offset);
1975                                 /* prepare the descriptor for the next read */
1976                                 rd->len = rd->len_nxtfrm << 4;
1977                                 rd->len_nxtfrm = 0;
1978                                 /* treat all packet as event if we don't know */
1979                                 rd->channel = SDPCM_EVENT_CHANNEL;
1980                                 sdio_release_host(bus->sdiodev->func[1]);
1981                                 continue;
1982                         }
1983                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1984                                        rd->len - BRCMF_FIRSTREAD : 0;
1985                         head_read = BRCMF_FIRSTREAD;
1986                 }
1987
1988                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1989
1990                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1991                                             bus->head_align);
1992                 if (!pkt) {
1993                         /* Give up on data, request rtx of events */
1994                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1995                         brcmf_sdio_rxfail(bus, false,
1996                                             RETRYCHAN(rd->channel));
1997                         sdio_release_host(bus->sdiodev->func[1]);
1998                         continue;
1999                 }
2000                 skb_pull(pkt, head_read);
2001                 pkt_align(pkt, rd->len_left, bus->head_align);
2002
2003                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
2004                 bus->sdcnt.f2rxdata++;
2005                 sdio_release_host(bus->sdiodev->func[1]);
2006
2007                 if (ret < 0) {
2008                         brcmf_err("read %d bytes from channel %d failed: %d\n",
2009                                   rd->len, rd->channel, ret);
2010                         brcmu_pkt_buf_free_skb(pkt);
2011                         sdio_claim_host(bus->sdiodev->func[1]);
2012                         brcmf_sdio_rxfail(bus, true,
2013                                             RETRYCHAN(rd->channel));
2014                         sdio_release_host(bus->sdiodev->func[1]);
2015                         continue;
2016                 }
2017
2018                 if (head_read) {
2019                         skb_push(pkt, head_read);
2020                         memcpy(pkt->data, bus->rxhdr, head_read);
2021                         head_read = 0;
2022                 } else {
2023                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
2024                         rd_new.seq_num = rd->seq_num;
2025                         sdio_claim_host(bus->sdiodev->func[1]);
2026                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
2027                                                BRCMF_SDIO_FT_NORMAL)) {
2028                                 rd->len = 0;
2029                                 brcmu_pkt_buf_free_skb(pkt);
2030                         }
2031                         bus->sdcnt.rx_readahead_cnt++;
2032                         if (rd->len != roundup(rd_new.len, 16)) {
2033                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
2034                                           rd->len,
2035                                           roundup(rd_new.len, 16) >> 4);
2036                                 rd->len = 0;
2037                                 brcmf_sdio_rxfail(bus, true, true);
2038                                 sdio_release_host(bus->sdiodev->func[1]);
2039                                 brcmu_pkt_buf_free_skb(pkt);
2040                                 continue;
2041                         }
2042                         sdio_release_host(bus->sdiodev->func[1]);
2043                         rd->len_nxtfrm = rd_new.len_nxtfrm;
2044                         rd->channel = rd_new.channel;
2045                         rd->dat_offset = rd_new.dat_offset;
2046
2047                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2048                                              BRCMF_DATA_ON()) &&
2049                                            BRCMF_HDRS_ON(),
2050                                            bus->rxhdr, SDPCM_HDRLEN,
2051                                            "RxHdr:\n");
2052
2053                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
2054                                 brcmf_err("readahead on control packet %d?\n",
2055                                           rd_new.seq_num);
2056                                 /* Force retry w/normal header read */
2057                                 rd->len = 0;
2058                                 sdio_claim_host(bus->sdiodev->func[1]);
2059                                 brcmf_sdio_rxfail(bus, false, true);
2060                                 sdio_release_host(bus->sdiodev->func[1]);
2061                                 brcmu_pkt_buf_free_skb(pkt);
2062                                 continue;
2063                         }
2064                 }
2065
2066                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2067                                    pkt->data, rd->len, "Rx Data:\n");
2068
2069                 /* Save superframe descriptor and allocate packet frame */
2070                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
2071                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
2072                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2073                                           rd->len);
2074                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2075                                                    pkt->data, rd->len,
2076                                                    "Glom Data:\n");
2077                                 __skb_trim(pkt, rd->len);
2078                                 skb_pull(pkt, SDPCM_HDRLEN);
2079                                 bus->glomd = pkt;
2080                         } else {
2081                                 brcmf_err("%s: glom superframe w/o "
2082                                           "descriptor!\n", __func__);
2083                                 sdio_claim_host(bus->sdiodev->func[1]);
2084                                 brcmf_sdio_rxfail(bus, false, false);
2085                                 sdio_release_host(bus->sdiodev->func[1]);
2086                         }
2087                         /* prepare the descriptor for the next read */
2088                         rd->len = rd->len_nxtfrm << 4;
2089                         rd->len_nxtfrm = 0;
2090                         /* treat all packet as event if we don't know */
2091                         rd->channel = SDPCM_EVENT_CHANNEL;
2092                         continue;
2093                 }
2094
2095                 /* Fill in packet len and prio, deliver upward */
2096                 __skb_trim(pkt, rd->len);
2097                 skb_pull(pkt, rd->dat_offset);
2098
2099                 if (pkt->len == 0)
2100                         brcmu_pkt_buf_free_skb(pkt);
2101                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2102                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2103                 else
2104                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2105                                        false);
2106
2107                 /* prepare the descriptor for the next read */
2108                 rd->len = rd->len_nxtfrm << 4;
2109                 rd->len_nxtfrm = 0;
2110                 /* treat all packet as event if we don't know */
2111                 rd->channel = SDPCM_EVENT_CHANNEL;
2112         }
2113
2114         rxcount = maxframes - rxleft;
2115         /* Message if we hit the limit */
2116         if (!rxleft)
2117                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2118         else
2119                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2120         /* Back off rxseq if awaiting rtx, update rx_seq */
2121         if (bus->rxskip)
2122                 rd->seq_num--;
2123         bus->rx_seq = rd->seq_num;
2124
2125         return rxcount;
2126 }
2127
2128 static void
2129 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2130 {
2131         if (waitqueue_active(&bus->ctrl_wait))
2132                 wake_up_interruptible(&bus->ctrl_wait);
2133         return;
2134 }
2135
2136 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2137 {
2138         u16 head_pad;
2139         u8 *dat_buf;
2140
2141         dat_buf = (u8 *)(pkt->data);
2142
2143         /* Check head padding */
2144         head_pad = ((unsigned long)dat_buf % bus->head_align);
2145         if (head_pad) {
2146                 if (skb_headroom(pkt) < head_pad) {
2147                         bus->sdiodev->bus_if->tx_realloc++;
2148                         head_pad = 0;
2149                         if (skb_cow(pkt, head_pad))
2150                                 return -ENOMEM;
2151                 }
2152                 skb_push(pkt, head_pad);
2153                 dat_buf = (u8 *)(pkt->data);
2154                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2155         }
2156         return head_pad;
2157 }
2158
2159 /**
2160  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2161  * bus layer usage.
2162  */
2163 /* flag marking a dummy skb added for DMA alignment requirement */
2164 #define ALIGN_SKB_FLAG          0x8000
2165 /* bit mask of data length chopped from the previous packet */
2166 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2167
2168 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2169                                     struct sk_buff_head *pktq,
2170                                     struct sk_buff *pkt, u16 total_len)
2171 {
2172         struct brcmf_sdio_dev *sdiodev;
2173         struct sk_buff *pkt_pad;
2174         u16 tail_pad, tail_chop, chain_pad;
2175         unsigned int blksize;
2176         bool lastfrm;
2177         int ntail, ret;
2178
2179         sdiodev = bus->sdiodev;
2180         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2181         /* sg entry alignment should be a divisor of block size */
2182         WARN_ON(blksize % bus->sgentry_align);
2183
2184         /* Check tail padding */
2185         lastfrm = skb_queue_is_last(pktq, pkt);
2186         tail_pad = 0;
2187         tail_chop = pkt->len % bus->sgentry_align;
2188         if (tail_chop)
2189                 tail_pad = bus->sgentry_align - tail_chop;
2190         chain_pad = (total_len + tail_pad) % blksize;
2191         if (lastfrm && chain_pad)
2192                 tail_pad += blksize - chain_pad;
2193         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2194                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2195                                                 bus->head_align);
2196                 if (pkt_pad == NULL)
2197                         return -ENOMEM;
2198                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2199                 if (unlikely(ret < 0)) {
2200                         kfree_skb(pkt_pad);
2201                         return ret;
2202                 }
2203                 memcpy(pkt_pad->data,
2204                        pkt->data + pkt->len - tail_chop,
2205                        tail_chop);
2206                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2207                 skb_trim(pkt, pkt->len - tail_chop);
2208                 skb_trim(pkt_pad, tail_pad + tail_chop);
2209                 __skb_queue_after(pktq, pkt, pkt_pad);
2210         } else {
2211                 ntail = pkt->data_len + tail_pad -
2212                         (pkt->end - pkt->tail);
2213                 if (skb_cloned(pkt) || ntail > 0)
2214                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2215                                 return -ENOMEM;
2216                 if (skb_linearize(pkt))
2217                         return -ENOMEM;
2218                 __skb_put(pkt, tail_pad);
2219         }
2220
2221         return tail_pad;
2222 }
2223
2224 /**
2225  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2226  * @bus: brcmf_sdio structure pointer
2227  * @pktq: packet list pointer
2228  * @chan: virtual channel to transmit the packet
2229  *
2230  * Processes to be applied to the packet
2231  *      - Align data buffer pointer
2232  *      - Align data buffer length
2233  *      - Prepare header
2234  * Return: negative value if there is error
2235  */
2236 static int
2237 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2238                       uint chan)
2239 {
2240         u16 head_pad, total_len;
2241         struct sk_buff *pkt_next;
2242         u8 txseq;
2243         int ret;
2244         struct brcmf_sdio_hdrinfo hd_info = {0};
2245
2246         txseq = bus->tx_seq;
2247         total_len = 0;
2248         skb_queue_walk(pktq, pkt_next) {
2249                 /* alignment packet inserted in previous
2250                  * loop cycle can be skipped as it is
2251                  * already properly aligned and does not
2252                  * need an sdpcm header.
2253                  */
2254                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2255                         continue;
2256
2257                 /* align packet data pointer */
2258                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2259                 if (ret < 0)
2260                         return ret;
2261                 head_pad = (u16)ret;
2262                 if (head_pad)
2263                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2264
2265                 total_len += pkt_next->len;
2266
2267                 hd_info.len = pkt_next->len;
2268                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2269                 if (bus->txglom && pktq->qlen > 1) {
2270                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2271                                                        pkt_next, total_len);
2272                         if (ret < 0)
2273                                 return ret;
2274                         hd_info.tail_pad = (u16)ret;
2275                         total_len += (u16)ret;
2276                 }
2277
2278                 hd_info.channel = chan;
2279                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2280                 hd_info.seq_num = txseq++;
2281
2282                 /* Now fill the header */
2283                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2284
2285                 if (BRCMF_BYTES_ON() &&
2286                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2287                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2288                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2289                                            "Tx Frame:\n");
2290                 else if (BRCMF_HDRS_ON())
2291                         brcmf_dbg_hex_dump(true, pkt_next->data,
2292                                            head_pad + bus->tx_hdrlen,
2293                                            "Tx Header:\n");
2294         }
2295         /* Hardware length tag of the first packet should be total
2296          * length of the chain (including padding)
2297          */
2298         if (bus->txglom)
2299                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2300         return 0;
2301 }
2302
2303 /**
2304  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2305  * @bus: brcmf_sdio structure pointer
2306  * @pktq: packet list pointer
2307  *
2308  * Processes to be applied to the packet
2309  *      - Remove head padding
2310  *      - Remove tail padding
2311  */
2312 static void
2313 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2314 {
2315         u8 *hdr;
2316         u32 dat_offset;
2317         u16 tail_pad;
2318         u16 dummy_flags, chop_len;
2319         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2320
2321         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2322                 dummy_flags = *(u16 *)(pkt_next->cb);
2323                 if (dummy_flags & ALIGN_SKB_FLAG) {
2324                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2325                         if (chop_len) {
2326                                 pkt_prev = pkt_next->prev;
2327                                 skb_put(pkt_prev, chop_len);
2328                         }
2329                         __skb_unlink(pkt_next, pktq);
2330                         brcmu_pkt_buf_free_skb(pkt_next);
2331                 } else {
2332                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2333                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2334                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2335                                      SDPCM_DOFFSET_SHIFT;
2336                         skb_pull(pkt_next, dat_offset);
2337                         if (bus->txglom) {
2338                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2339                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2340                         }
2341                 }
2342         }
2343 }
2344
2345 /* Writes a HW/SW header into the packet and sends it. */
2346 /* Assumes: (a) header space already there, (b) caller holds lock */
2347 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2348                             uint chan)
2349 {
2350         int ret;
2351         struct sk_buff *pkt_next, *tmp;
2352
2353         brcmf_dbg(TRACE, "Enter\n");
2354
2355         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2356         if (ret)
2357                 goto done;
2358
2359         sdio_claim_host(bus->sdiodev->func[1]);
2360         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2361         bus->sdcnt.f2txdata++;
2362
2363         if (ret < 0)
2364                 brcmf_sdio_txfail(bus);
2365
2366         sdio_release_host(bus->sdiodev->func[1]);
2367
2368 done:
2369         brcmf_sdio_txpkt_postp(bus, pktq);
2370         if (ret == 0)
2371                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2372         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2373                 __skb_unlink(pkt_next, pktq);
2374                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2375         }
2376         return ret;
2377 }
2378
2379 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2380 {
2381         struct sk_buff *pkt;
2382         struct sk_buff_head pktq;
2383         u32 intstatus = 0;
2384         int ret = 0, prec_out, i;
2385         uint cnt = 0;
2386         u8 tx_prec_map, pkt_num;
2387
2388         brcmf_dbg(TRACE, "Enter\n");
2389
2390         tx_prec_map = ~bus->flowcontrol;
2391
2392         /* Send frames until the limit or some other event */
2393         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2394                 pkt_num = 1;
2395                 if (bus->txglom)
2396                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2397                                         bus->sdiodev->txglomsz);
2398                 pkt_num = min_t(u32, pkt_num,
2399                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2400                 __skb_queue_head_init(&pktq);
2401                 spin_lock_bh(&bus->txq_lock);
2402                 for (i = 0; i < pkt_num; i++) {
2403                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2404                                               &prec_out);
2405                         if (pkt == NULL)
2406                                 break;
2407                         __skb_queue_tail(&pktq, pkt);
2408                 }
2409                 spin_unlock_bh(&bus->txq_lock);
2410                 if (i == 0)
2411                         break;
2412
2413                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2414
2415                 cnt += i;
2416
2417                 /* In poll mode, need to check for other events */
2418                 if (!bus->intr) {
2419                         /* Check device status, signal pending interrupt */
2420                         sdio_claim_host(bus->sdiodev->func[1]);
2421                         ret = r_sdreg32(bus, &intstatus,
2422                                         offsetof(struct sdpcmd_regs,
2423                                                  intstatus));
2424                         sdio_release_host(bus->sdiodev->func[1]);
2425                         bus->sdcnt.f2txdata++;
2426                         if (ret != 0)
2427                                 break;
2428                         if (intstatus & bus->hostintmask)
2429                                 atomic_set(&bus->ipend, 1);
2430                 }
2431         }
2432
2433         /* Deflow-control stack if needed */
2434         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2435             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2436                 bus->txoff = false;
2437                 brcmf_txflowblock(bus->sdiodev->dev, false);
2438         }
2439
2440         return cnt;
2441 }
2442
2443 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2444 {
2445         u8 doff;
2446         u16 pad;
2447         uint retries = 0;
2448         struct brcmf_sdio_hdrinfo hd_info = {0};
2449         int ret;
2450
2451         brcmf_dbg(TRACE, "Enter\n");
2452
2453         /* Back the pointer to make room for bus header */
2454         frame -= bus->tx_hdrlen;
2455         len += bus->tx_hdrlen;
2456
2457         /* Add alignment padding (optional for ctl frames) */
2458         doff = ((unsigned long)frame % bus->head_align);
2459         if (doff) {
2460                 frame -= doff;
2461                 len += doff;
2462                 memset(frame + bus->tx_hdrlen, 0, doff);
2463         }
2464
2465         /* Round send length to next SDIO block */
2466         pad = 0;
2467         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2468                 pad = bus->blocksize - (len % bus->blocksize);
2469                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2470                         pad = 0;
2471         } else if (len % bus->head_align) {
2472                 pad = bus->head_align - (len % bus->head_align);
2473         }
2474         len += pad;
2475
2476         hd_info.len = len - pad;
2477         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2478         hd_info.dat_offset = doff + bus->tx_hdrlen;
2479         hd_info.seq_num = bus->tx_seq;
2480         hd_info.lastfrm = true;
2481         hd_info.tail_pad = pad;
2482         brcmf_sdio_hdpack(bus, frame, &hd_info);
2483
2484         if (bus->txglom)
2485                 brcmf_sdio_update_hwhdr(frame, len);
2486
2487         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2488                            frame, len, "Tx Frame:\n");
2489         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2490                            BRCMF_HDRS_ON(),
2491                            frame, min_t(u16, len, 16), "TxHdr:\n");
2492
2493         do {
2494                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2495
2496                 if (ret < 0)
2497                         brcmf_sdio_txfail(bus);
2498                 else
2499                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2500         } while (ret < 0 && retries++ < TXRETRIES);
2501
2502         return ret;
2503 }
2504
2505 static void brcmf_sdio_bus_stop(struct device *dev)
2506 {
2507         u32 local_hostintmask;
2508         u8 saveclk;
2509         int err;
2510         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2511         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2512         struct brcmf_sdio *bus = sdiodev->bus;
2513
2514         brcmf_dbg(TRACE, "Enter\n");
2515
2516         if (bus->watchdog_tsk) {
2517                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2518                 kthread_stop(bus->watchdog_tsk);
2519                 bus->watchdog_tsk = NULL;
2520         }
2521
2522         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2523                 sdio_claim_host(sdiodev->func[1]);
2524
2525                 /* Enable clock for device interrupts */
2526                 brcmf_sdio_bus_sleep(bus, false, false);
2527
2528                 /* Disable and clear interrupts at the chip level also */
2529                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2530                 local_hostintmask = bus->hostintmask;
2531                 bus->hostintmask = 0;
2532
2533                 /* Force backplane clocks to assure F2 interrupt propagates */
2534                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2535                                             &err);
2536                 if (!err)
2537                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2538                                           (saveclk | SBSDIO_FORCE_HT), &err);
2539                 if (err)
2540                         brcmf_err("Failed to force clock for F2: err %d\n",
2541                                   err);
2542
2543                 /* Turn off the bus (F2), free any pending packets */
2544                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2545                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2546
2547                 /* Clear any pending interrupts now that F2 is disabled */
2548                 w_sdreg32(bus, local_hostintmask,
2549                           offsetof(struct sdpcmd_regs, intstatus));
2550
2551                 sdio_release_host(sdiodev->func[1]);
2552         }
2553         /* Clear the data packet queues */
2554         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2555
2556         /* Clear any held glomming stuff */
2557         brcmu_pkt_buf_free_skb(bus->glomd);
2558         brcmf_sdio_free_glom(bus);
2559
2560         /* Clear rx control and wake any waiters */
2561         spin_lock_bh(&bus->rxctl_lock);
2562         bus->rxlen = 0;
2563         spin_unlock_bh(&bus->rxctl_lock);
2564         brcmf_sdio_dcmd_resp_wake(bus);
2565
2566         /* Reset some F2 state stuff */
2567         bus->rxskip = false;
2568         bus->tx_seq = bus->rx_seq = 0;
2569 }
2570
2571 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2572 {
2573         unsigned long flags;
2574
2575         if (bus->sdiodev->oob_irq_requested) {
2576                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2577                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2578                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2579                         bus->sdiodev->irq_en = true;
2580                 }
2581                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2582         }
2583 }
2584
2585 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2586 {
2587         struct brcmf_core *buscore;
2588         u32 addr;
2589         unsigned long val;
2590         int ret;
2591
2592         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2593         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2594
2595         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2596         bus->sdcnt.f1regdata++;
2597         if (ret != 0)
2598                 return ret;
2599
2600         val &= bus->hostintmask;
2601         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2602
2603         /* Clear interrupts */
2604         if (val) {
2605                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2606                 bus->sdcnt.f1regdata++;
2607                 atomic_or(val, &bus->intstatus);
2608         }
2609
2610         return ret;
2611 }
2612
2613 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2614 {
2615         u32 newstatus = 0;
2616         unsigned long intstatus;
2617         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2618         uint framecnt;                  /* Temporary counter of tx/rx frames */
2619         int err = 0;
2620
2621         brcmf_dbg(TRACE, "Enter\n");
2622
2623         sdio_claim_host(bus->sdiodev->func[1]);
2624
2625         /* If waiting for HTAVAIL, check status */
2626         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2627                 u8 clkctl, devctl = 0;
2628
2629 #ifdef DEBUG
2630                 /* Check for inconsistent device control */
2631                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2632                                            SBSDIO_DEVICE_CTL, &err);
2633 #endif                          /* DEBUG */
2634
2635                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2636                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2637                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2638
2639                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2640                           devctl, clkctl);
2641
2642                 if (SBSDIO_HTAV(clkctl)) {
2643                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2644                                                    SBSDIO_DEVICE_CTL, &err);
2645                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2646                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2647                                           devctl, &err);
2648                         bus->clkstate = CLK_AVAIL;
2649                 }
2650         }
2651
2652         /* Make sure backplane clock is on */
2653         brcmf_sdio_bus_sleep(bus, false, true);
2654
2655         /* Pending interrupt indicates new device status */
2656         if (atomic_read(&bus->ipend) > 0) {
2657                 atomic_set(&bus->ipend, 0);
2658                 err = brcmf_sdio_intr_rstatus(bus);
2659         }
2660
2661         /* Start with leftover status bits */
2662         intstatus = atomic_xchg(&bus->intstatus, 0);
2663
2664         /* Handle flow-control change: read new state in case our ack
2665          * crossed another change interrupt.  If change still set, assume
2666          * FC ON for safety, let next loop through do the debounce.
2667          */
2668         if (intstatus & I_HMB_FC_CHANGE) {
2669                 intstatus &= ~I_HMB_FC_CHANGE;
2670                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2671                                 offsetof(struct sdpcmd_regs, intstatus));
2672
2673                 err = r_sdreg32(bus, &newstatus,
2674                                 offsetof(struct sdpcmd_regs, intstatus));
2675                 bus->sdcnt.f1regdata += 2;
2676                 atomic_set(&bus->fcstate,
2677                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2678                 intstatus |= (newstatus & bus->hostintmask);
2679         }
2680
2681         /* Handle host mailbox indication */
2682         if (intstatus & I_HMB_HOST_INT) {
2683                 intstatus &= ~I_HMB_HOST_INT;
2684                 intstatus |= brcmf_sdio_hostmail(bus);
2685         }
2686
2687         sdio_release_host(bus->sdiodev->func[1]);
2688
2689         /* Generally don't ask for these, can get CRC errors... */
2690         if (intstatus & I_WR_OOSYNC) {
2691                 brcmf_err("Dongle reports WR_OOSYNC\n");
2692                 intstatus &= ~I_WR_OOSYNC;
2693         }
2694
2695         if (intstatus & I_RD_OOSYNC) {
2696                 brcmf_err("Dongle reports RD_OOSYNC\n");
2697                 intstatus &= ~I_RD_OOSYNC;
2698         }
2699
2700         if (intstatus & I_SBINT) {
2701                 brcmf_err("Dongle reports SBINT\n");
2702                 intstatus &= ~I_SBINT;
2703         }
2704
2705         /* Would be active due to wake-wlan in gSPI */
2706         if (intstatus & I_CHIPACTIVE) {
2707                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2708                 intstatus &= ~I_CHIPACTIVE;
2709         }
2710
2711         /* Ignore frame indications if rxskip is set */
2712         if (bus->rxskip)
2713                 intstatus &= ~I_HMB_FRAME_IND;
2714
2715         /* On frame indication, read available frames */
2716         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2717                 brcmf_sdio_readframes(bus, bus->rxbound);
2718                 if (!bus->rxpending)
2719                         intstatus &= ~I_HMB_FRAME_IND;
2720         }
2721
2722         /* Keep still-pending events for next scheduling */
2723         if (intstatus)
2724                 atomic_or(intstatus, &bus->intstatus);
2725
2726         brcmf_sdio_clrintr(bus);
2727
2728         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2729             data_ok(bus)) {
2730                 sdio_claim_host(bus->sdiodev->func[1]);
2731                 if (bus->ctrl_frame_stat) {
2732                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2733                                                       bus->ctrl_frame_len);
2734                         bus->ctrl_frame_err = err;
2735                         wmb();
2736                         bus->ctrl_frame_stat = false;
2737                 }
2738                 sdio_release_host(bus->sdiodev->func[1]);
2739                 brcmf_sdio_wait_event_wakeup(bus);
2740         }
2741         /* Send queued frames (limit 1 if rx may still be pending) */
2742         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2743             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2744             data_ok(bus)) {
2745                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2746                                             txlimit;
2747                 brcmf_sdio_sendfromq(bus, framecnt);
2748         }
2749
2750         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2751                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2752                 atomic_set(&bus->intstatus, 0);
2753                 if (bus->ctrl_frame_stat) {
2754                         sdio_claim_host(bus->sdiodev->func[1]);
2755                         if (bus->ctrl_frame_stat) {
2756                                 bus->ctrl_frame_err = -ENODEV;
2757                                 wmb();
2758                                 bus->ctrl_frame_stat = false;
2759                                 brcmf_sdio_wait_event_wakeup(bus);
2760                         }
2761                         sdio_release_host(bus->sdiodev->func[1]);
2762                 }
2763         } else if (atomic_read(&bus->intstatus) ||
2764                    atomic_read(&bus->ipend) > 0 ||
2765                    (!atomic_read(&bus->fcstate) &&
2766                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2767                     data_ok(bus))) {
2768                 bus->dpc_triggered = true;
2769         }
2770 }
2771
2772 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2773 {
2774         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2775         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2776         struct brcmf_sdio *bus = sdiodev->bus;
2777
2778         return &bus->txq;
2779 }
2780
2781 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2782 {
2783         struct sk_buff *p;
2784         int eprec = -1;         /* precedence to evict from */
2785
2786         /* Fast case, precedence queue is not full and we are also not
2787          * exceeding total queue length
2788          */
2789         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2790                 brcmu_pktq_penq(q, prec, pkt);
2791                 return true;
2792         }
2793
2794         /* Determine precedence from which to evict packet, if any */
2795         if (pktq_pfull(q, prec)) {
2796                 eprec = prec;
2797         } else if (pktq_full(q)) {
2798                 p = brcmu_pktq_peek_tail(q, &eprec);
2799                 if (eprec > prec)
2800                         return false;
2801         }
2802
2803         /* Evict if needed */
2804         if (eprec >= 0) {
2805                 /* Detect queueing to unconfigured precedence */
2806                 if (eprec == prec)
2807                         return false;   /* refuse newer (incoming) packet */
2808                 /* Evict packet according to discard policy */
2809                 p = brcmu_pktq_pdeq_tail(q, eprec);
2810                 if (p == NULL)
2811                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2812                 brcmu_pkt_buf_free_skb(p);
2813         }
2814
2815         /* Enqueue */
2816         p = brcmu_pktq_penq(q, prec, pkt);
2817         if (p == NULL)
2818                 brcmf_err("brcmu_pktq_penq() failed\n");
2819
2820         return p != NULL;
2821 }
2822
2823 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2824 {
2825         int ret = -EBADE;
2826         uint prec;
2827         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2828         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2829         struct brcmf_sdio *bus = sdiodev->bus;
2830
2831         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2832         if (sdiodev->state != BRCMF_SDIOD_DATA)
2833                 return -EIO;
2834
2835         /* Add space for the header */
2836         skb_push(pkt, bus->tx_hdrlen);
2837         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2838
2839         prec = prio2prec((pkt->priority & PRIOMASK));
2840
2841         /* Check for existing queue, current flow-control,
2842                          pending event, or pending clock */
2843         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2844         bus->sdcnt.fcqueued++;
2845
2846         /* Priority based enq */
2847         spin_lock_bh(&bus->txq_lock);
2848         /* reset bus_flags in packet cb */
2849         *(u16 *)(pkt->cb) = 0;
2850         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2851                 skb_pull(pkt, bus->tx_hdrlen);
2852                 brcmf_err("out of bus->txq !!!\n");
2853                 ret = -ENOSR;
2854         } else {
2855                 ret = 0;
2856         }
2857
2858         if (pktq_len(&bus->txq) >= TXHI) {
2859                 bus->txoff = true;
2860                 brcmf_txflowblock(dev, true);
2861         }
2862         spin_unlock_bh(&bus->txq_lock);
2863
2864 #ifdef DEBUG
2865         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2866                 qcount[prec] = pktq_plen(&bus->txq, prec);
2867 #endif
2868
2869         brcmf_sdio_trigger_dpc(bus);
2870         return ret;
2871 }
2872
2873 #ifdef DEBUG
2874 #define CONSOLE_LINE_MAX        192
2875
2876 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2877 {
2878         struct brcmf_console *c = &bus->console;
2879         u8 line[CONSOLE_LINE_MAX], ch;
2880         u32 n, idx, addr;
2881         int rv;
2882
2883         /* Don't do anything until FWREADY updates console address */
2884         if (bus->console_addr == 0)
2885                 return 0;
2886
2887         /* Read console log struct */
2888         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2889         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2890                                sizeof(c->log_le));
2891         if (rv < 0)
2892                 return rv;
2893
2894         /* Allocate console buffer (one time only) */
2895         if (c->buf == NULL) {
2896                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2897                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2898                 if (c->buf == NULL)
2899                         return -ENOMEM;
2900         }
2901
2902         idx = le32_to_cpu(c->log_le.idx);
2903
2904         /* Protect against corrupt value */
2905         if (idx > c->bufsize)
2906                 return -EBADE;
2907
2908         /* Skip reading the console buffer if the index pointer
2909          has not moved */
2910         if (idx == c->last)
2911                 return 0;
2912
2913         /* Read the console buffer */
2914         addr = le32_to_cpu(c->log_le.buf);
2915         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2916         if (rv < 0)
2917                 return rv;
2918
2919         while (c->last != idx) {
2920                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2921                         if (c->last == idx) {
2922                                 /* This would output a partial line.
2923                                  * Instead, back up
2924                                  * the buffer pointer and output this
2925                                  * line next time around.
2926                                  */
2927                                 if (c->last >= n)
2928                                         c->last -= n;
2929                                 else
2930                                         c->last = c->bufsize - n;
2931                                 goto break2;
2932                         }
2933                         ch = c->buf[c->last];
2934                         c->last = (c->last + 1) % c->bufsize;
2935                         if (ch == '\n')
2936                                 break;
2937                         line[n] = ch;
2938                 }
2939
2940                 if (n > 0) {
2941                         if (line[n - 1] == '\r')
2942                                 n--;
2943                         line[n] = 0;
2944                         pr_debug("CONSOLE: %s\n", line);
2945                 }
2946         }
2947 break2:
2948
2949         return 0;
2950 }
2951 #endif                          /* DEBUG */
2952
2953 static int
2954 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2955 {
2956         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2957         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2958         struct brcmf_sdio *bus = sdiodev->bus;
2959         int ret;
2960
2961         brcmf_dbg(TRACE, "Enter\n");
2962         if (sdiodev->state != BRCMF_SDIOD_DATA)
2963                 return -EIO;
2964
2965         /* Send from dpc */
2966         bus->ctrl_frame_buf = msg;
2967         bus->ctrl_frame_len = msglen;
2968         wmb();
2969         bus->ctrl_frame_stat = true;
2970
2971         brcmf_sdio_trigger_dpc(bus);
2972         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2973                                          msecs_to_jiffies(CTL_DONE_TIMEOUT));
2974         ret = 0;
2975         if (bus->ctrl_frame_stat) {
2976                 sdio_claim_host(bus->sdiodev->func[1]);
2977                 if (bus->ctrl_frame_stat) {
2978                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2979                         bus->ctrl_frame_stat = false;
2980                         ret = -ETIMEDOUT;
2981                 }
2982                 sdio_release_host(bus->sdiodev->func[1]);
2983         }
2984         if (!ret) {
2985                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2986                           bus->ctrl_frame_err);
2987                 rmb();
2988                 ret = bus->ctrl_frame_err;
2989         }
2990
2991         if (ret)
2992                 bus->sdcnt.tx_ctlerrs++;
2993         else
2994                 bus->sdcnt.tx_ctlpkts++;
2995
2996         return ret;
2997 }
2998
2999 #ifdef DEBUG
3000 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
3001                                    struct sdpcm_shared *sh)
3002 {
3003         u32 addr, console_ptr, console_size, console_index;
3004         char *conbuf = NULL;
3005         __le32 sh_val;
3006         int rv;
3007
3008         /* obtain console information from device memory */
3009         addr = sh->console_addr + offsetof(struct rte_console, log_le);
3010         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3011                                (u8 *)&sh_val, sizeof(u32));
3012         if (rv < 0)
3013                 return rv;
3014         console_ptr = le32_to_cpu(sh_val);
3015
3016         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
3017         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3018                                (u8 *)&sh_val, sizeof(u32));
3019         if (rv < 0)
3020                 return rv;
3021         console_size = le32_to_cpu(sh_val);
3022
3023         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
3024         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
3025                                (u8 *)&sh_val, sizeof(u32));
3026         if (rv < 0)
3027                 return rv;
3028         console_index = le32_to_cpu(sh_val);
3029
3030         /* allocate buffer for console data */
3031         if (console_size <= CONSOLE_BUFFER_MAX)
3032                 conbuf = vzalloc(console_size+1);
3033
3034         if (!conbuf)
3035                 return -ENOMEM;
3036
3037         /* obtain the console data from device */
3038         conbuf[console_size] = '\0';
3039         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
3040                                console_size);
3041         if (rv < 0)
3042                 goto done;
3043
3044         rv = seq_write(seq, conbuf + console_index,
3045                        console_size - console_index);
3046         if (rv < 0)
3047                 goto done;
3048
3049         if (console_index > 0)
3050                 rv = seq_write(seq, conbuf, console_index - 1);
3051
3052 done:
3053         vfree(conbuf);
3054         return rv;
3055 }
3056
3057 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
3058                                 struct sdpcm_shared *sh)
3059 {
3060         int error;
3061         struct brcmf_trap_info tr;
3062
3063         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
3064                 brcmf_dbg(INFO, "no trap in firmware\n");
3065                 return 0;
3066         }
3067
3068         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3069                                   sizeof(struct brcmf_trap_info));
3070         if (error < 0)
3071                 return error;
3072
3073         seq_printf(seq,
3074                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
3075                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3076                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3077                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3078                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3079                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3080                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3081                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3082                    le32_to_cpu(tr.pc), sh->trap_addr,
3083                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3084                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3085                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3086                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3087
3088         return 0;
3089 }
3090
3091 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3092                                   struct sdpcm_shared *sh)
3093 {
3094         int error = 0;
3095         char file[80] = "?";
3096         char expr[80] = "<???>";
3097
3098         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3099                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3100                 return 0;
3101         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3102                 brcmf_dbg(INFO, "no assert in dongle\n");
3103                 return 0;
3104         }
3105
3106         sdio_claim_host(bus->sdiodev->func[1]);
3107         if (sh->assert_file_addr != 0) {
3108                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3109                                           sh->assert_file_addr, (u8 *)file, 80);
3110                 if (error < 0)
3111                         return error;
3112         }
3113         if (sh->assert_exp_addr != 0) {
3114                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3115                                           sh->assert_exp_addr, (u8 *)expr, 80);
3116                 if (error < 0)
3117                         return error;
3118         }
3119         sdio_release_host(bus->sdiodev->func[1]);
3120
3121         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3122                    file, sh->assert_line, expr);
3123         return 0;
3124 }
3125
3126 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3127 {
3128         int error;
3129         struct sdpcm_shared sh;
3130
3131         error = brcmf_sdio_readshared(bus, &sh);
3132
3133         if (error < 0)
3134                 return error;
3135
3136         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3137                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3138         else if (sh.flags & SDPCM_SHARED_ASSERT)
3139                 brcmf_err("assertion in dongle\n");
3140
3141         if (sh.flags & SDPCM_SHARED_TRAP)
3142                 brcmf_err("firmware trap in dongle\n");
3143
3144         return 0;
3145 }
3146
3147 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3148 {
3149         int error = 0;
3150         struct sdpcm_shared sh;
3151
3152         error = brcmf_sdio_readshared(bus, &sh);
3153         if (error < 0)
3154                 goto done;
3155
3156         error = brcmf_sdio_assert_info(seq, bus, &sh);
3157         if (error < 0)
3158                 goto done;
3159
3160         error = brcmf_sdio_trap_info(seq, bus, &sh);
3161         if (error < 0)
3162                 goto done;
3163
3164         error = brcmf_sdio_dump_console(seq, bus, &sh);
3165
3166 done:
3167         return error;
3168 }
3169
3170 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3171 {
3172         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3173         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3174
3175         return brcmf_sdio_died_dump(seq, bus);
3176 }
3177
3178 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3179 {
3180         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3181         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3182         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3183
3184         seq_printf(seq,
3185                    "intrcount:    %u\nlastintrs:    %u\n"
3186                    "pollcnt:      %u\nregfails:     %u\n"
3187                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3188                    "rxrtx:        %u\nrx_toolong:   %u\n"
3189                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3190                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3191                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3192                    "fc_xon:       %u\nrxglomfail:   %u\n"
3193                    "rxglomframes: %u\nrxglompkts:   %u\n"
3194                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3195                    "f2txdata:     %u\nf1regdata:    %u\n"
3196                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3197                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3198                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3199                    sdcnt->intrcount, sdcnt->lastintrs,
3200                    sdcnt->pollcnt, sdcnt->regfails,
3201                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3202                    sdcnt->rxrtx, sdcnt->rx_toolong,
3203                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3204                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3205                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3206                    sdcnt->fc_xon, sdcnt->rxglomfail,
3207                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3208                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3209                    sdcnt->f2txdata, sdcnt->f1regdata,
3210                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3211                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3212                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3213
3214         return 0;
3215 }
3216
3217 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3218 {
3219         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3220         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3221
3222         if (IS_ERR_OR_NULL(dentry))
3223                 return;
3224
3225         bus->console_interval = BRCMF_CONSOLE;
3226
3227         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3228         brcmf_debugfs_add_entry(drvr, "counters",
3229                                 brcmf_debugfs_sdio_count_read);
3230         debugfs_create_u32("console_interval", 0644, dentry,
3231                            &bus->console_interval);
3232 }
3233 #else
3234 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3235 {
3236         return 0;
3237 }
3238
3239 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3240 {
3241 }
3242 #endif /* DEBUG */
3243
3244 static int
3245 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3246 {
3247         int timeleft;
3248         uint rxlen = 0;
3249         bool pending;
3250         u8 *buf;
3251         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3252         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3253         struct brcmf_sdio *bus = sdiodev->bus;
3254
3255         brcmf_dbg(TRACE, "Enter\n");
3256         if (sdiodev->state != BRCMF_SDIOD_DATA)
3257                 return -EIO;
3258
3259         /* Wait until control frame is available */
3260         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3261
3262         spin_lock_bh(&bus->rxctl_lock);
3263         rxlen = bus->rxlen;
3264         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3265         bus->rxctl = NULL;
3266         buf = bus->rxctl_orig;
3267         bus->rxctl_orig = NULL;
3268         bus->rxlen = 0;
3269         spin_unlock_bh(&bus->rxctl_lock);
3270         vfree(buf);
3271
3272         if (rxlen) {
3273                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3274                           rxlen, msglen);
3275         } else if (timeleft == 0) {
3276                 brcmf_err("resumed on timeout\n");
3277                 brcmf_sdio_checkdied(bus);
3278         } else if (pending) {
3279                 brcmf_dbg(CTL, "cancelled\n");
3280                 return -ERESTARTSYS;
3281         } else {
3282                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3283                 brcmf_sdio_checkdied(bus);
3284         }
3285
3286         if (rxlen)
3287                 bus->sdcnt.rx_ctlpkts++;
3288         else
3289                 bus->sdcnt.rx_ctlerrs++;
3290
3291         return rxlen ? (int)rxlen : -ETIMEDOUT;
3292 }
3293
3294 #ifdef DEBUG
3295 static bool
3296 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3297                         u8 *ram_data, uint ram_sz)
3298 {
3299         char *ram_cmp;
3300         int err;
3301         bool ret = true;
3302         int address;
3303         int offset;
3304         int len;
3305
3306         /* read back and verify */
3307         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3308                   ram_sz);
3309         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3310         /* do not proceed while no memory but  */
3311         if (!ram_cmp)
3312                 return true;
3313
3314         address = ram_addr;
3315         offset = 0;
3316         while (offset < ram_sz) {
3317                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3318                       ram_sz - offset;
3319                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3320                 if (err) {
3321                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3322                                   err, len, address);
3323                         ret = false;
3324                         break;
3325                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3326                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3327                                   offset, len);
3328                         ret = false;
3329                         break;
3330                 }
3331                 offset += len;
3332                 address += len;
3333         }
3334
3335         kfree(ram_cmp);
3336
3337         return ret;
3338 }
3339 #else   /* DEBUG */
3340 static bool
3341 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3342                         u8 *ram_data, uint ram_sz)
3343 {
3344         return true;
3345 }
3346 #endif  /* DEBUG */
3347
3348 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3349                                          const struct firmware *fw)
3350 {
3351         int err;
3352
3353         brcmf_dbg(TRACE, "Enter\n");
3354
3355         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3356                                 (u8 *)fw->data, fw->size);
3357         if (err)
3358                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3359                           err, (int)fw->size, bus->ci->rambase);
3360         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3361                                           (u8 *)fw->data, fw->size))
3362                 err = -EIO;
3363
3364         return err;
3365 }
3366
3367 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3368                                      void *vars, u32 varsz)
3369 {
3370         int address;
3371         int err;
3372
3373         brcmf_dbg(TRACE, "Enter\n");
3374
3375         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3376         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3377         if (err)
3378                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3379                           err, varsz, address);
3380         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3381                 err = -EIO;
3382
3383         return err;
3384 }
3385
3386 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3387                                         const struct firmware *fw,
3388                                         void *nvram, u32 nvlen)
3389 {
3390         int bcmerror = -EFAULT;
3391         u32 rstvec;
3392
3393         sdio_claim_host(bus->sdiodev->func[1]);
3394         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3395
3396         rstvec = get_unaligned_le32(fw->data);
3397         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3398
3399         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3400         release_firmware(fw);
3401         if (bcmerror) {
3402                 brcmf_err("dongle image file download failed\n");
3403                 brcmf_fw_nvram_free(nvram);
3404                 goto err;
3405         }
3406
3407         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3408         brcmf_fw_nvram_free(nvram);
3409         if (bcmerror) {
3410                 brcmf_err("dongle nvram file download failed\n");
3411                 goto err;
3412         }
3413
3414         /* Take arm out of reset */
3415         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3416                 brcmf_err("error getting out of ARM core reset\n");
3417                 goto err;
3418         }
3419
3420         /* Allow full data communication using DPC from now on. */
3421         brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3422         bcmerror = 0;
3423
3424 err:
3425         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3426         sdio_release_host(bus->sdiodev->func[1]);
3427         return bcmerror;
3428 }
3429
3430 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3431 {
3432         int err = 0;
3433         u8 val;
3434
3435         brcmf_dbg(TRACE, "Enter\n");
3436
3437         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3438         if (err) {
3439                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3440                 return;
3441         }
3442
3443         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3444         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3445         if (err) {
3446                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3447                 return;
3448         }
3449
3450         /* Add CMD14 Support */
3451         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3452                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3453                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3454                           &err);
3455         if (err) {
3456                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3457                 return;
3458         }
3459
3460         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3461                           SBSDIO_FORCE_HT, &err);
3462         if (err) {
3463                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3464                 return;
3465         }
3466
3467         /* set flag */
3468         bus->sr_enabled = true;
3469         brcmf_dbg(INFO, "SR enabled\n");
3470 }
3471
3472 /* enable KSO bit */
3473 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3474 {
3475         u8 val;
3476         int err = 0;
3477
3478         brcmf_dbg(TRACE, "Enter\n");
3479
3480         /* KSO bit added in SDIO core rev 12 */
3481         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3482                 return 0;
3483
3484         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3485         if (err) {
3486                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3487                 return err;
3488         }
3489
3490         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3491                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3492                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3493                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3494                                   val, &err);
3495                 if (err) {
3496                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3497                         return err;
3498                 }
3499         }
3500
3501         return 0;
3502 }
3503
3504
3505 static int brcmf_sdio_bus_preinit(struct device *dev)
3506 {
3507         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3508         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3509         struct brcmf_sdio *bus = sdiodev->bus;
3510         uint pad_size;
3511         u32 value;
3512         int err;
3513
3514         /* the commands below use the terms tx and rx from
3515          * a device perspective, ie. bus:txglom affects the
3516          * bus transfers from device to host.
3517          */
3518         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3519                 /* for sdio core rev < 12, disable txgloming */
3520                 value = 0;
3521                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3522                                            sizeof(u32));
3523         } else {
3524                 /* otherwise, set txglomalign */
3525                 value = 4;
3526                 if (sdiodev->pdata)
3527                         value = sdiodev->pdata->sd_sgentry_align;
3528                 /* SDIO ADMA requires at least 32 bit alignment */
3529                 value = max_t(u32, value, 4);
3530                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3531                                            sizeof(u32));
3532         }
3533
3534         if (err < 0)
3535                 goto done;
3536
3537         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3538         if (sdiodev->sg_support) {
3539                 bus->txglom = false;
3540                 value = 1;
3541                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3542                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3543                                            &value, sizeof(u32));
3544                 if (err < 0) {
3545                         /* bus:rxglom is allowed to fail */
3546                         err = 0;
3547                 } else {
3548                         bus->txglom = true;
3549                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3550                 }
3551         }
3552         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3553
3554 done:
3555         return err;
3556 }
3557
3558 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3559 {
3560         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3561         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3562         struct brcmf_sdio *bus = sdiodev->bus;
3563
3564         return bus->ci->ramsize - bus->ci->srsize;
3565 }
3566
3567 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3568                                       size_t mem_size)
3569 {
3570         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3571         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3572         struct brcmf_sdio *bus = sdiodev->bus;
3573         int err;
3574         int address;
3575         int offset;
3576         int len;
3577
3578         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3579                   mem_size);
3580
3581         address = bus->ci->rambase;
3582         offset = err = 0;
3583         sdio_claim_host(sdiodev->func[1]);
3584         while (offset < mem_size) {
3585                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3586                       mem_size - offset;
3587                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3588                 if (err) {
3589                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3590                                   err, len, address);
3591                         goto done;
3592                 }
3593                 data += len;
3594                 offset += len;
3595                 address += len;
3596         }
3597
3598 done:
3599         sdio_release_host(sdiodev->func[1]);
3600         return err;
3601 }
3602
3603 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3604 {
3605         if (!bus->dpc_triggered) {
3606                 bus->dpc_triggered = true;
3607                 queue_work(bus->brcmf_wq, &bus->datawork);
3608         }
3609 }
3610
3611 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3612 {
3613         brcmf_dbg(TRACE, "Enter\n");
3614
3615         if (!bus) {
3616                 brcmf_err("bus is null pointer, exiting\n");
3617                 return;
3618         }
3619
3620         /* Count the interrupt call */
3621         bus->sdcnt.intrcount++;
3622         if (in_interrupt())
3623                 atomic_set(&bus->ipend, 1);
3624         else
3625                 if (brcmf_sdio_intr_rstatus(bus)) {
3626                         brcmf_err("failed backplane access\n");
3627                 }
3628
3629         /* Disable additional interrupts (is this needed now)? */
3630         if (!bus->intr)
3631                 brcmf_err("isr w/o interrupt configured!\n");
3632
3633         bus->dpc_triggered = true;
3634         queue_work(bus->brcmf_wq, &bus->datawork);
3635 }
3636
3637 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3638 {
3639         brcmf_dbg(TIMER, "Enter\n");
3640
3641         /* Poll period: check device if appropriate. */
3642         if (!bus->sr_enabled &&
3643             bus->poll && (++bus->polltick >= bus->pollrate)) {
3644                 u32 intstatus = 0;
3645
3646                 /* Reset poll tick */
3647                 bus->polltick = 0;
3648
3649                 /* Check device if no interrupts */
3650                 if (!bus->intr ||
3651                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3652
3653                         if (!bus->dpc_triggered) {
3654                                 u8 devpend;
3655
3656                                 sdio_claim_host(bus->sdiodev->func[1]);
3657                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3658                                                             SDIO_CCCR_INTx,
3659                                                             NULL);
3660                                 sdio_release_host(bus->sdiodev->func[1]);
3661                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3662                                                        INTR_STATUS_FUNC2);
3663                         }
3664
3665                         /* If there is something, make like the ISR and
3666                                  schedule the DPC */
3667                         if (intstatus) {
3668                                 bus->sdcnt.pollcnt++;
3669                                 atomic_set(&bus->ipend, 1);
3670
3671                                 bus->dpc_triggered = true;
3672                                 queue_work(bus->brcmf_wq, &bus->datawork);
3673                         }
3674                 }
3675
3676                 /* Update interrupt tracking */
3677                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3678         }
3679 #ifdef DEBUG
3680         /* Poll for console output periodically */
3681         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3682             bus->console_interval != 0) {
3683                 bus->console.count += BRCMF_WD_POLL_MS;
3684                 if (bus->console.count >= bus->console_interval) {
3685                         bus->console.count -= bus->console_interval;
3686                         sdio_claim_host(bus->sdiodev->func[1]);
3687                         /* Make sure backplane clock is on */
3688                         brcmf_sdio_bus_sleep(bus, false, false);
3689                         if (brcmf_sdio_readconsole(bus) < 0)
3690                                 /* stop on error */
3691                                 bus->console_interval = 0;
3692                         sdio_release_host(bus->sdiodev->func[1]);
3693                 }
3694         }
3695 #endif                          /* DEBUG */
3696
3697         /* On idle timeout clear activity flag and/or turn off clock */
3698         if (!bus->dpc_triggered) {
3699                 rmb();
3700                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3701                     (bus->clkstate == CLK_AVAIL)) {
3702                         bus->idlecount++;
3703                         if (bus->idlecount > bus->idletime) {
3704                                 brcmf_dbg(SDIO, "idle\n");
3705                                 sdio_claim_host(bus->sdiodev->func[1]);
3706                                 brcmf_sdio_wd_timer(bus, 0);
3707                                 bus->idlecount = 0;
3708                                 brcmf_sdio_bus_sleep(bus, true, false);
3709                                 sdio_release_host(bus->sdiodev->func[1]);
3710                         }
3711                 } else {
3712                         bus->idlecount = 0;
3713                 }
3714         } else {
3715                 bus->idlecount = 0;
3716         }
3717 }
3718
3719 static void brcmf_sdio_dataworker(struct work_struct *work)
3720 {
3721         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3722                                               datawork);
3723
3724         bus->dpc_running = true;
3725         wmb();
3726         while (ACCESS_ONCE(bus->dpc_triggered)) {
3727                 bus->dpc_triggered = false;
3728                 brcmf_sdio_dpc(bus);
3729                 bus->idlecount = 0;
3730         }
3731         bus->dpc_running = false;
3732         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3733                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3734                 brcmf_sdiod_try_freeze(bus->sdiodev);
3735                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3736         }
3737 }
3738
3739 static void
3740 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3741                              struct brcmf_chip *ci, u32 drivestrength)
3742 {
3743         const struct sdiod_drive_str *str_tab = NULL;
3744         u32 str_mask;
3745         u32 str_shift;
3746         u32 base;
3747         u32 i;
3748         u32 drivestrength_sel = 0;
3749         u32 cc_data_temp;
3750         u32 addr;
3751
3752         if (!(ci->cc_caps & CC_CAP_PMU))
3753                 return;
3754
3755         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3756         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3757                 str_tab = sdiod_drvstr_tab1_1v8;
3758                 str_mask = 0x00003800;
3759                 str_shift = 11;
3760                 break;
3761         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3762                 str_tab = sdiod_drvstr_tab6_1v8;
3763                 str_mask = 0x00001800;
3764                 str_shift = 11;
3765                 break;
3766         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3767                 /* note: 43143 does not support tristate */
3768                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3769                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3770                         str_tab = sdiod_drvstr_tab2_3v3;
3771                         str_mask = 0x00000007;
3772                         str_shift = 0;
3773                 } else
3774                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3775                                   ci->name, drivestrength);
3776                 break;
3777         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3778                 str_tab = sdiod_drive_strength_tab5_1v8;
3779                 str_mask = 0x00003800;
3780                 str_shift = 11;
3781                 break;
3782         default:
3783                 brcmf_err("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
3784                           ci->name, ci->chiprev, ci->pmurev);
3785                 break;
3786         }
3787
3788         if (str_tab != NULL) {
3789                 for (i = 0; str_tab[i].strength != 0; i++) {
3790                         if (drivestrength >= str_tab[i].strength) {
3791                                 drivestrength_sel = str_tab[i].sel;
3792                                 break;
3793                         }
3794                 }
3795                 base = brcmf_chip_get_chipcommon(ci)->base;
3796                 addr = CORE_CC_REG(base, chipcontrol_addr);
3797                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3798                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3799                 cc_data_temp &= ~str_mask;
3800                 drivestrength_sel <<= str_shift;
3801                 cc_data_temp |= drivestrength_sel;
3802                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3803
3804                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3805                           str_tab[i].strength, drivestrength, cc_data_temp);
3806         }
3807 }
3808
3809 static int brcmf_sdio_buscoreprep(void *ctx)
3810 {
3811         struct brcmf_sdio_dev *sdiodev = ctx;
3812         int err = 0;
3813         u8 clkval, clkset;
3814
3815         /* Try forcing SDIO core to do ALPAvail request only */
3816         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3817         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3818         if (err) {
3819                 brcmf_err("error writing for HT off\n");
3820                 return err;
3821         }
3822
3823         /* If register supported, wait for ALPAvail and then force ALP */
3824         /* This may take up to 15 milliseconds */
3825         clkval = brcmf_sdiod_regrb(sdiodev,
3826                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3827
3828         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3829                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3830                           clkset, clkval);
3831                 return -EACCES;
3832         }
3833
3834         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3835                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3836                         !SBSDIO_ALPAV(clkval)),
3837                         PMU_MAX_TRANSITION_DLY);
3838         if (!SBSDIO_ALPAV(clkval)) {
3839                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3840                           clkval);
3841                 return -EBUSY;
3842         }
3843
3844         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3845         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3846         udelay(65);
3847
3848         /* Also, disable the extra SDIO pull-ups */
3849         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3850
3851         return 0;
3852 }
3853
3854 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3855                                         u32 rstvec)
3856 {
3857         struct brcmf_sdio_dev *sdiodev = ctx;
3858         struct brcmf_core *core;
3859         u32 reg_addr;
3860
3861         /* clear all interrupts */
3862         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3863         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3864         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3865
3866         if (rstvec)
3867                 /* Write reset vector to address 0 */
3868                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3869                                   sizeof(rstvec));
3870 }
3871
3872 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3873 {
3874         struct brcmf_sdio_dev *sdiodev = ctx;
3875         u32 val, rev;
3876
3877         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3878         if (sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 &&
3879             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3880                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3881                 if (rev >= 2) {
3882                         val &= ~CID_ID_MASK;
3883                         val |= BRCM_CC_4339_CHIP_ID;
3884                 }
3885         }
3886         return val;
3887 }
3888
3889 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3890 {
3891         struct brcmf_sdio_dev *sdiodev = ctx;
3892
3893         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3894 }
3895
3896 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3897         .prepare = brcmf_sdio_buscoreprep,
3898         .activate = brcmf_sdio_buscore_activate,
3899         .read32 = brcmf_sdio_buscore_read32,
3900         .write32 = brcmf_sdio_buscore_write32,
3901 };
3902
3903 static bool
3904 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3905 {
3906         u8 clkctl = 0;
3907         int err = 0;
3908         int reg_addr;
3909         u32 reg_val;
3910         u32 drivestrength;
3911
3912         sdio_claim_host(bus->sdiodev->func[1]);
3913
3914         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3915                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3916
3917         /*
3918          * Force PLL off until brcmf_chip_attach()
3919          * programs PLL control regs
3920          */
3921
3922         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3923                           BRCMF_INIT_CLKCTL1, &err);
3924         if (!err)
3925                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3926                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3927
3928         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3929                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3930                           err, BRCMF_INIT_CLKCTL1, clkctl);
3931                 goto fail;
3932         }
3933
3934         bus->ci = brcmf_chip_attach(bus->sdiodev, &brcmf_sdio_buscore_ops);
3935         if (IS_ERR(bus->ci)) {
3936                 brcmf_err("brcmf_chip_attach failed!\n");
3937                 bus->ci = NULL;
3938                 goto fail;
3939         }
3940
3941         if (brcmf_sdio_kso_init(bus)) {
3942                 brcmf_err("error enabling KSO\n");
3943                 goto fail;
3944         }
3945
3946         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3947                 drivestrength = bus->sdiodev->pdata->drive_strength;
3948         else
3949                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3950         brcmf_sdio_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3951
3952         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3953         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3954                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3955         if (err)
3956                 goto fail;
3957
3958         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3959
3960         brcmf_sdiod_regwb(bus->sdiodev,
3961                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3962         if (err)
3963                 goto fail;
3964
3965         /* set PMUControl so a backplane reset does PMU state reload */
3966         reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
3967                                pmucontrol);
3968         reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
3969         if (err)
3970                 goto fail;
3971
3972         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3973
3974         brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err);
3975         if (err)
3976                 goto fail;
3977
3978         sdio_release_host(bus->sdiodev->func[1]);
3979
3980         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3981
3982         /* allocate header buffer */
3983         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3984         if (!bus->hdrbuf)
3985                 return false;
3986         /* Locate an appropriately-aligned portion of hdrbuf */
3987         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3988                                     bus->head_align);
3989
3990         /* Set the poll and/or interrupt flags */
3991         bus->intr = true;
3992         bus->poll = false;
3993         if (bus->poll)
3994                 bus->pollrate = 1;
3995
3996         return true;
3997
3998 fail:
3999         sdio_release_host(bus->sdiodev->func[1]);
4000         return false;
4001 }
4002
4003 static int
4004 brcmf_sdio_watchdog_thread(void *data)
4005 {
4006         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4007         int wait;
4008
4009         allow_signal(SIGTERM);
4010         /* Run until signal received */
4011         brcmf_sdiod_freezer_count(bus->sdiodev);
4012         while (1) {
4013                 if (kthread_should_stop())
4014                         break;
4015                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
4016                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
4017                 brcmf_sdiod_freezer_count(bus->sdiodev);
4018                 brcmf_sdiod_try_freeze(bus->sdiodev);
4019                 if (!wait) {
4020                         brcmf_sdio_bus_watchdog(bus);
4021                         /* Count the tick for reference */
4022                         bus->sdcnt.tickcnt++;
4023                         reinit_completion(&bus->watchdog_wait);
4024                 } else
4025                         break;
4026         }
4027         return 0;
4028 }
4029
4030 static void
4031 brcmf_sdio_watchdog(unsigned long data)
4032 {
4033         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4034
4035         if (bus->watchdog_tsk) {
4036                 complete(&bus->watchdog_wait);
4037                 /* Reschedule the watchdog */
4038                 if (bus->wd_timer_valid)
4039                         mod_timer(&bus->timer,
4040                                   jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS));
4041         }
4042 }
4043
4044 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4045         .stop = brcmf_sdio_bus_stop,
4046         .preinit = brcmf_sdio_bus_preinit,
4047         .txdata = brcmf_sdio_bus_txdata,
4048         .txctl = brcmf_sdio_bus_txctl,
4049         .rxctl = brcmf_sdio_bus_rxctl,
4050         .gettxq = brcmf_sdio_bus_gettxq,
4051         .wowl_config = brcmf_sdio_wowl_config,
4052         .get_ramsize = brcmf_sdio_bus_get_ramsize,
4053         .get_memdump = brcmf_sdio_bus_get_memdump,
4054 };
4055
4056 static void brcmf_sdio_firmware_callback(struct device *dev,
4057                                          const struct firmware *code,
4058                                          void *nvram, u32 nvram_len)
4059 {
4060         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4061         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
4062         struct brcmf_sdio *bus = sdiodev->bus;
4063         int err = 0;
4064         u8 saveclk;
4065
4066         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
4067
4068         if (!bus_if->drvr)
4069                 return;
4070
4071         /* try to download image and nvram to the dongle */
4072         bus->alp_only = true;
4073         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4074         if (err)
4075                 goto fail;
4076         bus->alp_only = false;
4077
4078         /* Start the watchdog timer */
4079         bus->sdcnt.tickcnt = 0;
4080         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
4081
4082         sdio_claim_host(sdiodev->func[1]);
4083
4084         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4085         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4086         if (bus->clkstate != CLK_AVAIL)
4087                 goto release;
4088
4089         /* Force clocks on backplane to be sure F2 interrupt propagates */
4090         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4091         if (!err) {
4092                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4093                                   (saveclk | SBSDIO_FORCE_HT), &err);
4094         }
4095         if (err) {
4096                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4097                 goto release;
4098         }
4099
4100         /* Enable function 2 (frame transfers) */
4101         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4102                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4103         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4104
4105
4106         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4107
4108         /* If F2 successfully enabled, set core and enable interrupts */
4109         if (!err) {
4110                 /* Set up the interrupt mask and enable interrupts */
4111                 bus->hostintmask = HOSTINTMASK;
4112                 w_sdreg32(bus, bus->hostintmask,
4113                           offsetof(struct sdpcmd_regs, hostintmask));
4114
4115                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4116         } else {
4117                 /* Disable F2 again */
4118                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4119                 goto release;
4120         }
4121
4122         if (brcmf_chip_sr_capable(bus->ci)) {
4123                 brcmf_sdio_sr_init(bus);
4124         } else {
4125                 /* Restore previous clock setting */
4126                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4127                                   saveclk, &err);
4128         }
4129
4130         if (err == 0) {
4131                 err = brcmf_sdiod_intr_register(sdiodev);
4132                 if (err != 0)
4133                         brcmf_err("intr register failed:%d\n", err);
4134         }
4135
4136         /* If we didn't come up, turn off backplane clock */
4137         if (err != 0)
4138                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4139
4140         sdio_release_host(sdiodev->func[1]);
4141
4142         err = brcmf_bus_start(dev);
4143         if (err != 0) {
4144                 brcmf_err("dongle is not responding\n");
4145                 goto fail;
4146         }
4147         return;
4148
4149 release:
4150         sdio_release_host(sdiodev->func[1]);
4151 fail:
4152         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4153         device_release_driver(dev);
4154 }
4155
4156 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4157 {
4158         int ret;
4159         struct brcmf_sdio *bus;
4160         struct workqueue_struct *wq;
4161
4162         brcmf_dbg(TRACE, "Enter\n");
4163
4164         /* Allocate private bus interface state */
4165         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4166         if (!bus)
4167                 goto fail;
4168
4169         bus->sdiodev = sdiodev;
4170         sdiodev->bus = bus;
4171         skb_queue_head_init(&bus->glom);
4172         bus->txbound = BRCMF_TXBOUND;
4173         bus->rxbound = BRCMF_RXBOUND;
4174         bus->txminmax = BRCMF_TXMINMAX;
4175         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4176
4177         /* platform specific configuration:
4178          *   alignments must be at least 4 bytes for ADMA
4179          */
4180         bus->head_align = ALIGNMENT;
4181         bus->sgentry_align = ALIGNMENT;
4182         if (sdiodev->pdata) {
4183                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4184                         bus->head_align = sdiodev->pdata->sd_head_align;
4185                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4186                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4187         }
4188
4189         /* single-threaded workqueue */
4190         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4191                                      dev_name(&sdiodev->func[1]->dev));
4192         if (!wq) {
4193                 brcmf_err("insufficient memory to create txworkqueue\n");
4194                 goto fail;
4195         }
4196         brcmf_sdiod_freezer_count(sdiodev);
4197         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4198         bus->brcmf_wq = wq;
4199
4200         /* attempt to attach to the dongle */
4201         if (!(brcmf_sdio_probe_attach(bus))) {
4202                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4203                 goto fail;
4204         }
4205
4206         spin_lock_init(&bus->rxctl_lock);
4207         spin_lock_init(&bus->txq_lock);
4208         init_waitqueue_head(&bus->ctrl_wait);
4209         init_waitqueue_head(&bus->dcmd_resp_wait);
4210
4211         /* Set up the watchdog timer */
4212         init_timer(&bus->timer);
4213         bus->timer.data = (unsigned long)bus;
4214         bus->timer.function = brcmf_sdio_watchdog;
4215
4216         /* Initialize watchdog thread */
4217         init_completion(&bus->watchdog_wait);
4218         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4219                                         bus, "brcmf_wdog/%s",
4220                                         dev_name(&sdiodev->func[1]->dev));
4221         if (IS_ERR(bus->watchdog_tsk)) {
4222                 pr_warn("brcmf_watchdog thread failed to start\n");
4223                 bus->watchdog_tsk = NULL;
4224         }
4225         /* Initialize DPC thread */
4226         bus->dpc_triggered = false;
4227         bus->dpc_running = false;
4228
4229         /* Assign bus interface call back */
4230         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4231         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4232         bus->sdiodev->bus_if->chip = bus->ci->chip;
4233         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4234
4235         /* default sdio bus header length for tx packet */
4236         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4237
4238         /* Attach to the common layer, reserve hdr space */
4239         ret = brcmf_attach(bus->sdiodev->dev);
4240         if (ret != 0) {
4241                 brcmf_err("brcmf_attach failed\n");
4242                 goto fail;
4243         }
4244
4245         /* Query the F2 block size, set roundup accordingly */
4246         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4247         bus->roundup = min(max_roundup, bus->blocksize);
4248
4249         /* Allocate buffers */
4250         if (bus->sdiodev->bus_if->maxctl) {
4251                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4252                 bus->rxblen =
4253                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4254                             ALIGNMENT) + bus->head_align;
4255                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4256                 if (!(bus->rxbuf)) {
4257                         brcmf_err("rxbuf allocation failed\n");
4258                         goto fail;
4259                 }
4260         }
4261
4262         sdio_claim_host(bus->sdiodev->func[1]);
4263
4264         /* Disable F2 to clear any intermediate frame state on the dongle */
4265         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4266
4267         bus->rxflow = false;
4268
4269         /* Done with backplane-dependent accesses, can drop clock... */
4270         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4271
4272         sdio_release_host(bus->sdiodev->func[1]);
4273
4274         /* ...and initialize clock/power states */
4275         bus->clkstate = CLK_SDONLY;
4276         bus->idletime = BRCMF_IDLE_INTERVAL;
4277         bus->idleclock = BRCMF_IDLE_ACTIVE;
4278
4279         /* SR state */
4280         bus->sr_enabled = false;
4281
4282         brcmf_sdio_debugfs_create(bus);
4283         brcmf_dbg(INFO, "completed!!\n");
4284
4285         ret = brcmf_sdio_get_fwnames(bus->ci, sdiodev);
4286         if (ret)
4287                 goto fail;
4288
4289         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4290                                      sdiodev->fw_name, sdiodev->nvram_name,
4291                                      brcmf_sdio_firmware_callback);
4292         if (ret != 0) {
4293                 brcmf_err("async firmware request failed: %d\n", ret);
4294                 goto fail;
4295         }
4296
4297         return bus;
4298
4299 fail:
4300         brcmf_sdio_remove(bus);
4301         return NULL;
4302 }
4303
4304 /* Detach and free everything */
4305 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4306 {
4307         brcmf_dbg(TRACE, "Enter\n");
4308
4309         if (bus) {
4310                 /* Stop watchdog task */
4311                 if (bus->watchdog_tsk) {
4312                         send_sig(SIGTERM, bus->watchdog_tsk, 1);
4313                         kthread_stop(bus->watchdog_tsk);
4314                         bus->watchdog_tsk = NULL;
4315                 }
4316
4317                 /* De-register interrupt handler */
4318                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4319
4320                 brcmf_detach(bus->sdiodev->dev);
4321
4322                 cancel_work_sync(&bus->datawork);
4323                 if (bus->brcmf_wq)
4324                         destroy_workqueue(bus->brcmf_wq);
4325
4326                 if (bus->ci) {
4327                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4328                                 sdio_claim_host(bus->sdiodev->func[1]);
4329                                 brcmf_sdio_wd_timer(bus, 0);
4330                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4331                                 /* Leave the device in state where it is
4332                                  * 'passive'. This is done by resetting all
4333                                  * necessary cores.
4334                                  */
4335                                 msleep(20);
4336                                 brcmf_chip_set_passive(bus->ci);
4337                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4338                                 sdio_release_host(bus->sdiodev->func[1]);
4339                         }
4340                         brcmf_chip_detach(bus->ci);
4341                 }
4342
4343                 kfree(bus->rxbuf);
4344                 kfree(bus->hdrbuf);
4345                 kfree(bus);
4346         }
4347
4348         brcmf_dbg(TRACE, "Disconnected\n");
4349 }
4350
4351 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4352 {
4353         /* Totally stop the timer */
4354         if (!wdtick && bus->wd_timer_valid) {
4355                 del_timer_sync(&bus->timer);
4356                 bus->wd_timer_valid = false;
4357                 bus->save_ms = wdtick;
4358                 return;
4359         }
4360
4361         /* don't start the wd until fw is loaded */
4362         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4363                 return;
4364
4365         if (wdtick) {
4366                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4367                         if (bus->wd_timer_valid)
4368                                 /* Stop timer and restart at new value */
4369                                 del_timer_sync(&bus->timer);
4370
4371                         /* Create timer again when watchdog period is
4372                            dynamically changed or in the first instance
4373                          */
4374                         bus->timer.expires =
4375                                 jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS);
4376                         add_timer(&bus->timer);
4377
4378                 } else {
4379                         /* Re arm the timer, at last watchdog period */
4380                         mod_timer(&bus->timer,
4381                                 jiffies + msecs_to_jiffies(BRCMF_WD_POLL_MS));
4382                 }
4383
4384                 bus->wd_timer_valid = true;
4385                 bus->save_ms = wdtick;
4386         }
4387 }
4388
4389 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4390 {
4391         int ret;
4392
4393         sdio_claim_host(bus->sdiodev->func[1]);
4394         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4395         sdio_release_host(bus->sdiodev->func[1]);
4396
4397         return ret;
4398 }
4399