1 /* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
14 #define pr_fmt(fmt) "%s: " fmt, __func__
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/thermal.h>
19 #include <linux/interrupt.h>
20 #include <linux/workqueue.h>
21 #include <linux/delay.h>
22 #include <linux/kernel.h>
24 #include <linux/slab.h>
25 #include <linux/msm_tsens.h>
26 #include <linux/err.h>
28 #include <linux/debugfs.h>
29 #include <linux/vmalloc.h>
30 #include <asm/arch_timer.h>
32 #define CREATE_TRACE_POINTS
33 #include <trace/trace_thermal.h>
35 #define TSENS_DRIVER_NAME "msm-tsens"
36 /* TSENS register info */
37 #define TSENS_UPPER_LOWER_INTERRUPT_CTRL(n) ((n) + 0x1000)
38 #define TSENS_INTERRUPT_EN BIT(0)
40 #define TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(n) ((n) + 0x1004)
41 #define TSENS_UPPER_STATUS_CLR BIT(21)
42 #define TSENS_LOWER_STATUS_CLR BIT(20)
43 #define TSENS_UPPER_THRESHOLD_MASK 0xffc00
44 #define TSENS_LOWER_THRESHOLD_MASK 0x3ff
45 #define TSENS_UPPER_THRESHOLD_SHIFT 10
47 #define TSENS_S0_STATUS_ADDR(n) ((n) + 0x1030)
48 #define TSENS_SN_ADDR_OFFSET 0x4
49 #define TSENS_SN_STATUS_TEMP_MASK 0x3ff
50 #define TSENS_SN_STATUS_LOWER_STATUS BIT(11)
51 #define TSENS_SN_STATUS_UPPER_STATUS BIT(12)
52 #define TSENS_STATUS_ADDR_OFFSET 2
54 #define TSENS_TRDY_ADDR(n) ((n) + 0x105c)
55 #define TSENS_TRDY_MASK BIT(0)
57 #define TSENS2_SN_STATUS_ADDR(n) ((n) + 0x1044)
58 #define TSENS2_SN_STATUS_VALID BIT(14)
59 #define TSENS2_SN_STATUS_VALID_MASK 0x4000
60 #define TSENS2_TRDY_ADDR(n) ((n) + 0x84)
62 #define TSENS4_TRDY_ADDR(n) ((n) + 0x1084)
64 #define TSENS_MTC_ZONE0_SW_MASK_ADDR(n) ((n) + 0x10c0)
65 #define TSENS_TH1_MTC_IN_EFFECT BIT(0)
66 #define TSENS_TH2_MTC_IN_EFFECT BIT(1)
67 #define TSENS_MTC_IN_EFFECT 0x3
68 #define TSENS_MTC_DISABLE 0x0
70 #define TSENS_MTC_ZONE0_LOG(n) ((n) + 0x10d0)
71 #define TSENS_LOGS_VALID_MASK 0x40000000
72 #define TSENS_LOGS_VALID_SHIFT 30
73 #define TSENS_LOGS_LATEST_MASK 0x0000001f
74 #define TSENS_LOGS_LOG1_MASK 0x000003e0
75 #define TSENS_LOGS_LOG2_MASK 0x00007c00
76 #define TSENS_LOGS_LOG3_MASK 0x000f8000
77 #define TSENS_LOGS_LOG4_MASK 0x01f00000
78 #define TSENS_LOGS_LOG5_MASK 0x3e000000
79 #define TSENS_LOGS_LOG1_SHIFT 5
80 #define TSENS_LOGS_LOG2_SHIFT 10
81 #define TSENS_LOGS_LOG3_SHIFT 15
82 #define TSENS_LOGS_LOG4_SHIFT 20
83 #define TSENS_LOGS_LOG5_SHIFT 25
85 /* TSENS_TM registers for 8996 */
86 #define TSENS_TM_INT_EN(n) ((n) + 0x1004)
87 #define TSENS_TM_CRITICAL_WD_BARK BIT(31)
88 #define TSENS_TM_CRITICAL_CYCLE_MONITOR BIT(30)
89 #define TSENS_TM_CRITICAL_INT_EN BIT(2)
90 #define TSENS_TM_UPPER_INT_EN BIT(1)
91 #define TSENS_TM_LOWER_INT_EN BIT(0)
92 #define TSENS_TM_UPPER_LOWER_INT_DISABLE 0xffffffff
94 #define TSENS_TM_UPPER_INT_MASK(n) (((n) & 0xffff0000) >> 16)
95 #define TSENS_TM_LOWER_INT_MASK(n) ((n) & 0xffff)
96 #define TSENS_TM_UPPER_LOWER_INT_STATUS(n) ((n) + 0x1008)
97 #define TSENS_TM_UPPER_LOWER_INT_CLEAR(n) ((n) + 0x100c)
98 #define TSENS_TM_UPPER_LOWER_INT_MASK(n) ((n) + 0x1010)
99 #define TSENS_TM_UPPER_INT_SET(n) (1 << (n + 16))
101 #define TSENS_TM_CRITICAL_INT_STATUS(n) ((n) + 0x1014)
102 #define TSENS_TM_CRITICAL_INT_CLEAR(n) ((n) + 0x1018)
103 #define TSENS_TM_CRITICAL_INT_MASK(n) ((n) + 0x101c)
105 #define TSENS_TM_UPPER_LOWER_THRESHOLD(n) ((n) + 0x1020)
106 #define TSENS_TM_UPPER_THRESHOLD_SET(n) ((n) << 12)
107 #define TSENS_TM_UPPER_THRESHOLD_VALUE_SHIFT(n) ((n) >> 12)
108 #define TSENS_TM_LOWER_THRESHOLD_VALUE(n) ((n) & 0xfff)
109 #define TSENS_TM_UPPER_THRESHOLD_VALUE(n) (((n) & 0xfff000) >> 12)
110 #define TSENS_TM_UPPER_THRESHOLD_MASK 0xfff000
111 #define TSENS_TM_LOWER_THRESHOLD_MASK 0xfff
112 #define TSENS_TM_UPPER_THRESHOLD_SHIFT 12
114 #define TSENS_TM_SN_CRITICAL_THRESHOLD_MASK 0xfff
115 #define TSENS_TM_SN_CRITICAL_THRESHOLD(n) ((n) + 0x1060)
116 #define TSENS_TM_SN_STATUS(n) ((n) + 0x10a0)
117 #define TSENS_TM_SN_STATUS_VALID_BIT BIT(21)
118 #define TSENS_TM_SN_STATUS_CRITICAL_STATUS BIT(19)
119 #define TSENS_TM_SN_STATUS_UPPER_STATUS BIT(18)
120 #define TSENS_TM_SN_STATUS_LOWER_STATUS BIT(17)
121 #define TSENS_TM_SN_LAST_TEMP_MASK 0xfff
123 #define TSENS_TM_TRDY(n) ((n) + 0x10e4)
124 #define TSENS_TM_CODE_BIT_MASK 0xfff
125 #define TSENS_TM_CODE_SIGN_BIT 0x800
127 #define TSENS_CONTROLLER_ID(n) ((n) + 0x1000)
128 #define TSENS_DEBUG_CONTROL(n) ((n) + 0x1130)
129 #define TSENS_DEBUG_DATA(n) ((n) + 0x1134)
130 #define TSENS_TM_MTC_ZONE0_SW_MASK_ADDR(n) ((n) + 0x1140)
131 #define TSENS_TM_MTC_ZONE0_LOG(n) ((n) + 0x1150)
132 #define TSENS_TM_MTC_ZONE0_HISTORY(n) ((n) + 0x1160)
133 #define TSENS_RESET_HISTORY_MASK 0x4
134 #define TSENS_RESET_HISTORY_SHIFT 2
135 #define TSENS_PS_RED_CMD_MASK 0x3ff00000
136 #define TSENS_PS_YELLOW_CMD_MASK 0x000ffc00
137 #define TSENS_PS_COOL_CMD_MASK 0x000003ff
138 #define TSENS_PS_YELLOW_CMD_SHIFT 0xa
139 #define TSENS_PS_RED_CMD_SHIFT 0x14
140 /* End TSENS_TM registers for 8996 */
142 #define TSENS_CTRL_ADDR(n) (n)
143 #define TSENS_EN BIT(0)
145 #define TSENS_CAL_DEGC_POINT1 30
146 #define TSENS_CAL_DEGC_POINT2 120
147 #define TSENS_SLOPE_FACTOR 1000
149 /* TSENS register data */
150 #define TSENS_TRDY_RDY_MIN_TIME 2000
151 #define TSENS_TRDY_RDY_MAX_TIME 2100
152 #define TSENS_THRESHOLD_MAX_CODE 0x3ff
153 #define TSENS_THRESHOLD_MIN_CODE 0x0
155 #define TSENS_TYPE0 0
156 #define TSENS_TYPE2 2
157 #define TSENS_TYPE3 3
158 #define TSENS_TYPE4 4
161 #define TSENS_DBG_BUS_ID_0 0
162 #define TSENS_DBG_BUS_ID_1 1
163 #define TSENS_DBG_BUS_ID_2 2
164 #define TSENS_DBG_BUS_ID_15 15
165 #define TSENS_DEBUG_LOOP_COUNT_ID_0 2
166 #define TSENS_DEBUG_LOOP_COUNT 5
167 #define TSENS_DEBUG_STATUS_REG_START 10
168 #define TSENS_DEBUG_OFFSET_RANGE 16
169 #define TSENS_DEBUG_OFFSET_WORD1 0x4
170 #define TSENS_DEBUG_OFFSET_WORD2 0x8
171 #define TSENS_DEBUG_OFFSET_WORD3 0xc
172 #define TSENS_DEBUG_OFFSET_ROW 0x10
173 #define TSENS_DEBUG_DECIDEGC -950
174 #define TSENS_DEBUG_CYCLE_MS 64
175 #define TSENS_DEBUG_POLL_MS 200
176 #define TSENS_DEBUG_BUS_ID2_MIN_CYCLE 50
177 #define TSENS_DEBUG_BUS_ID2_MAX_CYCLE 51
178 #define TSENS_DEBUG_ID_MASK_1_4 0xffffffe1
180 static uint32_t tsens_sec_to_msec_value = 1000;
181 static uint32_t tsens_completion_timeout_hz = HZ/2;
182 static uint32_t tsens_poll_check = 1;
184 /* Trips: warm and cool */
185 enum tsens_trip_type {
191 enum tsens_tm_trip_type {
192 TSENS_TM_TRIP_WARM = 0,
194 TSENS_TM_TRIP_CRITICAL,
198 #define TSENS_WRITABLE_TRIPS_MASK ((1 << TSENS_TRIP_NUM) - 1)
199 #define TSENS_TM_WRITABLE_TRIPS_MASK ((1 << TSENS_TM_TRIP_NUM) - 1)
201 struct tsens_thrshld_state {
205 unsigned int high_adc_code;
206 unsigned int low_adc_code;
212 struct tsens_tm_device_sensor {
213 struct thermal_zone_device *tz_dev;
214 struct tsens_tm_device *tm;
215 enum thermal_device_mode mode;
216 /* Physical HW sensor number */
217 unsigned int sensor_hw_num;
218 /* Software index. This is keep track of the HW/SW
219 * sensor_ID mapping */
220 unsigned int sensor_sw_id;
221 unsigned int sensor_client_id;
223 int calib_data_point1;
224 int calib_data_point2;
225 uint32_t slope_mul_tsens_factor;
226 struct tsens_thrshld_state debug_thr_state_copy;
227 /* dbg_adc_code logs either the raw ADC code or temperature values in
228 * decidegC based on the controller settings.
231 u32 wa_temp1_calib_offset_factor;
232 u32 wa_temp2_calib_offset_factor;
235 struct tsens_dbg_counter {
236 uint32_t dbg_count[10];
238 unsigned long long time_stmp[10];
241 struct tsens_sensor_dbg_info {
242 unsigned long temp[10];
244 unsigned long long time_stmp[10];
248 struct tsens_mtc_sysfs {
256 struct tsens_tm_device {
257 struct platform_device *pdev;
258 struct workqueue_struct *tsens_critical_wq;
259 struct list_head list;
261 bool prev_reading_avail;
262 bool calibration_less_mode;
263 bool tsens_local_init;
264 bool gain_offset_programmed;
265 bool cycle_compltn_monitor;
268 uint32_t tsens_num_sensor;
269 uint32_t cycle_compltn_monitor_val;
270 uint32_t wd_bark_val;
272 int tsens_critical_irq;
273 void __iomem *tsens_addr;
274 void __iomem *tsens_calib_addr;
277 struct resource *res_tsens_mem;
278 struct resource *res_calib_mem;
280 bool tsens_valid_status_check;
281 struct tsens_dbg_counter tsens_thread_iq_dbg;
282 struct tsens_sensor_dbg_info sensor_dbg_info[16];
283 int tsens_upper_irq_cnt;
284 int tsens_lower_irq_cnt;
285 int tsens_critical_irq_cnt;
286 int tsens_critical_wd_cnt;
287 struct delayed_work tsens_critical_poll_test;
288 struct completion tsens_rslt_completion;
289 struct tsens_mtc_sysfs mtcsys;
290 spinlock_t tsens_crit_lock;
291 spinlock_t tsens_upp_low_lock;
293 struct tsens_dbg_counter crit_timestamp_last_run;
294 struct tsens_dbg_counter crit_timestamp_last_interrupt_handled;
295 struct tsens_dbg_counter crit_timestamp_last_poll_request;
296 u64 qtimer_val_detection_start;
297 u64 qtimer_val_last_detection_interrupt;
298 u64 qtimer_val_last_polling_check;
299 bool tsens_critical_poll;
300 struct tsens_tm_device_sensor sensor[0];
303 LIST_HEAD(tsens_device_list);
305 static char dbg_buff[1024];
306 static struct dentry *dent;
307 static struct dentry *dfile_stats;
309 static struct of_device_id tsens_match[] = {
310 { .compatible = "qcom,msm8996-tsens",
312 { .compatible = "qcom,msmtitanium-tsens",
314 { .compatible = "qcom,msm8998-tsens",
316 { .compatible = "qcom,msmhamster-tsens",
318 { .compatible = "qcom,sdm660-tsens",
320 { .compatible = "qcom,sdm630-tsens",
325 static struct tsens_tm_device *tsens_controller_is_present(void)
327 struct tsens_tm_device *tmdev_chip = NULL;
329 if (list_empty(&tsens_device_list)) {
330 pr_err("%s: TSENS controller not available\n", __func__);
334 list_for_each_entry(tmdev_chip, &tsens_device_list, list)
340 static int32_t get_tsens_sensor_for_client_id(struct tsens_tm_device *tmdev,
341 uint32_t sensor_client_id)
343 bool id_found = false;
345 struct device_node *of_node = NULL;
346 const struct of_device_id *id;
348 of_node = tmdev->pdev->dev.of_node;
349 if (of_node == NULL) {
350 pr_err("Invalid of_node??\n");
354 if (!of_match_node(tsens_match, of_node)) {
355 pr_err("Need to read SoC specific fuse map\n");
359 id = of_match_node(tsens_match, of_node);
361 pr_err("can not find tsens_match of_node\n");
365 if (!strcmp(id->compatible, "qcom,msm8996-tsens") ||
366 (!strcmp(id->compatible, "qcom,msm8998-tsens")) ||
367 (!strcmp(id->compatible, "qcom,sdm660-tsens")) ||
368 (!strcmp(id->compatible, "qcom,sdm630-tsens")) ||
369 (!strcmp(id->compatible, "qcom,msmhamster-tsens"))) {
370 while (i < tmdev->tsens_num_sensor && !id_found) {
371 if (tmdev->sensor[i].sensor_client_id ==
374 return tmdev->sensor[i].sensor_hw_num;
379 return sensor_client_id;
387 static struct tsens_tm_device *get_tsens_controller_for_client_id(
388 uint32_t sensor_client_id)
390 struct tsens_tm_device *tmdev_chip = NULL;
391 bool id_found = false;
394 list_for_each_entry(tmdev_chip, &tsens_device_list, list) {
396 while (i < tmdev_chip->tsens_num_sensor && !id_found) {
397 if (tmdev_chip->sensor[i].sensor_client_id ==
412 static struct tsens_tm_device *get_all_tsens_controller_sensor_count(
413 uint32_t *sensor_count)
415 struct tsens_tm_device *tmdev_chip = NULL;
417 list_for_each_entry(tmdev_chip, &tsens_device_list, list)
418 *sensor_count += tmdev_chip->tsens_num_sensor;
423 int tsens_is_ready(void)
425 struct tsens_tm_device *tmdev = NULL;
427 tmdev = tsens_controller_is_present();
429 return -EPROBE_DEFER;
431 return tmdev->is_ready;
433 EXPORT_SYMBOL(tsens_is_ready);
435 static int tsens_get_sw_id_mapping_for_controller(
438 struct tsens_tm_device *tmdev)
441 bool id_found = false;
443 while (i < tmdev->tsens_num_sensor && !id_found) {
444 if (sensor_hw_num == tmdev->sensor[i].sensor_hw_num) {
445 *sensor_sw_idx = tmdev->sensor[i].sensor_sw_id;
457 int tsens_get_hw_id_mapping(int thermal_sensor_num, int *sensor_client_id)
459 struct tsens_tm_device *tmdev = NULL;
460 struct device_node *of_node = NULL;
461 const struct of_device_id *id;
462 uint32_t tsens_max_sensors = 0, idx = 0, i = 0;
464 if (list_empty(&tsens_device_list)) {
465 pr_err("%s: TSENS controller not available\n", __func__);
466 return -EPROBE_DEFER;
469 list_for_each_entry(tmdev, &tsens_device_list, list)
470 tsens_max_sensors += tmdev->tsens_num_sensor;
472 if (tsens_max_sensors != thermal_sensor_num) {
473 pr_err("TSENS total sensors is %d, thermal expects:%d\n",
474 tsens_max_sensors, thermal_sensor_num);
478 list_for_each_entry(tmdev, &tsens_device_list, list) {
479 of_node = tmdev->pdev->dev.of_node;
480 if (of_node == NULL) {
481 pr_err("Invalid of_node??\n");
485 if (!of_match_node(tsens_match, of_node)) {
486 pr_err("Need to read SoC specific fuse map\n");
490 id = of_match_node(tsens_match, of_node);
492 pr_err("can not find tsens_match of_node\n");
496 if (!strcmp(id->compatible, "qcom,msm8996-tsens") ||
497 (!strcmp(id->compatible, "qcom,msm8998-tsens")) ||
498 (!strcmp(id->compatible, "qcom,sdm660-tsens")) ||
499 (!strcmp(id->compatible, "qcom,sdm630-tsens")) ||
500 (!strcmp(id->compatible, "qcom,msmhamster-tsens"))) {
501 /* Assign client id's that is used to get the
502 * controller and hw_sensor details
504 for (i = 0; i < tmdev->tsens_num_sensor; i++) {
505 sensor_client_id[idx] =
506 tmdev->sensor[i].sensor_client_id;
510 /* Assign the corresponding hw sensor number
511 * prior to support for multiple controllres
513 for (i = 0; i < tmdev->tsens_num_sensor; i++) {
514 sensor_client_id[idx] =
515 tmdev->sensor[i].sensor_hw_num;
523 EXPORT_SYMBOL(tsens_get_hw_id_mapping);
526 zonemask_show(struct device *dev, struct device_attribute *attr, char *buf)
528 struct tsens_tm_device *tmdev = NULL;
530 tmdev = tsens_controller_is_present();
532 pr_err("No TSENS controller present\n");
533 return -EPROBE_DEFER;
536 return snprintf(buf, PAGE_SIZE,
537 "Zone =%d th1=%d th2=%d\n" , tmdev->mtcsys.zone_mtc,
538 tmdev->mtcsys.th1 , tmdev->mtcsys.th2);
542 zonemask_store(struct device *dev, struct device_attribute *attr,
543 const char *buf, size_t count)
546 struct tsens_tm_device *tmdev = NULL;
548 tmdev = tsens_controller_is_present();
550 pr_err("No TSENS controller present\n");
551 return -EPROBE_DEFER;
554 ret = sscanf(buf, "%d %d %d", &tmdev->mtcsys.zone_mtc ,
555 &tmdev->mtcsys.th1 , &tmdev->mtcsys.th2);
557 if (ret != TSENS_ZONEMASK_PARAMS) {
558 pr_err("Invalid command line arguments\n");
561 pr_debug("store zone_mtc=%d th1=%d th2=%d\n",
562 tmdev->mtcsys.zone_mtc,
563 tmdev->mtcsys.th1 , tmdev->mtcsys.th2);
564 ret = tsens_set_mtc_zone_sw_mask(tmdev->mtcsys.zone_mtc ,
565 tmdev->mtcsys.th1 , tmdev->mtcsys.th2);
567 pr_err("Invalid command line arguments\n");
576 zonelog_show(struct device *dev, struct device_attribute *attr, char *buf)
578 int ret, zlog[TSENS_MTC_ZONE_LOG_SIZE];
579 struct tsens_tm_device *tmdev = NULL;
581 tmdev = tsens_controller_is_present();
583 pr_err("No TSENS controller present\n");
584 return -EPROBE_DEFER;
587 ret = tsens_get_mtc_zone_log(tmdev->mtcsys.zone_log , zlog);
589 pr_err("Invalid command line arguments\n");
593 return snprintf(buf, PAGE_SIZE,
594 "Log[0]=%d\nLog[1]=%d\nLog[2]=%d\nLog[3]=%d\nLog[4]=%d\nLog[5]=%d\n",
595 zlog[0], zlog[1], zlog[2], zlog[3], zlog[4], zlog[5]);
599 zonelog_store(struct device *dev, struct device_attribute *attr,
600 const char *buf, size_t count)
603 struct tsens_tm_device *tmdev = NULL;
605 tmdev = tsens_controller_is_present();
607 pr_err("No TSENS controller present\n");
608 return -EPROBE_DEFER;
611 ret = kstrtou32(buf, 0, &tmdev->mtcsys.zone_log);
613 pr_err("Invalid command line arguments\n");
621 zonehist_show(struct device *dev, struct device_attribute *attr, char *buf)
623 int ret, zhist[TSENS_MTC_ZONE_HISTORY_SIZE];
624 struct tsens_tm_device *tmdev = NULL;
626 tmdev = tsens_controller_is_present();
628 pr_err("No TSENS controller present\n");
629 return -EPROBE_DEFER;
632 ret = tsens_get_mtc_zone_history(tmdev->mtcsys.zone_hist , zhist);
634 pr_err("Invalid command line arguments\n");
638 return snprintf(buf, PAGE_SIZE,
639 "Cool = %d\nYellow = %d\nRed = %d\n",
640 zhist[0], zhist[1], zhist[2]);
644 zonehist_store(struct device *dev, struct device_attribute *attr,
645 const char *buf, size_t count)
648 struct tsens_tm_device *tmdev = NULL;
650 tmdev = tsens_controller_is_present();
652 pr_err("No TSENS controller present\n");
653 return -EPROBE_DEFER;
656 ret = kstrtou32(buf, 0, &tmdev->mtcsys.zone_hist);
658 pr_err("Invalid command line arguments\n");
666 static struct device_attribute tsens_mtc_dev_attr[] = {
667 __ATTR(zonemask, 0644, zonemask_show, zonemask_store),
668 __ATTR(zonelog, 0644, zonelog_show, zonelog_store),
669 __ATTR(zonehist, 0644, zonehist_show, zonehist_store),
672 static int create_tsens_mtc_sysfs(struct platform_device *pdev)
675 struct device_attribute *attr_ptr = NULL;
677 attr_ptr = tsens_mtc_dev_attr;
679 for (i = 0; i < ARRAY_SIZE(tsens_mtc_dev_attr); i++) {
680 result = device_create_file(&pdev->dev, &attr_ptr[i]);
685 pr_debug("create_tsens_mtc_sysfs success\n");
690 for (i--; i >= 0; i--)
691 device_remove_file(&pdev->dev, &attr_ptr[i]);
696 static int tsens_tz_code_to_degc(int adc_code, int sensor_sw_id,
697 struct tsens_tm_device *tmdev)
699 int degc, num, den, idx;
702 num = ((adc_code * tmdev->tsens_factor) -
703 tmdev->sensor[idx].offset);
704 den = (int) tmdev->sensor[idx].slope_mul_tsens_factor;
707 degc = ((num + (den/2))/den);
709 degc = ((num - (den/2))/den);
713 pr_debug("raw_code:0x%x, sensor_num:%d, degc:%d, offset:%d\n",
714 adc_code, idx, degc, tmdev->sensor[idx].offset);
719 static int tsens_tz_degc_to_code(int degc, int idx,
720 struct tsens_tm_device *tmdev)
722 int code = ((degc * tmdev->sensor[idx].slope_mul_tsens_factor)
723 + tmdev->sensor[idx].offset)/tmdev->tsens_factor;
725 if (code > TSENS_THRESHOLD_MAX_CODE)
726 code = TSENS_THRESHOLD_MAX_CODE;
727 else if (code < TSENS_THRESHOLD_MIN_CODE)
728 code = TSENS_THRESHOLD_MIN_CODE;
729 pr_debug("raw_code:0x%x, sensor_num:%d, degc:%d\n",
734 static int msm_tsens_get_temp(int sensor_client_id, int *temp)
737 void __iomem *sensor_addr;
738 void __iomem *trdy_addr;
739 int sensor_sw_id = -EINVAL, rc = 0, last_temp = 0, last_temp2 = 0;
740 int last_temp3 = 0, last_temp_mask, valid_status_mask, code_mask = 0;
741 bool last_temp_valid = false, last_temp2_valid = false;
742 bool last_temp3_valid = false;
743 struct tsens_tm_device *tmdev = NULL;
744 uint32_t sensor_hw_num = 0;
746 tmdev = get_tsens_controller_for_client_id(sensor_client_id);
748 pr_err("TSENS early init not done\n");
749 return -EPROBE_DEFER;
752 pr_debug("sensor_client_id:%d\n", sensor_client_id);
754 sensor_hw_num = get_tsens_sensor_for_client_id(tmdev, sensor_client_id);
755 if (sensor_hw_num < 0) {
756 pr_err("cannot read the temperature\n");
757 return sensor_hw_num;
759 pr_debug("sensor_hw_num:%d\n", sensor_hw_num);
761 if (tmdev->tsens_type == TSENS_TYPE2) {
762 trdy_addr = TSENS2_TRDY_ADDR(tmdev->tsens_addr);
763 sensor_addr = TSENS2_SN_STATUS_ADDR(tmdev->tsens_addr);
764 } else if (tmdev->tsens_type == TSENS_TYPE3) {
765 trdy_addr = TSENS_TM_TRDY(tmdev->tsens_addr);
766 sensor_addr = TSENS_TM_SN_STATUS(tmdev->tsens_addr);
767 } else if (tmdev->tsens_type == TSENS_TYPE4) {
768 trdy_addr = TSENS4_TRDY_ADDR(tmdev->tsens_addr);
769 sensor_addr = TSENS2_SN_STATUS_ADDR(tmdev->tsens_addr);
771 trdy_addr = TSENS_TRDY_ADDR(tmdev->tsens_addr);
772 sensor_addr = TSENS_S0_STATUS_ADDR(tmdev->tsens_addr);
775 if ((!tmdev->prev_reading_avail) && !tmdev->tsens_valid_status_check) {
776 while (!((readl_relaxed_no_log(trdy_addr)) & TSENS_TRDY_MASK))
777 usleep_range(TSENS_TRDY_RDY_MIN_TIME,
778 TSENS_TRDY_RDY_MAX_TIME);
779 tmdev->prev_reading_avail = true;
782 if (tmdev->tsens_type == TSENS_TYPE3)
783 last_temp_mask = TSENS_TM_SN_LAST_TEMP_MASK;
785 last_temp_mask = TSENS_SN_STATUS_TEMP_MASK;
787 code = readl_relaxed_no_log(sensor_addr +
788 (sensor_hw_num << TSENS_STATUS_ADDR_OFFSET));
789 last_temp = code & last_temp_mask;
791 if (tmdev->tsens_valid_status_check) {
792 if (tmdev->tsens_type == TSENS_TYPE3)
793 valid_status_mask = TSENS_TM_SN_STATUS_VALID_BIT;
795 valid_status_mask = TSENS2_SN_STATUS_VALID;
796 if (code & valid_status_mask)
797 last_temp_valid = true;
799 code = readl_relaxed_no_log(sensor_addr +
800 (sensor_hw_num << TSENS_STATUS_ADDR_OFFSET));
801 last_temp2 = code & last_temp_mask;
802 if (code & valid_status_mask) {
803 last_temp = last_temp2;
804 last_temp2_valid = true;
806 code = readl_relaxed_no_log(sensor_addr +
808 TSENS_STATUS_ADDR_OFFSET));
809 last_temp3 = code & last_temp_mask;
810 if (code & valid_status_mask) {
811 last_temp = last_temp3;
812 last_temp3_valid = true;
818 if ((tmdev->tsens_valid_status_check) &&
819 (!last_temp_valid && !last_temp2_valid && !last_temp3_valid)) {
820 if (last_temp == last_temp2)
821 last_temp = last_temp2;
822 else if (last_temp2 == last_temp3)
823 last_temp = last_temp3;
826 if (tmdev->tsens_type != TSENS_TYPE3) {
827 /* Obtain SW index to map the corresponding thermal zone's
828 * offset and slope for code to degc conversion. */
829 rc = tsens_get_sw_id_mapping_for_controller(sensor_hw_num,
830 &sensor_sw_id, tmdev);
832 pr_err("tsens mapping index not found\n");
836 *temp = tsens_tz_code_to_degc(last_temp, sensor_sw_id, tmdev);
838 if (last_temp & TSENS_TM_CODE_SIGN_BIT) {
839 /* Sign extension for negative value */
840 code_mask = ~TSENS_TM_CODE_BIT_MASK;
841 last_temp |= code_mask;
846 tmdev->sensor[sensor_hw_num].dbg_adc_code = last_temp;
848 trace_tsens_read(*temp, sensor_client_id);
853 static int tsens_tz_get_temp(struct thermal_zone_device *thermal,
856 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
857 struct tsens_tm_device *tmdev = NULL;
861 if (!tm_sensor || !temp)
864 tmdev = tm_sensor->tm;
868 rc = msm_tsens_get_temp(tm_sensor->sensor_client_id, temp);
872 idx = tmdev->sensor_dbg_info[tm_sensor->sensor_hw_num].idx;
873 tmdev->sensor_dbg_info[tm_sensor->sensor_hw_num].temp[idx%10] = *temp;
874 tmdev->sensor_dbg_info[tm_sensor->sensor_hw_num].time_stmp[idx%10] =
876 tmdev->sensor_dbg_info[tm_sensor->sensor_hw_num].adccode[idx%10] =
877 tmdev->sensor[tm_sensor->sensor_hw_num].dbg_adc_code;
879 tmdev->sensor_dbg_info[tm_sensor->sensor_hw_num].idx = idx;
884 int tsens_get_temp(struct tsens_device *device, int *temp)
888 if (tsens_is_ready() <= 0) {
889 pr_debug("TSENS early init not done\n");
890 return -EPROBE_DEFER;
893 rc = msm_tsens_get_temp(device->sensor_num, temp);
899 EXPORT_SYMBOL(tsens_get_temp);
901 int tsens_get_max_sensor_num(uint32_t *tsens_num_sensors)
903 if (tsens_is_ready() <= 0) {
904 pr_debug("TSENS early init not done\n");
905 return -EPROBE_DEFER;
908 *tsens_num_sensors = 0;
910 if (get_all_tsens_controller_sensor_count(tsens_num_sensors) == NULL)
913 pr_debug("%d\n", *tsens_num_sensors);
917 EXPORT_SYMBOL(tsens_get_max_sensor_num);
919 static int tsens_tz_get_mode(struct thermal_zone_device *thermal,
920 enum thermal_device_mode *mode)
922 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
924 if (!tm_sensor || !mode)
927 *mode = tm_sensor->mode;
932 static int tsens_tz_get_trip_type(struct thermal_zone_device *thermal,
933 int trip, enum thermal_trip_type *type)
935 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
937 if (!tm_sensor || trip < 0 || !type)
941 case TSENS_TRIP_WARM:
942 *type = THERMAL_TRIP_CONFIGURABLE_HI;
944 case TSENS_TRIP_COOL:
945 *type = THERMAL_TRIP_CONFIGURABLE_LOW;
954 static int tsens_tm_get_trip_type(struct thermal_zone_device *thermal,
955 int trip, enum thermal_trip_type *type)
957 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
959 if (!tm_sensor || trip < 0 || !type)
963 case TSENS_TM_TRIP_WARM:
964 *type = THERMAL_TRIP_CONFIGURABLE_HI;
966 case TSENS_TM_TRIP_COOL:
967 *type = THERMAL_TRIP_CONFIGURABLE_LOW;
976 static int tsens_tm_activate_trip_type(struct thermal_zone_device *thermal,
977 int trip, enum thermal_trip_activation_mode mode)
979 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
980 unsigned int reg_cntl, mask;
982 struct tsens_tm_device *tmdev = NULL;
985 /* clear the interrupt and unmask */
986 if (!tm_sensor || trip < 0)
989 tmdev = tm_sensor->tm;
993 spin_lock_irqsave(&tmdev->tsens_upp_low_lock, flags);
994 mask = (tm_sensor->sensor_hw_num);
996 case TSENS_TM_TRIP_CRITICAL:
997 tmdev->sensor[tm_sensor->sensor_hw_num].
998 debug_thr_state_copy.crit_th_state = mode;
999 reg_cntl = readl_relaxed(TSENS_TM_CRITICAL_INT_MASK
1000 (tmdev->tsens_addr));
1001 if (mode == THERMAL_TRIP_ACTIVATION_DISABLED)
1002 writel_relaxed(reg_cntl | (1 << mask),
1003 (TSENS_TM_CRITICAL_INT_MASK
1004 (tmdev->tsens_addr)));
1006 writel_relaxed(reg_cntl & ~(1 << mask),
1007 (TSENS_TM_CRITICAL_INT_MASK
1008 (tmdev->tsens_addr)));
1010 case TSENS_TM_TRIP_WARM:
1011 tmdev->sensor[tm_sensor->sensor_hw_num].
1012 debug_thr_state_copy.high_th_state = mode;
1013 reg_cntl = readl_relaxed(TSENS_TM_UPPER_LOWER_INT_MASK
1014 (tmdev->tsens_addr));
1015 if (mode == THERMAL_TRIP_ACTIVATION_DISABLED)
1016 writel_relaxed(reg_cntl |
1017 (TSENS_TM_UPPER_INT_SET(mask)),
1018 (TSENS_TM_UPPER_LOWER_INT_MASK
1019 (tmdev->tsens_addr)));
1021 writel_relaxed(reg_cntl &
1022 ~(TSENS_TM_UPPER_INT_SET(mask)),
1023 (TSENS_TM_UPPER_LOWER_INT_MASK
1024 (tmdev->tsens_addr)));
1026 case TSENS_TM_TRIP_COOL:
1027 tmdev->sensor[tm_sensor->sensor_hw_num].
1028 debug_thr_state_copy.low_th_state = mode;
1029 reg_cntl = readl_relaxed(TSENS_TM_UPPER_LOWER_INT_MASK
1030 (tmdev->tsens_addr));
1031 if (mode == THERMAL_TRIP_ACTIVATION_DISABLED)
1032 writel_relaxed(reg_cntl | (1 << mask),
1033 (TSENS_TM_UPPER_LOWER_INT_MASK(tmdev->tsens_addr)));
1035 writel_relaxed(reg_cntl & ~(1 << mask),
1036 (TSENS_TM_UPPER_LOWER_INT_MASK(tmdev->tsens_addr)));
1042 spin_unlock_irqrestore(&tmdev->tsens_upp_low_lock, flags);
1043 /* Activate and enable the respective trip threshold setting */
1049 static int tsens_tz_activate_trip_type(struct thermal_zone_device *thermal,
1050 int trip, enum thermal_trip_activation_mode mode)
1052 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
1053 unsigned int reg_cntl, code, hi_code, lo_code, mask;
1054 struct tsens_tm_device *tmdev = NULL;
1056 if (!tm_sensor || trip < 0)
1059 tmdev = tm_sensor->tm;
1063 lo_code = TSENS_THRESHOLD_MIN_CODE;
1064 hi_code = TSENS_THRESHOLD_MAX_CODE;
1066 reg_cntl = readl_relaxed((TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
1067 (tmdev->tsens_addr) +
1068 (tm_sensor->sensor_hw_num *
1069 TSENS_SN_ADDR_OFFSET)));
1072 case TSENS_TRIP_WARM:
1073 tmdev->sensor[tm_sensor->sensor_hw_num].
1074 debug_thr_state_copy.high_th_state = mode;
1076 code = (reg_cntl & TSENS_UPPER_THRESHOLD_MASK)
1077 >> TSENS_UPPER_THRESHOLD_SHIFT;
1078 mask = TSENS_UPPER_STATUS_CLR;
1080 if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
1081 lo_code = (reg_cntl & TSENS_LOWER_THRESHOLD_MASK);
1083 case TSENS_TRIP_COOL:
1084 tmdev->sensor[tm_sensor->sensor_hw_num].
1085 debug_thr_state_copy.low_th_state = mode;
1087 code = (reg_cntl & TSENS_LOWER_THRESHOLD_MASK);
1088 mask = TSENS_LOWER_STATUS_CLR;
1090 if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
1091 hi_code = (reg_cntl & TSENS_UPPER_THRESHOLD_MASK)
1092 >> TSENS_UPPER_THRESHOLD_SHIFT;
1098 if (mode == THERMAL_TRIP_ACTIVATION_DISABLED)
1099 writel_relaxed(reg_cntl | mask,
1100 (TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tmdev->tsens_addr) +
1101 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET)));
1104 writel_relaxed(reg_cntl & ~mask,
1105 (TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tmdev->tsens_addr) +
1106 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET)));
1107 /* Enable the thresholds */
1112 static int tsens_tm_get_trip_temp(struct thermal_zone_device *thermal,
1113 int trip, int *temp)
1115 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
1116 int reg_cntl, code_mask;
1117 struct tsens_tm_device *tmdev = NULL;
1119 if (!tm_sensor || trip < 0 || !temp)
1122 tmdev = tm_sensor->tm;
1127 case TSENS_TM_TRIP_CRITICAL:
1128 reg_cntl = readl_relaxed((TSENS_TM_SN_CRITICAL_THRESHOLD
1129 (tmdev->tsens_addr)) +
1130 (tm_sensor->sensor_hw_num *
1131 TSENS_SN_ADDR_OFFSET));
1132 if (reg_cntl & TSENS_TM_CODE_SIGN_BIT) {
1133 /* Sign extension for negative value */
1134 code_mask = ~TSENS_TM_CODE_BIT_MASK;
1135 reg_cntl |= code_mask;
1138 case TSENS_TM_TRIP_WARM:
1139 reg_cntl = readl_relaxed((TSENS_TM_UPPER_LOWER_THRESHOLD
1140 (tmdev->tsens_addr)) +
1141 (tm_sensor->sensor_hw_num *
1142 TSENS_SN_ADDR_OFFSET));
1143 reg_cntl = TSENS_TM_UPPER_THRESHOLD_VALUE(reg_cntl);
1144 if (reg_cntl & TSENS_TM_CODE_SIGN_BIT) {
1145 /* Sign extension for negative value */
1146 code_mask = ~TSENS_TM_CODE_BIT_MASK;
1147 reg_cntl |= code_mask;
1150 case TSENS_TM_TRIP_COOL:
1151 reg_cntl = readl_relaxed((TSENS_TM_UPPER_LOWER_THRESHOLD
1152 (tmdev->tsens_addr)) +
1153 (tm_sensor->sensor_hw_num *
1154 TSENS_SN_ADDR_OFFSET));
1155 reg_cntl = TSENS_TM_LOWER_THRESHOLD_VALUE(reg_cntl);
1156 if (reg_cntl & TSENS_TM_CODE_SIGN_BIT) {
1157 /* Sign extension for negative value */
1158 code_mask = ~TSENS_TM_CODE_BIT_MASK;
1159 reg_cntl |= code_mask;
1171 static int tsens_tz_get_trip_temp(struct thermal_zone_device *thermal,
1172 int trip, int *temp)
1174 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
1176 int sensor_sw_id = -EINVAL, rc = 0;
1177 struct tsens_tm_device *tmdev = NULL;
1179 if (!tm_sensor || trip < 0 || !temp)
1182 tmdev = tm_sensor->tm;
1186 reg = readl_relaxed(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
1187 (tmdev->tsens_addr) +
1188 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET));
1190 case TSENS_TRIP_WARM:
1191 reg = (reg & TSENS_UPPER_THRESHOLD_MASK) >>
1192 TSENS_UPPER_THRESHOLD_SHIFT;
1194 case TSENS_TRIP_COOL:
1195 reg = (reg & TSENS_LOWER_THRESHOLD_MASK);
1201 rc = tsens_get_sw_id_mapping_for_controller(tm_sensor->sensor_hw_num,
1202 &sensor_sw_id, tmdev);
1204 pr_err("tsens mapping index not found\n");
1207 *temp = tsens_tz_code_to_degc(reg, sensor_sw_id, tmdev);
1212 static int tsens_tz_notify(struct thermal_zone_device *thermal,
1213 int count, enum thermal_trip_type type)
1215 /* Critical temperature threshold are enabled and will
1216 * shutdown the device once critical thresholds are crossed. */
1217 pr_debug("%s debug\n", __func__);
1221 static int tsens_tm_set_trip_temp(struct thermal_zone_device *thermal,
1224 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
1225 unsigned int reg_cntl;
1226 unsigned long flags;
1227 struct tsens_tm_device *tmdev = NULL;
1230 if (!tm_sensor || trip < 0)
1233 tmdev = tm_sensor->tm;
1237 spin_lock_irqsave(&tmdev->tsens_upp_low_lock, flags);
1239 case TSENS_TM_TRIP_CRITICAL:
1240 tmdev->sensor[tm_sensor->sensor_hw_num].
1241 debug_thr_state_copy.crit_temp = temp;
1242 temp &= TSENS_TM_SN_CRITICAL_THRESHOLD_MASK;
1243 writel_relaxed(temp,
1244 (TSENS_TM_SN_CRITICAL_THRESHOLD(tmdev->tsens_addr) +
1245 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET)));
1247 case TSENS_TM_TRIP_WARM:
1248 tmdev->sensor[tm_sensor->sensor_hw_num].
1249 debug_thr_state_copy.high_temp = temp;
1250 reg_cntl = readl_relaxed((TSENS_TM_UPPER_LOWER_THRESHOLD
1251 (tmdev->tsens_addr)) +
1252 (tm_sensor->sensor_hw_num *
1253 TSENS_SN_ADDR_OFFSET));
1254 temp = TSENS_TM_UPPER_THRESHOLD_SET(temp);
1255 temp &= TSENS_TM_UPPER_THRESHOLD_MASK;
1256 reg_cntl &= ~TSENS_TM_UPPER_THRESHOLD_MASK;
1257 writel_relaxed(reg_cntl | temp,
1258 (TSENS_TM_UPPER_LOWER_THRESHOLD(tmdev->tsens_addr) +
1259 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET)));
1261 case TSENS_TM_TRIP_COOL:
1262 tmdev->sensor[tm_sensor->sensor_hw_num].
1263 debug_thr_state_copy.low_temp = temp;
1264 reg_cntl = readl_relaxed((TSENS_TM_UPPER_LOWER_THRESHOLD
1265 (tmdev->tsens_addr)) +
1266 (tm_sensor->sensor_hw_num *
1267 TSENS_SN_ADDR_OFFSET));
1268 temp &= TSENS_TM_LOWER_THRESHOLD_MASK;
1269 reg_cntl &= ~TSENS_TM_LOWER_THRESHOLD_MASK;
1270 writel_relaxed(reg_cntl | temp,
1271 (TSENS_TM_UPPER_LOWER_THRESHOLD(tmdev->tsens_addr) +
1272 (tm_sensor->sensor_hw_num * TSENS_SN_ADDR_OFFSET)));
1278 spin_unlock_irqrestore(&tmdev->tsens_upp_low_lock, flags);
1279 /* Set trip temperature thresholds */
1284 static int tsens_tz_set_trip_temp(struct thermal_zone_device *thermal,
1287 struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
1288 unsigned int reg_cntl;
1289 int code, hi_code, lo_code, code_err_chk, sensor_sw_id = 0, rc = 0;
1290 struct tsens_tm_device *tmdev = NULL;
1292 if (!tm_sensor || trip < 0)
1295 tmdev = tm_sensor->tm;
1299 rc = tsens_get_sw_id_mapping_for_controller(tm_sensor->sensor_hw_num,
1300 &sensor_sw_id, tmdev);
1302 pr_err("tsens mapping index not found\n");
1306 code_err_chk = code = tsens_tz_degc_to_code(temp, sensor_sw_id, tmdev);
1307 if (!tm_sensor || trip < 0)
1310 lo_code = TSENS_THRESHOLD_MIN_CODE;
1311 hi_code = TSENS_THRESHOLD_MAX_CODE;
1313 reg_cntl = readl_relaxed(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
1314 (tmdev->tsens_addr) + (tm_sensor->sensor_hw_num *
1315 TSENS_SN_ADDR_OFFSET));
1317 case TSENS_TRIP_WARM:
1318 tmdev->sensor[tm_sensor->sensor_hw_num].
1319 debug_thr_state_copy.high_adc_code = code;
1320 tmdev->sensor[tm_sensor->sensor_hw_num].
1321 debug_thr_state_copy.high_temp = temp;
1322 code <<= TSENS_UPPER_THRESHOLD_SHIFT;
1323 reg_cntl &= ~TSENS_UPPER_THRESHOLD_MASK;
1324 if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
1325 lo_code = (reg_cntl & TSENS_LOWER_THRESHOLD_MASK);
1327 case TSENS_TRIP_COOL:
1328 tmdev->sensor[tm_sensor->sensor_hw_num].
1329 debug_thr_state_copy.low_adc_code = code;
1330 tmdev->sensor[tm_sensor->sensor_hw_num].
1331 debug_thr_state_copy.low_temp = temp;
1332 reg_cntl &= ~TSENS_LOWER_THRESHOLD_MASK;
1333 if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
1334 hi_code = (reg_cntl & TSENS_UPPER_THRESHOLD_MASK)
1335 >> TSENS_UPPER_THRESHOLD_SHIFT;
1341 writel_relaxed(reg_cntl | code, (TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
1342 (tmdev->tsens_addr) +
1343 (tm_sensor->sensor_hw_num *
1344 TSENS_SN_ADDR_OFFSET)));
1345 /* Activate the set trip temperature thresholds */
1350 static void tsens_poll(struct work_struct *work)
1352 struct tsens_tm_device *tmdev = container_of(work,
1353 struct tsens_tm_device, tsens_critical_poll_test.work);
1354 unsigned int reg_cntl, mask, rc = 0, debug_dump, i = 0, loop = 0;
1355 unsigned int debug_id = 0, cntrl_id = 0;
1356 uint32_t r1, r2, r3, r4, offset = 0, idx = 0;
1357 unsigned long temp, flags;
1358 unsigned int status, int_mask, int_mask_val;
1359 void __iomem *srot_addr;
1360 void __iomem *controller_id_addr;
1361 void __iomem *debug_id_addr;
1362 void __iomem *debug_data_addr;
1363 void __iomem *sensor_status_addr;
1364 void __iomem *sensor_int_mask_addr;
1365 void __iomem *sensor_critical_addr;
1367 /* Set the Critical temperature threshold to a value of 10 that should
1368 * guarantee a threshold to trigger. Check the interrupt count if
1369 * it did. Schedule the next round of the above test again after
1373 controller_id_addr = TSENS_CONTROLLER_ID(tmdev->tsens_addr);
1374 debug_id_addr = TSENS_DEBUG_CONTROL(tmdev->tsens_addr);
1375 debug_data_addr = TSENS_DEBUG_DATA(tmdev->tsens_addr);
1376 srot_addr = TSENS_CTRL_ADDR(tmdev->tsens_addr);
1378 temp = TSENS_DEBUG_DECIDEGC;
1379 /* Sensor 0 on either of the controllers */
1382 reinit_completion(&tmdev->tsens_rslt_completion);
1384 temp &= TSENS_TM_SN_CRITICAL_THRESHOLD_MASK;
1385 writel_relaxed(temp,
1386 (TSENS_TM_SN_CRITICAL_THRESHOLD(tmdev->tsens_addr) +
1387 (mask * TSENS_SN_ADDR_OFFSET)));
1390 idx = tmdev->crit_timestamp_last_run.idx;
1391 tmdev->crit_timestamp_last_run.time_stmp[idx%10] = sched_clock();
1392 tmdev->crit_timestamp_last_run.idx++;
1393 tmdev->qtimer_val_detection_start = arch_counter_get_cntvct();
1395 spin_lock_irqsave(&tmdev->tsens_crit_lock, flags);
1396 /* Clear the sensor0 critical status */
1398 writel_relaxed(int_mask_val,
1399 TSENS_TM_CRITICAL_INT_CLEAR(tmdev->tsens_addr));
1401 TSENS_TM_CRITICAL_INT_CLEAR(
1402 tmdev->tsens_addr));
1403 /* Clear the status */
1405 tmdev->crit_set = true;
1406 if (!tmdev->tsens_critical_poll) {
1407 reg_cntl = readl_relaxed(
1408 TSENS_TM_CRITICAL_INT_MASK(tmdev->tsens_addr));
1409 writel_relaxed(reg_cntl & ~(1 << mask),
1410 (TSENS_TM_CRITICAL_INT_MASK
1411 (tmdev->tsens_addr)));
1412 /* Enable the critical int mask */
1415 spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags);
1417 if (tmdev->tsens_critical_poll) {
1418 msleep(TSENS_DEBUG_POLL_MS);
1419 sensor_status_addr = TSENS_TM_SN_STATUS(tmdev->tsens_addr);
1421 spin_lock_irqsave(&tmdev->tsens_crit_lock, flags);
1422 status = readl_relaxed(sensor_status_addr);
1423 spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags);
1425 if (status & TSENS_TM_SN_STATUS_CRITICAL_STATUS)
1428 pr_err("status:0x%x\n", status);
1433 rc = wait_for_completion_timeout(
1434 &tmdev->tsens_rslt_completion,
1435 tsens_completion_timeout_hz);
1437 pr_debug("Switch to polling, TSENS critical interrupt failed\n");
1438 sensor_status_addr = TSENS_TM_SN_STATUS(tmdev->tsens_addr);
1439 sensor_int_mask_addr =
1440 TSENS_TM_CRITICAL_INT_MASK(tmdev->tsens_addr);
1441 sensor_critical_addr =
1442 TSENS_TM_SN_CRITICAL_THRESHOLD(tmdev->tsens_addr);
1444 spin_lock_irqsave(&tmdev->tsens_crit_lock, flags);
1445 if (!tmdev->crit_set) {
1446 pr_debug("Ignore this check cycle\n");
1447 spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags);
1450 status = readl_relaxed(sensor_status_addr);
1451 int_mask = readl_relaxed(sensor_int_mask_addr);
1452 tmdev->crit_set = false;
1453 spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags);
1455 idx = tmdev->crit_timestamp_last_poll_request.idx;
1456 tmdev->crit_timestamp_last_poll_request.time_stmp[idx%10] =
1458 tmdev->crit_timestamp_last_poll_request.idx++;
1459 tmdev->qtimer_val_last_polling_check =
1460 arch_counter_get_cntvct();
1461 if (status & TSENS_TM_SN_STATUS_CRITICAL_STATUS) {
1463 spin_lock_irqsave(&tmdev->tsens_crit_lock, flags);
1464 int_mask = readl_relaxed(sensor_int_mask_addr);
1466 /* Mask the corresponding interrupt for the sensors */
1467 writel_relaxed(int_mask | int_mask_val,
1468 TSENS_TM_CRITICAL_INT_MASK(
1469 tmdev->tsens_addr));
1470 /* Clear the corresponding sensors interrupt */
1471 writel_relaxed(int_mask_val,
1472 TSENS_TM_CRITICAL_INT_CLEAR(tmdev->tsens_addr));
1474 TSENS_TM_CRITICAL_INT_CLEAR(
1475 tmdev->tsens_addr));
1476 spin_unlock_irqrestore(&tmdev->tsens_crit_lock, flags);
1478 /* Clear critical status */
1484 cntrl_id = readl_relaxed(controller_id_addr);
1485 pr_err("Controller_id: 0x%x\n", cntrl_id);
1489 debug_id = readl_relaxed(debug_id_addr);
1490 writel_relaxed((debug_id | (i << 1) | 1),
1491 TSENS_DEBUG_CONTROL(tmdev->tsens_addr));
1492 while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) {
1493 debug_dump = readl_relaxed(debug_data_addr);
1494 r1 = readl_relaxed(debug_data_addr);
1495 r2 = readl_relaxed(debug_data_addr);
1496 r3 = readl_relaxed(debug_data_addr);
1497 r4 = readl_relaxed(debug_data_addr);
1498 pr_err("cntrl:%d, bus-id:%d value:0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
1499 cntrl_id, i, debug_dump, r1, r2, r3, r4);
1503 for (i = TSENS_DBG_BUS_ID_1; i <= TSENS_DBG_BUS_ID_15; i++) {
1505 debug_id = readl_relaxed(debug_id_addr);
1506 debug_id = debug_id & TSENS_DEBUG_ID_MASK_1_4;
1507 writel_relaxed((debug_id | (i << 1) | 1),
1508 TSENS_DEBUG_CONTROL(tmdev->tsens_addr));
1509 while (loop < TSENS_DEBUG_LOOP_COUNT) {
1510 debug_dump = readl_relaxed(debug_data_addr);
1511 pr_err("cntrl:%d, bus-id:%d with value: 0x%x\n",
1512 cntrl_id, i, debug_dump);
1513 if (i == TSENS_DBG_BUS_ID_2)
1515 TSENS_DEBUG_BUS_ID2_MIN_CYCLE,
1516 TSENS_DEBUG_BUS_ID2_MAX_CYCLE);
1521 pr_err("Start of TSENS TM dump\n");
1522 for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) {
1523 r1 = readl_relaxed(controller_id_addr + offset);
1524 r2 = readl_relaxed(controller_id_addr + (offset +
1525 TSENS_DEBUG_OFFSET_WORD1));
1526 r3 = readl_relaxed(controller_id_addr + (offset +
1527 TSENS_DEBUG_OFFSET_WORD2));
1528 r4 = readl_relaxed(controller_id_addr + (offset +
1529 TSENS_DEBUG_OFFSET_WORD3));
1531 pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1532 cntrl_id, offset, r1, r2, r3, r4);
1533 offset += TSENS_DEBUG_OFFSET_ROW;
1537 pr_err("Start of TSENS SROT dump\n");
1538 for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) {
1539 r1 = readl_relaxed(srot_addr + offset);
1540 r2 = readl_relaxed(srot_addr + (offset +
1541 TSENS_DEBUG_OFFSET_WORD1));
1542 r3 = readl_relaxed(srot_addr + (offset +
1543 TSENS_DEBUG_OFFSET_WORD2));
1544 r4 = readl_relaxed(srot_addr + (offset +
1545 TSENS_DEBUG_OFFSET_WORD3));
1547 pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1548 cntrl_id, offset, r1, r2, r3, r4);
1549 offset += TSENS_DEBUG_OFFSET_ROW;
1553 while (loop < TSENS_DEBUG_LOOP_COUNT) {
1554 offset = TSENS_DEBUG_OFFSET_ROW *
1555 TSENS_DEBUG_STATUS_REG_START;
1556 pr_err("Start of TSENS TM dump %d\n", loop);
1557 /* Limited dump of the registers for the temperature */
1558 for (i = 0; i < TSENS_DEBUG_LOOP_COUNT; i++) {
1559 r1 = readl_relaxed(controller_id_addr + offset);
1560 r2 = readl_relaxed(controller_id_addr +
1561 (offset + TSENS_DEBUG_OFFSET_WORD1));
1562 r3 = readl_relaxed(controller_id_addr +
1563 (offset + TSENS_DEBUG_OFFSET_WORD2));
1564 r4 = readl_relaxed(controller_id_addr +
1565 (offset + TSENS_DEBUG_OFFSET_WORD3));
1567 pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1568 cntrl_id, offset, r1, r2, r3, r4);
1569 offset += TSENS_DEBUG_OFFSET_ROW;
1572 msleep(TSENS_DEBUG_CYCLE_MS);
1579 schedule_delayed_work(&tmdev->tsens_critical_poll_test,
1580 msecs_to_jiffies(tsens_sec_to_msec_value));
1583 int tsens_mtc_reset_history_counter(unsigned int zone)
1585 unsigned int reg_cntl, is_valid;
1586 void __iomem *sensor_addr;
1587 struct tsens_tm_device *tmdev = NULL;
1589 if (zone > TSENS_NUM_MTC_ZONES_SUPPORT)
1592 tmdev = tsens_controller_is_present();
1594 pr_err("No TSENS controller present\n");
1595 return -EPROBE_DEFER;
1598 sensor_addr = TSENS_TM_MTC_ZONE0_SW_MASK_ADDR(tmdev->tsens_addr);
1599 reg_cntl = readl_relaxed((sensor_addr +
1600 (zone * TSENS_SN_ADDR_OFFSET)));
1601 is_valid = (reg_cntl & TSENS_RESET_HISTORY_MASK)
1602 >> TSENS_RESET_HISTORY_SHIFT;
1604 /*Enable the bit to reset counter*/
1605 writel_relaxed(reg_cntl | (1 << TSENS_RESET_HISTORY_SHIFT),
1606 (sensor_addr + (zone * TSENS_SN_ADDR_OFFSET)));
1607 reg_cntl = readl_relaxed((sensor_addr +
1608 (zone * TSENS_SN_ADDR_OFFSET)));
1609 pr_debug("tsens : zone =%d reg=%x\n", zone , reg_cntl);
1612 /*Disble the bit to start counter*/
1613 writel_relaxed(reg_cntl & ~(1 << TSENS_RESET_HISTORY_SHIFT),
1614 (sensor_addr + (zone * TSENS_SN_ADDR_OFFSET)));
1615 reg_cntl = readl_relaxed((sensor_addr +
1616 (zone * TSENS_SN_ADDR_OFFSET)));
1617 pr_debug("tsens : zone =%d reg=%x\n", zone , reg_cntl);
1621 EXPORT_SYMBOL(tsens_mtc_reset_history_counter);
1623 int tsens_set_mtc_zone_sw_mask(unsigned int zone , unsigned int th1_enable,
1624 unsigned int th2_enable)
1626 unsigned int reg_cntl;
1627 void __iomem *sensor_addr;
1628 struct tsens_tm_device *tmdev = NULL;
1630 if (zone > TSENS_NUM_MTC_ZONES_SUPPORT)
1633 tmdev = tsens_controller_is_present();
1635 pr_err("No TSENS controller present\n");
1636 return -EPROBE_DEFER;
1639 if (tmdev->tsens_type == TSENS_TYPE3)
1640 sensor_addr = TSENS_TM_MTC_ZONE0_SW_MASK_ADDR
1641 (tmdev->tsens_addr);
1643 sensor_addr = TSENS_MTC_ZONE0_SW_MASK_ADDR
1644 (tmdev->tsens_addr);
1646 if (th1_enable && th2_enable)
1647 writel_relaxed(TSENS_MTC_IN_EFFECT,
1649 (zone * TSENS_SN_ADDR_OFFSET)));
1650 if (!th1_enable && !th2_enable)
1651 writel_relaxed(TSENS_MTC_DISABLE,
1653 (zone * TSENS_SN_ADDR_OFFSET)));
1654 if (th1_enable && !th2_enable)
1655 writel_relaxed(TSENS_TH1_MTC_IN_EFFECT,
1657 (zone * TSENS_SN_ADDR_OFFSET)));
1658 if (!th1_enable && th2_enable)
1659 writel_relaxed(TSENS_TH2_MTC_IN_EFFECT,
1661 (zone * TSENS_SN_ADDR_OFFSET)));
1662 reg_cntl = readl_relaxed((sensor_addr +
1663 (zone * TSENS_SN_ADDR_OFFSET)));
1664 pr_debug("tsens : zone =%d th1=%d th2=%d reg=%x\n",
1665 zone , th1_enable , th2_enable , reg_cntl);
1669 EXPORT_SYMBOL(tsens_set_mtc_zone_sw_mask);
1671 int tsens_get_mtc_zone_log(unsigned int zone , void *zone_log)
1673 unsigned int i , reg_cntl , is_valid , log[TSENS_MTC_ZONE_LOG_SIZE];
1674 int *zlog = (int *)zone_log;
1675 void __iomem *sensor_addr;
1676 struct tsens_tm_device *tmdev = NULL;
1678 if (zone > TSENS_NUM_MTC_ZONES_SUPPORT)
1681 tmdev = tsens_controller_is_present();
1683 pr_err("No TSENS controller present\n");
1684 return -EPROBE_DEFER;
1687 if (tmdev->tsens_type == TSENS_TYPE3)
1688 sensor_addr = TSENS_TM_MTC_ZONE0_LOG(tmdev->tsens_addr);
1690 sensor_addr = TSENS_MTC_ZONE0_LOG(tmdev->tsens_addr);
1692 reg_cntl = readl_relaxed((sensor_addr +
1693 (zone * TSENS_SN_ADDR_OFFSET)));
1694 is_valid = (reg_cntl & TSENS_LOGS_VALID_MASK)
1695 >> TSENS_LOGS_VALID_SHIFT;
1697 log[0] = (reg_cntl & TSENS_LOGS_LATEST_MASK);
1698 log[1] = (reg_cntl & TSENS_LOGS_LOG1_MASK)
1699 >> TSENS_LOGS_LOG1_SHIFT;
1700 log[2] = (reg_cntl & TSENS_LOGS_LOG2_MASK)
1701 >> TSENS_LOGS_LOG2_SHIFT;
1702 log[3] = (reg_cntl & TSENS_LOGS_LOG3_MASK)
1703 >> TSENS_LOGS_LOG3_SHIFT;
1704 log[4] = (reg_cntl & TSENS_LOGS_LOG4_MASK)
1705 >> TSENS_LOGS_LOG4_SHIFT;
1706 log[5] = (reg_cntl & TSENS_LOGS_LOG5_MASK)
1707 >> TSENS_LOGS_LOG5_SHIFT;
1708 for (i = 0; i < (TSENS_MTC_ZONE_LOG_SIZE); i++) {
1710 pr_debug("Log[%d]=%d\n", i , log[i]);
1713 pr_debug("tsens: Valid bit disabled\n");
1718 EXPORT_SYMBOL(tsens_get_mtc_zone_log);
1720 int tsens_get_mtc_zone_history(unsigned int zone , void *zone_hist)
1722 unsigned int i, reg_cntl, hist[TSENS_MTC_ZONE_HISTORY_SIZE];
1723 int *zhist = (int *)zone_hist;
1724 void __iomem *sensor_addr;
1725 struct tsens_tm_device *tmdev = NULL;
1727 if (zone > TSENS_NUM_MTC_ZONES_SUPPORT)
1730 tmdev = tsens_controller_is_present();
1732 pr_err("No TSENS controller present\n");
1733 return -EPROBE_DEFER;
1736 sensor_addr = TSENS_TM_MTC_ZONE0_HISTORY(tmdev->tsens_addr);
1737 reg_cntl = readl_relaxed((sensor_addr +
1738 (zone * TSENS_SN_ADDR_OFFSET)));
1740 hist[0] = (reg_cntl & TSENS_PS_COOL_CMD_MASK);
1741 hist[1] = (reg_cntl & TSENS_PS_YELLOW_CMD_MASK)
1742 >> TSENS_PS_YELLOW_CMD_SHIFT;
1743 hist[2] = (reg_cntl & TSENS_PS_RED_CMD_MASK)
1744 >> TSENS_PS_RED_CMD_SHIFT;
1745 for (i = 0; i < (TSENS_MTC_ZONE_HISTORY_SIZE); i++) {
1746 *(zhist+i) = hist[i];
1747 pr_debug("tsens : %d\n", hist[i]);
1752 EXPORT_SYMBOL(tsens_get_mtc_zone_history);
1754 static struct thermal_zone_device_ops tsens_thermal_zone_ops = {
1755 .get_temp = tsens_tz_get_temp,
1756 .get_mode = tsens_tz_get_mode,
1757 .get_trip_type = tsens_tz_get_trip_type,
1758 .activate_trip_type = tsens_tz_activate_trip_type,
1759 .get_trip_temp = tsens_tz_get_trip_temp,
1760 .set_trip_temp = tsens_tz_set_trip_temp,
1761 .notify = tsens_tz_notify,
1764 /* Thermal zone ops for decidegC */
1765 static struct thermal_zone_device_ops tsens_tm_thermal_zone_ops = {
1766 .get_temp = tsens_tz_get_temp,
1767 .get_trip_type = tsens_tm_get_trip_type,
1768 .activate_trip_type = tsens_tm_activate_trip_type,
1769 .get_trip_temp = tsens_tm_get_trip_temp,
1770 .set_trip_temp = tsens_tm_set_trip_temp,
1771 .notify = tsens_tz_notify,
1774 static irqreturn_t tsens_tm_critical_irq_thread(int irq, void *data)
1776 struct tsens_tm_device *tm = data;
1777 unsigned int i, status, idx = 0;
1778 unsigned long flags;
1779 void __iomem *sensor_status_addr;
1780 void __iomem *sensor_int_mask_addr;
1781 void __iomem *sensor_critical_addr;
1782 void __iomem *wd_critical_addr;
1783 int sensor_sw_id = -EINVAL, rc = 0;
1786 tm->crit_set = false;
1787 sensor_status_addr = TSENS_TM_SN_STATUS(tm->tsens_addr);
1788 sensor_int_mask_addr =
1789 TSENS_TM_CRITICAL_INT_MASK(tm->tsens_addr);
1790 sensor_critical_addr =
1791 TSENS_TM_SN_CRITICAL_THRESHOLD(tm->tsens_addr);
1793 TSENS_TM_CRITICAL_INT_STATUS(tm->tsens_addr);
1796 wd_mask = readl_relaxed(wd_critical_addr);
1798 * Check whether the reason for critical interrupt is
1799 * because of watchdog
1801 if (wd_mask & TSENS_TM_CRITICAL_WD_BARK) {
1803 * Clear watchdog interrupt and
1804 * increment global wd count
1806 writel_relaxed(wd_mask | TSENS_TM_CRITICAL_WD_BARK,
1807 (TSENS_TM_CRITICAL_INT_CLEAR
1809 writel_relaxed(wd_mask & ~(TSENS_TM_CRITICAL_WD_BARK),
1810 (TSENS_TM_CRITICAL_INT_CLEAR
1812 tm->tsens_critical_wd_cnt++;
1817 for (i = 0; i < tm->tsens_num_sensor; i++) {
1818 bool critical_thr = false;
1819 int int_mask, int_mask_val;
1820 uint32_t addr_offset;
1822 spin_lock_irqsave(&tm->tsens_crit_lock, flags);
1823 addr_offset = tm->sensor[i].sensor_hw_num *
1824 TSENS_SN_ADDR_OFFSET;
1825 status = readl_relaxed(sensor_status_addr + addr_offset);
1826 int_mask = readl_relaxed(sensor_int_mask_addr);
1828 if ((status & TSENS_TM_SN_STATUS_CRITICAL_STATUS) &&
1829 !(int_mask & (1 << tm->sensor[i].sensor_hw_num))) {
1830 int_mask = readl_relaxed(sensor_int_mask_addr);
1831 int_mask_val = (1 << tm->sensor[i].sensor_hw_num);
1832 /* Mask the corresponding interrupt for the sensors */
1833 writel_relaxed(int_mask | int_mask_val,
1834 TSENS_TM_CRITICAL_INT_MASK(
1836 /* Clear the corresponding sensors interrupt */
1837 writel_relaxed(int_mask_val,
1838 TSENS_TM_CRITICAL_INT_CLEAR(tm->tsens_addr));
1840 TSENS_TM_CRITICAL_INT_CLEAR(
1842 critical_thr = true;
1843 tm->sensor[i].debug_thr_state_copy.
1844 crit_th_state = THERMAL_DEVICE_DISABLED;
1846 spin_unlock_irqrestore(&tm->tsens_crit_lock, flags);
1851 tsens_tz_get_temp(tm->sensor[i].tz_dev, &temp);
1852 rc = tsens_get_sw_id_mapping_for_controller(
1853 tm->sensor[i].sensor_hw_num,
1856 pr_err("tsens mapping index not found\n");
1857 pr_debug("sensor:%d trigger temp (%d degC) with count:%d\n",
1858 tm->sensor[i].sensor_hw_num,
1859 (status & TSENS_TM_SN_LAST_TEMP_MASK),
1860 tm->tsens_critical_irq_cnt);
1861 tm->tsens_critical_irq_cnt++;
1865 idx = tm->crit_timestamp_last_interrupt_handled.idx;
1866 tm->crit_timestamp_last_interrupt_handled.dbg_count[idx%10]++;
1867 tm->crit_timestamp_last_interrupt_handled.time_stmp[idx%10] =
1869 tm->qtimer_val_last_detection_interrupt = arch_counter_get_cntvct();
1870 if (tsens_poll_check)
1871 complete(&tm->tsens_rslt_completion);
1872 /* Mask critical interrupt */
1878 static irqreturn_t tsens_tm_irq_thread(int irq, void *data)
1880 struct tsens_tm_device *tm = data;
1881 unsigned int i, status, threshold;
1882 unsigned long flags;
1883 void __iomem *sensor_status_addr;
1884 void __iomem *sensor_int_mask_addr;
1885 void __iomem *sensor_upper_lower_addr;
1886 int sensor_sw_id = -EINVAL, rc = 0;
1887 uint32_t addr_offset;
1889 sensor_status_addr = TSENS_TM_SN_STATUS(tm->tsens_addr);
1890 sensor_int_mask_addr =
1891 TSENS_TM_UPPER_LOWER_INT_MASK(tm->tsens_addr);
1892 sensor_upper_lower_addr =
1893 TSENS_TM_UPPER_LOWER_THRESHOLD(tm->tsens_addr);
1895 for (i = 0; i < tm->tsens_num_sensor; i++) {
1896 bool upper_thr = false, lower_thr = false;
1897 int int_mask, int_mask_val = 0;
1899 spin_lock_irqsave(&tm->tsens_upp_low_lock, flags);
1900 addr_offset = tm->sensor[i].sensor_hw_num *
1901 TSENS_SN_ADDR_OFFSET;
1902 status = readl_relaxed(sensor_status_addr + addr_offset);
1903 threshold = readl_relaxed(sensor_upper_lower_addr +
1905 int_mask = readl_relaxed(sensor_int_mask_addr);
1907 if ((status & TSENS_TM_SN_STATUS_UPPER_STATUS) &&
1909 (1 << (tm->sensor[i].sensor_hw_num + 16)))) {
1910 int_mask = readl_relaxed(sensor_int_mask_addr);
1911 int_mask_val = TSENS_TM_UPPER_INT_SET(
1912 tm->sensor[i].sensor_hw_num);
1913 /* Mask the corresponding interrupt for the sensors */
1914 writel_relaxed(int_mask | int_mask_val,
1915 TSENS_TM_UPPER_LOWER_INT_MASK(
1917 /* Clear the corresponding sensors interrupt */
1918 writel_relaxed(int_mask_val,
1919 TSENS_TM_UPPER_LOWER_INT_CLEAR(
1922 TSENS_TM_UPPER_LOWER_INT_CLEAR(
1925 tm->sensor[i].debug_thr_state_copy.
1926 high_th_state = THERMAL_DEVICE_DISABLED;
1929 if ((status & TSENS_TM_SN_STATUS_LOWER_STATUS) &&
1931 (1 << tm->sensor[i].sensor_hw_num))) {
1932 int_mask = readl_relaxed(sensor_int_mask_addr);
1933 int_mask_val = (1 << tm->sensor[i].sensor_hw_num);
1934 /* Mask the corresponding interrupt for the sensors */
1935 writel_relaxed(int_mask | int_mask_val,
1936 TSENS_TM_UPPER_LOWER_INT_MASK(
1938 /* Clear the corresponding sensors interrupt */
1939 writel_relaxed(int_mask_val,
1940 TSENS_TM_UPPER_LOWER_INT_CLEAR(
1943 TSENS_TM_UPPER_LOWER_INT_CLEAR(
1946 tm->sensor[i].debug_thr_state_copy.
1947 low_th_state = THERMAL_DEVICE_DISABLED;
1949 spin_unlock_irqrestore(&tm->tsens_upp_low_lock, flags);
1951 if (upper_thr || lower_thr) {
1953 enum thermal_trip_type trip =
1954 THERMAL_TRIP_CONFIGURABLE_LOW;
1957 trip = THERMAL_TRIP_CONFIGURABLE_HI;
1958 tsens_tz_get_temp(tm->sensor[i].tz_dev, &temp);
1959 thermal_sensor_trip(tm->sensor[i].tz_dev, trip, temp);
1961 rc = tsens_get_sw_id_mapping_for_controller(
1962 tm->sensor[i].sensor_hw_num,
1965 pr_debug("tsens mapping index not found\n");
1966 /* Use sensor_client_id for multiple controllers */
1967 pr_debug("sensor:%d trigger temp (%d degC)\n",
1968 tm->sensor[i].sensor_client_id,
1969 (status & TSENS_TM_SN_LAST_TEMP_MASK));
1971 trace_tsens_threshold_hit(
1972 TSENS_TM_UPPER_THRESHOLD_VALUE(
1974 tm->sensor[i].sensor_client_id);
1975 tm->tsens_upper_irq_cnt++;
1977 trace_tsens_threshold_clear(
1978 TSENS_TM_LOWER_THRESHOLD_VALUE(
1980 tm->sensor[i].sensor_client_id);
1981 tm->tsens_lower_irq_cnt++;
1986 /* Disable monitoring sensor trip threshold for triggered sensor */
1992 static irqreturn_t tsens_irq_thread(int irq, void *data)
1994 struct tsens_tm_device *tm = data;
1995 unsigned int i, status, threshold;
1996 void __iomem *sensor_status_addr;
1997 void __iomem *sensor_status_ctrl_addr;
1998 int sensor_sw_id = -EINVAL;
2001 if ((tm->tsens_type == TSENS_TYPE2) ||
2002 (tm->tsens_type == TSENS_TYPE4))
2003 sensor_status_addr = TSENS2_SN_STATUS_ADDR(tm->tsens_addr);
2005 sensor_status_addr = TSENS_S0_STATUS_ADDR(tm->tsens_addr);
2007 sensor_status_ctrl_addr =
2008 TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tm->tsens_addr);
2009 for (i = 0; i < tm->tsens_num_sensor; i++) {
2010 bool upper_thr = false, lower_thr = false;
2011 uint32_t addr_offset;
2013 sensor_sw_id = tm->sensor[i].sensor_sw_id;
2014 addr_offset = tm->sensor[i].sensor_hw_num *
2015 TSENS_SN_ADDR_OFFSET;
2016 status = readl_relaxed(sensor_status_addr + addr_offset);
2017 threshold = readl_relaxed(sensor_status_ctrl_addr +
2019 if (status & TSENS_SN_STATUS_UPPER_STATUS) {
2020 writel_relaxed(threshold | TSENS_UPPER_STATUS_CLR,
2021 TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(
2022 tm->tsens_addr + addr_offset));
2024 tm->sensor[i].debug_thr_state_copy.
2025 high_th_state = THERMAL_DEVICE_DISABLED;
2027 if (status & TSENS_SN_STATUS_LOWER_STATUS) {
2028 writel_relaxed(threshold | TSENS_LOWER_STATUS_CLR,
2029 TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(
2030 tm->tsens_addr + addr_offset));
2032 tm->sensor[i].debug_thr_state_copy.
2033 low_th_state = THERMAL_DEVICE_DISABLED;
2035 if (upper_thr || lower_thr) {
2037 enum thermal_trip_type trip =
2038 THERMAL_TRIP_CONFIGURABLE_LOW;
2041 trip = THERMAL_TRIP_CONFIGURABLE_HI;
2042 tsens_tz_get_temp(tm->sensor[i].tz_dev, &temp);
2043 thermal_sensor_trip(tm->sensor[i].tz_dev, trip, temp);
2045 pr_debug("sensor:%d trigger temp (%d degC)\n",
2046 tm->sensor[i].sensor_hw_num,
2047 tsens_tz_code_to_degc((status &
2048 TSENS_SN_STATUS_TEMP_MASK),
2049 tm->sensor[i].sensor_sw_id, tm));
2051 trace_tsens_threshold_hit(
2052 tsens_tz_code_to_degc((threshold &
2053 TSENS_UPPER_THRESHOLD_MASK) >>
2054 TSENS_UPPER_THRESHOLD_SHIFT,
2056 tm->sensor[i].sensor_hw_num);
2058 trace_tsens_threshold_clear(
2059 tsens_tz_code_to_degc((threshold &
2060 TSENS_LOWER_THRESHOLD_MASK),
2062 tm->sensor[i].sensor_hw_num);
2066 idx = tm->tsens_thread_iq_dbg.idx;
2067 tm->tsens_thread_iq_dbg.dbg_count[idx%10]++;
2068 tm->tsens_thread_iq_dbg.time_stmp[idx%10] = sched_clock();
2069 tm->tsens_thread_iq_dbg.idx++;
2071 /* Disable monitoring sensor trip threshold for triggered sensor */
2077 static int tsens_hw_init(struct tsens_tm_device *tmdev)
2079 void __iomem *srot_addr;
2080 void __iomem *sensor_int_mask_addr;
2081 unsigned int srot_val;
2083 void __iomem *int_mask_addr;
2086 pr_err("Invalid tsens device\n");
2090 if (tmdev->tsens_type == TSENS_TYPE3) {
2091 srot_addr = TSENS_CTRL_ADDR(tmdev->tsens_addr + 0x4);
2092 srot_val = readl_relaxed(srot_addr);
2093 if (!(srot_val & TSENS_EN)) {
2094 pr_err("TSENS device is not enabled\n");
2098 if (tmdev->cycle_compltn_monitor) {
2099 sensor_int_mask_addr =
2100 TSENS_TM_CRITICAL_INT_MASK(tmdev->tsens_addr);
2101 crit_mask = readl_relaxed(sensor_int_mask_addr);
2103 crit_mask | tmdev->cycle_compltn_monitor_val,
2104 (TSENS_TM_CRITICAL_INT_MASK
2105 (tmdev->tsens_addr)));
2106 /*Update critical cycle monitoring*/
2109 int_mask_addr = TSENS_TM_UPPER_LOWER_INT_MASK
2110 (tmdev->tsens_addr);
2111 writel_relaxed(TSENS_TM_UPPER_LOWER_INT_DISABLE,
2113 writel_relaxed(TSENS_TM_CRITICAL_INT_EN |
2114 TSENS_TM_UPPER_INT_EN | TSENS_TM_LOWER_INT_EN,
2115 TSENS_TM_INT_EN(tmdev->tsens_addr));
2117 writel_relaxed(TSENS_INTERRUPT_EN,
2118 TSENS_UPPER_LOWER_INTERRUPT_CTRL(tmdev->tsens_addr));
2123 static int get_device_tree_data(struct platform_device *pdev,
2124 struct tsens_tm_device *tmdev)
2126 struct device_node *of_node = pdev->dev.of_node;
2127 struct resource *res_mem = NULL;
2128 u32 *tsens_slope_data = NULL, *sensor_id, *client_id;
2129 u32 *temp1_calib_offset_factor, *temp2_calib_offset_factor;
2130 u32 rc = 0, i, tsens_num_sensors = 0;
2131 u32 cycle_monitor = 0, wd_bark = 0;
2132 const struct of_device_id *id;
2134 rc = of_property_read_u32(of_node,
2135 "qcom,sensors", &tsens_num_sensors);
2137 dev_err(&pdev->dev, "missing sensor number\n");
2141 if (tsens_num_sensors == 0) {
2142 pr_err("No sensors?\n");
2146 /* TSENS calibration region */
2147 tmdev->res_calib_mem = platform_get_resource_byname(pdev,
2148 IORESOURCE_MEM, "tsens_eeprom_physical");
2149 if (!tmdev->res_calib_mem) {
2150 pr_debug("Using controller programmed gain and offset\n");
2151 tmdev->gain_offset_programmed = true;
2153 tsens_slope_data = devm_kzalloc(&pdev->dev,
2154 tsens_num_sensors * sizeof(u32), GFP_KERNEL);
2155 if (!tsens_slope_data)
2158 rc = of_property_read_u32_array(of_node,
2159 "qcom,slope", tsens_slope_data, tsens_num_sensors);
2161 dev_err(&pdev->dev, "missing property: tsens-slope\n");
2166 if (!of_match_node(tsens_match, of_node)) {
2167 pr_err("Need to read SoC specific fuse map\n");
2171 id = of_match_node(tsens_match, of_node);
2173 pr_err("can not find tsens_match of_node\n");
2177 if (!tmdev->gain_offset_programmed) {
2178 for (i = 0; i < tsens_num_sensors; i++)
2179 tmdev->sensor[i].slope_mul_tsens_factor =
2180 tsens_slope_data[i];
2181 tmdev->tsens_factor = TSENS_SLOPE_FACTOR;
2184 tmdev->tsens_num_sensor = tsens_num_sensors;
2185 tmdev->calibration_less_mode = of_property_read_bool(of_node,
2186 "qcom,calibration-less-mode");
2187 tmdev->tsens_local_init = of_property_read_bool(of_node,
2188 "qcom,tsens-local-init");
2190 sensor_id = devm_kzalloc(&pdev->dev,
2191 tsens_num_sensors * sizeof(u32), GFP_KERNEL);
2195 client_id = devm_kzalloc(&pdev->dev,
2196 tsens_num_sensors * sizeof(u32), GFP_KERNEL);
2200 rc = of_property_read_u32_array(of_node,
2201 "qcom,client-id", client_id, tsens_num_sensors);
2203 for (i = 0; i < tsens_num_sensors; i++)
2204 tmdev->sensor[i].sensor_client_id = i;
2205 pr_debug("Default client id mapping\n");
2207 for (i = 0; i < tsens_num_sensors; i++)
2208 tmdev->sensor[i].sensor_client_id = client_id[i];
2209 pr_debug("Use specified client id mapping\n");
2212 rc = of_property_read_u32_array(of_node,
2213 "qcom,sensor-id", sensor_id, tsens_num_sensors);
2215 pr_debug("Default sensor id mapping\n");
2216 for (i = 0; i < tsens_num_sensors; i++) {
2217 tmdev->sensor[i].sensor_hw_num = i;
2218 tmdev->sensor[i].sensor_sw_id = i;
2221 pr_debug("Use specified sensor id mapping\n");
2222 for (i = 0; i < tsens_num_sensors; i++) {
2223 tmdev->sensor[i].sensor_hw_num = sensor_id[i];
2224 tmdev->sensor[i].sensor_sw_id = i;
2228 rc = of_property_read_u32(of_node,
2229 "qcom,cycle-monitor", &cycle_monitor);
2231 pr_debug("Default cycle completion monitor\n");
2232 tmdev->cycle_compltn_monitor = false;
2234 pr_debug("Use specified cycle completion monitor\n");
2235 tmdev->cycle_compltn_monitor = true;
2236 tmdev->cycle_compltn_monitor_val = cycle_monitor;
2239 rc = of_property_read_u32(of_node,
2240 "qcom,wd-bark", &wd_bark);
2242 pr_debug("Default Watchdog bark\n");
2243 tmdev->wd_bark = false;
2245 pr_debug("Use specified Watchdog bark\n");
2246 tmdev->wd_bark = true;
2247 tmdev->wd_bark_val = wd_bark;
2250 if (!strcmp(id->compatible, "qcom,msm8996-tsens"))
2251 tmdev->tsens_type = TSENS_TYPE3;
2252 else if (!strcmp(id->compatible, "qcom,msmtitanium-tsens") ||
2253 (!strcmp(id->compatible, "qcom,sdm660-tsens")) ||
2254 (!strcmp(id->compatible, "qcom,msm8998-tsens")) ||
2255 (!strcmp(id->compatible, "qcom,sdm630-tsens")) ||
2256 (!strcmp(id->compatible, "qcom,msmhamster-tsens"))) {
2257 tmdev->tsens_type = TSENS_TYPE3;
2258 tsens_poll_check = 0;
2260 tmdev->tsens_type = TSENS_TYPE0;
2262 tmdev->tsens_valid_status_check = of_property_read_bool(of_node,
2263 "qcom,valid-status-check");
2264 if (!tmdev->tsens_valid_status_check) {
2265 if (!strcmp(id->compatible, "qcom,msm8996-tsens") ||
2266 (!strcmp(id->compatible, "qcom,msmtitanium-tsens")) ||
2267 (!strcmp(id->compatible, "qcom,msm8998-tsens")) ||
2268 (!strcmp(id->compatible, "qcom,sdm660-tsens")) ||
2269 (!strcmp(id->compatible, "qcom,sdm630-tsens")) ||
2270 (!strcmp(id->compatible, "qcom,msmhamster-tsens")))
2271 tmdev->tsens_valid_status_check = true;
2274 tmdev->tsens_irq = platform_get_irq_byname(pdev,
2275 "tsens-upper-lower");
2276 if (tmdev->tsens_irq < 0) {
2277 pr_err("Invalid Upper/Lower get irq\n");
2278 rc = tmdev->tsens_irq;
2282 if (!strcmp(id->compatible, "qcom,msm8996-tsens") ||
2283 (!strcmp(id->compatible, "qcom,msm8998-tsens")) ||
2284 (!strcmp(id->compatible, "qcom,msmhamster-tsens")) ||
2285 (!strcmp(id->compatible, "qcom,sdm660-tsens")) ||
2286 (!strcmp(id->compatible, "qcom,sdm630-tsens")) ||
2287 (!strcmp(id->compatible, "qcom,msmtitanium-tsens"))) {
2288 tmdev->tsens_critical_irq =
2289 platform_get_irq_byname(pdev,
2291 if (tmdev->tsens_critical_irq < 0) {
2292 pr_err("Invalid Critical get irq\n");
2293 rc = tmdev->tsens_critical_irq;
2298 temp1_calib_offset_factor = devm_kzalloc(&pdev->dev,
2299 tsens_num_sensors * sizeof(u32), GFP_KERNEL);
2300 if (!temp1_calib_offset_factor)
2303 rc = of_property_read_u32_array(of_node,
2304 "qcom,temp1-offset", temp1_calib_offset_factor,
2307 pr_debug("Default temp1-offsets\n");
2308 for (i = 0; i < tsens_num_sensors; i++)
2309 tmdev->sensor[i].wa_temp1_calib_offset_factor = 0;
2311 pr_debug("Use specific temp1-offsets\n");
2312 for (i = 0; i < tsens_num_sensors; i++)
2313 tmdev->sensor[i].wa_temp1_calib_offset_factor =
2314 temp1_calib_offset_factor[i];
2317 temp2_calib_offset_factor = devm_kzalloc(&pdev->dev,
2318 tsens_num_sensors * sizeof(u32), GFP_KERNEL);
2319 if (!temp2_calib_offset_factor)
2322 rc = of_property_read_u32_array(of_node,
2323 "qcom,temp2-offset", temp2_calib_offset_factor,
2326 pr_debug("Default temp2-offsets\n");
2327 for (i = 0; i < tsens_num_sensors; i++)
2328 tmdev->sensor[i].wa_temp2_calib_offset_factor = 0;
2330 pr_debug("Use specific temp2-offsets\n");
2331 for (i = 0; i < tsens_num_sensors; i++)
2332 tmdev->sensor[i].wa_temp2_calib_offset_factor =
2333 temp2_calib_offset_factor[i];
2336 /* TSENS register region */
2337 tmdev->res_tsens_mem = platform_get_resource_byname(pdev,
2338 IORESOURCE_MEM, "tsens_physical");
2339 if (!tmdev->res_tsens_mem) {
2340 pr_err("Could not get tsens physical address resource\n");
2345 tmdev->tsens_len = tmdev->res_tsens_mem->end -
2346 tmdev->res_tsens_mem->start + 1;
2348 res_mem = request_mem_region(tmdev->res_tsens_mem->start,
2349 tmdev->tsens_len, tmdev->res_tsens_mem->name);
2351 pr_err("Request tsens physical memory region failed\n");
2356 tmdev->tsens_addr = ioremap(res_mem->start, tmdev->tsens_len);
2357 if (!tmdev->tsens_addr) {
2358 pr_err("Failed to IO map TSENS registers.\n");
2360 goto fail_unmap_tsens_region;
2363 if (!tmdev->gain_offset_programmed) {
2364 tmdev->calib_len = tmdev->res_calib_mem->end -
2365 tmdev->res_calib_mem->start + 1;
2367 tmdev->tsens_calib_addr = ioremap(tmdev->res_calib_mem->start,
2369 if (!tmdev->tsens_calib_addr) {
2370 pr_err("Failed to IO map EEPROM registers.\n");
2372 goto fail_unmap_tsens;
2379 if (tmdev->tsens_addr)
2380 iounmap(tmdev->tsens_addr);
2381 fail_unmap_tsens_region:
2382 if (tmdev->res_tsens_mem)
2383 release_mem_region(tmdev->res_tsens_mem->start,
2386 platform_set_drvdata(pdev, NULL);
2391 static int tsens_tm_probe(struct platform_device *pdev)
2393 struct device_node *of_node = pdev->dev.of_node;
2395 u32 tsens_num_sensors;
2396 struct tsens_tm_device *tmdev = NULL;
2398 rc = of_property_read_u32(of_node,
2399 "qcom,sensors", &tsens_num_sensors);
2400 tmdev = devm_kzalloc(&pdev->dev,
2401 sizeof(struct tsens_tm_device) +
2403 sizeof(struct tsens_tm_device_sensor),
2405 if (tmdev == NULL) {
2406 pr_err("%s: kzalloc() failed.\n", __func__);
2410 if (pdev->dev.of_node) {
2411 rc = get_device_tree_data(pdev, tmdev);
2413 pr_err("Error reading TSENS DT\n");
2421 tmdev->tsens_critical_wq = alloc_workqueue("tsens_critical_wq",
2423 if (!tmdev->tsens_critical_wq) {
2428 rc = tsens_hw_init(tmdev);
2432 tmdev->prev_reading_avail = true;
2434 for (i = 0; i < 16; i++)
2435 tmdev->sensor_dbg_info[i].idx = 0;
2437 spin_lock_init(&tmdev->tsens_crit_lock);
2438 spin_lock_init(&tmdev->tsens_upp_low_lock);
2439 tmdev->is_ready = true;
2441 list_add_tail(&tmdev->list, &tsens_device_list);
2442 platform_set_drvdata(pdev, tmdev);
2444 rc = create_tsens_mtc_sysfs(pdev);
2446 pr_debug("Cannot create create_tsens_mtc_sysfs %d\n", rc);
2450 if (tmdev->tsens_critical_wq)
2451 destroy_workqueue(tmdev->tsens_critical_wq);
2452 if (tmdev->tsens_calib_addr)
2453 iounmap(tmdev->tsens_calib_addr);
2454 if (tmdev->tsens_addr)
2455 iounmap(tmdev->tsens_addr);
2456 if (tmdev->res_tsens_mem)
2457 release_mem_region(tmdev->res_tsens_mem->start,
2459 platform_set_drvdata(pdev, NULL);
2464 static ssize_t tsens_debugfs_read(struct file *file, char __user *ubuf,
2465 size_t count, loff_t *ppos)
2468 struct tsens_tm_device *tmdev = NULL;
2470 list_for_each_entry(tmdev, &tsens_device_list, list) {
2471 nbytes += scnprintf(dbg_buff + nbytes, 1024 - nbytes,
2472 "TSENS Critical count: %d\n",
2473 tmdev->tsens_critical_irq_cnt);
2474 nbytes += scnprintf(dbg_buff + nbytes, 1024 - nbytes,
2475 "TSENS Upper count: %d\n",
2476 tmdev->tsens_upper_irq_cnt);
2477 nbytes += scnprintf(dbg_buff + nbytes, 1024 - nbytes,
2478 "TSENS Lower count: %d\n",
2479 tmdev->tsens_lower_irq_cnt);
2483 return simple_read_from_buffer(ubuf, count, ppos, dbg_buff, nbytes);
2486 const struct file_operations tsens_stats_ops = {
2487 .read = tsens_debugfs_read,
2490 static void tsens_debugfs_init(void)
2492 const mode_t read_only_mode = S_IRUSR | S_IRGRP | S_IROTH;
2494 dent = debugfs_create_dir("tsens", 0);
2496 pr_err("Error creating TSENS directory\n");
2500 dfile_stats = debugfs_create_file("stats", read_only_mode, dent,
2501 0, &tsens_stats_ops);
2502 if (!dfile_stats || IS_ERR(dfile_stats)) {
2503 pr_err("Failed to create TSENS folder\n");
2508 static int tsens_thermal_zone_register(struct tsens_tm_device *tmdev)
2512 if (tmdev == NULL) {
2513 pr_err("Invalid tsens instance\n");
2517 for (i = 0; i < tmdev->tsens_num_sensor; i++) {
2520 snprintf(name, sizeof(name), "tsens_tz_sensor%d",
2521 tmdev->sensor[i].sensor_client_id);
2522 tmdev->sensor[i].mode = THERMAL_DEVICE_ENABLED;
2523 tmdev->sensor[i].tm = tmdev;
2524 if (tmdev->tsens_type == TSENS_TYPE3) {
2525 tmdev->sensor[i].tz_dev = thermal_zone_device_register(
2526 name, TSENS_TRIP_NUM,
2527 TSENS_WRITABLE_TRIPS_MASK,
2529 &tsens_tm_thermal_zone_ops, NULL, 0, 0);
2530 if (IS_ERR(tmdev->sensor[i].tz_dev)) {
2531 pr_err("%s: failed.\n", __func__);
2536 tmdev->sensor[i].tz_dev = thermal_zone_device_register(
2537 name, TSENS_TRIP_NUM,
2538 TSENS_WRITABLE_TRIPS_MASK,
2540 &tsens_thermal_zone_ops, NULL, 0, 0);
2541 if (IS_ERR(tmdev->sensor[i].tz_dev)) {
2542 pr_err("%s: failed.\n", __func__);
2549 if (tmdev->tsens_type == TSENS_TYPE3) {
2550 rc = request_threaded_irq(tmdev->tsens_irq, NULL,
2551 tsens_tm_irq_thread,
2552 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
2553 "tsens_interrupt", tmdev);
2555 pr_err("%s: request_irq FAIL: %d\n", __func__, rc);
2556 for (i = 0; i < tmdev->tsens_num_sensor; i++)
2557 thermal_zone_device_unregister(
2558 tmdev->sensor[i].tz_dev);
2561 enable_irq_wake(tmdev->tsens_irq);
2564 rc = request_threaded_irq(tmdev->tsens_critical_irq, NULL,
2565 tsens_tm_critical_irq_thread,
2566 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
2567 "tsens_critical_interrupt", tmdev);
2569 pr_err("%s: request_irq FAIL: %d\n", __func__, rc);
2570 for (i = 0; i < tmdev->tsens_num_sensor; i++)
2571 thermal_zone_device_unregister(
2572 tmdev->sensor[i].tz_dev);
2575 enable_irq_wake(tmdev->tsens_critical_irq);
2578 if (tsens_poll_check) {
2579 INIT_DEFERRABLE_WORK(&tmdev->tsens_critical_poll_test,
2581 schedule_delayed_work(&tmdev->tsens_critical_poll_test,
2582 msecs_to_jiffies(tsens_sec_to_msec_value));
2583 init_completion(&tmdev->tsens_rslt_completion);
2584 tmdev->tsens_critical_poll = true;
2587 rc = request_threaded_irq(tmdev->tsens_irq, NULL,
2588 tsens_irq_thread, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
2589 "tsens_interrupt", tmdev);
2591 pr_err("%s: request_irq FAIL: %d\n", __func__, rc);
2592 for (i = 0; i < tmdev->tsens_num_sensor; i++)
2593 thermal_zone_device_unregister(
2594 tmdev->sensor[i].tz_dev);
2597 enable_irq_wake(tmdev->tsens_irq);
2603 if (tmdev->tsens_calib_addr)
2604 iounmap(tmdev->tsens_calib_addr);
2605 if (tmdev->tsens_addr)
2606 iounmap(tmdev->tsens_addr);
2607 if (tmdev->res_tsens_mem)
2608 release_mem_region(tmdev->res_tsens_mem->start,
2613 static int _tsens_register_thermal(void)
2615 struct tsens_tm_device *tmdev = NULL;
2618 if (tsens_is_ready() <= 0) {
2619 pr_err("%s: TSENS early init not done\n", __func__);
2623 list_for_each_entry(tmdev, &tsens_device_list, list) {
2624 rc = tsens_thermal_zone_register(tmdev);
2626 pr_err("Error registering the thermal zone\n");
2631 tsens_debugfs_init();
2636 static int tsens_tm_remove(struct platform_device *pdev)
2638 struct tsens_tm_device *tmdev = platform_get_drvdata(pdev);
2641 for (i = 0; i < tmdev->tsens_num_sensor; i++)
2642 thermal_zone_device_unregister(tmdev->sensor[i].tz_dev);
2643 if (tmdev->tsens_calib_addr)
2644 iounmap(tmdev->tsens_calib_addr);
2645 if (tmdev->tsens_addr)
2646 iounmap(tmdev->tsens_addr);
2647 if (tmdev->res_tsens_mem)
2648 release_mem_region(tmdev->res_tsens_mem->start,
2650 if (tmdev->tsens_critical_wq)
2651 destroy_workqueue(tmdev->tsens_critical_wq);
2652 platform_set_drvdata(pdev, NULL);
2657 static struct platform_driver tsens_tm_driver = {
2658 .probe = tsens_tm_probe,
2659 .remove = tsens_tm_remove,
2661 .name = "msm-tsens",
2662 .owner = THIS_MODULE,
2663 .of_match_table = tsens_match,
2667 int __init tsens_tm_init_driver(void)
2669 return platform_driver_register(&tsens_tm_driver);
2671 arch_initcall(tsens_tm_init_driver);
2673 static int __init tsens_thermal_register(void)
2675 return _tsens_register_thermal();
2677 module_init(tsens_thermal_register);
2679 static void __exit _tsens_tm_remove(void)
2681 platform_driver_unregister(&tsens_tm_driver);
2683 module_exit(_tsens_tm_remove);
2685 MODULE_ALIAS("platform:" TSENS_DRIVER_NAME);
2686 MODULE_LICENSE("GPL v2");