2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-mapping.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
39 #include <linux/init.h>
40 #include <linux/bootmem.h>
41 #include <linux/iommu-helper.h>
43 #define CREATE_TRACE_POINTS
44 #include <trace/events/swiotlb.h>
46 #define OFFSET(val,align) ((unsigned long) \
47 ( (val) & ( (align) - 1)))
49 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
52 * Minimum IO TLB size to bother booting with. Systems with mainly
53 * 64bit capable cards will only lightly use the swiotlb. If we can't
54 * allocate a contiguous 1MB, we're probably in trouble anyway.
56 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
61 * Used to do a quick range check in swiotlb_tbl_unmap_single and
62 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
65 static phys_addr_t io_tlb_start, io_tlb_end;
68 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
69 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
71 static unsigned long io_tlb_nslabs;
74 * When the IOMMU overflows we return a fallback buffer. This sets the size.
76 static unsigned long io_tlb_overflow = 32*1024;
78 static phys_addr_t io_tlb_overflow_buffer;
81 * This is a free list describing the number of free entries available from
84 static unsigned int *io_tlb_list;
85 static unsigned int io_tlb_index;
88 * We need to save away the original address corresponding to a mapped entry
89 * for the sync operations.
91 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
92 static phys_addr_t *io_tlb_orig_addr;
95 * Protect the above data structures in the map and unmap calls
97 static DEFINE_SPINLOCK(io_tlb_lock);
99 static int late_alloc;
102 setup_io_tlb_npages(char *str)
105 io_tlb_nslabs = simple_strtoul(str, &str, 0);
106 /* avoid tail segment of size < IO_TLB_SEGSIZE */
107 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
111 if (!strcmp(str, "force"))
116 early_param("swiotlb", setup_io_tlb_npages);
117 /* make io_tlb_overflow tunable too? */
119 unsigned long swiotlb_nr_tbl(void)
121 return io_tlb_nslabs;
123 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
125 /* default to 64MB */
126 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
127 unsigned long swiotlb_size_or_default(void)
131 size = io_tlb_nslabs << IO_TLB_SHIFT;
133 return size ? size : (IO_TLB_DEFAULT_SIZE);
136 /* Note that this doesn't work with highmem page */
137 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
140 return phys_to_dma(hwdev, virt_to_phys(address));
143 static bool no_iotlb_memory;
145 void swiotlb_print_info(void)
147 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
149 if (no_iotlb_memory) {
150 pr_warn("No low mem\n");
154 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
155 (unsigned long long)io_tlb_start,
156 (unsigned long long)io_tlb_end,
160 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
162 void *v_overflow_buffer;
163 unsigned long i, bytes;
165 bytes = nslabs << IO_TLB_SHIFT;
167 io_tlb_nslabs = nslabs;
168 io_tlb_start = __pa(tlb);
169 io_tlb_end = io_tlb_start + bytes;
172 * Get the overflow emergency buffer
174 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
175 PAGE_ALIGN(io_tlb_overflow),
177 if (!v_overflow_buffer)
180 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
183 * Allocate and initialize the free list array. This array is used
184 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
185 * between io_tlb_start and io_tlb_end.
187 io_tlb_list = memblock_virt_alloc(
188 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
190 io_tlb_orig_addr = memblock_virt_alloc(
191 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
193 for (i = 0; i < io_tlb_nslabs; i++) {
194 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
195 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
200 swiotlb_print_info();
206 * Statically reserve bounce buffer space and initialize bounce buffer data
207 * structures for the software IO TLB used to implement the DMA API.
210 swiotlb_init(int verbose)
212 size_t default_size = IO_TLB_DEFAULT_SIZE;
213 unsigned char *vstart;
216 if (!io_tlb_nslabs) {
217 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
218 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
221 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
223 /* Get IO TLB memory from the low pages */
224 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
225 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
229 memblock_free_early(io_tlb_start,
230 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
231 pr_warn("Cannot allocate buffer");
232 no_iotlb_memory = true;
236 * Systems with larger DMA zones (those that don't support ISA) can
237 * initialize the swiotlb later using the slab allocator if needed.
238 * This should be just like above, but with some error catching.
241 swiotlb_late_init_with_default_size(size_t default_size)
243 unsigned long bytes, req_nslabs = io_tlb_nslabs;
244 unsigned char *vstart = NULL;
248 if (!io_tlb_nslabs) {
249 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
250 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
254 * Get IO TLB memory from the low pages
256 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
257 io_tlb_nslabs = SLABS_PER_PAGE << order;
258 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
260 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
261 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
269 io_tlb_nslabs = req_nslabs;
272 if (order != get_order(bytes)) {
273 pr_warn("only able to allocate %ld MB\n",
274 (PAGE_SIZE << order) >> 20);
275 io_tlb_nslabs = SLABS_PER_PAGE << order;
277 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
279 free_pages((unsigned long)vstart, order);
284 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
286 unsigned long i, bytes;
287 unsigned char *v_overflow_buffer;
289 bytes = nslabs << IO_TLB_SHIFT;
291 io_tlb_nslabs = nslabs;
292 io_tlb_start = virt_to_phys(tlb);
293 io_tlb_end = io_tlb_start + bytes;
295 memset(tlb, 0, bytes);
298 * Get the overflow emergency buffer
300 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
301 get_order(io_tlb_overflow));
302 if (!v_overflow_buffer)
305 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
308 * Allocate and initialize the free list array. This array is used
309 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
310 * between io_tlb_start and io_tlb_end.
312 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
313 get_order(io_tlb_nslabs * sizeof(int)));
317 io_tlb_orig_addr = (phys_addr_t *)
318 __get_free_pages(GFP_KERNEL,
319 get_order(io_tlb_nslabs *
320 sizeof(phys_addr_t)));
321 if (!io_tlb_orig_addr)
324 for (i = 0; i < io_tlb_nslabs; i++) {
325 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
326 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
330 swiotlb_print_info();
337 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
341 free_pages((unsigned long)v_overflow_buffer,
342 get_order(io_tlb_overflow));
343 io_tlb_overflow_buffer = 0;
351 void __init swiotlb_free(void)
353 if (!io_tlb_orig_addr)
357 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
358 get_order(io_tlb_overflow));
359 free_pages((unsigned long)io_tlb_orig_addr,
360 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
361 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
363 free_pages((unsigned long)phys_to_virt(io_tlb_start),
364 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
366 memblock_free_late(io_tlb_overflow_buffer,
367 PAGE_ALIGN(io_tlb_overflow));
368 memblock_free_late(__pa(io_tlb_orig_addr),
369 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
370 memblock_free_late(__pa(io_tlb_list),
371 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
372 memblock_free_late(io_tlb_start,
373 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
378 int is_swiotlb_buffer(phys_addr_t paddr)
380 return paddr >= io_tlb_start && paddr < io_tlb_end;
384 * Bounce: copy the swiotlb buffer back to the original dma location
386 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
387 size_t size, enum dma_data_direction dir)
389 unsigned long pfn = PFN_DOWN(orig_addr);
390 unsigned char *vaddr = phys_to_virt(tlb_addr);
392 if (PageHighMem(pfn_to_page(pfn))) {
393 /* The buffer does not have a mapping. Map it in and copy */
394 unsigned int offset = orig_addr & ~PAGE_MASK;
400 sz = min_t(size_t, PAGE_SIZE - offset, size);
402 local_irq_save(flags);
403 buffer = kmap_atomic(pfn_to_page(pfn));
404 if (dir == DMA_TO_DEVICE)
405 memcpy(vaddr, buffer + offset, sz);
407 memcpy(buffer + offset, vaddr, sz);
408 kunmap_atomic(buffer);
409 local_irq_restore(flags);
416 } else if (dir == DMA_TO_DEVICE) {
417 memcpy(vaddr, phys_to_virt(orig_addr), size);
419 memcpy(phys_to_virt(orig_addr), vaddr, size);
423 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
424 dma_addr_t tbl_dma_addr,
425 phys_addr_t orig_addr, size_t size,
426 enum dma_data_direction dir)
429 phys_addr_t tlb_addr;
430 unsigned int nslots, stride, index, wrap;
433 unsigned long offset_slots;
434 unsigned long max_slots;
437 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
439 mask = dma_get_seg_boundary(hwdev);
441 tbl_dma_addr &= mask;
443 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
446 * Carefully handle integer overflow which can occur when mask == ~0UL.
449 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
450 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
453 * For mappings greater than or equal to a page, we limit the stride
454 * (and hence alignment) to a page size.
456 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
457 if (size >= PAGE_SIZE)
458 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
465 * Find suitable number of IO TLB entries size that will fit this
466 * request and allocate a buffer from that IO TLB pool.
468 spin_lock_irqsave(&io_tlb_lock, flags);
469 index = ALIGN(io_tlb_index, stride);
470 if (index >= io_tlb_nslabs)
475 while (iommu_is_span_boundary(index, nslots, offset_slots,
478 if (index >= io_tlb_nslabs)
485 * If we find a slot that indicates we have 'nslots' number of
486 * contiguous buffers, we allocate the buffers from that slot
487 * and mark the entries as '0' indicating unavailable.
489 if (io_tlb_list[index] >= nslots) {
492 for (i = index; i < (int) (index + nslots); i++)
494 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
495 io_tlb_list[i] = ++count;
496 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
499 * Update the indices to avoid searching in the next
502 io_tlb_index = ((index + nslots) < io_tlb_nslabs
503 ? (index + nslots) : 0);
508 if (index >= io_tlb_nslabs)
510 } while (index != wrap);
513 spin_unlock_irqrestore(&io_tlb_lock, flags);
514 if (printk_ratelimit())
515 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
516 return SWIOTLB_MAP_ERROR;
518 spin_unlock_irqrestore(&io_tlb_lock, flags);
521 * Save away the mapping from the original address to the DMA address.
522 * This is needed when we sync the memory. Then we sync the buffer if
525 for (i = 0; i < nslots; i++)
526 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
527 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
528 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
532 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
535 * Allocates bounce buffer and returns its kernel virtual address.
539 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
540 enum dma_data_direction dir)
542 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
544 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
548 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
550 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
551 size_t size, enum dma_data_direction dir)
554 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
555 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
556 phys_addr_t orig_addr = io_tlb_orig_addr[index];
559 * First, sync the memory before unmapping the entry
561 if (orig_addr != INVALID_PHYS_ADDR &&
562 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
563 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
566 * Return the buffer to the free list by setting the corresponding
567 * entries to indicate the number of contiguous entries available.
568 * While returning the entries to the free list, we merge the entries
569 * with slots below and above the pool being returned.
571 spin_lock_irqsave(&io_tlb_lock, flags);
573 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
574 io_tlb_list[index + nslots] : 0);
576 * Step 1: return the slots to the free list, merging the
577 * slots with superceeding slots
579 for (i = index + nslots - 1; i >= index; i--) {
580 io_tlb_list[i] = ++count;
581 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
584 * Step 2: merge the returned slots with the preceding slots,
585 * if available (non zero)
587 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
588 io_tlb_list[i] = ++count;
590 spin_unlock_irqrestore(&io_tlb_lock, flags);
592 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
594 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
595 size_t size, enum dma_data_direction dir,
596 enum dma_sync_target target)
598 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
599 phys_addr_t orig_addr = io_tlb_orig_addr[index];
601 if (orig_addr == INVALID_PHYS_ADDR)
603 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
607 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
608 swiotlb_bounce(orig_addr, tlb_addr,
609 size, DMA_FROM_DEVICE);
611 BUG_ON(dir != DMA_TO_DEVICE);
613 case SYNC_FOR_DEVICE:
614 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
615 swiotlb_bounce(orig_addr, tlb_addr,
616 size, DMA_TO_DEVICE);
618 BUG_ON(dir != DMA_FROM_DEVICE);
624 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
627 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
628 dma_addr_t *dma_handle, gfp_t flags)
632 int order = get_order(size);
633 u64 dma_mask = DMA_BIT_MASK(32);
635 if (hwdev && hwdev->coherent_dma_mask)
636 dma_mask = hwdev->coherent_dma_mask;
638 ret = (void *)__get_free_pages(flags, order);
640 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
641 if (dev_addr + size - 1 > dma_mask) {
643 * The allocated memory isn't reachable by the device.
645 free_pages((unsigned long) ret, order);
651 * We are either out of memory or the device can't DMA to
652 * GFP_DMA memory; fall back on map_single(), which
653 * will grab memory from the lowest available address range.
655 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
656 if (paddr == SWIOTLB_MAP_ERROR)
659 ret = phys_to_virt(paddr);
660 dev_addr = phys_to_dma(hwdev, paddr);
662 /* Confirm address can be DMA'd by device */
663 if (dev_addr + size - 1 > dma_mask) {
664 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
665 (unsigned long long)dma_mask,
666 (unsigned long long)dev_addr);
668 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
669 swiotlb_tbl_unmap_single(hwdev, paddr,
670 size, DMA_TO_DEVICE);
675 *dma_handle = dev_addr;
676 memset(ret, 0, size);
681 pr_warn("coherent allocation failed for device %s size=%zu\n",
682 dev_name(hwdev), size);
687 EXPORT_SYMBOL(swiotlb_alloc_coherent);
690 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
693 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
695 WARN_ON(irqs_disabled());
696 if (!is_swiotlb_buffer(paddr))
697 free_pages((unsigned long)vaddr, get_order(size));
699 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
700 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
702 EXPORT_SYMBOL(swiotlb_free_coherent);
705 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
709 * Ran out of IOMMU space for this operation. This is very bad.
710 * Unfortunately the drivers cannot handle this operation properly.
711 * unless they check for dma_mapping_error (most don't)
712 * When the mapping is small enough return a static buffer to limit
713 * the damage, or panic when the transfer is too big.
715 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
716 "device %s\n", size, dev ? dev_name(dev) : "?");
718 if (size <= io_tlb_overflow || !do_panic)
721 if (dir == DMA_BIDIRECTIONAL)
722 panic("DMA: Random memory could be DMA accessed\n");
723 if (dir == DMA_FROM_DEVICE)
724 panic("DMA: Random memory could be DMA written\n");
725 if (dir == DMA_TO_DEVICE)
726 panic("DMA: Random memory could be DMA read\n");
730 * Map a single buffer of the indicated size for DMA in streaming mode. The
731 * physical address to use is returned.
733 * Once the device is given the dma address, the device owns this memory until
734 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
736 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
737 unsigned long offset, size_t size,
738 enum dma_data_direction dir,
739 struct dma_attrs *attrs)
741 phys_addr_t map, phys = page_to_phys(page) + offset;
742 dma_addr_t dev_addr = phys_to_dma(dev, phys);
744 BUG_ON(dir == DMA_NONE);
746 * If the address happens to be in the device's DMA window,
747 * we can safely return the device addr and not worry about bounce
750 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
753 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
755 /* Oh well, have to allocate and map a bounce buffer. */
756 map = map_single(dev, phys, size, dir);
757 if (map == SWIOTLB_MAP_ERROR) {
758 swiotlb_full(dev, size, dir, 1);
759 return phys_to_dma(dev, io_tlb_overflow_buffer);
762 dev_addr = phys_to_dma(dev, map);
764 /* Ensure that the address returned is DMA'ble */
765 if (!dma_capable(dev, dev_addr, size)) {
766 swiotlb_tbl_unmap_single(dev, map, size, dir);
767 return phys_to_dma(dev, io_tlb_overflow_buffer);
772 EXPORT_SYMBOL_GPL(swiotlb_map_page);
775 * Unmap a single streaming mode DMA translation. The dma_addr and size must
776 * match what was provided for in a previous swiotlb_map_page call. All
777 * other usages are undefined.
779 * After this call, reads by the cpu to the buffer are guaranteed to see
780 * whatever the device wrote there.
782 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
783 size_t size, enum dma_data_direction dir)
785 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
787 BUG_ON(dir == DMA_NONE);
789 if (is_swiotlb_buffer(paddr)) {
790 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
794 if (dir != DMA_FROM_DEVICE)
798 * phys_to_virt doesn't work with hihgmem page but we could
799 * call dma_mark_clean() with hihgmem page here. However, we
800 * are fine since dma_mark_clean() is null on POWERPC. We can
801 * make dma_mark_clean() take a physical address if necessary.
803 dma_mark_clean(phys_to_virt(paddr), size);
806 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
807 size_t size, enum dma_data_direction dir,
808 struct dma_attrs *attrs)
810 unmap_single(hwdev, dev_addr, size, dir);
812 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
815 * Make physical memory consistent for a single streaming mode DMA translation
818 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
819 * using the cpu, yet do not wish to teardown the dma mapping, you must
820 * call this function before doing so. At the next point you give the dma
821 * address back to the card, you must first perform a
822 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
825 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
826 size_t size, enum dma_data_direction dir,
827 enum dma_sync_target target)
829 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
831 BUG_ON(dir == DMA_NONE);
833 if (is_swiotlb_buffer(paddr)) {
834 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
838 if (dir != DMA_FROM_DEVICE)
841 dma_mark_clean(phys_to_virt(paddr), size);
845 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
846 size_t size, enum dma_data_direction dir)
848 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
850 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
853 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
854 size_t size, enum dma_data_direction dir)
856 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
858 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
861 * Map a set of buffers described by scatterlist in streaming mode for DMA.
862 * This is the scatter-gather version of the above swiotlb_map_page
863 * interface. Here the scatter gather list elements are each tagged with the
864 * appropriate dma address and length. They are obtained via
865 * sg_dma_{address,length}(SG).
867 * NOTE: An implementation may be able to use a smaller number of
868 * DMA address/length pairs than there are SG table elements.
869 * (for example via virtual mapping capabilities)
870 * The routine returns the number of addr/length pairs actually
871 * used, at most nents.
873 * Device ownership issues as mentioned above for swiotlb_map_page are the
877 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
878 enum dma_data_direction dir, struct dma_attrs *attrs)
880 struct scatterlist *sg;
883 BUG_ON(dir == DMA_NONE);
885 for_each_sg(sgl, sg, nelems, i) {
886 phys_addr_t paddr = sg_phys(sg);
887 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
890 !dma_capable(hwdev, dev_addr, sg->length)) {
891 phys_addr_t map = map_single(hwdev, sg_phys(sg),
893 if (map == SWIOTLB_MAP_ERROR) {
894 /* Don't panic here, we expect map_sg users
895 to do proper error handling. */
896 swiotlb_full(hwdev, sg->length, dir, 0);
897 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
902 sg->dma_address = phys_to_dma(hwdev, map);
904 sg->dma_address = dev_addr;
905 sg_dma_len(sg) = sg->length;
909 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
912 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
913 enum dma_data_direction dir)
915 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
917 EXPORT_SYMBOL(swiotlb_map_sg);
920 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
921 * concerning calls here are the same as for swiotlb_unmap_page() above.
924 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
925 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
927 struct scatterlist *sg;
930 BUG_ON(dir == DMA_NONE);
932 for_each_sg(sgl, sg, nelems, i)
933 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
936 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
939 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
940 enum dma_data_direction dir)
942 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
944 EXPORT_SYMBOL(swiotlb_unmap_sg);
947 * Make physical memory consistent for a set of streaming mode DMA translations
950 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
954 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
955 int nelems, enum dma_data_direction dir,
956 enum dma_sync_target target)
958 struct scatterlist *sg;
961 for_each_sg(sgl, sg, nelems, i)
962 swiotlb_sync_single(hwdev, sg->dma_address,
963 sg_dma_len(sg), dir, target);
967 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
968 int nelems, enum dma_data_direction dir)
970 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
972 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
975 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
976 int nelems, enum dma_data_direction dir)
978 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
980 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
983 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
985 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
987 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
990 * Return whether the given device DMA address mask can be supported
991 * properly. For example, if your device can only drive the low 24-bits
992 * during bus mastering, then you would pass 0x00ffffff as the mask to
996 swiotlb_dma_supported(struct device *hwdev, u64 mask)
998 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1000 EXPORT_SYMBOL(swiotlb_dma_supported);