drm/radeon: fix bad DMA from INTERRUPT_CNTL2

[ Upstream commit 62d91dd2851e8ae2ca552f1b090a3575a4edf759 ]

The INTERRUPT_CNTL2 register expects a valid DMA address, but is
currently set with a GPU MC address.  This can cause problems on
systems that detect the resulting DMA read from an invalid address
(found on a Power8 guest).

Instead, use the DMA address of the dummy page because it will always
be safe.

Fixes: d8f60cfc9345 ("drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3)")
Fixes: 25a857fbe973 ("drm/radeon/kms: add support for interrupts on SI")
Fixes: a59781bbe528 ("drm/radeon: add support for interrupts on CIK (v5)")
Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 80b6d6e..7acde09 100644 (file)
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7372,8 +7372,8 @@ static int cik_irq_init(struct radeon_device *rdev)
        }
 
        /* setup interrupt control */
-       /* XXX this should actually be a bus address, not an MC address. same on older asics */
-       WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+       /* set dummy read address to dummy page address */
+       WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
        interrupt_cntl = RREG32(INTERRUPT_CNTL);
        /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
         * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0e20c08..2056224 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3647,8 +3647,8 @@ int r600_irq_init(struct radeon_device *rdev)
        }
 
        /* setup interrupt control */
-       /* set dummy read address to ring address */
-       WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+       /* set dummy read address to dummy page address */
+       WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
        interrupt_cntl = RREG32(INTERRUPT_CNTL);
        /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
         * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 5cf3a2c..4128c98 100644 (file)
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6013,8 +6013,8 @@ static int si_irq_init(struct radeon_device *rdev)
        }
 
        /* setup interrupt control */
-       /* set dummy read address to ring address */
-       WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8);
+       /* set dummy read address to dummy page address */
+       WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);
        interrupt_cntl = RREG32(INTERRUPT_CNTL);
        /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi
         * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN