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ARM: dts: am437x-gp-evm: Add eMMC support
authorRoger Quadros <rogerq@ti.com>
Tue, 4 Aug 2015 15:35:00 +0000 (18:35 +0300)
committerTony Lindgren <tony@atomide.com>
Wed, 5 Aug 2015 10:58:27 +0000 (03:58 -0700)
Add eMMC pinmux and mmc2 related bits. We keep the mmc2
controller disabled as it conflits with gpmc/NAND.

To enable emmc, simply set mmc2 controller node to "okay"
and set the gpmc node to "disabled" and change the
SelEMMCorNAND gpio-hog to output-high.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am437x-gp-evm.dts

index 3c59858..c7423ed 100644 (file)
                        0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
                >;
        };
+
+       emmc_pins_default: emmc_pins_default {
+               pinctrl-single,pins = <
+                       0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+                       0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+                       0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+                       0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+                       0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+                       0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+                       0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+                       0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+                       0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+                       0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+               >;
+       };
+
+       emmc_pins_sleep: emmc_pins_sleep {
+               pinctrl-single,pins = <
+                       0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
+                       0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
+                       0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
+                       0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
+                       0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
+                       0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
+                       0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
+                       0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
+                       0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
+                       0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
+               >;
+       };
 };
 
 &i2c0 {
        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
 };
 
+/* eMMC sits on mmc2 */
+&mmc2 {
+       /*
+        * When enabling eMMC, disable GPMC/NAND and set
+        * SelEMMCorNAND to output-high
+        */
+       status = "disabled";
+       vmmc-supply = <&evm_v3_3d>;
+       bus-width = <8>;
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&emmc_pins_default>;
+       pinctrl-1 = <&emmc_pins_sleep>;
+       ti,non-removable;
+};
+
 &mmc3 {
        status = "okay";
        /* these are on the crossbar and are outlined in the
 };
 
 &gpmc {
+       /*
+        * When enabling GPMC, disable eMMC and set
+        * SelEMMCorNAND to output-low
+        */
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&nand_flash_x8>;