1 #include <p24FJ64GA004.h>
16 //1. Clear the SPIxBUF register.
17 for(i = 0; i < 16; i++) c = SPI1BUF;
20 //2. Write the desired settings to the SPIxCON register with MSTEN (SPIxCON1<5>) = 1.
21 // bit12 DISSCK=0 0=Internal SPI clock is enabled
22 // bit11 DISSDO=0 0 = SDOx pin is controlled by the module
23 // bit10 MODE16=0 8bit
24 // bit9 SMP=1 1=Input data sampled at end of data output time @MasterMode
25 // bit8 CKE=0 DATA CHANGE=CLK LtoH
26 // bit7 SSEN=0 SS pin disable
27 // bit6 CKP=0 CLK IDLE=LOW
28 // bit5 MSTEN=1 Master
29 // bit4-2 SPRE=0b111 Secondary Prescale 1:1
30 // 111 = Secondary prescale 1:1
31 // 110 = Secondary prescale 2:1
33 // 000 = Secondary prescale 8:1
34 // bit1-0 PPRE=0b01 Primarily Prescale 4:1
35 // 11 = Primary prescale 1:1
36 // 10 = Primary prescale 4:1
37 // 01 = Primary prescale 16:1
38 // 00 = Primary prescale 64:1
40 SPI1CON1 = 0b0000001000111110;
42 // Enahanced Buffer(FIFO) Disable
43 // bit0 SPIBEN: Enhanced Buffer Enable bit
44 // 1 = Enhanced Buffer enabled
45 // 0 = Enhanced Buffer disabled (Legacy mode)
47 // SPI1CON2bits.SPIBEN = 1;
49 // bit 4-2 SISEL2:SISEL0: SPIx Buffer Interrupt Mode bits (valid in Enhanced Buffer mode)
50 // 001 = Interrupt when data is available in receive buffer (SRMPT bit is set)
51 // SPI1STATbits.SISEL = 0b001;
53 //3. Clear the SPIROV bit (SPIxSTAT<6>).
54 SPI1STATbits.SPIROV = 0;
56 //4. Enable SPIx operation by setting the SPIEN bit (SPIxSTAT<15>).
57 SPI1STATbits.SPIEN = 1;
71 //1. Clear the SPIxBUF register.
72 for(i = 0; i < 16; i++) c = SPI2BUF;
73 //2. If using interrupts:
74 //• Clear the SPIxIF bit in the respective IFSx register.
76 //• Set the SPIxIE bit in the respective IECx register.
77 //• Write the SPIxIP bits in the respective IPCx register to set the interrupt priority.
80 // 0b100 = Interrupt when one data is shifted into the SPIxSR, as a result, the TX FIFO has one open spot
82 SPI2STATbits.SISEL = 0b100;
84 //3. Write the desired settings to the SPIxCON1 and SPIxCON2 registers with MSTEN (SPIxCON1<5>) = 0.
85 // SLAVE,8bit,CLK IDLE=LOW, DATA CHANGE=CLK HtoL, SS pin enable
87 // SPI1CON1 = 0b0000000110000000;
88 SPI2CON1 = 0b0000000100000000;
89 // Enahanced Buffer(FIFO) Disable
91 //4. Clear the SMP bit. SPI1CON1<9>
93 //5. If the CKE<8> bit is set, then the SSEN<7> bit must be set, thus enabling the SSx pin.
94 SPI2CON1bits.SSEN = 1;
95 //6. Clear the SPIROV bit (SPIxSTAT<6>).
96 SPI2STATbits.SPIROV = 0;
97 //7. Select Enhanced Buffer mode by setting the SPIBEN bit (SPIxCON2<0>).
98 SPI2CON2bits.SPIBEN = 1;
100 //8. Enable SPI operation by setting the SPIEN bit (SPIxSTAT<15>).
101 SPI2STATbits.SPIEN = 1;