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PCI: cadence: Move all files to per-device cadence directory
[tomoyo/tomoyo-test1.git] / drivers / pci / controller / cadence / pcie-cadence-plat.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cadence PCIe platform  driver.
4  *
5  * Copyright (c) 2019, Cadence Design Systems
6  * Author: Tom Joseph <tjoseph@cadence.com>
7  */
8 #include <linux/kernel.h>
9 #include <linux/of_address.h>
10 #include <linux/of_pci.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/of_device.h>
14 #include "pcie-cadence.h"
15
16 /**
17  * struct cdns_plat_pcie - private data for this PCIe platform driver
18  * @pcie: Cadence PCIe controller
19  * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,
20  *         if 0 it is in Endpoint mode.
21  */
22 struct cdns_plat_pcie {
23         struct cdns_pcie        *pcie;
24         bool is_rc;
25 };
26
27 struct cdns_plat_pcie_of_data {
28         bool is_rc;
29 };
30
31 static const struct of_device_id cdns_plat_pcie_of_match[];
32
33 static int cdns_plat_pcie_probe(struct platform_device *pdev)
34 {
35         const struct cdns_plat_pcie_of_data *data;
36         struct cdns_plat_pcie *cdns_plat_pcie;
37         const struct of_device_id *match;
38         struct device *dev = &pdev->dev;
39         struct pci_host_bridge *bridge;
40         struct cdns_pcie_ep *ep;
41         struct cdns_pcie_rc *rc;
42         int phy_count;
43         bool is_rc;
44         int ret;
45
46         match = of_match_device(cdns_plat_pcie_of_match, dev);
47         if (!match)
48                 return -EINVAL;
49
50         data = (struct cdns_plat_pcie_of_data *)match->data;
51         is_rc = data->is_rc;
52
53         pr_debug(" Started %s with is_rc: %d\n", __func__, is_rc);
54         cdns_plat_pcie = devm_kzalloc(dev, sizeof(*cdns_plat_pcie), GFP_KERNEL);
55         if (!cdns_plat_pcie)
56                 return -ENOMEM;
57
58         platform_set_drvdata(pdev, cdns_plat_pcie);
59         if (is_rc) {
60                 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_HOST))
61                         return -ENODEV;
62
63                 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
64                 if (!bridge)
65                         return -ENOMEM;
66
67                 rc = pci_host_bridge_priv(bridge);
68                 rc->pcie.dev = dev;
69                 cdns_plat_pcie->pcie = &rc->pcie;
70                 cdns_plat_pcie->is_rc = is_rc;
71
72                 ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
73                 if (ret) {
74                         dev_err(dev, "failed to init phy\n");
75                         return ret;
76                 }
77                 pm_runtime_enable(dev);
78                 ret = pm_runtime_get_sync(dev);
79                 if (ret < 0) {
80                         dev_err(dev, "pm_runtime_get_sync() failed\n");
81                         goto err_get_sync;
82                 }
83
84                 ret = cdns_pcie_host_setup(rc);
85                 if (ret)
86                         goto err_init;
87         } else {
88                 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_EP))
89                         return -ENODEV;
90
91                 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
92                 if (!ep)
93                         return -ENOMEM;
94
95                 ep->pcie.dev = dev;
96                 cdns_plat_pcie->pcie = &ep->pcie;
97                 cdns_plat_pcie->is_rc = is_rc;
98
99                 ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
100                 if (ret) {
101                         dev_err(dev, "failed to init phy\n");
102                         return ret;
103                 }
104
105                 pm_runtime_enable(dev);
106                 ret = pm_runtime_get_sync(dev);
107                 if (ret < 0) {
108                         dev_err(dev, "pm_runtime_get_sync() failed\n");
109                         goto err_get_sync;
110                 }
111
112                 ret = cdns_pcie_ep_setup(ep);
113                 if (ret)
114                         goto err_init;
115         }
116
117  err_init:
118         pm_runtime_put_sync(dev);
119
120  err_get_sync:
121         pm_runtime_disable(dev);
122         cdns_pcie_disable_phy(cdns_plat_pcie->pcie);
123         phy_count = cdns_plat_pcie->pcie->phy_count;
124         while (phy_count--)
125                 device_link_del(cdns_plat_pcie->pcie->link[phy_count]);
126
127         return 0;
128 }
129
130 static void cdns_plat_pcie_shutdown(struct platform_device *pdev)
131 {
132         struct device *dev = &pdev->dev;
133         struct cdns_pcie *pcie = dev_get_drvdata(dev);
134         int ret;
135
136         ret = pm_runtime_put_sync(dev);
137         if (ret < 0)
138                 dev_dbg(dev, "pm_runtime_put_sync failed\n");
139
140         pm_runtime_disable(dev);
141
142         cdns_pcie_disable_phy(pcie);
143 }
144
145 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_host_of_data = {
146         .is_rc = true,
147 };
148
149 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_ep_of_data = {
150         .is_rc = false,
151 };
152
153 static const struct of_device_id cdns_plat_pcie_of_match[] = {
154         {
155                 .compatible = "cdns,cdns-pcie-host",
156                 .data = &cdns_plat_pcie_host_of_data,
157         },
158         {
159                 .compatible = "cdns,cdns-pcie-ep",
160                 .data = &cdns_plat_pcie_ep_of_data,
161         },
162         {},
163 };
164
165 static struct platform_driver cdns_plat_pcie_driver = {
166         .driver = {
167                 .name = "cdns-pcie",
168                 .of_match_table = cdns_plat_pcie_of_match,
169                 .pm     = &cdns_pcie_pm_ops,
170         },
171         .probe = cdns_plat_pcie_probe,
172         .shutdown = cdns_plat_pcie_shutdown,
173 };
174 builtin_platform_driver(cdns_plat_pcie_driver);