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Merge branch 'irq/gic-v4.1-fixes-5.7' into irq/irqchip-5.7
authorMarc Zyngier <maz@kernel.org>
Fri, 17 Apr 2020 07:59:55 +0000 (08:59 +0100)
committerMarc Zyngier <maz@kernel.org>
Fri, 17 Apr 2020 07:59:55 +0000 (08:59 +0100)
drivers/irqchip/irq-bcm7038-l1.c
drivers/irqchip/irq-mbigen.c
drivers/irqchip/irq-meson-gpio.c
drivers/irqchip/irq-mvebu-icu.c
drivers/irqchip/irq-sifive-plic.c
drivers/irqchip/irq-ti-sci-inta.c

index eb9bce9..fd7c537 100644 (file)
@@ -416,7 +416,7 @@ static const struct irq_domain_ops bcm7038_l1_domain_ops = {
        .map                    = bcm7038_l1_map,
 };
 
-int __init bcm7038_l1_of_init(struct device_node *dn,
+static int __init bcm7038_l1_of_init(struct device_node *dn,
                              struct device_node *parent)
 {
        struct bcm7038_l1_chip *intc;
index 6b566bb..ff7627b 100644 (file)
@@ -220,10 +220,16 @@ static int mbigen_irq_domain_alloc(struct irq_domain *domain,
        return 0;
 }
 
+static void mbigen_irq_domain_free(struct irq_domain *domain, unsigned int virq,
+                                  unsigned int nr_irqs)
+{
+       platform_msi_domain_free(domain, virq, nr_irqs);
+}
+
 static const struct irq_domain_ops mbigen_domain_ops = {
        .translate      = mbigen_domain_translate,
        .alloc          = mbigen_irq_domain_alloc,
-       .free           = irq_domain_free_irqs_common,
+       .free           = mbigen_irq_domain_free,
 };
 
 static int mbigen_of_create_domain(struct platform_device *pdev,
index ccc7f82..bc7aebc 100644 (file)
@@ -144,12 +144,17 @@ struct meson_gpio_irq_controller {
 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl,
                                       unsigned int reg, u32 mask, u32 val)
 {
+       unsigned long flags;
        u32 tmp;
 
+       spin_lock_irqsave(&ctl->lock, flags);
+
        tmp = readl_relaxed(ctl->base + reg);
        tmp &= ~mask;
        tmp |= val;
        writel_relaxed(tmp, ctl->base + reg);
+
+       spin_unlock_irqrestore(&ctl->lock, flags);
 }
 
 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl)
@@ -196,14 +201,15 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
                               unsigned long  hwirq,
                               u32 **channel_hwirq)
 {
+       unsigned long flags;
        unsigned int idx;
 
-       spin_lock(&ctl->lock);
+       spin_lock_irqsave(&ctl->lock, flags);
 
        /* Find a free channel */
        idx = find_first_zero_bit(ctl->channel_map, NUM_CHANNEL);
        if (idx >= NUM_CHANNEL) {
-               spin_unlock(&ctl->lock);
+               spin_unlock_irqrestore(&ctl->lock, flags);
                pr_err("No channel available\n");
                return -ENOSPC;
        }
@@ -211,6 +217,8 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
        /* Mark the channel as used */
        set_bit(idx, ctl->channel_map);
 
+       spin_unlock_irqrestore(&ctl->lock, flags);
+
        /*
         * Setup the mux of the channel to route the signal of the pad
         * to the appropriate input of the GIC
@@ -225,8 +233,6 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl,
         */
        *channel_hwirq = &(ctl->channel_irqs[idx]);
 
-       spin_unlock(&ctl->lock);
-
        pr_debug("hwirq %lu assigned to channel %d - irq %u\n",
                 hwirq, idx, **channel_hwirq);
 
@@ -287,13 +293,9 @@ static int meson_gpio_irq_type_setup(struct meson_gpio_irq_controller *ctl,
                        val |= REG_EDGE_POL_LOW(params, idx);
        }
 
-       spin_lock(&ctl->lock);
-
        meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
                                   REG_EDGE_POL_MASK(params, idx), val);
 
-       spin_unlock(&ctl->lock);
-
        return 0;
 }
 
index 547045d..91adf77 100644 (file)
@@ -66,7 +66,7 @@ struct mvebu_icu_irq_data {
        unsigned int type;
 };
 
-DEFINE_STATIC_KEY_FALSE(legacy_bindings);
+static DEFINE_STATIC_KEY_FALSE(legacy_bindings);
 
 static void mvebu_icu_init(struct mvebu_icu *icu,
                           struct mvebu_icu_msi_data *msi_data,
index c34fb3a..d0a71fe 100644 (file)
@@ -56,7 +56,7 @@
 #define     CONTEXT_THRESHOLD          0x00
 #define     CONTEXT_CLAIM              0x04
 
-#define        PLIC_DISABLE_THRESHOLD          0xf
+#define        PLIC_DISABLE_THRESHOLD          0x7
 #define        PLIC_ENABLE_THRESHOLD           0
 
 struct plic_priv {
index 8f6e6b0..7e3ebf6 100644 (file)
@@ -37,6 +37,7 @@
 #define VINT_ENABLE_SET_OFFSET 0x0
 #define VINT_ENABLE_CLR_OFFSET 0x8
 #define VINT_STATUS_OFFSET     0x18
+#define VINT_STATUS_MASKED_OFFSET      0x20
 
 /**
  * struct ti_sci_inta_event_desc - Description of an event coming to
@@ -116,7 +117,7 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc)
        chained_irq_enter(irq_desc_get_chip(desc), desc);
 
        val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
-                           VINT_STATUS_OFFSET);
+                           VINT_STATUS_MASKED_OFFSET);
 
        for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
                virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);