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drm/i915: Program MBUS with rmw during initialization
authorMatt Roper <matthew.d.roper@intel.com>
Tue, 4 Feb 2020 01:10:31 +0000 (17:10 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Thu, 20 Feb 2020 21:12:16 +0000 (13:12 -0800)
It wasn't terribly clear from the bspec's wording, but after discussion
with the hardware folks, it turns out that we need to preserve the
pre-existing contents of the MBUS ABOX control register when
initializing a few specific bits.

Bspec: 49213
Bspec: 50096
Fixes: 4cb4585e5a7f ("drm/i915/icl: initialize MBus during display init")
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200204011032.582737-1-matthew.d.roper@intel.com
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
drivers/gpu/drm/i915/display/intel_display_power.c

index 722399f..6e1d5d7 100644 (file)
@@ -4486,14 +4486,18 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv)
 
 static void icl_mbus_init(struct drm_i915_private *dev_priv)
 {
-       u32 val;
+       u32 mask, val;
 
+       mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK |
+               MBUS_ABOX_BT_CREDIT_POOL2_MASK |
+               MBUS_ABOX_B_CREDIT_MASK |
+               MBUS_ABOX_BW_CREDIT_MASK;
        val = MBUS_ABOX_BT_CREDIT_POOL1(16) |
-             MBUS_ABOX_BT_CREDIT_POOL2(16) |
-             MBUS_ABOX_B_CREDIT(1) |
-             MBUS_ABOX_BW_CREDIT(1);
+               MBUS_ABOX_BT_CREDIT_POOL2(16) |
+               MBUS_ABOX_B_CREDIT(1) |
+               MBUS_ABOX_BW_CREDIT(1);
 
-       intel_de_write(dev_priv, MBUS_ABOX_CTL, val);
+       intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);
 }
 
 static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)