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Merge branch 'develop'
[trx-305dsp/dsp.git] / hirado / kernel / tools / blackfin-vdsp / sample1_ezkit_bf537 / sample1.ldf
1 /* MANAGED-BY-SYSTEM-BUILDER                                    */
2
3 /*
4 ** ADSP-BF537 linker description file generated on Feb 01, 2009 at 17:32:12.
5 **
6 ** Copyright (C) 2000-2007 Analog Devices Inc., All Rights Reserved.
7 **
8 ** This file is generated automatically based upon the options selected
9 ** in the LDF Wizard. Changes to the LDF configuration should be made by
10 ** changing the appropriate options rather than editing this file.
11 **
12 ** Configuration:-
13 **     crt_doj:                                .\Debug\sample1_ezkit_bf537_basiccrt.doj
14 **     processor:                              ADSP-BF537
15 **     si_revision:                            automatic
16 **     mem_init:                               false
17 **     use_vdk:                                false
18 **     use_eh:                                 true
19 **     use_argv:                               false
20 **     running_from_internal_memory:           true
21 **     user_heap_src_file:                     D:\jsp\tools\blackfin-vdsp\sample1_ezkit_bf537\sample1_ezkit_bf537_heaptab.c
22 **     libraries_use_stdlib:                   true
23 **     libraries_use_fileio_libs:              false
24 **     libraries_use_ieeefp_emulation_libs:    false
25 **     libraries_use_eh_enabled_libs:          false
26 **     system_heap:                            L1
27 **     system_heap_min_size:                   2K
28 **     system_stack:                           L1
29 **     system_stack_min_size:                  2K
30 **     use_sdram:                              false
31 **
32 */
33
34 ARCHITECTURE(ADSP-BF537)
35
36 SEARCH_DIR($ADI_DSP/Blackfin/lib)
37
38
39 // Workarounds are enabled, exceptions are disabled.
40 #define RT_LIB_NAME(x) lib ## x ## y.dlb
41 #define RT_LIB_NAME_EH(x) lib ## x ## y.dlb
42 #define RT_LIB_NAME_MT(x) lib ## x ## y.dlb
43 #define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb
44 #define RT_OBJ_NAME(x) x ## y.doj
45 #define RT_OBJ_NAME_MT(x) x ## mty.doj
46
47
48 $LIBRARIES = 
49
50 /*$VDSG<insert-user-libraries-at-beginning>                     */
51 /* Text inserted between these $VDSG comments will be preserved */
52 /*$VDSG<insert-user-libraries-at-beginning>                     */
53
54    RT_LIB_NAME_MT(small532)
55    ,RT_LIB_NAME_MT(io532)
56    ,RT_LIB_NAME_MT(c532)
57    ,RT_LIB_NAME_MT(event532)
58    ,RT_LIB_NAME_MT(x532)
59    ,RT_LIB_NAME_EH_MT(cpp532)
60    ,RT_LIB_NAME_EH_MT(cpprt532)
61    ,RT_LIB_NAME(f64ieee532)
62    ,RT_LIB_NAME(dsp532)
63    ,RT_LIB_NAME(sftflt532)
64    ,RT_LIB_NAME(etsi532)
65    ,RT_LIB_NAME(ssl537)
66    ,RT_LIB_NAME(drv537)
67    ,RT_LIB_NAME(usb537)
68    ,RT_OBJ_NAME_MT(idle532)
69    ,RT_LIB_NAME_MT(rt_fileio532)
70
71 /*$VDSG<insert-user-libraries-at-end>                           */
72 /* Text inserted between these $VDSG comments will be preserved */
73 /*$VDSG<insert-user-libraries-at-end>                           */
74
75    ;
76
77 $OBJECTS = 
78
79 /*$VDSG<insert-user-objects-at-beginning>                       */
80 /* Text inserted between these $VDSG comments will be preserved */
81 /*$VDSG<insert-user-objects-at-beginning>                       */
82
83    RT_LIB_NAME(profile532)
84    , $COMMAND_LINE_OBJECTS
85    , "cplbtab537.doj"
86
87 /*$VDSG<insert-user-objects-at-end>                             */
88 /* Text inserted between these $VDSG comments will be preserved */
89 /*$VDSG<insert-user-objects-at-end>                             */
90
91    , RT_OBJ_NAME(crtn532)
92    ;
93
94 $OBJS_LIBS_INTERNAL = 
95
96 /*$VDSG<insert-libraries-internal>                              */
97 /* Text inserted between these $VDSG comments will be preserved */
98 /*$VDSG<insert-libraries-internal>                              */
99
100    $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")}
101
102 /*$VDSG<insert-libraries-internal-end>                          */
103 /* Text inserted between these $VDSG comments will be preserved */
104 /*$VDSG<insert-libraries-internal-end>                          */
105
106    ;
107
108 $OBJS_LIBS_NOT_EXTERNAL = 
109
110 /*$VDSG<insert-libraries-not-external>                          */
111 /* Text inserted between these $VDSG comments will be preserved */
112 /*$VDSG<insert-libraries-not-external>                          */
113
114    $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")}
115
116 /*$VDSG<insert-libraries-not-external-end>                      */
117 /* Text inserted between these $VDSG comments will be preserved */
118 /*$VDSG<insert-libraries-not-external-end>                      */
119
120    ;
121
122
123 /*$VDSG<insert-user-macros>                                     */
124 /* Text inserted between these $VDSG comments will be preserved */
125 /*$VDSG<insert-user-macros>                                     */
126
127
128 /*$VDSG<customise-async-macros>                                 */
129 /* This code is preserved if the LDF is re-generated.           */
130
131
132 #define ASYNC0_MEMTYPE RAM
133 #define ASYNC1_MEMTYPE RAM
134 #define ASYNC2_MEMTYPE RAM
135 #define ASYNC3_MEMTYPE RAM
136
137
138 /*$VDSG<customise-async-macros>                                 */
139
140
141 MEMORY
142 {
143 /*
144 ** ADSP-BF537 MEMORY MAP.
145 **
146 ** The known memory spaces are as follows:
147 **
148 ** 0xFFE00000 - 0xFFFFFFFF  Core MMR registers (2MB)
149 ** 0xFFC00000 - 0xFFDFFFFF  System MMR registers (2MB)
150 ** 0xFFB01000 - 0xFFBFFFFF  Reserved
151 ** 0xFFB00000 - 0xFFB00FFF  Scratch SRAM (4K)
152 ** 0xFFA14000 - 0xFFAFFFFF  Reserved
153 ** 0xFFA10000 - 0XFFA13FFF  Code SRAM/CACHE (16K)
154 ** 0xFFA0C000 - 0xFFA0FFFF  Reserved
155 ** 0xFFA08000 - 0xFFA0BFFF  Instruction Bank B SRAM (16K)
156 ** 0xFFA00000 - 0xFFA07FFF  Instruction Bank A SRAM (32K)
157 ** 0xFF908000 - 0xFF9FFFFF  Reserved
158 ** 0xFF904000 - 0xFF907FFF  Data Bank B SRAM/CACHE (16K)
159 ** 0xFF900000 - 0XFF903FFF  Data Bank B SRAM (16K)
160 ** 0xFF808000 - 0xFF8FFFFF  Reserved
161 ** 0xFF804000 - 0xFF807FFF  Data Bank A SRAM/CACHE (16K)
162 ** 0xFF800000 - 0XFF803FFF  Data Bank A SRAM (16K)
163 ** 0xEF000800 - 0xFF800000  Reserved
164 ** 0xEF000000 - 0xFF8007FF  Boot ROM (2K)
165 ** 0x20400000 - 0xEEFFFFFF  Reserved
166 ** 0x20300000 - 0x203FFFFF  ASYNC MEMORY BANK 3 (1MB)
167 ** 0x20200000 - 0x202FFFFF  ASYNC MEMORY BANK 2 (1MB)
168 ** 0x20100000 - 0x201FFFFF  ASYNC MEMORY BANK 1 (1MB)
169 ** 0x20000000 - 0x200FFFFF  ASYNC MEMORY BANK 0 (1MB)
170 ** 0x00000000 - 0x1FFFFFFF  SDRAM MEMORY (16MB - 512MB)
171 **
172 ** Notes:
173 ** 0xFF807FEF-0xFF807FFF
174 **   Required by boot-loader. Used as heap or cache below which is ok. Cannot
175 **   contain initialized data or code.
176 */
177
178    MEM_SYS_MMRS            { TYPE(RAM) START(0xFFC00000) END(0xFFDFFFFF) WIDTH(8) }
179    MEM_L1_SCRATCH          { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) }
180    MEM_L1_CODE_CACHE       { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) }
181    MEM_L1_CODE             { TYPE(RAM) START(0xFFA00000) END(0xFFA0BFFF) WIDTH(8) }
182    MEM_L1_DATA_B           { TYPE(RAM) START(0xFF900000) END(0xFF907FFF) WIDTH(8) }
183    MEM_L1_DATA_A           { TYPE(RAM) START(0xFF800000) END(0xFF807FFF) WIDTH(8) }
184    MEM_ASYNC3              { TYPE(ASYNC3_MEMTYPE) START(0x20300000) END(0x203FFFFF) WIDTH(8) }
185    MEM_ASYNC2              { TYPE(ASYNC2_MEMTYPE) START(0x20200000) END(0x202FFFFF) WIDTH(8) }
186    MEM_ASYNC1              { TYPE(ASYNC1_MEMTYPE) START(0x20100000) END(0x201FFFFF) WIDTH(8) }
187    MEM_ASYNC0              { TYPE(ASYNC0_MEMTYPE) START(0x20000000) END(0x200FFFFF) WIDTH(8) }
188    
189    /*$VDSG<insert-new-memory-segments>                          */
190    /* Text inserted between these $VDSG comments will be preserved */
191    /*$VDSG<insert-new-memory-segments>                          */
192    
193 } /* MEMORY */
194
195 PROCESSOR p0
196 {
197    OUTPUT($COMMAND_LINE_OUTPUT_FILE)
198    RESOLVE(start, 0xFFA00000)
199    KEEP(start, _main)
200    
201    /*$VDSG<insert-user-ldf-commands>                            */
202    /* Text inserted between these $VDSG comments will be preserved */
203    /*$VDSG<insert-user-ldf-commands>                            */
204    
205    SECTIONS
206    {
207       /* Workaround for hardware errata 05-00-0189 and 05-00-0310 -
208       ** "Speculative (and fetches made at boundary of reserved memory
209       ** space) for instruction or data fetches may cause false
210       ** protection exceptions" and "False hardware errors caused by
211       ** fetches at the boundary of reserved memory ".
212       **
213       ** Done by avoiding use of 76 bytes from at the end of blocks
214       ** that are adjacent to reserved memory. Workaround is enabled
215       ** for appropriate silicon revisions (-si-revision switch).
216       */
217       RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76)
218       RESERVE(___wab1=MEMORY_END(MEM_L1_CODE) - 75, ___l1 = 76)
219       RESERVE(___wab2=MEMORY_END(MEM_L1_CODE_CACHE) - 75, ___l2 = 76)
220       RESERVE(___wab4=MEMORY_END(MEM_L1_DATA_B) - 75, ___l4 = 76)
221       RESERVE(___wab6=MEMORY_END(MEM_L1_DATA_A) - 75, ___l6 = 76)
222       RESERVE(___wab7=MEMORY_END(MEM_ASYNC3) - 75, ___l7 = 76)
223       
224       /*$VDSG<insert-new-sections-at-the-start>                 */
225       /* Text inserted between these $VDSG comments will be preserved */
226       /*$VDSG<insert-new-sections-at-the-start>                 */
227       
228       scratchpad NO_INIT
229       {
230          INPUT_SECTION_ALIGN(4)
231          
232          /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
233          /* Text inserted between these $VDSG comments will be preserved */
234          /*$VDSG<insert-input-sections-at-the-start-of-scratchpad>  */
235          
236          
237          /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
238          /* Text inserted between these $VDSG comments will be preserved */
239          /*$VDSG<insert-input-sections-at-the-end-of-scratchpad>  */
240          
241       } > MEM_L1_SCRATCH
242
243       L1_code
244       {
245          INPUT_SECTION_ALIGN(4)
246          INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code))
247          
248          /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
249          /* Text inserted between these $VDSG comments will be preserved */
250          /*$VDSG<insert-input-sections-at-the-start-of-l1_code>  */
251          
252          INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
253          INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
254          INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code))
255          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program))
256          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program))
257          INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
258          
259          /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
260          /* Text inserted between these $VDSG comments will be preserved */
261          /*$VDSG<insert-input-sections-at-the-end-of-l1_code>   */
262          
263       } > MEM_L1_CODE
264
265       L1_code_cache
266       {
267          INPUT_SECTION_ALIGN(4)
268          ___l1_code_cache = 0;
269          INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code))
270          
271          /*$VDSG<insert-input-sections-at-the-start-of-l1_code_cache>  */
272          /* Text inserted between these $VDSG comments will be preserved */
273          /*$VDSG<insert-input-sections-at-the-start-of-l1_code_cache>  */
274          
275          INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code))
276          INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb))
277          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program))
278          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program))
279          INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program))
280          
281          /*$VDSG<insert-input-sections-at-the-end-of-l1_code_cache>  */
282          /* Text inserted between these $VDSG comments will be preserved */
283          /*$VDSG<insert-input-sections-at-the-end-of-l1_code_cache>  */
284          
285       } > MEM_L1_CODE_CACHE
286
287       L1_data_a_1
288       {
289          INPUT_SECTION_ALIGN(4)
290          ___l1_data_cache_a = 0;
291          INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a))
292          INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data))
293          
294          /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a>  */
295          /* Text inserted between these $VDSG comments will be preserved */
296          /*$VDSG<insert-input-sections-at-the-start-of-L1_data_a>  */
297          
298          RESERVE(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length = 2K,4)
299       } > MEM_L1_DATA_A
300
301       L1_data_a_bsz ZERO_INIT
302       {
303          INPUT_SECTION_ALIGN(4)
304          INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
305       } > MEM_L1_DATA_A
306
307       L1_data_a_tables
308       {
309          INPUT_SECTION_ALIGN(4)
310          FORCE_CONTIGUITY
311          INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl))
312          INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor))
313          INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl))
314          INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt))
315          INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti))
316          INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt))
317          INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl))
318          INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt))
319          INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht))
320       } > MEM_L1_DATA_A
321
322       L1_data_a
323       {
324          INPUT_SECTION_ALIGN(4)
325          INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
326          INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
327          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1))
328          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1))
329          INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
330          INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
331          
332          /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a>  */
333          /* Text inserted between these $VDSG comments will be preserved */
334          /*$VDSG<insert-input-sections-at-the-end-of-L1_data_a>  */
335          
336       } > MEM_L1_DATA_A
337
338       bsz_L1_data_a ZERO_INIT
339       {
340          INPUT_SECTION_ALIGN(4)
341          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz))
342          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz))
343          INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
344       } > MEM_L1_DATA_A
345
346       L1_data_a_stack_heap
347       {
348          INPUT_SECTION_ALIGN(4)
349          RESERVE_EXPAND(heaps_and_stack_in_L1_data_a, heaps_and_stack_in_L1_data_a_length , 0, 4)
350          ldf_stack_space = heaps_and_stack_in_L1_data_a;
351          ldf_stack_end = (ldf_stack_space + (heaps_and_stack_in_L1_data_a_length - 4)) &0xfffffffc;
352       } > MEM_L1_DATA_A
353
354       L1_data_b_bsz ZERO_INIT
355       {
356          INPUT_SECTION_ALIGN(4)
357          INPUT_SECTIONS( $OBJECTS(L1_bsz) $LIBRARIES(L1_bsz))
358       } > MEM_L1_DATA_B
359
360       L1_data_b
361       {
362          INPUT_SECTION_ALIGN(4)
363          ___l1_data_cache_b = 0;
364          INPUT_SECTIONS($OBJECTS(L1_data_b) $LIBRARIES(L1_data_b))
365          INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data))
366          
367          /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b>  */
368          /* Text inserted between these $VDSG comments will be preserved */
369          /*$VDSG<insert-input-sections-at-the-start-of-L1_data_b>  */
370          
371          RESERVE(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length = 2K,4)
372          INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data))
373          INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata))
374          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1))
375          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1))
376          INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1))
377          INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata))
378          INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt) )
379          INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht) )
380          
381          /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b>  */
382          /* Text inserted between these $VDSG comments will be preserved */
383          /*$VDSG<insert-input-sections-at-the-end-of-L1_data_b>  */
384          
385       } > MEM_L1_DATA_B
386
387       bsz_L1_data_b ZERO_INIT
388       {
389          INPUT_SECTION_ALIGN(4)
390          INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz))
391          INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz))
392          INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz))
393       } > MEM_L1_DATA_B
394
395       L1_data_b_stack_heap
396       {
397          INPUT_SECTION_ALIGN(4)
398          RESERVE_EXPAND(heaps_and_stack_in_L1_data_b, heaps_and_stack_in_L1_data_b_length , 0, 4)
399          ldf_heap_space = heaps_and_stack_in_L1_data_b;
400          ldf_heap_end = (ldf_heap_space + (heaps_and_stack_in_L1_data_b_length - 4)) &0xfffffffc;
401          ldf_heap_length = ldf_heap_end - ldf_heap_space;
402       } > MEM_L1_DATA_B
403
404       
405       /*$VDSG<insert-new-sections-at-the-end>                   */
406       /* Text inserted between these $VDSG comments will be preserved */
407       /*$VDSG<insert-new-sections-at-the-end>                   */
408       
409    } /* SECTIONS */
410 } /* p0 */
411