3 #include <t_services.h>
9 #define PEEPINGTEST // Define PEEPING test to see the top 4 of FIFO after enabling SPORT RX
12 #define SLEEPDURATION 2000
14 #define SLEEPDURATION 10
20 void main_task(VP_INT exinf)
24 vmsk_log(LOG_UPTO(LOG_INFO), LOG_UPTO(LOG_EMERG));
25 syslog(LOG_NOTICE, "Sample program starts (exinf = %d).", (INT) exinf);
27 syscall(serial_ctl_por(TASK_PORTID,
28 (IOCTL_CRLF | IOCTL_FCSND | IOCTL_FCRCV)));
38 0 << 14 | // TCKFE, 0:sample at down edge, 1:sample at up edge
39 0 << 13 | // LATFS, 0:early frame sync, 1:late frame sync
40 0 << 12 | // LTFS, 0:Active high TFS, 1:Active low TFS
41 0 << 11 | // DITFS, 0:data dependent TFS generation, 1:data independent TFS generation
42 0 << 10 | // TFSR, 0:TFS is not required every word, 1:TFS is required every word
43 0 << 9 | // ITFS, 0:external TFS, 1:internal TFS
44 0 << 4 | // TLSBIT, 0:MSB first transmission, 1:LSB first transmission
45 0 << 2 | // TDTYPE 0:normal, 1:reserved, 2:u-law, 3:a-law
46 0 << 1 | // ITCLK, 0:external clock generation, 1:internal clock generation
47 0 << 0 ; // TSPEN 0:Tx disable, 1:Tx enable
50 0 << 10 | // TRFST, 0:left streo ch first, 1:right stereo ch first
51 0 << 9 | // TSFESE, 0:normal frame sync, 1:LR frame clock
52 0 << 8 | // TXSE, 0:secondary ch disable, 1:secondary ch enable
53 0 << 0 ; // SLEN 0-1:not allowed,2-31:Serial word length - 1
57 0 << 14 | // RCKFE, 0:sample at down edge, 1:sample at up edge
58 0 << 13 | // LARFS, 0:early frame sync, 1:late frame sync
59 0 << 12 | // LRFS, 0:Active high RFS, 1:Active low RFS
60 1 << 10 | // RFSR, 0:RFS is not required every word, 1:RFS is required every word
61 0 << 9 | // IRFS, 0:external RFS, 1:internal RFS
62 0 << 4 | // RLSBIT, 0:MSB first transmission, 1:LSB first transmission
63 0 << 2 | // RDTYPE 0:zero fill, 1:sign extend, 2:u-law, 3:a-law
64 0 << 1 | // IRCLK, 0:external clock generation, 1:internal clock generation
65 0 << 0 ; // RSPEN 0:Rx disable, 1:Rx enable
68 0 << 10 | // RRFST, 0:left streo ch first, 1:right stereo ch first
69 0 << 9 | // RSFESE, 0:normal frame sync, 1:LR frame clock
70 1 << 8 | // RXSE, 0:secondary ch disable, 1:secondary ch enable
71 29 << 0 ; // SLEN 0-1:not allowed,2-31:Serial word length - 1
75 int count = 0, event = 0;
78 // RX FIFOが空になるまで読み捨てる
79 while( *pSPORT0_STAT & RXNE)
80 dummy = *pSPORT0_RX32;
88 *pSPORT0_RCR1 |= RSPEN; // RX SPORT Enable
93 // FIFOにデータがたまったはずである。
94 // FIFOデータを読みだして下位2bitのみ表示する
95 rx[0] = *pSPORT0_RX32 & 0x3; // 下位2bitのみ抽出
96 rx[1] = *pSPORT0_RX32 & 0x3; // 下位2bitのみ抽出
97 rx[2] = *pSPORT0_RX32 & 0x3; // 下位2bitのみ抽出
98 rx[3] = *pSPORT0_RX32 & 0x3; // 下位2bitのみ抽出
101 *pSPORT0_RCR1 &= ~RSPEN; // RX SPORT disable
106 syslog( LOG_NOTICE, "RX word : %d,%d,%d,%d", rx[0], rx[1], rx[2], rx[3] );
110 if (!( count % 1000 ))
111 syslog( LOG_NOTICE, "trial : %d, event : %d", count, event);
113 // RX受信を終了する。FIFOにはデータがたまっているはずである。
114 *pSPORT0_RCR1 &= ~RSPEN; // RX SPORT disable
117 tslp_tsk(SLEEPDURATION);
119 // RX FIFOが空になるまで読み捨てる
120 while( *pSPORT0_STAT & RXNE)
121 dummy = *pSPORT0_RX32;
126 syslog(LOG_NOTICE, "Sample program ends.");