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dt-bindings: display: mediatek: Fix examples on new bindings
[uclinux-h8/linux.git] / Documentation / devicetree / bindings / display / mediatek / mediatek,ovl-2l.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Mediatek display overlay 2 layer
8
9 maintainers:
10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11   - Philipp Zabel <p.zabel@pengutronix.de>
12
13 description: |
14   Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer
15   for OVL.
16   OVL-2L device node must be siblings to the central MMSYS_CONFIG node.
17   For a description of the MMSYS_CONFIG binding, see
18   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
19   for details.
20
21 properties:
22   compatible:
23     oneOf:
24       - items:
25           - const: mediatek,mt8183-disp-ovl-2l
26       - items:
27           - const: mediatek,mt8192-disp-ovl-2l
28
29   reg:
30     maxItems: 1
31
32   interrupts:
33     maxItems: 1
34
35   power-domains:
36     description: A phandle and PM domain specifier as defined by bindings of
37       the power controller specified by phandle. See
38       Documentation/devicetree/bindings/power/power-domain.yaml for details.
39
40   clocks:
41     items:
42       - description: OVL-2L Clock
43
44   iommus:
45     description:
46       This property should point to the respective IOMMU block with master port as argument,
47       see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
48
49   mediatek,gce-client-reg:
50     description: The register of client driver can be configured by gce with
51       4 arguments defined in this property, such as phandle of gce, subsys id,
52       register offset and size. Each GCE subsys id is mapping to a client
53       defined in the header include/dt-bindings/gce/<chip>-gce.h.
54     $ref: /schemas/types.yaml#/definitions/phandle-array
55     maxItems: 1
56
57 required:
58   - compatible
59   - reg
60   - interrupts
61   - power-domains
62   - clocks
63   - iommus
64
65 additionalProperties: false
66
67 examples:
68   - |
69     #include <dt-bindings/interrupt-controller/arm-gic.h>
70     #include <dt-bindings/clock/mt8183-clk.h>
71     #include <dt-bindings/power/mt8183-power.h>
72     #include <dt-bindings/gce/mt8183-gce.h>
73     #include <dt-bindings/memory/mt8183-larb-port.h>
74
75     soc {
76         #address-cells = <2>;
77         #size-cells = <2>;
78
79         ovl_2l0: ovl@14009000 {
80             compatible = "mediatek,mt8183-disp-ovl-2l";
81             reg = <0 0x14009000 0 0x1000>;
82             interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_LOW>;
83             power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
84             clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
85             iommus = <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>;
86             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
87         };
88     };