3 * linux/arch/h8300/platform/h8300h/entry.S
5 * Yoshinori Sato <ysato@users.sourceforge.jp>
6 * David McCullough <davidm@snapgear.com>
12 * include exception/interrupt gateway
16 #include <linux/sys.h>
17 #include <asm/unistd.h>
18 #include <asm/setup.h>
19 #include <asm/segment.h>
20 #include <asm/linkage.h>
21 #include <asm/asm-offsets.h>
22 #include <asm/thread_info.h>
23 #include <asm/errno.h>
25 #if defined(CONFIG_CPU_H8300H)
52 #if defined(CONFIG_CPU_H8S)
70 mov.w @(USEREXR:16,er0),r1
71 mov.w r1,@(LEXR-LER3:16,sp) /* copy EXR */
74 mov.w @(LEXR-LER1:16,sp),r1 /* restore EXR */
76 mov.w r1,@(USEREXR:16,er0)
81 /* CPU context save/restore macros. */
85 stc ccr,r0l /* check kernel mode */
91 mov.l @sp,er0 /* restore saved er0 */
92 orc #0x10,ccr /* switch kernel stack */
94 sub.l #(LRET-LORIG),sp /* allocate LORIG - LRET */
97 mov.l @(USERRET:16,er0),er1 /* copy the RET addr */
98 mov.l er1,@(LRET-LER3:16,sp)
101 mov.l @(LORIG-LER3:16,sp),er0
102 mov.l er0,@(LER0-LER3:16,sp) /* copy ER0 */
103 mov.w e1,r1 /* e1 highbyte = ccr */
104 and #0xef,r1h /* mask mode? flag */
108 mov.l @sp,er0 /* restore saved er0 */
109 subs #2,sp /* set dummy ccr */
111 mov.w @(LRET-LER3:16,sp),r1 /* copy old ccr */
115 mov.w r1,@(LCCR-LER3:16,sp) /* set ccr */
116 mov.l er6,@-sp /* syscall arg #6 */
117 mov.l er5,@-sp /* syscall arg #5 */
118 mov.l er4,@-sp /* syscall arg #4 */
126 mov.w @(LCCR-LER1:16,sp),r0 /* check kernel mode */
132 mov.l @(LER0-LER1:16,sp),er1 /* restore ER0 */
135 mov.w @(LCCR-LER1:16,sp),r1 /* restore the RET addr */
137 mov.b @(LRET+1-LER1:16,sp),r1l
139 mov.w @(LRET+2-LER1:16,sp),r1
140 mov.l er1,@(USERRET:16,er0)
143 add.l #(LRET-LER1),sp /* remove LORIG - LRET */
145 andc #0xef,ccr /* switch to user mode */
154 adds #4,sp /* remove the sw created LVEC */
159 .globl ret_from_exception
161 .globl ret_from_kernel_thread
162 .globl ret_from_interrupt
163 .globl _interrupt_redirect_table
164 .globl _sw_ksp,_sw_usp
166 .globl _interrupt_entry
170 #if defined(CONFIG_ROMKERNEL)
171 .section .int_redirect,"ax"
172 _interrupt_redirect_table:
173 #if defined(CONFIG_CPU_H8300H)
178 #if defined(CONFIG_CPU_H8S)
186 jsr @_interrupt_entry /* NMI */
187 jmp @_system_call /* TRAPA #0 (System call) */
190 jmp @_trace_break /* TRAPA #3 (breakpoint) */
192 jsr @_interrupt_entry
195 #if defined(CONFIG_RAMKERNEL)
196 .globl _interrupt_redirect_table
198 _interrupt_redirect_table:
214 mov.l @er0,er0 /* LVEC address */
215 #if defined(CONFIG_ROMKERNEL)
216 sub.l #_interrupt_redirect_table,er0
218 #if defined(CONFIG_RAMKERNEL)
219 mov.l @_interrupt_redirect_table,er1
225 subs #4,er1 /* adjust ret_pc */
226 #if defined(CONFIG_CPU_H8S)
230 jmp @ret_from_interrupt
233 subs #4,sp /* dummy LVEC */
238 /* save top of frame */
243 mov.b @((TI_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
244 btst #(TIF_SYSCALL_TRACE & 7),r2l
246 jsr @do_syscall_trace
248 cmp.l #__NR_syscalls,er4
251 mov.l #_sys_call_table,er0
254 beq ret_from_exception:16
255 mov.l @(LER1:16,sp),er0
256 mov.l @(LER2:16,sp),er1
257 mov.l @(LER3:16,sp),er2
259 mov.l er0,@(LER0:16,sp) /* save the return value */
262 mov.b @((TI_FLAGS+3-(TIF_SYSCALL_TRACE >> 3)):16,er2),r2l
263 btst #(TIF_SYSCALL_TRACE & 7),r2l
265 jsr @do_syscall_trace
272 mov.l er0,@(LER0:16,sp)
275 #if !defined(CONFIG_PREEMPT)
276 #define resume_kernel restore_all
280 #if defined(CONFIG_PREEMPT)
284 mov.b @(LCCR+1:16,sp),r0l
286 #if defined(CONFIG_PREEMPT)
287 bne resume_kernel:16 /* return from kernel */
289 bne restore_all:16 /* return from kernel */
294 and.w #0xe000,r4 /* er4 <- current thread info */
295 mov.l @(TI_FLAGS:16,er4),er1
296 and.l #_TIF_WORK_MASK,er1
299 btst #TIF_NEED_RESCHED,r1l
303 subs #4,er0 /* er0: pt_regs */
304 jsr @do_notify_resume
310 bra resume_userspace:8
312 RESTORE_ALL /* Does RTE */
314 #if defined(CONFIG_PREEMPT)
316 mov.l @(TI_PRE_COUNT:16,er4),er0
319 mov.l @(TI_FLAGS:16,er4),er0
320 btst #TIF_NEED_RESCHED,r0l
322 mov.b @(LCCR+1:16,sp),r0l /* Interrupt Enabled? */
326 jsr @preempt_schedule_irq
333 jmp @ret_from_exception
335 ret_from_kernel_thread:
338 mov.l @(LER4:16,sp),er0
339 mov.l @(LER5:16,sp),er1
341 jmp @ret_from_exception
345 * Beware - when entering resume, offset of tss is in d1,
346 * prev (the current task) is in a0, next (the new task)
347 * is in a1 and d2.b is non-zero if the mm structure is
348 * shared between the tasks, so don't change these
349 * registers until their contents are no longer needed.
355 mov.w r3,@(THREAD_CCR+2:16,er0)
357 /* disable interrupts */
360 mov.l er3,@(THREAD_USP:16,er0)
361 mov.l sp,@(THREAD_KSP:16,er0)
363 /* Skip address space switching if they are the same. */
364 /* FIXME: what did we hack out of here, this does nothing! */
366 mov.l @(THREAD_USP:16,er1),er0
368 mov.l @(THREAD_KSP:16,er1),sp
370 /* restore status register */
371 mov.w @(THREAD_CCR+2:16,er1),r3
381 mov.l er1,@(LORIG,sp)
386 mov.w @(-2:16,er1),r2
395 jmp @ret_from_exception
400 mov.l @_interrupt_redirect_table, er0
404 jmp @_interrupt_entry