2 * Kernel-based Virtual Machine driver for Linux
4 * This header defines architecture specific interfaces, x86 version
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
14 #include <linux/types.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 #include <linux/irq.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_para.h>
24 #include <linux/kvm_types.h>
25 #include <linux/perf_event.h>
26 #include <linux/pvclock_gtod.h>
27 #include <linux/clocksource.h>
28 #include <linux/irqbypass.h>
29 #include <linux/hyperv.h>
32 #include <asm/pvclock-abi.h>
35 #include <asm/msr-index.h>
37 #include <asm/kvm_page_track.h>
38 #include <asm/hyperv-tlfs.h>
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
52 /* x86-specific vcpu->requests bit members */
53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
62 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
63 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
64 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
65 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
67 #define KVM_REQ_MCLOCK_INPROGRESS \
68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69 #define KVM_REQ_SCAN_IOAPIC \
70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
72 #define KVM_REQ_APIC_PAGE_RELOAD \
73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
82 #define CR0_RESERVED_BITS \
83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
87 #define CR4_RESERVED_BITS \
88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
99 #define INVALID_PAGE (~(hpa_t)0)
100 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
102 #define UNMAPPED_GVA (~(gpa_t)0)
104 /* KVM Hugepage definitions for x86 */
106 PT_PAGE_TABLE_LEVEL = 1,
107 PT_DIRECTORY_LEVEL = 2,
109 /* set max level to the biggest one */
110 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
112 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
113 PT_PAGE_TABLE_LEVEL + 1)
114 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
115 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
116 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
117 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
118 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
120 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
122 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
123 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
124 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
127 #define KVM_PERMILLE_MMU_PAGES 20
128 #define KVM_MIN_ALLOC_MMU_PAGES 64
129 #define KVM_MMU_HASH_SHIFT 12
130 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
131 #define KVM_MIN_FREE_MMU_PAGES 5
132 #define KVM_REFILL_PAGES 25
133 #define KVM_MAX_CPUID_ENTRIES 80
134 #define KVM_NR_FIXED_MTRR_REGION 88
135 #define KVM_NR_VAR_MTRR 8
137 #define ASYNC_PF_PER_VCPU 64
163 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
180 #include <asm/kvm_emulate.h>
182 #define KVM_NR_MEM_OBJS 40
184 #define KVM_NR_DB_REGS 4
186 #define DR6_BD (1 << 13)
187 #define DR6_BS (1 << 14)
188 #define DR6_BT (1 << 15)
189 #define DR6_RTM (1 << 16)
190 #define DR6_FIXED_1 0xfffe0ff0
191 #define DR6_INIT 0xffff0ff0
192 #define DR6_VOLATILE 0x0001e00f
194 #define DR7_BP_EN_MASK 0x000000ff
195 #define DR7_GE (1 << 9)
196 #define DR7_GD (1 << 13)
197 #define DR7_FIXED_1 0x00000400
198 #define DR7_VOLATILE 0xffff2bff
200 #define PFERR_PRESENT_BIT 0
201 #define PFERR_WRITE_BIT 1
202 #define PFERR_USER_BIT 2
203 #define PFERR_RSVD_BIT 3
204 #define PFERR_FETCH_BIT 4
205 #define PFERR_PK_BIT 5
206 #define PFERR_GUEST_FINAL_BIT 32
207 #define PFERR_GUEST_PAGE_BIT 33
209 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
210 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
211 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
212 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
213 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
214 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
215 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
216 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
218 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
223 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or
224 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting
225 * with the SVE bit in EPT PTEs.
227 #define SPTE_SPECIAL_MASK (1ULL << 62)
229 /* apic attention bits */
230 #define KVM_APIC_CHECK_VAPIC 0
232 * The following bit is set with PV-EOI, unset on EOI.
233 * We detect PV-EOI changes by guest by comparing
234 * this bit with PV-EOI in guest memory.
235 * See the implementation in apic_update_pv_eoi.
237 #define KVM_APIC_PV_EOI_PENDING 1
239 struct kvm_kernel_irq_routing_entry;
242 * We don't want allocation failures within the mmu code, so we preallocate
243 * enough memory for a single page fault in a cache.
245 struct kvm_mmu_memory_cache {
247 void *objects[KVM_NR_MEM_OBJS];
251 * the pages used as guest page table on soft mmu are tracked by
252 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
253 * by indirect shadow page can not be more than 15 bits.
255 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
256 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
258 union kvm_mmu_page_role {
269 unsigned smep_andnot_wp:1;
270 unsigned smap_andnot_wp:1;
271 unsigned ad_disabled:1;
272 unsigned guest_mode:1;
276 * This is left at the top of the word so that
277 * kvm_memslots_for_spte_role can extract it with a
278 * simple shift. While there is room, give it a whole
279 * byte so it is also faster to load it from memory.
285 union kvm_mmu_extended_role {
287 * This structure complements kvm_mmu_page_role caching everything needed for
288 * MMU configuration. If nothing in both these structures changed, MMU
289 * re-configuration can be skipped. @valid bit is set on first usage so we don't
290 * treat all-zero structure as valid data.
294 unsigned int valid:1;
295 unsigned int execonly:1;
296 unsigned int cr0_pg:1;
297 unsigned int cr4_pse:1;
298 unsigned int cr4_pke:1;
299 unsigned int cr4_smap:1;
300 unsigned int cr4_smep:1;
301 unsigned int cr4_la57:1;
302 unsigned int maxphyaddr:6;
309 union kvm_mmu_page_role base;
310 union kvm_mmu_extended_role ext;
314 struct kvm_rmap_head {
318 struct kvm_mmu_page {
319 struct list_head link;
320 struct hlist_node hash_link;
324 * The following two entries are used to key the shadow page in the
327 union kvm_mmu_page_role role;
331 /* hold the gfn of each spte inside spt */
333 int root_count; /* Currently serving as active root */
334 unsigned int unsync_children;
335 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
337 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
338 unsigned long mmu_valid_gen;
340 DECLARE_BITMAP(unsync_child_bitmap, 512);
344 * Used out of the mmu-lock to avoid reading spte values while an
345 * update is in progress; see the comments in __get_spte_lockless().
347 int clear_spte_count;
350 /* Number of writes since the last time traversal visited this page. */
351 atomic_t write_flooding_count;
354 struct kvm_pio_request {
361 #define PT64_ROOT_MAX_LEVEL 5
363 struct rsvd_bits_validate {
364 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
368 struct kvm_mmu_root_info {
373 #define KVM_MMU_ROOT_INFO_INVALID \
374 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
376 #define KVM_MMU_NUM_PREV_ROOTS 3
379 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
380 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
384 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
385 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
386 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
387 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
389 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
390 struct x86_exception *fault);
391 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
392 struct x86_exception *exception);
393 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
394 struct x86_exception *exception);
395 int (*sync_page)(struct kvm_vcpu *vcpu,
396 struct kvm_mmu_page *sp);
397 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
398 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
399 u64 *spte, const void *pte);
402 union kvm_mmu_role mmu_role;
404 u8 shadow_root_level;
407 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
410 * Bitmap; bit set = permission fault
411 * Byte index: page fault error code [4:1]
412 * Bit index: pte permissions in ACC_* format
417 * The pkru_mask indicates if protection key checks are needed. It
418 * consists of 16 domains indexed by page fault error code bits [4:1],
419 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
420 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
428 * check zero bits on shadow page table entries, these
429 * bits include not only hardware reserved bits but also
430 * the bits spte never used.
432 struct rsvd_bits_validate shadow_zero_check;
434 struct rsvd_bits_validate guest_rsvd_check;
436 /* Can have large pages at levels 2..last_nonleaf_level-1. */
437 u8 last_nonleaf_level;
441 u64 pdptrs[4]; /* pae */
444 struct kvm_tlb_range {
459 struct perf_event *perf_event;
460 struct kvm_vcpu *vcpu;
464 unsigned nr_arch_gp_counters;
465 unsigned nr_arch_fixed_counters;
466 unsigned available_event_types;
471 u64 counter_bitmask[2];
472 u64 global_ctrl_mask;
475 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
476 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
477 struct irq_work irq_work;
484 KVM_DEBUGREG_BP_ENABLED = 1,
485 KVM_DEBUGREG_WONT_EXIT = 2,
486 KVM_DEBUGREG_RELOAD = 4,
489 struct kvm_mtrr_range {
492 struct list_head node;
496 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
497 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
500 struct list_head head;
503 /* Hyper-V SynIC timer */
504 struct kvm_vcpu_hv_stimer {
505 struct hrtimer timer;
507 union hv_stimer_config config;
510 struct hv_message msg;
514 /* Hyper-V synthetic interrupt controller (SynIC)*/
515 struct kvm_vcpu_hv_synic {
520 atomic64_t sint[HV_SYNIC_SINT_COUNT];
521 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
522 DECLARE_BITMAP(auto_eoi_bitmap, 256);
523 DECLARE_BITMAP(vec_bitmap, 256);
525 bool dont_zero_synic_pages;
528 /* Hyper-V per vcpu emulation context */
533 struct kvm_vcpu_hv_synic synic;
534 struct kvm_hyperv_exit exit;
535 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
536 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
540 struct kvm_vcpu_arch {
542 * rip and regs accesses must go through
543 * kvm_{register,rip}_{read,write} functions.
545 unsigned long regs[NR_VCPU_REGS];
550 unsigned long cr0_guest_owned_bits;
554 unsigned long cr4_guest_owned_bits;
560 struct kvm_lapic *apic; /* kernel irqchip context */
562 bool load_eoi_exitmap_pending;
563 DECLARE_BITMAP(ioapic_handled_vectors, 256);
564 unsigned long apic_attention;
565 int32_t apic_arb_prio;
567 u64 ia32_misc_enable_msr;
570 bool tpr_access_reporting;
572 u64 microcode_version;
575 * Paging state of the vcpu
577 * If the vcpu runs in guest mode with two level paging this still saves
578 * the paging mode of the l1 guest. This context is always used to
583 /* Non-nested MMU for L1 */
584 struct kvm_mmu root_mmu;
586 /* L1 MMU when running nested */
587 struct kvm_mmu guest_mmu;
590 * Paging state of an L2 guest (used for nested npt)
592 * This context will save all necessary information to walk page tables
593 * of the an L2 guest. This context is only initialized for page table
594 * walking and not for faulting since we never handle l2 page faults on
597 struct kvm_mmu nested_mmu;
600 * Pointer to the mmu context currently used for
601 * gva_to_gpa translations.
603 struct kvm_mmu *walk_mmu;
605 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
606 struct kvm_mmu_memory_cache mmu_page_cache;
607 struct kvm_mmu_memory_cache mmu_page_header_cache;
610 * QEMU userspace and the guest each have their own FPU state.
611 * In vcpu_run, we switch between the user, maintained in the
612 * task_struct struct, and guest FPU contexts. While running a VCPU,
613 * the VCPU thread will have the guest FPU context.
615 * Note that while the PKRU state lives inside the fpu registers,
616 * it is switched out separately at VMENTER and VMEXIT time. The
617 * "guest_fpu" state here contains the guest FPU context, with the
620 struct fpu *guest_fpu;
623 u64 guest_supported_xcr0;
624 u32 guest_xstate_size;
626 struct kvm_pio_request pio;
629 u8 event_exit_inst_len;
631 struct kvm_queued_exception {
637 unsigned long payload;
642 struct kvm_queued_interrupt {
648 int halt_request; /* real mode on Intel only */
651 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
655 /* emulate context */
657 struct x86_emulate_ctxt emulate_ctxt;
658 bool emulate_regs_need_sync_to_vcpu;
659 bool emulate_regs_need_sync_from_vcpu;
660 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
663 struct pvclock_vcpu_time_info hv_clock;
664 unsigned int hw_tsc_khz;
665 struct gfn_to_hva_cache pv_time;
666 bool pv_time_enabled;
667 /* set guest stopped flag in pvclock flags field */
668 bool pvclock_set_guest_stopped_request;
673 struct gfn_to_hva_cache stime;
674 struct kvm_steal_time steal;
680 u64 tsc_offset_adjustment;
683 u64 this_tsc_generation;
685 bool tsc_always_catchup;
686 s8 virtual_tsc_shift;
687 u32 virtual_tsc_mult;
689 s64 ia32_tsc_adjust_msr;
690 u64 tsc_scaling_ratio;
692 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
693 unsigned nmi_pending; /* NMI queued after currently running handler */
694 bool nmi_injected; /* Trying to inject an NMI this entry */
695 bool smi_pending; /* SMI queued after currently running handler */
697 struct kvm_mtrr mtrr_state;
700 unsigned switch_db_regs;
701 unsigned long db[KVM_NR_DB_REGS];
704 unsigned long eff_db[KVM_NR_DB_REGS];
705 unsigned long guest_debug_dr7;
706 u64 msr_platform_info;
707 u64 msr_misc_features_enables;
715 /* Cache MMIO info */
723 /* used for guest single stepping over the given code position */
724 unsigned long singlestep_rip;
726 struct kvm_vcpu_hv hyperv;
728 cpumask_var_t wbinvd_dirty_mask;
730 unsigned long last_retry_eip;
731 unsigned long last_retry_addr;
735 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
736 struct gfn_to_hva_cache data;
741 unsigned long nested_apf_token;
742 bool delivery_as_pf_vmexit;
745 /* OSVW MSRs (AMD only) */
753 struct gfn_to_hva_cache data;
757 * Indicate whether the access faults on its page table in guest
758 * which is set when fix page fault and used to detect unhandeable
761 bool write_fault_to_shadow_pgtable;
763 /* set at EPT violation at this point */
764 unsigned long exit_qualification;
766 /* pv related host specific info */
771 int pending_ioapic_eoi;
772 int pending_external_vector;
778 /* be preempted when it's in kernel-mode(cpl=0) */
779 bool preempted_in_kernel;
781 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
785 struct kvm_lpage_info {
789 struct kvm_arch_memory_slot {
790 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
791 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
792 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
796 * We use as the mode the number of bits allocated in the LDR for the
797 * logical processor ID. It happens that these are all powers of two.
798 * This makes it is very easy to detect cases where the APICs are
799 * configured for multiple modes; in that case, we cannot use the map and
800 * hence cannot use kvm_irq_delivery_to_apic_fast either.
802 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
803 #define KVM_APIC_MODE_XAPIC_FLAT 8
804 #define KVM_APIC_MODE_X2APIC 16
806 struct kvm_apic_map {
811 struct kvm_lapic *xapic_flat_map[8];
812 struct kvm_lapic *xapic_cluster_map[16][4];
814 struct kvm_lapic *phys_map[];
817 /* Hyper-V emulation context */
819 struct mutex hv_lock;
824 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
825 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
828 HV_REFERENCE_TSC_PAGE tsc_ref;
830 struct idr conn_to_evt;
832 u64 hv_reenlightenment_control;
833 u64 hv_tsc_emulation_control;
834 u64 hv_tsc_emulation_status;
836 /* How many vCPUs have VP index != vCPU index */
837 atomic_t num_mismatched_vp_indexes;
840 enum kvm_irqchip_mode {
842 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
843 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
847 unsigned int n_used_mmu_pages;
848 unsigned int n_requested_mmu_pages;
849 unsigned int n_max_mmu_pages;
850 unsigned int indirect_shadow_pages;
851 unsigned long mmu_valid_gen;
852 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
854 * Hash table of struct kvm_mmu_page.
856 struct list_head active_mmu_pages;
857 struct list_head zapped_obsolete_pages;
858 struct kvm_page_track_notifier_node mmu_sp_tracker;
859 struct kvm_page_track_notifier_head track_notifier_head;
861 struct list_head assigned_dev_head;
862 struct iommu_domain *iommu_domain;
863 bool iommu_noncoherent;
864 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
865 atomic_t noncoherent_dma_count;
866 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
867 atomic_t assigned_device_count;
868 struct kvm_pic *vpic;
869 struct kvm_ioapic *vioapic;
870 struct kvm_pit *vpit;
871 atomic_t vapics_in_nmi_mode;
872 struct mutex apic_map_lock;
873 struct kvm_apic_map *apic_map;
875 bool apic_access_page_done;
883 unsigned long irq_sources_bitmap;
885 raw_spinlock_t tsc_write_lock;
892 u64 cur_tsc_generation;
893 int nr_vcpus_matched_tsc;
895 spinlock_t pvclock_gtod_sync_lock;
896 bool use_master_clock;
897 u64 master_kernel_ns;
898 u64 master_cycle_now;
899 struct delayed_work kvmclock_update_work;
900 struct delayed_work kvmclock_sync_work;
902 struct kvm_xen_hvm_config xen_hvm_config;
904 /* reads protected by irq_srcu, writes by irq_lock */
905 struct hlist_head mask_notifier_list;
907 struct kvm_hv hyperv;
909 #ifdef CONFIG_KVM_MMU_AUDIT
913 bool backwards_tsc_observed;
914 bool boot_vcpu_runs_old_kvmclock;
919 enum kvm_irqchip_mode irqchip_mode;
920 u8 nr_reserved_ioapic_pins;
922 bool disabled_lapic_found;
925 bool x2apic_broadcast_quirk_disabled;
927 bool guest_can_read_msr_platform_info;
928 bool exception_payload_enabled;
932 ulong mmu_shadow_zapped;
934 ulong mmu_pte_updated;
935 ulong mmu_pde_zapped;
938 ulong mmu_cache_miss;
940 ulong remote_tlb_flush;
942 ulong max_mmu_page_hash_collisions;
945 struct kvm_vcpu_stat {
955 u64 irq_window_exits;
956 u64 nmi_window_exits;
959 u64 halt_successful_poll;
960 u64 halt_attempted_poll;
961 u64 halt_poll_invalid;
963 u64 request_irq_exits;
965 u64 host_state_reload;
968 u64 insn_emulation_fail;
975 struct x86_instruction_info;
983 struct kvm_lapic_irq {
995 int (*cpu_has_kvm_support)(void); /* __init */
996 int (*disabled_by_bios)(void); /* __init */
997 int (*hardware_enable)(void);
998 void (*hardware_disable)(void);
999 void (*check_processor_compatibility)(void *rtn);
1000 int (*hardware_setup)(void); /* __init */
1001 void (*hardware_unsetup)(void); /* __exit */
1002 bool (*cpu_has_accelerated_tpr)(void);
1003 bool (*has_emulated_msr)(int index);
1004 void (*cpuid_update)(struct kvm_vcpu *vcpu);
1006 struct kvm *(*vm_alloc)(void);
1007 void (*vm_free)(struct kvm *);
1008 int (*vm_init)(struct kvm *kvm);
1009 void (*vm_destroy)(struct kvm *kvm);
1011 /* Create, but do not attach this VCPU */
1012 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
1013 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1014 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1016 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1017 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1018 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1020 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1021 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1022 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1023 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1024 void (*get_segment)(struct kvm_vcpu *vcpu,
1025 struct kvm_segment *var, int seg);
1026 int (*get_cpl)(struct kvm_vcpu *vcpu);
1027 void (*set_segment)(struct kvm_vcpu *vcpu,
1028 struct kvm_segment *var, int seg);
1029 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1030 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1031 void (*decache_cr3)(struct kvm_vcpu *vcpu);
1032 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1033 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1034 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1035 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1036 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1037 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1038 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1039 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1040 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1041 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
1042 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1043 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1044 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1045 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1046 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1047 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1049 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1050 int (*tlb_remote_flush)(struct kvm *kvm);
1051 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1052 struct kvm_tlb_range *range);
1055 * Flush any TLB entries associated with the given GVA.
1056 * Does not need to flush GPA->HPA mappings.
1057 * Can potentially get non-canonical addresses through INVLPGs, which
1058 * the implementation may choose to ignore if appropriate.
1060 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1062 void (*run)(struct kvm_vcpu *vcpu);
1063 int (*handle_exit)(struct kvm_vcpu *vcpu);
1064 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1065 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1066 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1067 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1068 unsigned char *hypercall_addr);
1069 void (*set_irq)(struct kvm_vcpu *vcpu);
1070 void (*set_nmi)(struct kvm_vcpu *vcpu);
1071 void (*queue_exception)(struct kvm_vcpu *vcpu);
1072 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1073 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1074 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1075 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1076 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1077 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1078 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1079 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1080 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1081 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1082 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1083 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1084 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1085 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1086 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1087 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1088 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1089 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1090 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1091 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1092 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1093 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1094 int (*get_lpage_level)(void);
1095 bool (*rdtscp_supported)(void);
1096 bool (*invpcid_supported)(void);
1098 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1100 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1102 bool (*has_wbinvd_exit)(void);
1104 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1105 /* Returns actual tsc_offset set in active VMCS */
1106 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1108 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1110 int (*check_intercept)(struct kvm_vcpu *vcpu,
1111 struct x86_instruction_info *info,
1112 enum x86_intercept_stage stage);
1113 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
1114 bool (*mpx_supported)(void);
1115 bool (*xsaves_supported)(void);
1116 bool (*umip_emulated)(void);
1117 bool (*pt_supported)(void);
1119 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
1120 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1122 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1125 * Arch-specific dirty logging hooks. These hooks are only supposed to
1126 * be valid if the specific arch has hardware-accelerated dirty logging
1127 * mechanism. Currently only for PML on VMX.
1129 * - slot_enable_log_dirty:
1130 * called when enabling log dirty mode for the slot.
1131 * - slot_disable_log_dirty:
1132 * called when disabling log dirty mode for the slot.
1133 * also called when slot is created with log dirty disabled.
1134 * - flush_log_dirty:
1135 * called before reporting dirty_bitmap to userspace.
1136 * - enable_log_dirty_pt_masked:
1137 * called when reenabling log dirty for the GFNs in the mask after
1138 * corresponding bits are cleared in slot->dirty_bitmap.
1140 void (*slot_enable_log_dirty)(struct kvm *kvm,
1141 struct kvm_memory_slot *slot);
1142 void (*slot_disable_log_dirty)(struct kvm *kvm,
1143 struct kvm_memory_slot *slot);
1144 void (*flush_log_dirty)(struct kvm *kvm);
1145 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1146 struct kvm_memory_slot *slot,
1147 gfn_t offset, unsigned long mask);
1148 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1150 /* pmu operations of sub-arch */
1151 const struct kvm_pmu_ops *pmu_ops;
1154 * Architecture specific hooks for vCPU blocking due to
1156 * Returns for .pre_block():
1157 * - 0 means continue to block the vCPU.
1158 * - 1 means we cannot block the vCPU since some event
1159 * happens during this period, such as, 'ON' bit in
1160 * posted-interrupts descriptor is set.
1162 int (*pre_block)(struct kvm_vcpu *vcpu);
1163 void (*post_block)(struct kvm_vcpu *vcpu);
1165 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1166 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1168 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1169 uint32_t guest_irq, bool set);
1170 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1172 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc);
1173 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1175 void (*setup_mce)(struct kvm_vcpu *vcpu);
1177 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1178 struct kvm_nested_state __user *user_kvm_nested_state,
1179 unsigned user_data_size);
1180 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1181 struct kvm_nested_state __user *user_kvm_nested_state,
1182 struct kvm_nested_state *kvm_state);
1183 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1185 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1186 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1187 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase);
1188 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1190 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1191 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1192 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1194 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1196 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu,
1197 uint16_t *vmcs_version);
1198 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
1201 struct kvm_arch_async_pf {
1208 extern struct kvm_x86_ops *kvm_x86_ops;
1209 extern struct kmem_cache *x86_fpu_cache;
1211 #define __KVM_HAVE_ARCH_VM_ALLOC
1212 static inline struct kvm *kvm_arch_alloc_vm(void)
1214 return kvm_x86_ops->vm_alloc();
1217 static inline void kvm_arch_free_vm(struct kvm *kvm)
1219 return kvm_x86_ops->vm_free(kvm);
1222 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1223 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1225 if (kvm_x86_ops->tlb_remote_flush &&
1226 !kvm_x86_ops->tlb_remote_flush(kvm))
1232 int kvm_mmu_module_init(void);
1233 void kvm_mmu_module_exit(void);
1235 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1236 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1237 void kvm_mmu_init_vm(struct kvm *kvm);
1238 void kvm_mmu_uninit_vm(struct kvm *kvm);
1239 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1240 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1241 u64 acc_track_mask, u64 me_mask);
1243 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1244 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1245 struct kvm_memory_slot *memslot);
1246 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1247 const struct kvm_memory_slot *memslot);
1248 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1249 struct kvm_memory_slot *memslot);
1250 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1251 struct kvm_memory_slot *memslot);
1252 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1253 struct kvm_memory_slot *memslot);
1254 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1255 struct kvm_memory_slot *slot,
1256 gfn_t gfn_offset, unsigned long mask);
1257 void kvm_mmu_zap_all(struct kvm *kvm);
1258 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
1259 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
1260 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
1262 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1263 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1265 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1266 const void *val, int bytes);
1268 struct kvm_irq_mask_notifier {
1269 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1271 struct hlist_node link;
1274 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1275 struct kvm_irq_mask_notifier *kimn);
1276 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1277 struct kvm_irq_mask_notifier *kimn);
1278 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1281 extern bool tdp_enabled;
1283 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1285 /* control of guest tsc rate supported? */
1286 extern bool kvm_has_tsc_control;
1287 /* maximum supported tsc_khz for guests */
1288 extern u32 kvm_max_guest_tsc_khz;
1289 /* number of bits of the fractional part of the TSC scaling ratio */
1290 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1291 /* maximum allowed value of TSC scaling ratio */
1292 extern u64 kvm_max_tsc_scaling_ratio;
1293 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1294 extern u64 kvm_default_tsc_scaling_ratio;
1296 extern u64 kvm_mce_cap_supported;
1298 enum emulation_result {
1299 EMULATE_DONE, /* no further processing */
1300 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
1301 EMULATE_FAIL, /* can't emulate this instruction */
1304 #define EMULTYPE_NO_DECODE (1 << 0)
1305 #define EMULTYPE_TRAP_UD (1 << 1)
1306 #define EMULTYPE_SKIP (1 << 2)
1307 #define EMULTYPE_ALLOW_RETRY (1 << 3)
1308 #define EMULTYPE_NO_UD_ON_FAIL (1 << 4)
1309 #define EMULTYPE_VMWARE (1 << 5)
1310 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1311 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1312 void *insn, int insn_len);
1314 void kvm_enable_efer_bits(u64);
1315 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1316 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1317 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1319 struct x86_emulate_ctxt;
1321 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1322 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1323 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1324 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1325 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1327 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1328 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1329 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1331 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1332 int reason, bool has_error_code, u32 error_code);
1334 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1335 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1336 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1337 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1338 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1339 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1340 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1341 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1342 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1343 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1345 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1346 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1348 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1349 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1350 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1352 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1353 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1354 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1355 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1356 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1357 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1358 gfn_t gfn, void *data, int offset, int len,
1360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1361 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1363 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1364 int irq_source_id, int level)
1366 /* Logical OR for level trig interrupt */
1368 __set_bit(irq_source_id, irq_state);
1370 __clear_bit(irq_source_id, irq_state);
1372 return !!(*irq_state);
1375 #define KVM_MMU_ROOT_CURRENT BIT(0)
1376 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1377 #define KVM_MMU_ROOTS_ALL (~0UL)
1379 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1380 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1382 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1384 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1385 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1386 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1387 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1388 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1389 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1390 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1391 ulong roots_to_free);
1392 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1393 struct x86_exception *exception);
1394 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1395 struct x86_exception *exception);
1396 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1397 struct x86_exception *exception);
1398 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1399 struct x86_exception *exception);
1400 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1401 struct x86_exception *exception);
1403 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1405 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1407 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code,
1408 void *insn, int insn_len);
1409 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1410 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1411 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1413 void kvm_enable_tdp(void);
1414 void kvm_disable_tdp(void);
1416 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1417 struct x86_exception *exception)
1422 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1424 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1426 return (struct kvm_mmu_page *)page_private(page);
1429 static inline u16 kvm_read_ldt(void)
1432 asm("sldt %0" : "=g"(ldt));
1436 static inline void kvm_load_ldt(u16 sel)
1438 asm("lldt %0" : : "rm"(sel));
1441 #ifdef CONFIG_X86_64
1442 static inline unsigned long read_msr(unsigned long msr)
1451 static inline u32 get_rdx_init_val(void)
1453 return 0x600; /* P6 family */
1456 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1458 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1461 #define TSS_IOPB_BASE_OFFSET 0x66
1462 #define TSS_BASE_SIZE 0x68
1463 #define TSS_IOPB_SIZE (65536 / 8)
1464 #define TSS_REDIRECTION_SIZE (256 / 8)
1465 #define RMODE_TSS_SIZE \
1466 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1469 TASK_SWITCH_CALL = 0,
1470 TASK_SWITCH_IRET = 1,
1471 TASK_SWITCH_JMP = 2,
1472 TASK_SWITCH_GATE = 3,
1475 #define HF_GIF_MASK (1 << 0)
1476 #define HF_HIF_MASK (1 << 1)
1477 #define HF_VINTR_MASK (1 << 2)
1478 #define HF_NMI_MASK (1 << 3)
1479 #define HF_IRET_MASK (1 << 4)
1480 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1481 #define HF_SMM_MASK (1 << 6)
1482 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1484 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1485 #define KVM_ADDRESS_SPACE_NUM 2
1487 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1488 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1491 * Hardware virtualization extension instructions may fault if a
1492 * reboot turns off virtualization while processes are running.
1493 * Trap the fault and ignore the instruction if that happens.
1495 asmlinkage void kvm_spurious_fault(void);
1497 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1498 "666: " insn "\n\t" \
1500 ".pushsection .fixup, \"ax\" \n" \
1502 cleanup_insn "\n\t" \
1503 "cmpb $0, kvm_rebooting \n\t" \
1505 __ASM_SIZE(push) " $666b \n\t" \
1506 "jmp kvm_spurious_fault \n\t" \
1507 ".popsection \n\t" \
1508 _ASM_EXTABLE(666b, 667b)
1510 #define __kvm_handle_fault_on_reboot(insn) \
1511 ____kvm_handle_fault_on_reboot(insn, "")
1513 #define KVM_ARCH_WANT_MMU_NOTIFIER
1514 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1515 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1516 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1517 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1518 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1519 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1520 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1521 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1522 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1523 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1525 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1526 unsigned long ipi_bitmap_high, u32 min,
1527 unsigned long icr, int op_64_bit);
1529 u64 kvm_get_arch_capabilities(void);
1530 void kvm_define_shared_msr(unsigned index, u32 msr);
1531 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1533 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1534 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1536 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1537 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1539 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1540 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1542 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1543 struct kvm_async_pf *work);
1544 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1545 struct kvm_async_pf *work);
1546 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1547 struct kvm_async_pf *work);
1548 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1549 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1551 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1552 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1553 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1555 int kvm_is_in_guest(void);
1557 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1558 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1559 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1560 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1562 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1563 struct kvm_vcpu **dest_vcpu);
1565 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1566 struct kvm_lapic_irq *irq);
1568 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1570 if (kvm_x86_ops->vcpu_blocking)
1571 kvm_x86_ops->vcpu_blocking(vcpu);
1574 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1576 if (kvm_x86_ops->vcpu_unblocking)
1577 kvm_x86_ops->vcpu_unblocking(vcpu);
1580 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1582 static inline int kvm_cpu_get_apicid(int mps_cpu)
1584 #ifdef CONFIG_X86_LOCAL_APIC
1585 return default_cpu_present_to_apicid(mps_cpu);
1592 #define put_smstate(type, buf, offset, val) \
1593 *(type *)((buf) + (offset) - 0x7e00) = val
1595 #endif /* _ASM_X86_KVM_HOST_H */