drivers/net/phy/realtek.c

   1 /*
   2  * drivers/net/phy/realtek.c
   3  *
   4  * Driver for Realtek PHYs
   5  *
   6  * Author: Johnson Leung <r58129@freescale.com>
   7  *
   8  * Copyright (c) 2004 Freescale Semiconductor, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16 #include <linux/bitops.h>
  17 #include <linux/phy.h>
  18 #include <linux/module.h>
  19
  20 #define RTL821x_PHYSR                           0x11
  21 #define RTL821x_PHYSR_DUPLEX                    BIT(13)
  22 #define RTL821x_PHYSR_SPEED                     GENMASK(15, 14)
  23
  24 #define RTL821x_INER                            0x12
  25 #define RTL8211B_INER_INIT                      0x6400
  26 #define RTL8211E_INER_LINK_STATUS               BIT(10)
  27 #define RTL8211F_INER_LINK_STATUS               BIT(4)
  28
  29 #define RTL821x_INSR                            0x13
  30
  31 #define RTL821x_PAGE_SELECT                     0x1f
  32
  33 #define RTL8211F_INSR                           0x1d
  34
  35 #define RTL8211F_TX_DELAY                       BIT(8)
  36
  37 #define RTL8201F_ISR                            0x1e
  38 #define RTL8201F_IER                            0x13
  39
  40 #define RTL8366RB_POWER_SAVE                    0x15
  41 #define RTL8366RB_POWER_SAVE_ON                 BIT(12)
  42
  43 MODULE_DESCRIPTION("Realtek PHY driver");
  44 MODULE_AUTHOR("Johnson Leung");
  45 MODULE_LICENSE("GPL");
  46
  47 static int rtl821x_read_page(struct phy_device *phydev)
  48 {
  49         return __phy_read(phydev, RTL821x_PAGE_SELECT);
  50 }
  51
  52 static int rtl821x_write_page(struct phy_device *phydev, int page)
  53 {
  54         return __phy_write(phydev, RTL821x_PAGE_SELECT, page);
  55 }
  56
  57 static int rtl8201_ack_interrupt(struct phy_device *phydev)
  58 {
  59         int err;
  60
  61         err = phy_read(phydev, RTL8201F_ISR);
  62
  63         return (err < 0) ? err : 0;
  64 }
  65
  66 static int rtl821x_ack_interrupt(struct phy_device *phydev)
  67 {
  68         int err;
  69
  70         err = phy_read(phydev, RTL821x_INSR);
  71
  72         return (err < 0) ? err : 0;
  73 }
  74
  75 static int rtl8211f_ack_interrupt(struct phy_device *phydev)
  76 {
  77         int err;
  78
  79         err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);
  80
  81         return (err < 0) ? err : 0;
  82 }
  83
  84 static int rtl8201_config_intr(struct phy_device *phydev)
  85 {
  86         u16 val;
  87
  88         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  89                 val = BIT(13) | BIT(12) | BIT(11);
  90         else
  91                 val = 0;
  92
  93         return phy_write_paged(phydev, 0x7, RTL8201F_IER, val);
  94 }
  95
  96 static int rtl8211b_config_intr(struct phy_device *phydev)
  97 {
  98         int err;
  99
 100         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 101                 err = phy_write(phydev, RTL821x_INER,
 102                                 RTL8211B_INER_INIT);
 103         else
 104                 err = phy_write(phydev, RTL821x_INER, 0);
 105
 106         return err;
 107 }
 108
 109 static int rtl8211e_config_intr(struct phy_device *phydev)
 110 {
 111         int err;
 112
 113         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 114                 err = phy_write(phydev, RTL821x_INER,
 115                                 RTL8211E_INER_LINK_STATUS);
 116         else
 117                 err = phy_write(phydev, RTL821x_INER, 0);
 118
 119         return err;
 120 }
 121
 122 static int rtl8211f_config_intr(struct phy_device *phydev)
 123 {
 124         u16 val;
 125
 126         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 127                 val = RTL8211F_INER_LINK_STATUS;
 128         else
 129                 val = 0;
 130
 131         return phy_write_paged(phydev, 0xa42, RTL821x_INER, val);
 132 }
 133
 134 static int rtl8211_config_aneg(struct phy_device *phydev)
 135 {
 136         int ret;
 137
 138         ret = genphy_config_aneg(phydev);
 139         if (ret < 0)
 140                 return ret;
 141
 142         /* Quirk was copied from vendor driver. Unfortunately it includes no
 143          * description of the magic numbers.
 144          */
 145         if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) {
 146                 phy_write(phydev, 0x17, 0x2138);
 147                 phy_write(phydev, 0x0e, 0x0260);
 148         } else {
 149                 phy_write(phydev, 0x17, 0x2108);
 150                 phy_write(phydev, 0x0e, 0x0000);
 151         }
 152
 153         return 0;
 154 }
 155
 156 static int rtl8211c_config_init(struct phy_device *phydev)
 157 {
 158         /* RTL8211C has an issue when operating in Gigabit slave mode */
 159         phy_set_bits(phydev, MII_CTRL1000,
 160                      CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);
 161
 162         return genphy_config_init(phydev);
 163 }
 164
 165 static int rtl8211f_config_init(struct phy_device *phydev)
 166 {
 167         int ret;
 168         u16 val = 0;
 169
 170         ret = genphy_config_init(phydev);
 171         if (ret < 0)
 172                 return ret;
 173
 174         /* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
 175         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
 176             phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
 177                 val = RTL8211F_TX_DELAY;
 178
 179         return phy_modify_paged(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, val);
 180 }
 181
 182 static int rtl8211b_suspend(struct phy_device *phydev)
 183 {
 184         phy_write(phydev, MII_MMD_DATA, BIT(9));
 185
 186         return genphy_suspend(phydev);
 187 }
 188
 189 static int rtl8211b_resume(struct phy_device *phydev)
 190 {
 191         phy_write(phydev, MII_MMD_DATA, 0);
 192
 193         return genphy_resume(phydev);
 194 }
 195
 196 static int rtl8366rb_config_init(struct phy_device *phydev)
 197 {
 198         int ret;
 199
 200         ret = genphy_config_init(phydev);
 201         if (ret < 0)
 202                 return ret;
 203
 204         ret = phy_set_bits(phydev, RTL8366RB_POWER_SAVE,
 205                            RTL8366RB_POWER_SAVE_ON);
 206         if (ret) {
 207                 dev_err(&phydev->mdio.dev,
 208                         "error enabling power management\n");
 209         }
 210
 211         return ret;
 212 }
 213
 214 static struct phy_driver realtek_drvs[] = {
 215         {
 216                 PHY_ID_MATCH_EXACT(0x00008201),
 217                 .name           = "RTL8201CP Ethernet",
 218                 .features       = PHY_BASIC_FEATURES,
 219         }, {
 220                 PHY_ID_MATCH_EXACT(0x001cc816),
 221                 .name           = "RTL8201F Fast Ethernet",
 222                 .features       = PHY_BASIC_FEATURES,
 223                 .ack_interrupt  = &rtl8201_ack_interrupt,
 224                 .config_intr    = &rtl8201_config_intr,
 225                 .suspend        = genphy_suspend,
 226                 .resume         = genphy_resume,
 227                 .read_page      = rtl821x_read_page,
 228                 .write_page     = rtl821x_write_page,
 229         }, {
 230                 PHY_ID_MATCH_EXACT(0x001cc910),
 231                 .name           = "RTL8211 Gigabit Ethernet",
 232                 .features       = PHY_GBIT_FEATURES,
 233                 .config_aneg    = rtl8211_config_aneg,
 234                 .read_mmd       = &genphy_read_mmd_unsupported,
 235                 .write_mmd      = &genphy_write_mmd_unsupported,
 236         }, {
 237                 PHY_ID_MATCH_EXACT(0x001cc912),
 238                 .name           = "RTL8211B Gigabit Ethernet",
 239                 .features       = PHY_GBIT_FEATURES,
 240                 .ack_interrupt  = &rtl821x_ack_interrupt,
 241                 .config_intr    = &rtl8211b_config_intr,
 242                 .read_mmd       = &genphy_read_mmd_unsupported,
 243                 .write_mmd      = &genphy_write_mmd_unsupported,
 244                 .suspend        = rtl8211b_suspend,
 245                 .resume         = rtl8211b_resume,
 246         }, {
 247                 PHY_ID_MATCH_EXACT(0x001cc913),
 248                 .name           = "RTL8211C Gigabit Ethernet",
 249                 .features       = PHY_GBIT_FEATURES,
 250                 .config_init    = rtl8211c_config_init,
 251                 .read_mmd       = &genphy_read_mmd_unsupported,
 252                 .write_mmd      = &genphy_write_mmd_unsupported,
 253         }, {
 254                 PHY_ID_MATCH_EXACT(0x001cc914),
 255                 .name           = "RTL8211DN Gigabit Ethernet",
 256                 .features       = PHY_GBIT_FEATURES,
 257                 .ack_interrupt  = rtl821x_ack_interrupt,
 258                 .config_intr    = rtl8211e_config_intr,
 259                 .suspend        = genphy_suspend,
 260                 .resume         = genphy_resume,
 261         }, {
 262                 PHY_ID_MATCH_EXACT(0x001cc915),
 263                 .name           = "RTL8211E Gigabit Ethernet",
 264                 .features       = PHY_GBIT_FEATURES,
 265                 .ack_interrupt  = &rtl821x_ack_interrupt,
 266                 .config_intr    = &rtl8211e_config_intr,
 267                 .suspend        = genphy_suspend,
 268                 .resume         = genphy_resume,
 269         }, {
 270                 PHY_ID_MATCH_EXACT(0x001cc916),
 271                 .name           = "RTL8211F Gigabit Ethernet",
 272                 .features       = PHY_GBIT_FEATURES,
 273                 .config_init    = &rtl8211f_config_init,
 274                 .ack_interrupt  = &rtl8211f_ack_interrupt,
 275                 .config_intr    = &rtl8211f_config_intr,
 276                 .suspend        = genphy_suspend,
 277                 .resume         = genphy_resume,
 278                 .read_page      = rtl821x_read_page,
 279                 .write_page     = rtl821x_write_page,
 280         }, {
 281                 PHY_ID_MATCH_EXACT(0x001cc961),
 282                 .name           = "RTL8366RB Gigabit Ethernet",
 283                 .features       = PHY_GBIT_FEATURES,
 284                 .config_init    = &rtl8366rb_config_init,
 285                 /* These interrupts are handled by the irq controller
 286                  * embedded inside the RTL8366RB, they get unmasked when the
 287                  * irq is requested and ACKed by reading the status register,
 288                  * which is done by the irqchip code.
 289                  */
 290                 .ack_interrupt  = genphy_no_ack_interrupt,
 291                 .config_intr    = genphy_no_config_intr,
 292                 .suspend        = genphy_suspend,
 293                 .resume         = genphy_resume,
 294         },
 295 };
 296
 297 module_phy_driver(realtek_drvs);
 298
 299 static const struct mdio_device_id __maybe_unused realtek_tbl[] = {
 300         { PHY_ID_MATCH_VENDOR(0x001cc800) },
 301         { }
 302 };
 303
 304 MODULE_DEVICE_TABLE(mdio, realtek_tbl);