#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/module.h>
#include <asm/segment.h>
#include <asm/io.h>
unsigned long flags;
unsigned int rate;
unsigned short gra;
- unsigned char enable;
+ unsigned char enb;
unsigned char imfa;
unsigned char imiea;
unsigned char ovf;
ctrl_outw(p->gra, p->mapbase + GRA);
if (!(p->flags & FLAG_SKIPEVENT)) {
if (p->ced.mode == CLOCK_EVT_MODE_ONESHOT) {
- ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enable,
+ ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb,
p->mapcommon + TISRA);
}
p->ced.event_handler(&p->ced);
ctrl_outw(0xffff, p->mapbase + GRA);
ctrl_outw(0x0000, p->mapbase + TCNT);
ctrl_outb(0xa3, p->mapbase + TCR);
- ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enable,
+ ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enb,
p->mapcommon + TSTR);
return 0;
raw_spin_lock_irqsave(&p->lock, flags);
- ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enable,
+ ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb,
p->mapcommon + TSTR);
raw_spin_unlock_irqrestore(&p->lock, flags);
return 0;
}
-static int __init timer16_setup(struct timer16_priv *p, struct platform_device *pdev)
+#define REG_CH 0
+#define REG_COMM 1
+
+static int timer16_setup(struct timer16_priv *p, struct platform_device *pdev)
{
struct h8300_timer16_config *cfg = dev_get_platdata(&pdev->dev);
- struct resource *res, *res2;
+ struct resource *res[2];
int ret, irq;
memset(p, 0, sizeof(*p));
p->pdev = pdev;
- res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&p->pdev->dev, "failed to get I/O memory\n");
- return -ENXIO;
- }
- res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
- if (!res2) {
+ res[REG_CH] = platform_get_resource(p->pdev, IORESOURCE_MEM, REG_CH);
+ res[REG_COMM] = platform_get_resource(p->pdev, IORESOURCE_MEM, REG_COMM);
+ if (!res[REG_CH] || !res[REG_COMM]) {
dev_err(&p->pdev->dev, "failed to get I/O memory\n");
return -ENXIO;
}
}
p->pdev = pdev;
- p->mapbase = res->start;
- p->mapcommon = res2->start;
- p->enable = 1 << cfg->enable;
+ p->mapbase = res[REG_CH]->start;
+ p->mapcommon = res[REG_COMM]->start;
+ p->enb = 1 << cfg->enb;
p->imfa = 1 << cfg->imfa;
p->imiea = 1 << cfg->imiea;
p->ced.name = pdev->name;
return 0;
}
-static int __init timer16_probe(struct platform_device *pdev)
+static int timer16_probe(struct platform_device *pdev)
{
struct timer16_priv *p = platform_get_drvdata(pdev);
return -EBUSY;
}
-static struct platform_driver __initdata timer16_driver = {
+static struct platform_driver timer16_driver = {
.probe = timer16_probe,
.remove = timer16_remove,
.driver = {
}
};
+static int __init timer16_init(void)
+{
+ return platform_driver_register(&timer16_driver);
+}
+
+static void __exit timer16_exit(void)
+{
+ platform_driver_unregister(&timer16_driver);
+}
+
early_platform_init("earlytimer", &timer16_driver);
+subsys_initcall(timer16_init);
+module_exit(timer16_exit);
+MODULE_AUTHOR("Yoshinori Sato");
+MODULE_DESCRIPTION("H8/300H 16bit Timer Driver");
+MODULE_LICENSE("GPL v2");
return 0;
}
+#define CMI 0
+#define OVI 1
static int __init timer8_setup(struct timer8_priv *p, struct platform_device *pdev)
{
struct h8300_timer8_config *cfg = dev_get_platdata(&pdev->dev);
struct resource *res;
- int irq;
+ int irq[2];
int ret;
memset(p, 0, sizeof(*p));
return -ENXIO;
}
- irq = platform_get_irq(p->pdev, 0);
- if (irq < 0) {
+ irq[CMI] = platform_get_irq(p->pdev, CMI);
+ irq[OVI] = platform_get_irq(p->pdev, OVI);
+ if (irq[CMI] < 0 || irq[OVI] < 0) {
dev_err(&p->pdev->dev, "failed to get irq\n");
return -ENXIO;
}
p->clk.cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
p->clk.cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
- if ((ret = setup_irq(irq + 3, &p->irqaction)) < 0) {
+ if ((ret = setup_irq(irq[OVI], &p->irqaction)) < 0) {
dev_err(&p->pdev->dev,
- "failed to request irq %d\n", irq + 3);
+ "failed to request irq %d\n", irq[OVI]);
return ret;
}
clocksource_register_hz(&p->clk.cs,
p->clk.ced.cpumask = cpumask_of(0);
p->clk.ced.set_next_event = timer8_clock_event_next;
p->clk.ced.set_mode = timer8_clock_event_mode;
- ret = request_irq(irq, timer8_interrupt,
- IRQF_DISABLED | IRQF_TIMER, pdev->name, p);
- if (ret < 0) {
+ if ((ret = setup_irq(irq[CMI], &p->irqaction)) < 0) {
dev_err(&p->pdev->dev,
- "failed to request irq %d\n", irq);
+ "failed to request irq %d\n", irq[CMI]);
return ret;
}
clockevents_register_device(&p->clk.ced);
.probe = timer8_probe,
.remove = timer8_remove,
.driver = {
- .name = "h8300_8timer",
+ .name = "h8300-8timer",
}
};
unsigned int cs_enabled;
};
-static inlinde unsigned long read_tcnt32(struct tpu_priv *p)
+static inline unsigned long read_tcnt32(struct tpu_priv *p)
{
unsigned long tcnt;
tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
unsigned long v1, v2, v3;
int o1, o2;
- o1 = ctrl_inb(p->mapbase + TSR) & 0x10;
+ o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
v1 = read_tcnt32(p);
v2 = read_tcnt32(p);
v3 = read_tcnt32(p);
- o1 = ctrl_inb(p->mapbase + TSR) & 0x10;
+ o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
WARN_ON(!p->cs_enabled);
- ctrl_outb(0, p->mapbase1 + _8TCR);
- ctrl_outb(0, p->mapbase2 + _8TCR);
+ ctrl_outb(0, p->mapbase1 + TCR);
+ ctrl_outb(0, p->mapbase2 + TCR);
p->cs_enabled = false;
}
+#define CH_L 0
+#define CH_H 1
+
static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev)
{
- struct tpu_config *cfg = dev_get_platdata(&pdev->dev);
- struct resource *res1, *res2;
- int irq;
- int ret;
+ struct h8300_tpu_config *cfg = dev_get_platdata(&pdev->dev);
+ struct resource *res[2];
memset(p, 0, sizeof(*p));
p->pdev = pdev;
- res1 = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
- if (!res1) {
- dev_err(&p->pdev->dev, "failed to get I/O memory\n");
- return -ENXIO;
- }
-
- res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
- if (!res2) {
+ res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L);
+ res[CH_H] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_H);
+ if (!res[CH_L] || !res[CH_H]) {
dev_err(&p->pdev->dev, "failed to get I/O memory\n");
return -ENXIO;
}
- p->mapbase1 = res1->start;
- p->mapbase2 = res2->start;
+ p->mapbase1 = res[CH_L]->start;
+ p->mapbase2 = res[CH_H]->start;
p->cs.name = pdev->name;
p->cs.rating = cfg->rating;
p->cs.disable = tpu_clocksource_disable;
p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
- clocksource_register_hz(&p->clk.cs, get_cpu_clock() / 64);
+ clocksource_register_hz(&p->cs, get_cpu_clock() / 64);
platform_set_drvdata(pdev, p);
return 0;
.probe = tpu_probe,
.remove = tpu_remove,
.driver = {
- .name = "h8s_tpu",
+ .name = "h8s-tpu",
}
};
MODULE_AUTHOR("Yoshinori Sato");
MODULE_DESCRIPTION("H8S Timer Pulse Unit Driver");
MODULE_LICENSE("GPL v2");
-#endif