2 # GDB Init script for the Coldfire 5272 processor.
4 # The main purpose of this script is to configure the
5 # DRAM controller so code can be loaded.
11 set $mbar = 0x10000001
12 set $scr = $mbar - 1 + 0x004
13 set $spr = $mbar - 1 + 0x006
14 set $pmr = $mbar - 1 + 0x008
15 set $apmr = $mbar - 1 + 0x00e
16 set $dir = $mbar - 1 + 0x010
17 set $icr1 = $mbar - 1 + 0x020
18 set $icr2 = $mbar - 1 + 0x024
19 set $icr3 = $mbar - 1 + 0x028
20 set $icr4 = $mbar - 1 + 0x02c
21 set $isr = $mbar - 1 + 0x030
22 set $pitr = $mbar - 1 + 0x034
23 set $piwr = $mbar - 1 + 0x038
24 set $pivr = $mbar - 1 + 0x03f
25 set $csbr0 = $mbar - 1 + 0x040
26 set $csor0 = $mbar - 1 + 0x044
27 set $csbr1 = $mbar - 1 + 0x048
28 set $csor1 = $mbar - 1 + 0x04c
29 set $csbr2 = $mbar - 1 + 0x050
30 set $csor2 = $mbar - 1 + 0x054
31 set $csbr3 = $mbar - 1 + 0x058
32 set $csor3 = $mbar - 1 + 0x05c
33 set $csbr4 = $mbar - 1 + 0x060
34 set $csor4 = $mbar - 1 + 0x064
35 set $csbr5 = $mbar - 1 + 0x068
36 set $csor5 = $mbar - 1 + 0x06c
37 set $csbr6 = $mbar - 1 + 0x070
38 set $csor6 = $mbar - 1 + 0x074
39 set $csbr7 = $mbar - 1 + 0x078
40 set $csor7 = $mbar - 1 + 0x07c
41 set $pacnt = $mbar - 1 + 0x080
42 set $paddr = $mbar - 1 + 0x084
43 set $padat = $mbar - 1 + 0x086
44 set $pbcnt = $mbar - 1 + 0x088
45 set $pbddr = $mbar - 1 + 0x08c
46 set $pbdat = $mbar - 1 + 0x08e
47 set $pcddr = $mbar - 1 + 0x094
48 set $pcdat = $mbar - 1 + 0x096
49 set $pdcnt = $mbar - 1 + 0x098
50 set $sdcr = $mbar - 1 + 0x180
51 set $sdtr = $mbar - 1 + 0x184
52 set $wrrr = $mbar - 1 + 0x280
53 set $wirr = $mbar - 1 + 0x283
54 set $wcr = $mbar - 1 + 0x288
55 set $wer = $mbar - 1 + 0x28c
61 # Setup system configuration
64 set *((unsigned short *) $scr) = 0x9003
65 set *((unsigned short *) $spr) = 0x00ff
66 set *((unsigned char *) $pivr) = 0x4f
71 # Setup Chip Selects (as per Motorola M5272C3 board)
76 set *((unsigned long *) $csbr0) = 0xffe00201
77 set *((unsigned long *) $csor0) = 0xffe00014
80 set *((unsigned long *) $csbr1) = 0x00000000
81 set *((unsigned long *) $csor1) = 0x00000000
83 # CS2 -- Optional FSRAM
84 set *((unsigned long *) $csbr2) = 0x30000001
85 set *((unsigned long *) $csor2) = 0xfff80000
88 set *((unsigned long *) $csbr3) = 0x00000000
89 set *((unsigned long *) $csor3) = 0xfffff078
92 set *((unsigned long *) $csbr4) = 0x00004300
93 set *((unsigned long *) $csor4) = 0x00000000
96 set *((unsigned long *) $csbr5) = 0x00000000
97 set *((unsigned long *) $csor5) = 0x00000000
100 set *((unsigned long *) $csbr6) = 0x00000000
101 set *((unsigned long *) $csor6) = 0x00000000
104 set *((unsigned long *) $csbr7) = 0x00000701
105 set *((unsigned long *) $csor7) = 0xffc0007c
111 # Setup the DRAM controller.
115 set *((unsigned long *) $sdtr) = 0x0000f539
116 set *((unsigned long *) $sdcr) = 0x00004211
118 # Dummy write to start SDRAM
119 set *((unsigned long *) 0) = 0
124 # Setup for GPIO pins
129 set *((unsigned long *) $pacnt) = 0x00000000
130 set *((unsigned short *) $paddr) = 0x0000
131 set *((unsigned short *) $padat) = 0xffbf
134 set *((unsigned long *) $pbcnt) = 0x55554155
135 set *((unsigned short *) $pbddr) = 0x0000
136 set *((unsigned short *) $pbdat) = 0x17ea
139 #set *((unsigned short *) $pcddr) = 0x0000
140 #set *((unsigned short *) $pcdat) = 0x1898
143 set *((unsigned long *) $pdcnt) = 0x00000000
149 # Added for uClinux-coldfire target...
151 target bdm /dev/bdmcf0
159 set print asm-demangle