1 # GDB/BDM init file for 5407C3 development board from Motorola
2 # based on a file by Kendrick Hamilton of SED Systems Inc.
3 # Modified by Steve Keppel-Jones of Precidia Technologies Inc.
5 # This is designed to set up the 5407C3 for loading a Linux
6 # kernel (or other similar code) and running it, e.g. with
7 # "load image.elf", "set $pc = 0x20000", "cont".
8 # It also assumes that the file "linux" is available in the
9 # current directory for symbol information; this can be changed
10 # below if desired (see "file linux").
12 # This file has been tested to allow loading of the Linux kernel
13 # as described above, but some setup items have not been
14 # extensively tested (e.g. the 2nd SDRAM memory bank and the
15 # PCI chip select), and there is no SDRAM probing code here.
17 # Address shortcut definition function
20 # The syntax here is fairly confusing if you are new to GDB:
21 # The following line refers to a predefined "register" ("mbar")
22 # and thus constitutes a "poke" command (to use trusty ol' BASIC
23 # terminology), or in other words it actually sets a register
24 # inside the 5407 chip:
25 set $mbar = 0x10000001
27 # These lines refer to "convenience variables", since they are not
28 # predefined to GDB, and so these do not constitute "pokes" but
29 # rather setting of internal variable addresses. (No data are
30 # sent through the BDM for these statements.)
31 # The dereference of $mbar, however, still constitutes a "peek" since
32 # it is still a predefined register.
33 # It might make more sense to set an internal convenience variable
34 # for $mbar to be used to calculate these offsets, so that we
35 # wouldn't have to subtract 1 from each one.
36 set $rsr = (unsigned char *)($mbar - 1 + 0x000)
37 set $sypcr = (unsigned char *)($mbar - 1 + 0x001)
38 set $swivr = (unsigned char *)($mbar - 1 + 0x002)
39 set $swsr = (unsigned char *)($mbar - 1 + 0x003)
40 set $par = (unsigned short*)($mbar - 1 + 0x004)
41 set $irqpar= (unsigned char *)($mbar - 1 + 0x006)
42 set $pllcr = (unsigned char *)($mbar - 1 + 0x008)
43 set $mpark = (unsigned char *)($mbar - 1 + 0x00c)
44 set $ipr = (unsigned long *)($mbar - 1 + 0x040)
45 set $imr = (unsigned long *)($mbar - 1 + 0x044)
46 set $avr = (unsigned char *)($mbar - 1 + 0x04b)
48 set $icr0 = (unsigned char *)($mbar - 1 + 0x04c)
49 set $icr1 = (unsigned char *)($mbar - 1 + 0x04d)
50 set $icr2 = (unsigned char *)($mbar - 1 + 0x04e)
51 set $icr3 = (unsigned char *)($mbar - 1 + 0x04f)
52 set $icr4 = (unsigned char *)($mbar - 1 + 0x050)
53 set $icr5 = (unsigned char *)($mbar - 1 + 0x051)
54 set $icr6 = (unsigned char *)($mbar - 1 + 0x052)
55 set $icr7 = (unsigned char *)($mbar - 1 + 0x053)
56 set $icr8 = (unsigned char *)($mbar - 1 + 0x054)
57 set $icr9 = (unsigned char *)($mbar - 1 + 0x055)
58 set $icr10 = (unsigned char *)($mbar - 1 + 0x056)
59 set $icr11 = (unsigned char *)($mbar - 1 + 0x057)
61 set $csar0 = (unsigned short*)($mbar - 1 + 0x080)
62 set $csmr0 = (unsigned long *)($mbar - 1 + 0x084)
63 set $cscr0 = (unsigned short*)($mbar - 1 + 0x08a)
65 set $csar1 = (unsigned short*)($mbar - 1 + 0x08c)
66 set $csmr1 = (unsigned long *)($mbar - 1 + 0x090)
67 set $cscr1 = (unsigned short*)($mbar - 1 + 0x096)
69 set $csar2 = (unsigned short*)($mbar - 1 + 0x098)
70 set $csmr2 = (unsigned long *)($mbar - 1 + 0x09c)
71 set $cscr2 = (unsigned short*)($mbar - 1 + 0x0a2)
73 set $csar3 = (unsigned short*)($mbar - 1 + 0x0a4)
74 set $csmr3 = (unsigned long *)($mbar - 1 + 0x0a8)
75 set $cscr3 = (unsigned short*)($mbar - 1 + 0x0ae)
77 set $csar4 = (unsigned short*)($mbar - 1 + 0x0b0)
78 set $csmr4 = (unsigned long *)($mbar - 1 + 0x0b4)
79 set $cscr4 = (unsigned short*)($mbar - 1 + 0x0ba)
81 set $csar5 = (unsigned short*)($mbar - 1 + 0x0bc)
82 set $csmr5 = (unsigned long *)($mbar - 1 + 0x0c0)
83 set $cscr5 = (unsigned short*)($mbar - 1 + 0x0c6)
85 set $csar6 = (unsigned short*)($mbar - 1 + 0x0c8)
86 set $csmr6 = (unsigned long *)($mbar - 1 + 0x0cc)
87 set $cscr6 = (unsigned short*)($mbar - 1 + 0x0d2)
89 set $csar7 = (unsigned short*)($mbar - 1 + 0x0d4)
90 set $csmr7 = (unsigned long *)($mbar - 1 + 0x0d8)
91 set $cscr7 = (unsigned short*)($mbar - 1 + 0x0de)
93 set $dcr = (unsigned short*)($mbar - 1 + 0x100)
94 set $dacr0 = (unsigned long *)($mbar - 1 + 0x108)
95 set $dmr0 = (unsigned long *)($mbar - 1 + 0x10c)
96 set $dacr1 = (unsigned long *)($mbar - 1 + 0x110)
97 set $dmr1 = (unsigned long *)($mbar - 1 + 0x114)
99 set $tmr0 = (unsigned short*)($mbar - 1 + 0x140)
100 set $trr0 = (unsigned short*)($mbar - 1 + 0x144)
101 set $tcr0 = (unsigned short*)($mbar - 1 + 0x148)
102 set $tcn0 = (unsigned short*)($mbar - 1 + 0x14C)
103 set $ter0 = (unsigned char *)($mbar - 1 + 0x151)
104 set $tmr1 = (unsigned short*)($mbar - 1 + 0x180)
105 set $trr1 = (unsigned short*)($mbar - 1 + 0x184)
106 set $tcr1 = (unsigned short*)($mbar - 1 + 0x188)
107 set $tcn1 = (unsigned short*)($mbar - 1 + 0x18C)
108 set $ter1 = (unsigned char *)($mbar - 1 + 0x191)
110 set $paddr = (unsigned short*)($mbar - 1 + 0x244)
111 set $padat = (unsigned short*)($mbar - 1 + 0x248)
115 # Tell GDB what to use for symbol information. This does
116 # not load anything onto the board.
119 echo Setting up BDM\n
120 target bdm /dev/bdmcf0
121 #disable caching of values in gdb
126 echo Setting up Coldfire Memory Map\n
129 # Call function defined above; this sets $mbar
132 echo Disabling cache\n
139 echo Enabling internal SRAM\n
140 set $rambar=0x20000001
141 set $rambar1=0x20000801
143 #Clear the system protection control register (disable to watchdog)
146 #Set bus arbitration control to park on Coldfire, I am not using DMA
147 # there is no external master to use internal chip resources or access internal
151 #Configure the PLL Control Register. Enable CPU stop but any interrupt can
152 # wake the processor. Bus clock us driven (used for SDRAM).
157 #set *$imr=0x0003fffe
159 #printf "The interrupt pending register is set to 0x%08x\n", *(unsigned long *)0x10000040
161 #Enable autovectoring of external interrupts
165 #Configure Pin Assignment Register
166 #printf "The Pin Assignment Register is set to 0x%04x\n", *(unsigned short*)0x10000004
168 #configure parallel port to outputs
169 # This affects the DRAM muxing so get it right!
173 #Configure Interrupt Port Assignment Register to IRQ5/3/1
176 #Disable chipselect 1-7
177 set *$csmr1=0x00000000
178 set *$csmr2=0x00000000
179 set *$csmr3=0x00000000
180 set *$csmr4=0x00000000
181 set *$csmr5=0x00000000
182 set *$csmr6=0x00000000
183 set *$csmr7=0x00000000
185 #Configure Chipselect 3 for Ethernet to address 0x40000000
188 set *$csmr3=0x000F0001
190 #Configure Chipselect 2 for External SRAM to address 0x30000000
191 # Note there is no external SRAM on a stock 5407C3 board, but we
195 set *$csmr2=0x00070001
197 #Configure Chipselect 1 for PCI at 0xFFFF0000
200 set *$csmr1=0x00000001
202 #Configure Chipselect 0 for Flash at address 0x7fe00000
205 set *$csmr0=0x001f0001
208 #DRAM configure - modified - Kendrick Hamilton & SKJ
211 set *$dacr0 = 0x00001304
212 set *$dmr0 = 0x00fc0001
213 set *$dacr0 = 0x0000130c
214 set *(unsigned long *)(0x4) = 0xbeaddeed
215 printf "DRAM setup delay\n"
216 set *$dacr0 = 0x00009304
217 printf "Another DRAM setup delay\n"
218 set *$dacr0 = 0x00009344
219 set *(unsigned long *)(0x80400) = 0x00000000
222 set *$dacr1 = 0x01001304
223 set *$dmr1 = 0x00fc0001
224 set *$dacr1 = 0x0100130c
225 set *(unsigned long *)(0x01000004) = 0xbeaddeed
226 printf "DRAM setup delay\n"
227 set *$dacr1 = 0x01009304
228 printf "Another DRAM setup delay\n"
229 set *$dacr1 = 0x01009344
230 set *(unsigned long *)(0x01080400) = 0x00000000
232 printf "\tTo print a byte(8 bits): x/1xb\n"
233 printf "\tTo print a word(16 bits): x/1xh\n"
234 printf "\tTo print a long(32 bits): x/1xw\n"