2 # FWIW - Atheros AR7100 target gdbinit script.
4 # (C) Copyright 2007-2008, Greg Ungerer <gerg@snapgear.com>
8 # Enable UART I/O lines
9 monitor long 0x18040000 = 0xc3e
10 monitor long 0x18040008 = 0x03e
11 monitor long 0x18040028 = 0x100
13 monitor char 0x1802000f = 0x83
14 monitor char 0x18020003 = 0x54
15 monitor char 0x18020007 = 0x00
16 monitor char 0x1802000f = 0x03
21 monitor char 0x18020003 = $arg0
26 monitor char 0x18020003 = 0x55
31 monitor long 0x18040000 = 0xc3e
32 monitor long 0x18040008 = 0x3e
36 monitor long 0x18040008 = 0x3e
40 monitor long 0x18040008 = 0x00
45 monitor long 0x18040008 = 0x3c
46 monitor long 0x18040008 = 0x3a
47 monitor long 0x18040008 = 0x36
48 monitor long 0x18040008 = 0x2e
49 monitor long 0x18040008 = 0x1e
50 monitor long 0x18040008 = 0x2e
51 monitor long 0x18040008 = 0x36
52 monitor long 0x18040008 = 0x3a
58 # Set the PLL to high speed...
61 monitor long 0x18050004 = 0x000050c0
62 monitor long 0x18050000 = 0x000f00e8
63 monitor long 0x18050000 = 0x800f00e8
64 monitor long 0x18050008 = 0x1
73 # set DDR_CONFIG for xxx
74 monitor long 0x18000000 = 0xefbc8cd0
76 # set DDR_CONFIG2 for xxx
77 monitor long 0x18000004 = 0x827156a2
79 # send PRECHARGE ALL cycle
80 monitor long 0x18000010 = 8
82 # send MRS update cycle
83 monitor long 0x18000010 = 1
85 # set DDR_EXTENDED_MODE
86 monitor long 0x1800000c = 0
88 # send EMRS update cycle
89 monitor long 0x18000010 = 2
91 # send PRECHARGE ALL cycle
92 monitor long 0x18000010 = 8
95 monitor long 0x18000008 = 0x61
97 # send MRS update cycle
98 monitor long 0x18000010 = 1
101 monitor long 0x18000014 = 0x461b
103 # set DDR_RD_DATA_THIS_CYCLE
104 #monitor long 0x18000018 = 0xffff
105 monitor long 0x18000018 = 0xff
107 # set the TAP_CONTROL words
108 monitor long 0x1800001c = 7
109 monitor long 0x18000020 = 7
110 monitor long 0x18000024 = 7
111 monitor long 0x18000028 = 7
116 # Set of flash programming macros for SPI flash
119 define spi-bit-banger
123 set $bit = ($data >> $cnt) & 0x1
125 monitor long 0x1f000008 = 0x60001
126 monitor long 0x1f000008 = 0x60101
128 monitor long 0x1f000008 = 0x60000
129 monitor long 0x1f000008 = 0x60100
137 set $bangaddr = $arg0
138 set $addrbyte = (($bangaddr & 0xff0000) >> 16)
139 spi-bit-banger $addrbyte
140 set $addrbyte = (($bangaddr & 0xff00) >> 8)
141 spi-bit-banger $addrbyte
142 set $addrbyte = $bangaddr & 0xff
143 spi-bit-banger $addrbyte
146 define spi-write-enable
147 monitor long 0x1f000000 = 1
148 monitor long 0x1f000008 = 0x70000
149 monitor long 0x1f000008 = 0x60000
151 monitor long 0x1f000008 = 0x70000
152 monitor long 0x1f000000 = 0
156 define spi-write-page
158 set $addrend = $addr + $arg1
161 monitor long 0x1f000000 = 1
162 monitor long 0x1f000008 = 0x70000
163 monitor long 0x1f000008 = 0x60000
167 while ($addr < $addrend)
168 set $val = *((unsigned char *) $addr)
170 set $addr = $addr + 1
173 monitor long 0x1f000008 = 0x70000
174 monitor long 0x1f000000 = 0
178 define spi-erase-sector
181 monitor long 0x1f000000 = 1
182 monitor long 0x1f000008 = 0x70000
183 monitor long 0x1f000008 = 0x60000
186 monitor long 0x1f000008 = 0x70000
187 monitor long 0x1f000000 = 0
192 monitor long 0x1f000000 = 1
194 monitor long 0x1f000008 = 0x70000
195 monitor long 0x1f000008 = 0x60000
200 monitor long 0x1f000008 = 0x60001
201 monitor long 0x1f000008 = 0x60101
204 monitor long 0x1f000008 = 0x60001
206 monitor long 0x1f000008 = 0x70000
207 monitor long 0x1f00000c
208 monitor long 0x1f000000 = 0
214 # Complete flash programming macros.
221 load tools/bin/mips-flasher
228 # Real startup now...
233 target remote localhost:8888
238 #monitor endian little