client/trunk/anago/mmc3_tkrom.ag

   1 board <- {
   2         mappernum = 4, vram_mirrorfind = false, ppu_ramfind = true,
   3         cpu_rom = {
   4                 size_base = 1 * mega, size_max = 4 * mega,
   5                 banksize = 0x2000,
   6         },
   7         cpu_ram = {
   8                 size_base = 0x2000, size_max = 0x2000,
   9                 banksize = 0x2000,
  10         },
  11         ppu_rom = {
  12                 size_base = 1 * mega, size_max = 2 * mega,
  13                 banksize = 0x0400
  14         }
  15 };
  16
  17 function cpu_dump(d, pagesize, banksize)
  18 {
  19         cpu_write(d, 0xa001, 0); //disable W-RAM
  20         for(local i = 0; i < pagesize - 2; i += 2){
  21                 cpu_write(d, 0x8000, 6);
  22                 cpu_write(d, 0x8001, i);
  23                 cpu_write(d, 0x8000, 7);
  24                 cpu_write(d, 0x8001, i | 1);
  25                 cpu_read(d, 0x8000, banksize * 2);
  26         }
  27         cpu_read(d, 0xc000, banksize * 2);
  28 }
  29 function ppu_dump(d, pagesize, banksize)
  30 {
  31         for(local i = 0; i < pagesize; i+=4){
  32                 cpu_write(d, 0x8000, 2);
  33                 cpu_write(d, 0x8001, i);
  34                 cpu_write(d, 0x8000, 3);
  35                 cpu_write(d, 0x8001, i | 1);
  36                 cpu_write(d, 0x8000, 4);
  37                 cpu_write(d, 0x8001, i | 2);
  38                 cpu_write(d, 0x8000, 5);
  39                 cpu_write(d, 0x8001, i | 3);
  40                 ppu_read(d, 0x1000, banksize * 4);
  41         }
  42 }
  43
  44 /*
  45 http://nesdevwiki.org/wiki/MMC3
  46  PRG RAM protect ($A001-$BFFF, odd)
  47 7  bit  0
  48 ---- ----
  49 RWxx xxxx
  50 ||
  51 |+-------- Write protection (0: allow writes; 1: deny writes)
  52 +--------- Chip enable (0: disable chip; 1: enable chip)
  53 */
  54 function cpu_ram_access(d, pagesize, banksize)
  55 {
  56         cpu_write(d, 0xa001, 0x80);
  57         cpu_ramrw(d, 0x6000, banksize);
  58         cpu_write(d, 0xa001, 0x40);
  59 }
  60
  61 /*
  62 CPU memory bank for T*ROM
  63 cpu address|rom address    |page|task
  64 $8000-$9fff|0x02000-0x03fff|1   |write 0x2aaa
  65 $a000-$bfff|n * 0x2000     |n   |write area
  66 $c000-$ffff|0x7c000-0x7ffff|fix |write 0x5555, boot area
  67
  68 PPU memory bank for TLROM TKROM TKSROM
  69 ppu address|rom address    |page|task
  70 $0000-$07ff|0x02800-0x02fff|0x0a|write 0x2aaa
  71 $0800-$0fff|0x05000-0x057ff|0x14|write 0x5555
  72 $1000-$1fff|n * 0x1000     |n   |write area
  73 */
  74 function program_initalize(d, cpu_banksize, ppu_banksize)
  75 {
  76         cpu_write(d, 0xa001, 0); //disable W-RAM
  77
  78         cpu_command(d, 0x0000, 0xa000, cpu_banksize);
  79         cpu_command(d, 0x2aaa, 0x8000, cpu_banksize);
  80         cpu_command(d, 0x5555, 0xc000, 0x4000);
  81         cpu_write(d, 0x8000, 7);
  82         cpu_write(d, 0x8001, 0);
  83         cpu_write(d, 0x8000, 6);
  84         cpu_write(d, 0x8001, 1);
  85
  86         ppu_command(d, 0x0000, 0x1000, ppu_banksize);
  87         ppu_command(d, 0x2aaa, 0x0000, 0x0800);
  88         ppu_command(d, 0x5555, 0x0800, 0x0800);
  89         cpu_write(d, 0x8000, 2);
  90         cpu_write(d, 0x8001, 0);
  91         cpu_write(d, 0x8000, 0);
  92         cpu_write(d, 0x8001, 0x0a);
  93         cpu_write(d, 0x8000, 1);
  94         cpu_write(d, 0x8001, 0x14);
  95 }
  96
  97 function cpu_transfer(d, start, end, cpu_banksize)
  98 {
  99         for(local i = start; i < end - 2; i += 1){
 100                 cpu_write(d, 0x8000, 7);
 101                 cpu_write(d, 0x8001, i);
 102                 cpu_program(d, 0xa000, cpu_banksize);
 103         }
 104         cpu_program(d, 0xc000, cpu_banksize * 2)
 105 }
 106
 107 function ppu_transfer(d, start, end, ppu_banksize)
 108 {
 109         for(local i = start; i < end; i += 4){
 110                 cpu_write(d, 0x8000, 2);
 111                 cpu_write(d, 0x8001, i);
 112                 cpu_write(d, 0x8000, 3);
 113                 cpu_write(d, 0x8001, i | 1);
 114                 cpu_write(d, 0x8000, 4);
 115                 cpu_write(d, 0x8001, i | 2);
 116                 cpu_write(d, 0x8000, 5);
 117                 cpu_write(d, 0x8001, i | 3);
 118                 ppu_program(d, 0x1000, ppu_banksize * 4);
 119         }
 120 }